1 1.1 jmcneill /* $NetBSD: qcom,sm8250.h,v 1.1.1.1 2021/11/07 16:49:57 jmcneill Exp $ */ 2 1.1 jmcneill 3 1.1 jmcneill /* SPDX-License-Identifier: GPL-2.0 */ 4 1.1 jmcneill /* 5 1.1 jmcneill * Qualcomm SM8250 interconnect IDs 6 1.1 jmcneill * 7 1.1 jmcneill * Copyright (c) 2020, The Linux Foundation. All rights reserved. 8 1.1 jmcneill */ 9 1.1 jmcneill 10 1.1 jmcneill #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SM8250_H 11 1.1 jmcneill #define __DT_BINDINGS_INTERCONNECT_QCOM_SM8250_H 12 1.1 jmcneill 13 1.1 jmcneill #define MASTER_A1NOC_CFG 0 14 1.1 jmcneill #define MASTER_QSPI_0 1 15 1.1 jmcneill #define MASTER_QUP_1 2 16 1.1 jmcneill #define MASTER_QUP_2 3 17 1.1 jmcneill #define MASTER_TSIF 4 18 1.1 jmcneill #define MASTER_PCIE_2 5 19 1.1 jmcneill #define MASTER_SDCC_4 6 20 1.1 jmcneill #define MASTER_UFS_MEM 7 21 1.1 jmcneill #define MASTER_USB3 8 22 1.1 jmcneill #define MASTER_USB3_1 9 23 1.1 jmcneill #define A1NOC_SNOC_SLV 10 24 1.1 jmcneill #define SLAVE_ANOC_PCIE_GEM_NOC_1 11 25 1.1 jmcneill #define SLAVE_SERVICE_A1NOC 12 26 1.1 jmcneill 27 1.1 jmcneill #define MASTER_A2NOC_CFG 0 28 1.1 jmcneill #define MASTER_QDSS_BAM 1 29 1.1 jmcneill #define MASTER_QUP_0 2 30 1.1 jmcneill #define MASTER_CNOC_A2NOC 3 31 1.1 jmcneill #define MASTER_CRYPTO_CORE_0 4 32 1.1 jmcneill #define MASTER_IPA 5 33 1.1 jmcneill #define MASTER_PCIE 6 34 1.1 jmcneill #define MASTER_PCIE_1 7 35 1.1 jmcneill #define MASTER_QDSS_ETR 8 36 1.1 jmcneill #define MASTER_SDCC_2 9 37 1.1 jmcneill #define MASTER_UFS_CARD 10 38 1.1 jmcneill #define A2NOC_SNOC_SLV 11 39 1.1 jmcneill #define SLAVE_ANOC_PCIE_GEM_NOC 12 40 1.1 jmcneill #define SLAVE_SERVICE_A2NOC 13 41 1.1 jmcneill 42 1.1 jmcneill #define MASTER_NPU 0 43 1.1 jmcneill #define SLAVE_CDSP_MEM_NOC 1 44 1.1 jmcneill 45 1.1 jmcneill #define SNOC_CNOC_MAS 0 46 1.1 jmcneill #define MASTER_QDSS_DAP 1 47 1.1 jmcneill #define SLAVE_A1NOC_CFG 2 48 1.1 jmcneill #define SLAVE_A2NOC_CFG 3 49 1.1 jmcneill #define SLAVE_AHB2PHY_SOUTH 4 50 1.1 jmcneill #define SLAVE_AHB2PHY_NORTH 5 51 1.1 jmcneill #define SLAVE_AOSS 6 52 1.1 jmcneill #define SLAVE_CAMERA_CFG 7 53 1.1 jmcneill #define SLAVE_CLK_CTL 8 54 1.1 jmcneill #define SLAVE_CDSP_CFG 9 55 1.1 jmcneill #define SLAVE_RBCPR_CX_CFG 10 56 1.1 jmcneill #define SLAVE_RBCPR_MMCX_CFG 11 57 1.1 jmcneill #define SLAVE_RBCPR_MX_CFG 12 58 1.1 jmcneill #define SLAVE_CRYPTO_0_CFG 13 59 1.1 jmcneill #define SLAVE_CX_RDPM 14 60 1.1 jmcneill #define SLAVE_DCC_CFG 15 61 1.1 jmcneill #define SLAVE_CNOC_DDRSS 16 62 1.1 jmcneill #define SLAVE_DISPLAY_CFG 17 63 1.1 jmcneill #define SLAVE_GRAPHICS_3D_CFG 18 64 1.1 jmcneill #define SLAVE_IMEM_CFG 19 65 1.1 jmcneill #define SLAVE_IPA_CFG 20 66 1.1 jmcneill #define SLAVE_IPC_ROUTER_CFG 21 67 1.1 jmcneill #define SLAVE_LPASS 22 68 1.1 jmcneill #define SLAVE_CNOC_MNOC_CFG 23 69 1.1 jmcneill #define SLAVE_NPU_CFG 24 70 1.1 jmcneill #define SLAVE_PCIE_0_CFG 25 71 1.1 jmcneill #define SLAVE_PCIE_1_CFG 26 72 1.1 jmcneill #define SLAVE_PCIE_2_CFG 27 73 1.1 jmcneill #define SLAVE_PDM 28 74 1.1 jmcneill #define SLAVE_PIMEM_CFG 29 75 1.1 jmcneill #define SLAVE_PRNG 30 76 1.1 jmcneill #define SLAVE_QDSS_CFG 31 77 1.1 jmcneill #define SLAVE_QSPI_0 32 78 1.1 jmcneill #define SLAVE_QUP_0 33 79 1.1 jmcneill #define SLAVE_QUP_1 34 80 1.1 jmcneill #define SLAVE_QUP_2 35 81 1.1 jmcneill #define SLAVE_SDCC_2 36 82 1.1 jmcneill #define SLAVE_SDCC_4 37 83 1.1 jmcneill #define SLAVE_SNOC_CFG 38 84 1.1 jmcneill #define SLAVE_TCSR 39 85 1.1 jmcneill #define SLAVE_TLMM_NORTH 40 86 1.1 jmcneill #define SLAVE_TLMM_SOUTH 41 87 1.1 jmcneill #define SLAVE_TLMM_WEST 42 88 1.1 jmcneill #define SLAVE_TSIF 43 89 1.1 jmcneill #define SLAVE_UFS_CARD_CFG 44 90 1.1 jmcneill #define SLAVE_UFS_MEM_CFG 45 91 1.1 jmcneill #define SLAVE_USB3 46 92 1.1 jmcneill #define SLAVE_USB3_1 47 93 1.1 jmcneill #define SLAVE_VENUS_CFG 48 94 1.1 jmcneill #define SLAVE_VSENSE_CTRL_CFG 49 95 1.1 jmcneill #define SLAVE_CNOC_A2NOC 50 96 1.1 jmcneill #define SLAVE_SERVICE_CNOC 51 97 1.1 jmcneill 98 1.1 jmcneill #define MASTER_CNOC_DC_NOC 0 99 1.1 jmcneill #define SLAVE_LLCC_CFG 1 100 1.1 jmcneill #define SLAVE_GEM_NOC_CFG 2 101 1.1 jmcneill 102 1.1 jmcneill #define MASTER_GPU_TCU 0 103 1.1 jmcneill #define MASTER_SYS_TCU 1 104 1.1 jmcneill #define MASTER_AMPSS_M0 2 105 1.1 jmcneill #define MASTER_GEM_NOC_CFG 3 106 1.1 jmcneill #define MASTER_COMPUTE_NOC 4 107 1.1 jmcneill #define MASTER_GRAPHICS_3D 5 108 1.1 jmcneill #define MASTER_MNOC_HF_MEM_NOC 6 109 1.1 jmcneill #define MASTER_MNOC_SF_MEM_NOC 7 110 1.1 jmcneill #define MASTER_ANOC_PCIE_GEM_NOC 8 111 1.1 jmcneill #define MASTER_SNOC_GC_MEM_NOC 9 112 1.1 jmcneill #define MASTER_SNOC_SF_MEM_NOC 10 113 1.1 jmcneill #define SLAVE_GEM_NOC_SNOC 11 114 1.1 jmcneill #define SLAVE_LLCC 12 115 1.1 jmcneill #define SLAVE_MEM_NOC_PCIE_SNOC 13 116 1.1 jmcneill #define SLAVE_SERVICE_GEM_NOC_1 14 117 1.1 jmcneill #define SLAVE_SERVICE_GEM_NOC_2 15 118 1.1 jmcneill #define SLAVE_SERVICE_GEM_NOC 16 119 1.1 jmcneill 120 1.1 jmcneill #define MASTER_IPA_CORE 0 121 1.1 jmcneill #define SLAVE_IPA_CORE 1 122 1.1 jmcneill 123 1.1 jmcneill #define MASTER_LLCC 0 124 1.1 jmcneill #define SLAVE_EBI_CH0 1 125 1.1 jmcneill 126 1.1 jmcneill #define MASTER_CNOC_MNOC_CFG 0 127 1.1 jmcneill #define MASTER_CAMNOC_HF 1 128 1.1 jmcneill #define MASTER_CAMNOC_ICP 2 129 1.1 jmcneill #define MASTER_CAMNOC_SF 3 130 1.1 jmcneill #define MASTER_VIDEO_P0 4 131 1.1 jmcneill #define MASTER_VIDEO_P1 5 132 1.1 jmcneill #define MASTER_VIDEO_PROC 6 133 1.1 jmcneill #define MASTER_MDP_PORT0 7 134 1.1 jmcneill #define MASTER_MDP_PORT1 8 135 1.1 jmcneill #define MASTER_ROTATOR 9 136 1.1 jmcneill #define SLAVE_MNOC_HF_MEM_NOC 10 137 1.1 jmcneill #define SLAVE_MNOC_SF_MEM_NOC 11 138 1.1 jmcneill #define SLAVE_SERVICE_MNOC 12 139 1.1 jmcneill 140 1.1 jmcneill #define MASTER_NPU_SYS 0 141 1.1 jmcneill #define MASTER_NPU_CDP 1 142 1.1 jmcneill #define MASTER_NPU_NOC_CFG 2 143 1.1 jmcneill #define SLAVE_NPU_CAL_DP0 3 144 1.1 jmcneill #define SLAVE_NPU_CAL_DP1 4 145 1.1 jmcneill #define SLAVE_NPU_CP 5 146 1.1 jmcneill #define SLAVE_NPU_INT_DMA_BWMON_CFG 6 147 1.1 jmcneill #define SLAVE_NPU_DPM 7 148 1.1 jmcneill #define SLAVE_ISENSE_CFG 8 149 1.1 jmcneill #define SLAVE_NPU_LLM_CFG 9 150 1.1 jmcneill #define SLAVE_NPU_TCM 10 151 1.1 jmcneill #define SLAVE_NPU_COMPUTE_NOC 11 152 1.1 jmcneill #define SLAVE_SERVICE_NPU_NOC 12 153 1.1 jmcneill 154 1.1 jmcneill #define MASTER_SNOC_CFG 0 155 1.1 jmcneill #define A1NOC_SNOC_MAS 1 156 1.1 jmcneill #define A2NOC_SNOC_MAS 2 157 1.1 jmcneill #define MASTER_GEM_NOC_SNOC 3 158 1.1 jmcneill #define MASTER_GEM_NOC_PCIE_SNOC 4 159 1.1 jmcneill #define MASTER_PIMEM 5 160 1.1 jmcneill #define MASTER_GIC 6 161 1.1 jmcneill #define SLAVE_APPSS 7 162 1.1 jmcneill #define SNOC_CNOC_SLV 8 163 1.1 jmcneill #define SLAVE_SNOC_GEM_NOC_GC 9 164 1.1 jmcneill #define SLAVE_SNOC_GEM_NOC_SF 10 165 1.1 jmcneill #define SLAVE_OCIMEM 11 166 1.1 jmcneill #define SLAVE_PIMEM 12 167 1.1 jmcneill #define SLAVE_SERVICE_SNOC 13 168 1.1 jmcneill #define SLAVE_PCIE_0 14 169 1.1 jmcneill #define SLAVE_PCIE_1 15 170 1.1 jmcneill #define SLAVE_PCIE_2 16 171 1.1 jmcneill #define SLAVE_QDSS_STM 17 172 1.1 jmcneill #define SLAVE_TCU 18 173 1.1 jmcneill 174 1.1 jmcneill #endif 175