1 /* $NetBSD: stm32f4-rcc.h,v 1.1.1.1.4.2 2017/07/18 16:08:58 snj Exp $ */ 2 3 /* 4 * This header provides constants for the STM32F4 RCC IP 5 */ 6 7 #ifndef _DT_BINDINGS_MFD_STM32F4_RCC_H 8 #define _DT_BINDINGS_MFD_STM32F4_RCC_H 9 10 /* AHB1 */ 11 #define STM32F4_RCC_AHB1_GPIOA 0 12 #define STM32F4_RCC_AHB1_GPIOB 1 13 #define STM32F4_RCC_AHB1_GPIOC 2 14 #define STM32F4_RCC_AHB1_GPIOD 3 15 #define STM32F4_RCC_AHB1_GPIOE 4 16 #define STM32F4_RCC_AHB1_GPIOF 5 17 #define STM32F4_RCC_AHB1_GPIOG 6 18 #define STM32F4_RCC_AHB1_GPIOH 7 19 #define STM32F4_RCC_AHB1_GPIOI 8 20 #define STM32F4_RCC_AHB1_GPIOJ 9 21 #define STM32F4_RCC_AHB1_GPIOK 10 22 #define STM32F4_RCC_AHB1_CRC 12 23 #define STM32F4_RCC_AHB1_BKPSRAM 18 24 #define STM32F4_RCC_AHB1_CCMDATARAM 20 25 #define STM32F4_RCC_AHB1_DMA1 21 26 #define STM32F4_RCC_AHB1_DMA2 22 27 #define STM32F4_RCC_AHB1_DMA2D 23 28 #define STM32F4_RCC_AHB1_ETHMAC 25 29 #define STM32F4_RCC_AHB1_ETHMACTX 26 30 #define STM32F4_RCC_AHB1_ETHMACRX 27 31 #define STM32F4_RCC_AHB1_ETHMACPTP 28 32 #define STM32F4_RCC_AHB1_OTGHS 29 33 #define STM32F4_RCC_AHB1_OTGHSULPI 30 34 35 #define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8)) 36 #define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit) 37 38 39 /* AHB2 */ 40 #define STM32F4_RCC_AHB2_DCMI 0 41 #define STM32F4_RCC_AHB2_CRYP 4 42 #define STM32F4_RCC_AHB2_HASH 5 43 #define STM32F4_RCC_AHB2_RNG 6 44 #define STM32F4_RCC_AHB2_OTGFS 7 45 46 #define STM32F4_AHB2_RESET(bit) (STM32F4_RCC_AHB2_##bit + (0x14 * 8)) 47 #define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + 0x20) 48 49 /* AHB3 */ 50 #define STM32F4_RCC_AHB3_FMC 0 51 #define STM32F4_RCC_AHB3_QSPI 1 52 53 #define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8)) 54 #define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + 0x40) 55 56 /* APB1 */ 57 #define STM32F4_RCC_APB1_TIM2 0 58 #define STM32F4_RCC_APB1_TIM3 1 59 #define STM32F4_RCC_APB1_TIM4 2 60 #define STM32F4_RCC_APB1_TIM5 3 61 #define STM32F4_RCC_APB1_TIM6 4 62 #define STM32F4_RCC_APB1_TIM7 5 63 #define STM32F4_RCC_APB1_TIM12 6 64 #define STM32F4_RCC_APB1_TIM13 7 65 #define STM32F4_RCC_APB1_TIM14 8 66 #define STM32F4_RCC_APB1_WWDG 11 67 #define STM32F4_RCC_APB1_SPI2 14 68 #define STM32F4_RCC_APB1_SPI3 15 69 #define STM32F4_RCC_APB1_UART2 17 70 #define STM32F4_RCC_APB1_UART3 18 71 #define STM32F4_RCC_APB1_UART4 19 72 #define STM32F4_RCC_APB1_UART5 20 73 #define STM32F4_RCC_APB1_I2C1 21 74 #define STM32F4_RCC_APB1_I2C2 22 75 #define STM32F4_RCC_APB1_I2C3 23 76 #define STM32F4_RCC_APB1_CAN1 25 77 #define STM32F4_RCC_APB1_CAN2 26 78 #define STM32F4_RCC_APB1_PWR 28 79 #define STM32F4_RCC_APB1_DAC 29 80 #define STM32F4_RCC_APB1_UART7 30 81 #define STM32F4_RCC_APB1_UART8 31 82 83 #define STM32F4_APB1_RESET(bit) (STM32F4_RCC_APB1_##bit + (0x20 * 8)) 84 #define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + 0x80) 85 86 /* APB2 */ 87 #define STM32F4_RCC_APB2_TIM1 0 88 #define STM32F4_RCC_APB2_TIM8 1 89 #define STM32F4_RCC_APB2_USART1 4 90 #define STM32F4_RCC_APB2_USART6 5 91 #define STM32F4_RCC_APB2_ADC1 8 92 #define STM32F4_RCC_APB2_ADC2 9 93 #define STM32F4_RCC_APB2_ADC3 10 94 #define STM32F4_RCC_APB2_SDIO 11 95 #define STM32F4_RCC_APB2_SPI1 12 96 #define STM32F4_RCC_APB2_SPI4 13 97 #define STM32F4_RCC_APB2_SYSCFG 14 98 #define STM32F4_RCC_APB2_TIM9 16 99 #define STM32F4_RCC_APB2_TIM10 17 100 #define STM32F4_RCC_APB2_TIM11 18 101 #define STM32F4_RCC_APB2_SPI5 20 102 #define STM32F4_RCC_APB2_SPI6 21 103 #define STM32F4_RCC_APB2_SAI1 22 104 #define STM32F4_RCC_APB2_LTDC 26 105 #define STM32F4_RCC_APB2_DSI 27 106 107 #define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8)) 108 #define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + 0xA0) 109 110 #endif /* _DT_BINDINGS_MFD_STM32F4_RCC_H */ 111