1 1.1 jmcneill /* $NetBSD: pads-imx8qxp.h,v 1.1.1.1 2019/05/25 11:29:13 jmcneill Exp $ */ 2 1.1 jmcneill 3 1.1 jmcneill /* SPDX-License-Identifier: GPL-2.0+ */ 4 1.1 jmcneill /* 5 1.1 jmcneill * Copyright (C) 2016 Freescale Semiconductor, Inc. 6 1.1 jmcneill * Copyright 2017~2018 NXP 7 1.1 jmcneill */ 8 1.1 jmcneill 9 1.1 jmcneill #ifndef _IMX8QXP_PADS_H 10 1.1 jmcneill #define _IMX8QXP_PADS_H 11 1.1 jmcneill 12 1.1 jmcneill /* pin id */ 13 1.1 jmcneill #define IMX8QXP_PCIE_CTRL0_PERST_B 0 14 1.1 jmcneill #define IMX8QXP_PCIE_CTRL0_CLKREQ_B 1 15 1.1 jmcneill #define IMX8QXP_PCIE_CTRL0_WAKE_B 2 16 1.1 jmcneill #define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_PCIESEP 3 17 1.1 jmcneill #define IMX8QXP_USB_SS3_TC0 4 18 1.1 jmcneill #define IMX8QXP_USB_SS3_TC1 5 19 1.1 jmcneill #define IMX8QXP_USB_SS3_TC2 6 20 1.1 jmcneill #define IMX8QXP_USB_SS3_TC3 7 21 1.1 jmcneill #define IMX8QXP_COMP_CTL_GPIO_3V3_USB3IO 8 22 1.1 jmcneill #define IMX8QXP_EMMC0_CLK 9 23 1.1 jmcneill #define IMX8QXP_EMMC0_CMD 10 24 1.1 jmcneill #define IMX8QXP_EMMC0_DATA0 11 25 1.1 jmcneill #define IMX8QXP_EMMC0_DATA1 12 26 1.1 jmcneill #define IMX8QXP_EMMC0_DATA2 13 27 1.1 jmcneill #define IMX8QXP_EMMC0_DATA3 14 28 1.1 jmcneill #define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_SD1FIX0 15 29 1.1 jmcneill #define IMX8QXP_EMMC0_DATA4 16 30 1.1 jmcneill #define IMX8QXP_EMMC0_DATA5 17 31 1.1 jmcneill #define IMX8QXP_EMMC0_DATA6 18 32 1.1 jmcneill #define IMX8QXP_EMMC0_DATA7 19 33 1.1 jmcneill #define IMX8QXP_EMMC0_STROBE 20 34 1.1 jmcneill #define IMX8QXP_EMMC0_RESET_B 21 35 1.1 jmcneill #define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_SD1FIX1 22 36 1.1 jmcneill #define IMX8QXP_USDHC1_RESET_B 23 37 1.1 jmcneill #define IMX8QXP_USDHC1_VSELECT 24 38 1.1 jmcneill #define IMX8QXP_CTL_NAND_RE_P_N 25 39 1.1 jmcneill #define IMX8QXP_USDHC1_WP 26 40 1.1 jmcneill #define IMX8QXP_USDHC1_CD_B 27 41 1.1 jmcneill #define IMX8QXP_CTL_NAND_DQS_P_N 28 42 1.1 jmcneill #define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_VSELSEP 29 43 1.1 jmcneill #define IMX8QXP_USDHC1_CLK 30 44 1.1 jmcneill #define IMX8QXP_USDHC1_CMD 31 45 1.1 jmcneill #define IMX8QXP_USDHC1_DATA0 32 46 1.1 jmcneill #define IMX8QXP_USDHC1_DATA1 33 47 1.1 jmcneill #define IMX8QXP_USDHC1_DATA2 34 48 1.1 jmcneill #define IMX8QXP_USDHC1_DATA3 35 49 1.1 jmcneill #define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_VSEL3 36 50 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TXC 37 51 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TX_CTL 38 52 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TXD0 39 53 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TXD1 40 54 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TXD2 41 55 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TXD3 42 56 1.1 jmcneill #define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 43 57 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RXC 44 58 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RX_CTL 45 59 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RXD0 46 60 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RXD1 47 61 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RXD2 48 62 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RXD3 49 63 1.1 jmcneill #define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB1 50 64 1.1 jmcneill #define IMX8QXP_ENET0_REFCLK_125M_25M 51 65 1.1 jmcneill #define IMX8QXP_ENET0_MDIO 52 66 1.1 jmcneill #define IMX8QXP_ENET0_MDC 53 67 1.1 jmcneill #define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIOCT 54 68 1.1 jmcneill #define IMX8QXP_ESAI0_FSR 55 69 1.1 jmcneill #define IMX8QXP_ESAI0_FST 56 70 1.1 jmcneill #define IMX8QXP_ESAI0_SCKR 57 71 1.1 jmcneill #define IMX8QXP_ESAI0_SCKT 58 72 1.1 jmcneill #define IMX8QXP_ESAI0_TX0 59 73 1.1 jmcneill #define IMX8QXP_ESAI0_TX1 60 74 1.1 jmcneill #define IMX8QXP_ESAI0_TX2_RX3 61 75 1.1 jmcneill #define IMX8QXP_ESAI0_TX3_RX2 62 76 1.1 jmcneill #define IMX8QXP_ESAI0_TX4_RX1 63 77 1.1 jmcneill #define IMX8QXP_ESAI0_TX5_RX0 64 78 1.1 jmcneill #define IMX8QXP_SPDIF0_RX 65 79 1.1 jmcneill #define IMX8QXP_SPDIF0_TX 66 80 1.1 jmcneill #define IMX8QXP_SPDIF0_EXT_CLK 67 81 1.1 jmcneill #define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIORHB 68 82 1.1 jmcneill #define IMX8QXP_SPI3_SCK 69 83 1.1 jmcneill #define IMX8QXP_SPI3_SDO 70 84 1.1 jmcneill #define IMX8QXP_SPI3_SDI 71 85 1.1 jmcneill #define IMX8QXP_SPI3_CS0 72 86 1.1 jmcneill #define IMX8QXP_SPI3_CS1 73 87 1.1 jmcneill #define IMX8QXP_MCLK_IN1 74 88 1.1 jmcneill #define IMX8QXP_MCLK_IN0 75 89 1.1 jmcneill #define IMX8QXP_MCLK_OUT0 76 90 1.1 jmcneill #define IMX8QXP_UART1_TX 77 91 1.1 jmcneill #define IMX8QXP_UART1_RX 78 92 1.1 jmcneill #define IMX8QXP_UART1_RTS_B 79 93 1.1 jmcneill #define IMX8QXP_UART1_CTS_B 80 94 1.1 jmcneill #define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIORHK 81 95 1.1 jmcneill #define IMX8QXP_SAI0_TXD 82 96 1.1 jmcneill #define IMX8QXP_SAI0_TXC 83 97 1.1 jmcneill #define IMX8QXP_SAI0_RXD 84 98 1.1 jmcneill #define IMX8QXP_SAI0_TXFS 85 99 1.1 jmcneill #define IMX8QXP_SAI1_RXD 86 100 1.1 jmcneill #define IMX8QXP_SAI1_RXC 87 101 1.1 jmcneill #define IMX8QXP_SAI1_RXFS 88 102 1.1 jmcneill #define IMX8QXP_SPI2_CS0 89 103 1.1 jmcneill #define IMX8QXP_SPI2_SDO 90 104 1.1 jmcneill #define IMX8QXP_SPI2_SDI 91 105 1.1 jmcneill #define IMX8QXP_SPI2_SCK 92 106 1.1 jmcneill #define IMX8QXP_SPI0_SCK 93 107 1.1 jmcneill #define IMX8QXP_SPI0_SDI 94 108 1.1 jmcneill #define IMX8QXP_SPI0_SDO 95 109 1.1 jmcneill #define IMX8QXP_SPI0_CS1 96 110 1.1 jmcneill #define IMX8QXP_SPI0_CS0 97 111 1.1 jmcneill #define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIORHT 98 112 1.1 jmcneill #define IMX8QXP_ADC_IN1 99 113 1.1 jmcneill #define IMX8QXP_ADC_IN0 100 114 1.1 jmcneill #define IMX8QXP_ADC_IN3 101 115 1.1 jmcneill #define IMX8QXP_ADC_IN2 102 116 1.1 jmcneill #define IMX8QXP_ADC_IN5 103 117 1.1 jmcneill #define IMX8QXP_ADC_IN4 104 118 1.1 jmcneill #define IMX8QXP_FLEXCAN0_RX 105 119 1.1 jmcneill #define IMX8QXP_FLEXCAN0_TX 106 120 1.1 jmcneill #define IMX8QXP_FLEXCAN1_RX 107 121 1.1 jmcneill #define IMX8QXP_FLEXCAN1_TX 108 122 1.1 jmcneill #define IMX8QXP_FLEXCAN2_RX 109 123 1.1 jmcneill #define IMX8QXP_FLEXCAN2_TX 110 124 1.1 jmcneill #define IMX8QXP_UART0_RX 111 125 1.1 jmcneill #define IMX8QXP_UART0_TX 112 126 1.1 jmcneill #define IMX8QXP_UART2_TX 113 127 1.1 jmcneill #define IMX8QXP_UART2_RX 114 128 1.1 jmcneill #define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIOLH 115 129 1.1 jmcneill #define IMX8QXP_MIPI_DSI0_I2C0_SCL 116 130 1.1 jmcneill #define IMX8QXP_MIPI_DSI0_I2C0_SDA 117 131 1.1 jmcneill #define IMX8QXP_MIPI_DSI0_GPIO0_00 118 132 1.1 jmcneill #define IMX8QXP_MIPI_DSI0_GPIO0_01 119 133 1.1 jmcneill #define IMX8QXP_MIPI_DSI1_I2C0_SCL 120 134 1.1 jmcneill #define IMX8QXP_MIPI_DSI1_I2C0_SDA 121 135 1.1 jmcneill #define IMX8QXP_MIPI_DSI1_GPIO0_00 122 136 1.1 jmcneill #define IMX8QXP_MIPI_DSI1_GPIO0_01 123 137 1.1 jmcneill #define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_MIPIDSIGPIO 124 138 1.1 jmcneill #define IMX8QXP_JTAG_TRST_B 125 139 1.1 jmcneill #define IMX8QXP_PMIC_I2C_SCL 126 140 1.1 jmcneill #define IMX8QXP_PMIC_I2C_SDA 127 141 1.1 jmcneill #define IMX8QXP_PMIC_INT_B 128 142 1.1 jmcneill #define IMX8QXP_SCU_GPIO0_00 129 143 1.1 jmcneill #define IMX8QXP_SCU_GPIO0_01 130 144 1.1 jmcneill #define IMX8QXP_SCU_PMIC_STANDBY 131 145 1.1 jmcneill #define IMX8QXP_SCU_BOOT_MODE0 132 146 1.1 jmcneill #define IMX8QXP_SCU_BOOT_MODE1 133 147 1.1 jmcneill #define IMX8QXP_SCU_BOOT_MODE2 134 148 1.1 jmcneill #define IMX8QXP_SCU_BOOT_MODE3 135 149 1.1 jmcneill #define IMX8QXP_CSI_D00 136 150 1.1 jmcneill #define IMX8QXP_CSI_D01 137 151 1.1 jmcneill #define IMX8QXP_CSI_D02 138 152 1.1 jmcneill #define IMX8QXP_CSI_D03 139 153 1.1 jmcneill #define IMX8QXP_CSI_D04 140 154 1.1 jmcneill #define IMX8QXP_CSI_D05 141 155 1.1 jmcneill #define IMX8QXP_CSI_D06 142 156 1.1 jmcneill #define IMX8QXP_CSI_D07 143 157 1.1 jmcneill #define IMX8QXP_CSI_HSYNC 144 158 1.1 jmcneill #define IMX8QXP_CSI_VSYNC 145 159 1.1 jmcneill #define IMX8QXP_CSI_PCLK 146 160 1.1 jmcneill #define IMX8QXP_CSI_MCLK 147 161 1.1 jmcneill #define IMX8QXP_CSI_EN 148 162 1.1 jmcneill #define IMX8QXP_CSI_RESET 149 163 1.1 jmcneill #define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIORHD 150 164 1.1 jmcneill #define IMX8QXP_MIPI_CSI0_MCLK_OUT 151 165 1.1 jmcneill #define IMX8QXP_MIPI_CSI0_I2C0_SCL 152 166 1.1 jmcneill #define IMX8QXP_MIPI_CSI0_I2C0_SDA 153 167 1.1 jmcneill #define IMX8QXP_MIPI_CSI0_GPIO0_01 154 168 1.1 jmcneill #define IMX8QXP_MIPI_CSI0_GPIO0_00 155 169 1.1 jmcneill #define IMX8QXP_QSPI0A_DATA0 156 170 1.1 jmcneill #define IMX8QXP_QSPI0A_DATA1 157 171 1.1 jmcneill #define IMX8QXP_QSPI0A_DATA2 158 172 1.1 jmcneill #define IMX8QXP_QSPI0A_DATA3 159 173 1.1 jmcneill #define IMX8QXP_QSPI0A_DQS 160 174 1.1 jmcneill #define IMX8QXP_QSPI0A_SS0_B 161 175 1.1 jmcneill #define IMX8QXP_QSPI0A_SS1_B 162 176 1.1 jmcneill #define IMX8QXP_QSPI0A_SCLK 163 177 1.1 jmcneill #define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_QSPI0A 164 178 1.1 jmcneill #define IMX8QXP_QSPI0B_SCLK 165 179 1.1 jmcneill #define IMX8QXP_QSPI0B_DATA0 166 180 1.1 jmcneill #define IMX8QXP_QSPI0B_DATA1 167 181 1.1 jmcneill #define IMX8QXP_QSPI0B_DATA2 168 182 1.1 jmcneill #define IMX8QXP_QSPI0B_DATA3 169 183 1.1 jmcneill #define IMX8QXP_QSPI0B_DQS 170 184 1.1 jmcneill #define IMX8QXP_QSPI0B_SS0_B 171 185 1.1 jmcneill #define IMX8QXP_QSPI0B_SS1_B 172 186 1.1 jmcneill #define IMX8QXP_COMP_CTL_GPIO_1V8_3V3_QSPI0B 173 187 1.1 jmcneill 188 1.1 jmcneill /* 189 1.1 jmcneill * format: <pin_id mux_mode> 190 1.1 jmcneill */ 191 1.1 jmcneill #define IMX8QXP_PCIE_CTRL0_PERST_B_HSIO_PCIE0_PERST_B IMX8QXP_PCIE_CTRL0_PERST_B 0 192 1.1 jmcneill #define IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00 IMX8QXP_PCIE_CTRL0_PERST_B 4 193 1.1 jmcneill #define IMX8QXP_PCIE_CTRL0_CLKREQ_B_HSIO_PCIE0_CLKREQ_B IMX8QXP_PCIE_CTRL0_CLKREQ_B 0 194 1.1 jmcneill #define IMX8QXP_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01 IMX8QXP_PCIE_CTRL0_CLKREQ_B 4 195 1.1 jmcneill #define IMX8QXP_PCIE_CTRL0_WAKE_B_HSIO_PCIE0_WAKE_B IMX8QXP_PCIE_CTRL0_WAKE_B 0 196 1.1 jmcneill #define IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02 IMX8QXP_PCIE_CTRL0_WAKE_B 4 197 1.1 jmcneill #define IMX8QXP_USB_SS3_TC0_ADMA_I2C1_SCL IMX8QXP_USB_SS3_TC0 0 198 1.1 jmcneill #define IMX8QXP_USB_SS3_TC0_CONN_USB_OTG1_PWR IMX8QXP_USB_SS3_TC0 1 199 1.1 jmcneill #define IMX8QXP_USB_SS3_TC0_CONN_USB_OTG2_PWR IMX8QXP_USB_SS3_TC0 2 200 1.1 jmcneill #define IMX8QXP_USB_SS3_TC0_LSIO_GPIO4_IO03 IMX8QXP_USB_SS3_TC0 4 201 1.1 jmcneill #define IMX8QXP_USB_SS3_TC1_ADMA_I2C1_SCL IMX8QXP_USB_SS3_TC1 0 202 1.1 jmcneill #define IMX8QXP_USB_SS3_TC1_CONN_USB_OTG2_PWR IMX8QXP_USB_SS3_TC1 1 203 1.1 jmcneill #define IMX8QXP_USB_SS3_TC1_LSIO_GPIO4_IO04 IMX8QXP_USB_SS3_TC1 4 204 1.1 jmcneill #define IMX8QXP_USB_SS3_TC2_ADMA_I2C1_SDA IMX8QXP_USB_SS3_TC2 0 205 1.1 jmcneill #define IMX8QXP_USB_SS3_TC2_CONN_USB_OTG1_OC IMX8QXP_USB_SS3_TC2 1 206 1.1 jmcneill #define IMX8QXP_USB_SS3_TC2_CONN_USB_OTG2_OC IMX8QXP_USB_SS3_TC2 2 207 1.1 jmcneill #define IMX8QXP_USB_SS3_TC2_LSIO_GPIO4_IO05 IMX8QXP_USB_SS3_TC2 4 208 1.1 jmcneill #define IMX8QXP_USB_SS3_TC3_ADMA_I2C1_SDA IMX8QXP_USB_SS3_TC3 0 209 1.1 jmcneill #define IMX8QXP_USB_SS3_TC3_CONN_USB_OTG2_OC IMX8QXP_USB_SS3_TC3 1 210 1.1 jmcneill #define IMX8QXP_USB_SS3_TC3_LSIO_GPIO4_IO06 IMX8QXP_USB_SS3_TC3 4 211 1.1 jmcneill #define IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK IMX8QXP_EMMC0_CLK 0 212 1.1 jmcneill #define IMX8QXP_EMMC0_CLK_CONN_NAND_READY_B IMX8QXP_EMMC0_CLK 1 213 1.1 jmcneill #define IMX8QXP_EMMC0_CLK_LSIO_GPIO4_IO07 IMX8QXP_EMMC0_CLK 4 214 1.1 jmcneill #define IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD IMX8QXP_EMMC0_CMD 0 215 1.1 jmcneill #define IMX8QXP_EMMC0_CMD_CONN_NAND_DQS IMX8QXP_EMMC0_CMD 1 216 1.1 jmcneill #define IMX8QXP_EMMC0_CMD_LSIO_GPIO4_IO08 IMX8QXP_EMMC0_CMD 4 217 1.1 jmcneill #define IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 IMX8QXP_EMMC0_DATA0 0 218 1.1 jmcneill #define IMX8QXP_EMMC0_DATA0_CONN_NAND_DATA00 IMX8QXP_EMMC0_DATA0 1 219 1.1 jmcneill #define IMX8QXP_EMMC0_DATA0_LSIO_GPIO4_IO09 IMX8QXP_EMMC0_DATA0 4 220 1.1 jmcneill #define IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 IMX8QXP_EMMC0_DATA1 0 221 1.1 jmcneill #define IMX8QXP_EMMC0_DATA1_CONN_NAND_DATA01 IMX8QXP_EMMC0_DATA1 1 222 1.1 jmcneill #define IMX8QXP_EMMC0_DATA1_LSIO_GPIO4_IO10 IMX8QXP_EMMC0_DATA1 4 223 1.1 jmcneill #define IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 IMX8QXP_EMMC0_DATA2 0 224 1.1 jmcneill #define IMX8QXP_EMMC0_DATA2_CONN_NAND_DATA02 IMX8QXP_EMMC0_DATA2 1 225 1.1 jmcneill #define IMX8QXP_EMMC0_DATA2_LSIO_GPIO4_IO11 IMX8QXP_EMMC0_DATA2 4 226 1.1 jmcneill #define IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 IMX8QXP_EMMC0_DATA3 0 227 1.1 jmcneill #define IMX8QXP_EMMC0_DATA3_CONN_NAND_DATA03 IMX8QXP_EMMC0_DATA3 1 228 1.1 jmcneill #define IMX8QXP_EMMC0_DATA3_LSIO_GPIO4_IO12 IMX8QXP_EMMC0_DATA3 4 229 1.1 jmcneill #define IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 IMX8QXP_EMMC0_DATA4 0 230 1.1 jmcneill #define IMX8QXP_EMMC0_DATA4_CONN_NAND_DATA04 IMX8QXP_EMMC0_DATA4 1 231 1.1 jmcneill #define IMX8QXP_EMMC0_DATA4_CONN_EMMC0_WP IMX8QXP_EMMC0_DATA4 3 232 1.1 jmcneill #define IMX8QXP_EMMC0_DATA4_LSIO_GPIO4_IO13 IMX8QXP_EMMC0_DATA4 4 233 1.1 jmcneill #define IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 IMX8QXP_EMMC0_DATA5 0 234 1.1 jmcneill #define IMX8QXP_EMMC0_DATA5_CONN_NAND_DATA05 IMX8QXP_EMMC0_DATA5 1 235 1.1 jmcneill #define IMX8QXP_EMMC0_DATA5_CONN_EMMC0_VSELECT IMX8QXP_EMMC0_DATA5 3 236 1.1 jmcneill #define IMX8QXP_EMMC0_DATA5_LSIO_GPIO4_IO14 IMX8QXP_EMMC0_DATA5 4 237 1.1 jmcneill #define IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 IMX8QXP_EMMC0_DATA6 0 238 1.1 jmcneill #define IMX8QXP_EMMC0_DATA6_CONN_NAND_DATA06 IMX8QXP_EMMC0_DATA6 1 239 1.1 jmcneill #define IMX8QXP_EMMC0_DATA6_CONN_MLB_CLK IMX8QXP_EMMC0_DATA6 3 240 1.1 jmcneill #define IMX8QXP_EMMC0_DATA6_LSIO_GPIO4_IO15 IMX8QXP_EMMC0_DATA6 4 241 1.1 jmcneill #define IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 IMX8QXP_EMMC0_DATA7 0 242 1.1 jmcneill #define IMX8QXP_EMMC0_DATA7_CONN_NAND_DATA07 IMX8QXP_EMMC0_DATA7 1 243 1.1 jmcneill #define IMX8QXP_EMMC0_DATA7_CONN_MLB_SIG IMX8QXP_EMMC0_DATA7 3 244 1.1 jmcneill #define IMX8QXP_EMMC0_DATA7_LSIO_GPIO4_IO16 IMX8QXP_EMMC0_DATA7 4 245 1.1 jmcneill #define IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE IMX8QXP_EMMC0_STROBE 0 246 1.1 jmcneill #define IMX8QXP_EMMC0_STROBE_CONN_NAND_CLE IMX8QXP_EMMC0_STROBE 1 247 1.1 jmcneill #define IMX8QXP_EMMC0_STROBE_CONN_MLB_DATA IMX8QXP_EMMC0_STROBE 3 248 1.1 jmcneill #define IMX8QXP_EMMC0_STROBE_LSIO_GPIO4_IO17 IMX8QXP_EMMC0_STROBE 4 249 1.1 jmcneill #define IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B IMX8QXP_EMMC0_RESET_B 0 250 1.1 jmcneill #define IMX8QXP_EMMC0_RESET_B_CONN_NAND_WP_B IMX8QXP_EMMC0_RESET_B 1 251 1.1 jmcneill #define IMX8QXP_EMMC0_RESET_B_LSIO_GPIO4_IO18 IMX8QXP_EMMC0_RESET_B 4 252 1.1 jmcneill #define IMX8QXP_USDHC1_RESET_B_CONN_USDHC1_RESET_B IMX8QXP_USDHC1_RESET_B 0 253 1.1 jmcneill #define IMX8QXP_USDHC1_RESET_B_CONN_NAND_RE_N IMX8QXP_USDHC1_RESET_B 1 254 1.1 jmcneill #define IMX8QXP_USDHC1_RESET_B_ADMA_SPI2_SCK IMX8QXP_USDHC1_RESET_B 2 255 1.1 jmcneill #define IMX8QXP_USDHC1_RESET_B_LSIO_GPIO4_IO19 IMX8QXP_USDHC1_RESET_B 4 256 1.1 jmcneill #define IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT IMX8QXP_USDHC1_VSELECT 0 257 1.1 jmcneill #define IMX8QXP_USDHC1_VSELECT_CONN_NAND_RE_P IMX8QXP_USDHC1_VSELECT 1 258 1.1 jmcneill #define IMX8QXP_USDHC1_VSELECT_ADMA_SPI2_SDO IMX8QXP_USDHC1_VSELECT 2 259 1.1 jmcneill #define IMX8QXP_USDHC1_VSELECT_CONN_NAND_RE_B IMX8QXP_USDHC1_VSELECT 3 260 1.1 jmcneill #define IMX8QXP_USDHC1_VSELECT_LSIO_GPIO4_IO20 IMX8QXP_USDHC1_VSELECT 4 261 1.1 jmcneill #define IMX8QXP_USDHC1_WP_CONN_USDHC1_WP IMX8QXP_USDHC1_WP 0 262 1.1 jmcneill #define IMX8QXP_USDHC1_WP_CONN_NAND_DQS_N IMX8QXP_USDHC1_WP 1 263 1.1 jmcneill #define IMX8QXP_USDHC1_WP_ADMA_SPI2_SDI IMX8QXP_USDHC1_WP 2 264 1.1 jmcneill #define IMX8QXP_USDHC1_WP_LSIO_GPIO4_IO21 IMX8QXP_USDHC1_WP 4 265 1.1 jmcneill #define IMX8QXP_USDHC1_CD_B_CONN_USDHC1_CD_B IMX8QXP_USDHC1_CD_B 0 266 1.1 jmcneill #define IMX8QXP_USDHC1_CD_B_CONN_NAND_DQS_P IMX8QXP_USDHC1_CD_B 1 267 1.1 jmcneill #define IMX8QXP_USDHC1_CD_B_ADMA_SPI2_CS0 IMX8QXP_USDHC1_CD_B 2 268 1.1 jmcneill #define IMX8QXP_USDHC1_CD_B_CONN_NAND_DQS IMX8QXP_USDHC1_CD_B 3 269 1.1 jmcneill #define IMX8QXP_USDHC1_CD_B_LSIO_GPIO4_IO22 IMX8QXP_USDHC1_CD_B 4 270 1.1 jmcneill #define IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK IMX8QXP_USDHC1_CLK 0 271 1.1 jmcneill #define IMX8QXP_USDHC1_CLK_ADMA_UART3_RX IMX8QXP_USDHC1_CLK 2 272 1.1 jmcneill #define IMX8QXP_USDHC1_CLK_LSIO_GPIO4_IO23 IMX8QXP_USDHC1_CLK 4 273 1.1 jmcneill #define IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD IMX8QXP_USDHC1_CMD 0 274 1.1 jmcneill #define IMX8QXP_USDHC1_CMD_CONN_NAND_CE0_B IMX8QXP_USDHC1_CMD 1 275 1.1 jmcneill #define IMX8QXP_USDHC1_CMD_ADMA_MQS_R IMX8QXP_USDHC1_CMD 2 276 1.1 jmcneill #define IMX8QXP_USDHC1_CMD_LSIO_GPIO4_IO24 IMX8QXP_USDHC1_CMD 4 277 1.1 jmcneill #define IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 IMX8QXP_USDHC1_DATA0 0 278 1.1 jmcneill #define IMX8QXP_USDHC1_DATA0_CONN_NAND_CE1_B IMX8QXP_USDHC1_DATA0 1 279 1.1 jmcneill #define IMX8QXP_USDHC1_DATA0_ADMA_MQS_L IMX8QXP_USDHC1_DATA0 2 280 1.1 jmcneill #define IMX8QXP_USDHC1_DATA0_LSIO_GPIO4_IO25 IMX8QXP_USDHC1_DATA0 4 281 1.1 jmcneill #define IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 IMX8QXP_USDHC1_DATA1 0 282 1.1 jmcneill #define IMX8QXP_USDHC1_DATA1_CONN_NAND_RE_B IMX8QXP_USDHC1_DATA1 1 283 1.1 jmcneill #define IMX8QXP_USDHC1_DATA1_ADMA_UART3_TX IMX8QXP_USDHC1_DATA1 2 284 1.1 jmcneill #define IMX8QXP_USDHC1_DATA1_LSIO_GPIO4_IO26 IMX8QXP_USDHC1_DATA1 4 285 1.1 jmcneill #define IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 IMX8QXP_USDHC1_DATA2 0 286 1.1 jmcneill #define IMX8QXP_USDHC1_DATA2_CONN_NAND_WE_B IMX8QXP_USDHC1_DATA2 1 287 1.1 jmcneill #define IMX8QXP_USDHC1_DATA2_ADMA_UART3_CTS_B IMX8QXP_USDHC1_DATA2 2 288 1.1 jmcneill #define IMX8QXP_USDHC1_DATA2_LSIO_GPIO4_IO27 IMX8QXP_USDHC1_DATA2 4 289 1.1 jmcneill #define IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 IMX8QXP_USDHC1_DATA3 0 290 1.1 jmcneill #define IMX8QXP_USDHC1_DATA3_CONN_NAND_ALE IMX8QXP_USDHC1_DATA3 1 291 1.1 jmcneill #define IMX8QXP_USDHC1_DATA3_ADMA_UART3_RTS_B IMX8QXP_USDHC1_DATA3 2 292 1.1 jmcneill #define IMX8QXP_USDHC1_DATA3_LSIO_GPIO4_IO28 IMX8QXP_USDHC1_DATA3 4 293 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC IMX8QXP_ENET0_RGMII_TXC 0 294 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RCLK50M_OUT IMX8QXP_ENET0_RGMII_TXC 1 295 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RCLK50M_IN IMX8QXP_ENET0_RGMII_TXC 2 296 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TXC_CONN_NAND_CE1_B IMX8QXP_ENET0_RGMII_TXC 3 297 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TXC_LSIO_GPIO4_IO29 IMX8QXP_ENET0_RGMII_TXC 4 298 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL IMX8QXP_ENET0_RGMII_TX_CTL 0 299 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TX_CTL_CONN_USDHC1_RESET_B IMX8QXP_ENET0_RGMII_TX_CTL 3 300 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TX_CTL_LSIO_GPIO4_IO30 IMX8QXP_ENET0_RGMII_TX_CTL 4 301 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 IMX8QXP_ENET0_RGMII_TXD0 0 302 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TXD0_CONN_USDHC1_VSELECT IMX8QXP_ENET0_RGMII_TXD0 3 303 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TXD0_LSIO_GPIO4_IO31 IMX8QXP_ENET0_RGMII_TXD0 4 304 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 IMX8QXP_ENET0_RGMII_TXD1 0 305 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TXD1_CONN_USDHC1_WP IMX8QXP_ENET0_RGMII_TXD1 3 306 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TXD1_LSIO_GPIO5_IO00 IMX8QXP_ENET0_RGMII_TXD1 4 307 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2 IMX8QXP_ENET0_RGMII_TXD2 0 308 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TXD2_CONN_MLB_CLK IMX8QXP_ENET0_RGMII_TXD2 1 309 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TXD2_CONN_NAND_CE0_B IMX8QXP_ENET0_RGMII_TXD2 2 310 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TXD2_CONN_USDHC1_CD_B IMX8QXP_ENET0_RGMII_TXD2 3 311 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TXD2_LSIO_GPIO5_IO01 IMX8QXP_ENET0_RGMII_TXD2 4 312 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3 IMX8QXP_ENET0_RGMII_TXD3 0 313 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TXD3_CONN_MLB_SIG IMX8QXP_ENET0_RGMII_TXD3 1 314 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TXD3_CONN_NAND_RE_B IMX8QXP_ENET0_RGMII_TXD3 2 315 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_TXD3_LSIO_GPIO5_IO02 IMX8QXP_ENET0_RGMII_TXD3 4 316 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC IMX8QXP_ENET0_RGMII_RXC 0 317 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RXC_CONN_MLB_DATA IMX8QXP_ENET0_RGMII_RXC 1 318 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RXC_CONN_NAND_WE_B IMX8QXP_ENET0_RGMII_RXC 2 319 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RXC_CONN_USDHC1_CLK IMX8QXP_ENET0_RGMII_RXC 3 320 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RXC_LSIO_GPIO5_IO03 IMX8QXP_ENET0_RGMII_RXC 4 321 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL IMX8QXP_ENET0_RGMII_RX_CTL 0 322 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RX_CTL_CONN_USDHC1_CMD IMX8QXP_ENET0_RGMII_RX_CTL 3 323 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RX_CTL_LSIO_GPIO5_IO04 IMX8QXP_ENET0_RGMII_RX_CTL 4 324 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 IMX8QXP_ENET0_RGMII_RXD0 0 325 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RXD0_CONN_USDHC1_DATA0 IMX8QXP_ENET0_RGMII_RXD0 3 326 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RXD0_LSIO_GPIO5_IO05 IMX8QXP_ENET0_RGMII_RXD0 4 327 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 IMX8QXP_ENET0_RGMII_RXD1 0 328 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RXD1_CONN_USDHC1_DATA1 IMX8QXP_ENET0_RGMII_RXD1 3 329 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RXD1_LSIO_GPIO5_IO06 IMX8QXP_ENET0_RGMII_RXD1 4 330 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2 IMX8QXP_ENET0_RGMII_RXD2 0 331 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RMII_RX_ER IMX8QXP_ENET0_RGMII_RXD2 1 332 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RXD2_CONN_USDHC1_DATA2 IMX8QXP_ENET0_RGMII_RXD2 3 333 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RXD2_LSIO_GPIO5_IO07 IMX8QXP_ENET0_RGMII_RXD2 4 334 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3 IMX8QXP_ENET0_RGMII_RXD3 0 335 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RXD3_CONN_NAND_ALE IMX8QXP_ENET0_RGMII_RXD3 2 336 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RXD3_CONN_USDHC1_DATA3 IMX8QXP_ENET0_RGMII_RXD3 3 337 1.1 jmcneill #define IMX8QXP_ENET0_RGMII_RXD3_LSIO_GPIO5_IO08 IMX8QXP_ENET0_RGMII_RXD3 4 338 1.1 jmcneill #define IMX8QXP_ENET0_REFCLK_125M_25M_CONN_ENET0_REFCLK_125M_25M IMX8QXP_ENET0_REFCLK_125M_25M 0 339 1.1 jmcneill #define IMX8QXP_ENET0_REFCLK_125M_25M_CONN_ENET0_PPS IMX8QXP_ENET0_REFCLK_125M_25M 1 340 1.1 jmcneill #define IMX8QXP_ENET0_REFCLK_125M_25M_CONN_ENET1_PPS IMX8QXP_ENET0_REFCLK_125M_25M 2 341 1.1 jmcneill #define IMX8QXP_ENET0_REFCLK_125M_25M_LSIO_GPIO5_IO09 IMX8QXP_ENET0_REFCLK_125M_25M 4 342 1.1 jmcneill #define IMX8QXP_ENET0_MDIO_CONN_ENET0_MDIO IMX8QXP_ENET0_MDIO 0 343 1.1 jmcneill #define IMX8QXP_ENET0_MDIO_ADMA_I2C3_SDA IMX8QXP_ENET0_MDIO 1 344 1.1 jmcneill #define IMX8QXP_ENET0_MDIO_CONN_ENET1_MDIO IMX8QXP_ENET0_MDIO 2 345 1.1 jmcneill #define IMX8QXP_ENET0_MDIO_LSIO_GPIO5_IO10 IMX8QXP_ENET0_MDIO 4 346 1.1 jmcneill #define IMX8QXP_ENET0_MDC_CONN_ENET0_MDC IMX8QXP_ENET0_MDC 0 347 1.1 jmcneill #define IMX8QXP_ENET0_MDC_ADMA_I2C3_SCL IMX8QXP_ENET0_MDC 1 348 1.1 jmcneill #define IMX8QXP_ENET0_MDC_CONN_ENET1_MDC IMX8QXP_ENET0_MDC 2 349 1.1 jmcneill #define IMX8QXP_ENET0_MDC_LSIO_GPIO5_IO11 IMX8QXP_ENET0_MDC 4 350 1.1 jmcneill #define IMX8QXP_ESAI0_FSR_ADMA_ESAI0_FSR IMX8QXP_ESAI0_FSR 0 351 1.1 jmcneill #define IMX8QXP_ESAI0_FSR_CONN_ENET1_RCLK50M_OUT IMX8QXP_ESAI0_FSR 1 352 1.1 jmcneill #define IMX8QXP_ESAI0_FSR_ADMA_LCDIF_D00 IMX8QXP_ESAI0_FSR 2 353 1.1 jmcneill #define IMX8QXP_ESAI0_FSR_CONN_ENET1_RGMII_TXC IMX8QXP_ESAI0_FSR 3 354 1.1 jmcneill #define IMX8QXP_ESAI0_FSR_CONN_ENET1_RCLK50M_IN IMX8QXP_ESAI0_FSR 4 355 1.1 jmcneill #define IMX8QXP_ESAI0_FST_ADMA_ESAI0_FST IMX8QXP_ESAI0_FST 0 356 1.1 jmcneill #define IMX8QXP_ESAI0_FST_CONN_MLB_CLK IMX8QXP_ESAI0_FST 1 357 1.1 jmcneill #define IMX8QXP_ESAI0_FST_ADMA_LCDIF_D01 IMX8QXP_ESAI0_FST 2 358 1.1 jmcneill #define IMX8QXP_ESAI0_FST_CONN_ENET1_RGMII_TXD2 IMX8QXP_ESAI0_FST 3 359 1.1 jmcneill #define IMX8QXP_ESAI0_FST_LSIO_GPIO0_IO01 IMX8QXP_ESAI0_FST 4 360 1.1 jmcneill #define IMX8QXP_ESAI0_SCKR_ADMA_ESAI0_SCKR IMX8QXP_ESAI0_SCKR 0 361 1.1 jmcneill #define IMX8QXP_ESAI0_SCKR_ADMA_LCDIF_D02 IMX8QXP_ESAI0_SCKR 2 362 1.1 jmcneill #define IMX8QXP_ESAI0_SCKR_CONN_ENET1_RGMII_TX_CTL IMX8QXP_ESAI0_SCKR 3 363 1.1 jmcneill #define IMX8QXP_ESAI0_SCKR_LSIO_GPIO0_IO02 IMX8QXP_ESAI0_SCKR 4 364 1.1 jmcneill #define IMX8QXP_ESAI0_SCKT_ADMA_ESAI0_SCKT IMX8QXP_ESAI0_SCKT 0 365 1.1 jmcneill #define IMX8QXP_ESAI0_SCKT_CONN_MLB_SIG IMX8QXP_ESAI0_SCKT 1 366 1.1 jmcneill #define IMX8QXP_ESAI0_SCKT_ADMA_LCDIF_D03 IMX8QXP_ESAI0_SCKT 2 367 1.1 jmcneill #define IMX8QXP_ESAI0_SCKT_CONN_ENET1_RGMII_TXD3 IMX8QXP_ESAI0_SCKT 3 368 1.1 jmcneill #define IMX8QXP_ESAI0_SCKT_LSIO_GPIO0_IO03 IMX8QXP_ESAI0_SCKT 4 369 1.1 jmcneill #define IMX8QXP_ESAI0_TX0_ADMA_ESAI0_TX0 IMX8QXP_ESAI0_TX0 0 370 1.1 jmcneill #define IMX8QXP_ESAI0_TX0_CONN_MLB_DATA IMX8QXP_ESAI0_TX0 1 371 1.1 jmcneill #define IMX8QXP_ESAI0_TX0_ADMA_LCDIF_D04 IMX8QXP_ESAI0_TX0 2 372 1.1 jmcneill #define IMX8QXP_ESAI0_TX0_CONN_ENET1_RGMII_RXC IMX8QXP_ESAI0_TX0 3 373 1.1 jmcneill #define IMX8QXP_ESAI0_TX0_LSIO_GPIO0_IO04 IMX8QXP_ESAI0_TX0 4 374 1.1 jmcneill #define IMX8QXP_ESAI0_TX1_ADMA_ESAI0_TX1 IMX8QXP_ESAI0_TX1 0 375 1.1 jmcneill #define IMX8QXP_ESAI0_TX1_ADMA_LCDIF_D05 IMX8QXP_ESAI0_TX1 2 376 1.1 jmcneill #define IMX8QXP_ESAI0_TX1_CONN_ENET1_RGMII_RXD3 IMX8QXP_ESAI0_TX1 3 377 1.1 jmcneill #define IMX8QXP_ESAI0_TX1_LSIO_GPIO0_IO05 IMX8QXP_ESAI0_TX1 4 378 1.1 jmcneill #define IMX8QXP_ESAI0_TX2_RX3_ADMA_ESAI0_TX2_RX3 IMX8QXP_ESAI0_TX2_RX3 0 379 1.1 jmcneill #define IMX8QXP_ESAI0_TX2_RX3_CONN_ENET1_RMII_RX_ER IMX8QXP_ESAI0_TX2_RX3 1 380 1.1 jmcneill #define IMX8QXP_ESAI0_TX2_RX3_ADMA_LCDIF_D06 IMX8QXP_ESAI0_TX2_RX3 2 381 1.1 jmcneill #define IMX8QXP_ESAI0_TX2_RX3_CONN_ENET1_RGMII_RXD2 IMX8QXP_ESAI0_TX2_RX3 3 382 1.1 jmcneill #define IMX8QXP_ESAI0_TX2_RX3_LSIO_GPIO0_IO06 IMX8QXP_ESAI0_TX2_RX3 4 383 1.1 jmcneill #define IMX8QXP_ESAI0_TX3_RX2_ADMA_ESAI0_TX3_RX2 IMX8QXP_ESAI0_TX3_RX2 0 384 1.1 jmcneill #define IMX8QXP_ESAI0_TX3_RX2_ADMA_LCDIF_D07 IMX8QXP_ESAI0_TX3_RX2 2 385 1.1 jmcneill #define IMX8QXP_ESAI0_TX3_RX2_CONN_ENET1_RGMII_RXD1 IMX8QXP_ESAI0_TX3_RX2 3 386 1.1 jmcneill #define IMX8QXP_ESAI0_TX3_RX2_LSIO_GPIO0_IO07 IMX8QXP_ESAI0_TX3_RX2 4 387 1.1 jmcneill #define IMX8QXP_ESAI0_TX4_RX1_ADMA_ESAI0_TX4_RX1 IMX8QXP_ESAI0_TX4_RX1 0 388 1.1 jmcneill #define IMX8QXP_ESAI0_TX4_RX1_ADMA_LCDIF_D08 IMX8QXP_ESAI0_TX4_RX1 2 389 1.1 jmcneill #define IMX8QXP_ESAI0_TX4_RX1_CONN_ENET1_RGMII_TXD0 IMX8QXP_ESAI0_TX4_RX1 3 390 1.1 jmcneill #define IMX8QXP_ESAI0_TX4_RX1_LSIO_GPIO0_IO08 IMX8QXP_ESAI0_TX4_RX1 4 391 1.1 jmcneill #define IMX8QXP_ESAI0_TX5_RX0_ADMA_ESAI0_TX5_RX0 IMX8QXP_ESAI0_TX5_RX0 0 392 1.1 jmcneill #define IMX8QXP_ESAI0_TX5_RX0_ADMA_LCDIF_D09 IMX8QXP_ESAI0_TX5_RX0 2 393 1.1 jmcneill #define IMX8QXP_ESAI0_TX5_RX0_CONN_ENET1_RGMII_TXD1 IMX8QXP_ESAI0_TX5_RX0 3 394 1.1 jmcneill #define IMX8QXP_ESAI0_TX5_RX0_LSIO_GPIO0_IO09 IMX8QXP_ESAI0_TX5_RX0 4 395 1.1 jmcneill #define IMX8QXP_SPDIF0_RX_ADMA_SPDIF0_RX IMX8QXP_SPDIF0_RX 0 396 1.1 jmcneill #define IMX8QXP_SPDIF0_RX_ADMA_MQS_R IMX8QXP_SPDIF0_RX 1 397 1.1 jmcneill #define IMX8QXP_SPDIF0_RX_ADMA_LCDIF_D10 IMX8QXP_SPDIF0_RX 2 398 1.1 jmcneill #define IMX8QXP_SPDIF0_RX_CONN_ENET1_RGMII_RXD0 IMX8QXP_SPDIF0_RX 3 399 1.1 jmcneill #define IMX8QXP_SPDIF0_RX_LSIO_GPIO0_IO10 IMX8QXP_SPDIF0_RX 4 400 1.1 jmcneill #define IMX8QXP_SPDIF0_TX_ADMA_SPDIF0_TX IMX8QXP_SPDIF0_TX 0 401 1.1 jmcneill #define IMX8QXP_SPDIF0_TX_ADMA_MQS_L IMX8QXP_SPDIF0_TX 1 402 1.1 jmcneill #define IMX8QXP_SPDIF0_TX_ADMA_LCDIF_D11 IMX8QXP_SPDIF0_TX 2 403 1.1 jmcneill #define IMX8QXP_SPDIF0_TX_CONN_ENET1_RGMII_RX_CTL IMX8QXP_SPDIF0_TX 3 404 1.1 jmcneill #define IMX8QXP_SPDIF0_TX_LSIO_GPIO0_IO11 IMX8QXP_SPDIF0_TX 4 405 1.1 jmcneill #define IMX8QXP_SPDIF0_EXT_CLK_ADMA_SPDIF0_EXT_CLK IMX8QXP_SPDIF0_EXT_CLK 0 406 1.1 jmcneill #define IMX8QXP_SPDIF0_EXT_CLK_ADMA_LCDIF_D12 IMX8QXP_SPDIF0_EXT_CLK 2 407 1.1 jmcneill #define IMX8QXP_SPDIF0_EXT_CLK_CONN_ENET1_REFCLK_125M_25M IMX8QXP_SPDIF0_EXT_CLK 3 408 1.1 jmcneill #define IMX8QXP_SPDIF0_EXT_CLK_LSIO_GPIO0_IO12 IMX8QXP_SPDIF0_EXT_CLK 4 409 1.1 jmcneill #define IMX8QXP_SPI3_SCK_ADMA_SPI3_SCK IMX8QXP_SPI3_SCK 0 410 1.1 jmcneill #define IMX8QXP_SPI3_SCK_ADMA_LCDIF_D13 IMX8QXP_SPI3_SCK 2 411 1.1 jmcneill #define IMX8QXP_SPI3_SCK_LSIO_GPIO0_IO13 IMX8QXP_SPI3_SCK 4 412 1.1 jmcneill #define IMX8QXP_SPI3_SDO_ADMA_SPI3_SDO IMX8QXP_SPI3_SDO 0 413 1.1 jmcneill #define IMX8QXP_SPI3_SDO_ADMA_LCDIF_D14 IMX8QXP_SPI3_SDO 2 414 1.1 jmcneill #define IMX8QXP_SPI3_SDO_LSIO_GPIO0_IO14 IMX8QXP_SPI3_SDO 4 415 1.1 jmcneill #define IMX8QXP_SPI3_SDI_ADMA_SPI3_SDI IMX8QXP_SPI3_SDI 0 416 1.1 jmcneill #define IMX8QXP_SPI3_SDI_ADMA_LCDIF_D15 IMX8QXP_SPI3_SDI 2 417 1.1 jmcneill #define IMX8QXP_SPI3_SDI_LSIO_GPIO0_IO15 IMX8QXP_SPI3_SDI 4 418 1.1 jmcneill #define IMX8QXP_SPI3_CS0_ADMA_SPI3_CS0 IMX8QXP_SPI3_CS0 0 419 1.1 jmcneill #define IMX8QXP_SPI3_CS0_ADMA_ACM_MCLK_OUT1 IMX8QXP_SPI3_CS0 1 420 1.1 jmcneill #define IMX8QXP_SPI3_CS0_ADMA_LCDIF_HSYNC IMX8QXP_SPI3_CS0 2 421 1.1 jmcneill #define IMX8QXP_SPI3_CS0_LSIO_GPIO0_IO16 IMX8QXP_SPI3_CS0 4 422 1.1 jmcneill #define IMX8QXP_SPI3_CS1_ADMA_SPI3_CS1 IMX8QXP_SPI3_CS1 0 423 1.1 jmcneill #define IMX8QXP_SPI3_CS1_ADMA_I2C3_SCL IMX8QXP_SPI3_CS1 1 424 1.1 jmcneill #define IMX8QXP_SPI3_CS1_ADMA_LCDIF_RESET IMX8QXP_SPI3_CS1 2 425 1.1 jmcneill #define IMX8QXP_SPI3_CS1_ADMA_SPI2_CS0 IMX8QXP_SPI3_CS1 3 426 1.1 jmcneill #define IMX8QXP_SPI3_CS1_ADMA_LCDIF_D16 IMX8QXP_SPI3_CS1 4 427 1.1 jmcneill #define IMX8QXP_MCLK_IN1_ADMA_ACM_MCLK_IN1 IMX8QXP_MCLK_IN1 0 428 1.1 jmcneill #define IMX8QXP_MCLK_IN1_ADMA_I2C3_SDA IMX8QXP_MCLK_IN1 1 429 1.1 jmcneill #define IMX8QXP_MCLK_IN1_ADMA_LCDIF_EN IMX8QXP_MCLK_IN1 2 430 1.1 jmcneill #define IMX8QXP_MCLK_IN1_ADMA_SPI2_SCK IMX8QXP_MCLK_IN1 3 431 1.1 jmcneill #define IMX8QXP_MCLK_IN1_ADMA_LCDIF_D17 IMX8QXP_MCLK_IN1 4 432 1.1 jmcneill #define IMX8QXP_MCLK_IN0_ADMA_ACM_MCLK_IN0 IMX8QXP_MCLK_IN0 0 433 1.1 jmcneill #define IMX8QXP_MCLK_IN0_ADMA_ESAI0_RX_HF_CLK IMX8QXP_MCLK_IN0 1 434 1.1 jmcneill #define IMX8QXP_MCLK_IN0_ADMA_LCDIF_VSYNC IMX8QXP_MCLK_IN0 2 435 1.1 jmcneill #define IMX8QXP_MCLK_IN0_ADMA_SPI2_SDI IMX8QXP_MCLK_IN0 3 436 1.1 jmcneill #define IMX8QXP_MCLK_IN0_LSIO_GPIO0_IO19 IMX8QXP_MCLK_IN0 4 437 1.1 jmcneill #define IMX8QXP_MCLK_OUT0_ADMA_ACM_MCLK_OUT0 IMX8QXP_MCLK_OUT0 0 438 1.1 jmcneill #define IMX8QXP_MCLK_OUT0_ADMA_ESAI0_TX_HF_CLK IMX8QXP_MCLK_OUT0 1 439 1.1 jmcneill #define IMX8QXP_MCLK_OUT0_ADMA_LCDIF_CLK IMX8QXP_MCLK_OUT0 2 440 1.1 jmcneill #define IMX8QXP_MCLK_OUT0_ADMA_SPI2_SDO IMX8QXP_MCLK_OUT0 3 441 1.1 jmcneill #define IMX8QXP_MCLK_OUT0_LSIO_GPIO0_IO20 IMX8QXP_MCLK_OUT0 4 442 1.1 jmcneill #define IMX8QXP_UART1_TX_ADMA_UART1_TX IMX8QXP_UART1_TX 0 443 1.1 jmcneill #define IMX8QXP_UART1_TX_LSIO_PWM0_OUT IMX8QXP_UART1_TX 1 444 1.1 jmcneill #define IMX8QXP_UART1_TX_LSIO_GPT0_CAPTURE IMX8QXP_UART1_TX 2 445 1.1 jmcneill #define IMX8QXP_UART1_TX_LSIO_GPIO0_IO21 IMX8QXP_UART1_TX 4 446 1.1 jmcneill #define IMX8QXP_UART1_RX_ADMA_UART1_RX IMX8QXP_UART1_RX 0 447 1.1 jmcneill #define IMX8QXP_UART1_RX_LSIO_PWM1_OUT IMX8QXP_UART1_RX 1 448 1.1 jmcneill #define IMX8QXP_UART1_RX_LSIO_GPT0_COMPARE IMX8QXP_UART1_RX 2 449 1.1 jmcneill #define IMX8QXP_UART1_RX_LSIO_GPT1_CLK IMX8QXP_UART1_RX 3 450 1.1 jmcneill #define IMX8QXP_UART1_RX_LSIO_GPIO0_IO22 IMX8QXP_UART1_RX 4 451 1.1 jmcneill #define IMX8QXP_UART1_RTS_B_ADMA_UART1_RTS_B IMX8QXP_UART1_RTS_B 0 452 1.1 jmcneill #define IMX8QXP_UART1_RTS_B_LSIO_PWM2_OUT IMX8QXP_UART1_RTS_B 1 453 1.1 jmcneill #define IMX8QXP_UART1_RTS_B_ADMA_LCDIF_D16 IMX8QXP_UART1_RTS_B 2 454 1.1 jmcneill #define IMX8QXP_UART1_RTS_B_LSIO_GPT1_CAPTURE IMX8QXP_UART1_RTS_B 3 455 1.1 jmcneill #define IMX8QXP_UART1_RTS_B_LSIO_GPT0_CLK IMX8QXP_UART1_RTS_B 4 456 1.1 jmcneill #define IMX8QXP_UART1_CTS_B_ADMA_UART1_CTS_B IMX8QXP_UART1_CTS_B 0 457 1.1 jmcneill #define IMX8QXP_UART1_CTS_B_LSIO_PWM3_OUT IMX8QXP_UART1_CTS_B 1 458 1.1 jmcneill #define IMX8QXP_UART1_CTS_B_ADMA_LCDIF_D17 IMX8QXP_UART1_CTS_B 2 459 1.1 jmcneill #define IMX8QXP_UART1_CTS_B_LSIO_GPT1_COMPARE IMX8QXP_UART1_CTS_B 3 460 1.1 jmcneill #define IMX8QXP_UART1_CTS_B_LSIO_GPIO0_IO24 IMX8QXP_UART1_CTS_B 4 461 1.1 jmcneill #define IMX8QXP_SAI0_TXD_ADMA_SAI0_TXD IMX8QXP_SAI0_TXD 0 462 1.1 jmcneill #define IMX8QXP_SAI0_TXD_ADMA_SAI1_RXC IMX8QXP_SAI0_TXD 1 463 1.1 jmcneill #define IMX8QXP_SAI0_TXD_ADMA_SPI1_SDO IMX8QXP_SAI0_TXD 2 464 1.1 jmcneill #define IMX8QXP_SAI0_TXD_ADMA_LCDIF_D18 IMX8QXP_SAI0_TXD 3 465 1.1 jmcneill #define IMX8QXP_SAI0_TXD_LSIO_GPIO0_IO25 IMX8QXP_SAI0_TXD 4 466 1.1 jmcneill #define IMX8QXP_SAI0_TXC_ADMA_SAI0_TXC IMX8QXP_SAI0_TXC 0 467 1.1 jmcneill #define IMX8QXP_SAI0_TXC_ADMA_SAI1_TXD IMX8QXP_SAI0_TXC 1 468 1.1 jmcneill #define IMX8QXP_SAI0_TXC_ADMA_SPI1_SDI IMX8QXP_SAI0_TXC 2 469 1.1 jmcneill #define IMX8QXP_SAI0_TXC_ADMA_LCDIF_D19 IMX8QXP_SAI0_TXC 3 470 1.1 jmcneill #define IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26 IMX8QXP_SAI0_TXC 4 471 1.1 jmcneill #define IMX8QXP_SAI0_RXD_ADMA_SAI0_RXD IMX8QXP_SAI0_RXD 0 472 1.1 jmcneill #define IMX8QXP_SAI0_RXD_ADMA_SAI1_RXFS IMX8QXP_SAI0_RXD 1 473 1.1 jmcneill #define IMX8QXP_SAI0_RXD_ADMA_SPI1_CS0 IMX8QXP_SAI0_RXD 2 474 1.1 jmcneill #define IMX8QXP_SAI0_RXD_ADMA_LCDIF_D20 IMX8QXP_SAI0_RXD 3 475 1.1 jmcneill #define IMX8QXP_SAI0_RXD_LSIO_GPIO0_IO27 IMX8QXP_SAI0_RXD 4 476 1.1 jmcneill #define IMX8QXP_SAI0_TXFS_ADMA_SAI0_TXFS IMX8QXP_SAI0_TXFS 0 477 1.1 jmcneill #define IMX8QXP_SAI0_TXFS_ADMA_SPI2_CS1 IMX8QXP_SAI0_TXFS 1 478 1.1 jmcneill #define IMX8QXP_SAI0_TXFS_ADMA_SPI1_SCK IMX8QXP_SAI0_TXFS 2 479 1.1 jmcneill #define IMX8QXP_SAI0_TXFS_LSIO_GPIO0_IO28 IMX8QXP_SAI0_TXFS 4 480 1.1 jmcneill #define IMX8QXP_SAI1_RXD_ADMA_SAI1_RXD IMX8QXP_SAI1_RXD 0 481 1.1 jmcneill #define IMX8QXP_SAI1_RXD_ADMA_SAI0_RXFS IMX8QXP_SAI1_RXD 1 482 1.1 jmcneill #define IMX8QXP_SAI1_RXD_ADMA_SPI1_CS1 IMX8QXP_SAI1_RXD 2 483 1.1 jmcneill #define IMX8QXP_SAI1_RXD_ADMA_LCDIF_D21 IMX8QXP_SAI1_RXD 3 484 1.1 jmcneill #define IMX8QXP_SAI1_RXD_LSIO_GPIO0_IO29 IMX8QXP_SAI1_RXD 4 485 1.1 jmcneill #define IMX8QXP_SAI1_RXC_ADMA_SAI1_RXC IMX8QXP_SAI1_RXC 0 486 1.1 jmcneill #define IMX8QXP_SAI1_RXC_ADMA_SAI1_TXC IMX8QXP_SAI1_RXC 1 487 1.1 jmcneill #define IMX8QXP_SAI1_RXC_ADMA_LCDIF_D22 IMX8QXP_SAI1_RXC 3 488 1.1 jmcneill #define IMX8QXP_SAI1_RXC_LSIO_GPIO0_IO30 IMX8QXP_SAI1_RXC 4 489 1.1 jmcneill #define IMX8QXP_SAI1_RXFS_ADMA_SAI1_RXFS IMX8QXP_SAI1_RXFS 0 490 1.1 jmcneill #define IMX8QXP_SAI1_RXFS_ADMA_SAI1_TXFS IMX8QXP_SAI1_RXFS 1 491 1.1 jmcneill #define IMX8QXP_SAI1_RXFS_ADMA_LCDIF_D23 IMX8QXP_SAI1_RXFS 3 492 1.1 jmcneill #define IMX8QXP_SAI1_RXFS_LSIO_GPIO0_IO31 IMX8QXP_SAI1_RXFS 4 493 1.1 jmcneill #define IMX8QXP_SPI2_CS0_ADMA_SPI2_CS0 IMX8QXP_SPI2_CS0 0 494 1.1 jmcneill #define IMX8QXP_SPI2_CS0_LSIO_GPIO1_IO00 IMX8QXP_SPI2_CS0 4 495 1.1 jmcneill #define IMX8QXP_SPI2_SDO_ADMA_SPI2_SDO IMX8QXP_SPI2_SDO 0 496 1.1 jmcneill #define IMX8QXP_SPI2_SDO_LSIO_GPIO1_IO01 IMX8QXP_SPI2_SDO 4 497 1.1 jmcneill #define IMX8QXP_SPI2_SDI_ADMA_SPI2_SDI IMX8QXP_SPI2_SDI 0 498 1.1 jmcneill #define IMX8QXP_SPI2_SDI_LSIO_GPIO1_IO02 IMX8QXP_SPI2_SDI 4 499 1.1 jmcneill #define IMX8QXP_SPI2_SCK_ADMA_SPI2_SCK IMX8QXP_SPI2_SCK 0 500 1.1 jmcneill #define IMX8QXP_SPI2_SCK_LSIO_GPIO1_IO03 IMX8QXP_SPI2_SCK 4 501 1.1 jmcneill #define IMX8QXP_SPI0_SCK_ADMA_SPI0_SCK IMX8QXP_SPI0_SCK 0 502 1.1 jmcneill #define IMX8QXP_SPI0_SCK_ADMA_SAI0_TXC IMX8QXP_SPI0_SCK 1 503 1.1 jmcneill #define IMX8QXP_SPI0_SCK_M40_I2C0_SCL IMX8QXP_SPI0_SCK 2 504 1.1 jmcneill #define IMX8QXP_SPI0_SCK_M40_GPIO0_IO00 IMX8QXP_SPI0_SCK 3 505 1.1 jmcneill #define IMX8QXP_SPI0_SCK_LSIO_GPIO1_IO04 IMX8QXP_SPI0_SCK 4 506 1.1 jmcneill #define IMX8QXP_SPI0_SDI_ADMA_SPI0_SDI IMX8QXP_SPI0_SDI 0 507 1.1 jmcneill #define IMX8QXP_SPI0_SDI_ADMA_SAI0_TXD IMX8QXP_SPI0_SDI 1 508 1.1 jmcneill #define IMX8QXP_SPI0_SDI_M40_TPM0_CH0 IMX8QXP_SPI0_SDI 2 509 1.1 jmcneill #define IMX8QXP_SPI0_SDI_M40_GPIO0_IO02 IMX8QXP_SPI0_SDI 3 510 1.1 jmcneill #define IMX8QXP_SPI0_SDI_LSIO_GPIO1_IO05 IMX8QXP_SPI0_SDI 4 511 1.1 jmcneill #define IMX8QXP_SPI0_SDO_ADMA_SPI0_SDO IMX8QXP_SPI0_SDO 0 512 1.1 jmcneill #define IMX8QXP_SPI0_SDO_ADMA_SAI0_TXFS IMX8QXP_SPI0_SDO 1 513 1.1 jmcneill #define IMX8QXP_SPI0_SDO_M40_I2C0_SDA IMX8QXP_SPI0_SDO 2 514 1.1 jmcneill #define IMX8QXP_SPI0_SDO_M40_GPIO0_IO01 IMX8QXP_SPI0_SDO 3 515 1.1 jmcneill #define IMX8QXP_SPI0_SDO_LSIO_GPIO1_IO06 IMX8QXP_SPI0_SDO 4 516 1.1 jmcneill #define IMX8QXP_SPI0_CS1_ADMA_SPI0_CS1 IMX8QXP_SPI0_CS1 0 517 1.1 jmcneill #define IMX8QXP_SPI0_CS1_ADMA_SAI0_RXC IMX8QXP_SPI0_CS1 1 518 1.1 jmcneill #define IMX8QXP_SPI0_CS1_ADMA_SAI1_TXD IMX8QXP_SPI0_CS1 2 519 1.1 jmcneill #define IMX8QXP_SPI0_CS1_ADMA_LCD_PWM0_OUT IMX8QXP_SPI0_CS1 3 520 1.1 jmcneill #define IMX8QXP_SPI0_CS1_LSIO_GPIO1_IO07 IMX8QXP_SPI0_CS1 4 521 1.1 jmcneill #define IMX8QXP_SPI0_CS0_ADMA_SPI0_CS0 IMX8QXP_SPI0_CS0 0 522 1.1 jmcneill #define IMX8QXP_SPI0_CS0_ADMA_SAI0_RXD IMX8QXP_SPI0_CS0 1 523 1.1 jmcneill #define IMX8QXP_SPI0_CS0_M40_TPM0_CH1 IMX8QXP_SPI0_CS0 2 524 1.1 jmcneill #define IMX8QXP_SPI0_CS0_M40_GPIO0_IO03 IMX8QXP_SPI0_CS0 3 525 1.1 jmcneill #define IMX8QXP_SPI0_CS0_LSIO_GPIO1_IO08 IMX8QXP_SPI0_CS0 4 526 1.1 jmcneill #define IMX8QXP_ADC_IN1_ADMA_ADC_IN1 IMX8QXP_ADC_IN1 0 527 1.1 jmcneill #define IMX8QXP_ADC_IN1_M40_I2C0_SDA IMX8QXP_ADC_IN1 1 528 1.1 jmcneill #define IMX8QXP_ADC_IN1_M40_GPIO0_IO01 IMX8QXP_ADC_IN1 2 529 1.1 jmcneill #define IMX8QXP_ADC_IN1_LSIO_GPIO1_IO09 IMX8QXP_ADC_IN1 4 530 1.1 jmcneill #define IMX8QXP_ADC_IN0_ADMA_ADC_IN0 IMX8QXP_ADC_IN0 0 531 1.1 jmcneill #define IMX8QXP_ADC_IN0_M40_I2C0_SCL IMX8QXP_ADC_IN0 1 532 1.1 jmcneill #define IMX8QXP_ADC_IN0_M40_GPIO0_IO00 IMX8QXP_ADC_IN0 2 533 1.1 jmcneill #define IMX8QXP_ADC_IN0_LSIO_GPIO1_IO10 IMX8QXP_ADC_IN0 4 534 1.1 jmcneill #define IMX8QXP_ADC_IN3_ADMA_ADC_IN3 IMX8QXP_ADC_IN3 0 535 1.1 jmcneill #define IMX8QXP_ADC_IN3_M40_UART0_TX IMX8QXP_ADC_IN3 1 536 1.1 jmcneill #define IMX8QXP_ADC_IN3_M40_GPIO0_IO03 IMX8QXP_ADC_IN3 2 537 1.1 jmcneill #define IMX8QXP_ADC_IN3_ADMA_ACM_MCLK_OUT0 IMX8QXP_ADC_IN3 3 538 1.1 jmcneill #define IMX8QXP_ADC_IN3_LSIO_GPIO1_IO11 IMX8QXP_ADC_IN3 4 539 1.1 jmcneill #define IMX8QXP_ADC_IN2_ADMA_ADC_IN2 IMX8QXP_ADC_IN2 0 540 1.1 jmcneill #define IMX8QXP_ADC_IN2_M40_UART0_RX IMX8QXP_ADC_IN2 1 541 1.1 jmcneill #define IMX8QXP_ADC_IN2_M40_GPIO0_IO02 IMX8QXP_ADC_IN2 2 542 1.1 jmcneill #define IMX8QXP_ADC_IN2_ADMA_ACM_MCLK_IN0 IMX8QXP_ADC_IN2 3 543 1.1 jmcneill #define IMX8QXP_ADC_IN2_LSIO_GPIO1_IO12 IMX8QXP_ADC_IN2 4 544 1.1 jmcneill #define IMX8QXP_ADC_IN5_ADMA_ADC_IN5 IMX8QXP_ADC_IN5 0 545 1.1 jmcneill #define IMX8QXP_ADC_IN5_M40_TPM0_CH1 IMX8QXP_ADC_IN5 1 546 1.1 jmcneill #define IMX8QXP_ADC_IN5_M40_GPIO0_IO05 IMX8QXP_ADC_IN5 2 547 1.1 jmcneill #define IMX8QXP_ADC_IN5_LSIO_GPIO1_IO13 IMX8QXP_ADC_IN5 4 548 1.1 jmcneill #define IMX8QXP_ADC_IN4_ADMA_ADC_IN4 IMX8QXP_ADC_IN4 0 549 1.1 jmcneill #define IMX8QXP_ADC_IN4_M40_TPM0_CH0 IMX8QXP_ADC_IN4 1 550 1.1 jmcneill #define IMX8QXP_ADC_IN4_M40_GPIO0_IO04 IMX8QXP_ADC_IN4 2 551 1.1 jmcneill #define IMX8QXP_ADC_IN4_LSIO_GPIO1_IO14 IMX8QXP_ADC_IN4 4 552 1.1 jmcneill #define IMX8QXP_FLEXCAN0_RX_ADMA_FLEXCAN0_RX IMX8QXP_FLEXCAN0_RX 0 553 1.1 jmcneill #define IMX8QXP_FLEXCAN0_RX_ADMA_SAI2_RXC IMX8QXP_FLEXCAN0_RX 1 554 1.1 jmcneill #define IMX8QXP_FLEXCAN0_RX_ADMA_UART0_RTS_B IMX8QXP_FLEXCAN0_RX 2 555 1.1 jmcneill #define IMX8QXP_FLEXCAN0_RX_ADMA_SAI1_TXC IMX8QXP_FLEXCAN0_RX 3 556 1.1 jmcneill #define IMX8QXP_FLEXCAN0_RX_LSIO_GPIO1_IO15 IMX8QXP_FLEXCAN0_RX 4 557 1.1 jmcneill #define IMX8QXP_FLEXCAN0_TX_ADMA_FLEXCAN0_TX IMX8QXP_FLEXCAN0_TX 0 558 1.1 jmcneill #define IMX8QXP_FLEXCAN0_TX_ADMA_SAI2_RXD IMX8QXP_FLEXCAN0_TX 1 559 1.1 jmcneill #define IMX8QXP_FLEXCAN0_TX_ADMA_UART0_CTS_B IMX8QXP_FLEXCAN0_TX 2 560 1.1 jmcneill #define IMX8QXP_FLEXCAN0_TX_ADMA_SAI1_TXFS IMX8QXP_FLEXCAN0_TX 3 561 1.1 jmcneill #define IMX8QXP_FLEXCAN0_TX_LSIO_GPIO1_IO16 IMX8QXP_FLEXCAN0_TX 4 562 1.1 jmcneill #define IMX8QXP_FLEXCAN1_RX_ADMA_FLEXCAN1_RX IMX8QXP_FLEXCAN1_RX 0 563 1.1 jmcneill #define IMX8QXP_FLEXCAN1_RX_ADMA_SAI2_RXFS IMX8QXP_FLEXCAN1_RX 1 564 1.1 jmcneill #define IMX8QXP_FLEXCAN1_RX_ADMA_FTM_CH2 IMX8QXP_FLEXCAN1_RX 2 565 1.1 jmcneill #define IMX8QXP_FLEXCAN1_RX_ADMA_SAI1_TXD IMX8QXP_FLEXCAN1_RX 3 566 1.1 jmcneill #define IMX8QXP_FLEXCAN1_RX_LSIO_GPIO1_IO17 IMX8QXP_FLEXCAN1_RX 4 567 1.1 jmcneill #define IMX8QXP_FLEXCAN1_TX_ADMA_FLEXCAN1_TX IMX8QXP_FLEXCAN1_TX 0 568 1.1 jmcneill #define IMX8QXP_FLEXCAN1_TX_ADMA_SAI3_RXC IMX8QXP_FLEXCAN1_TX 1 569 1.1 jmcneill #define IMX8QXP_FLEXCAN1_TX_ADMA_DMA0_REQ_IN0 IMX8QXP_FLEXCAN1_TX 2 570 1.1 jmcneill #define IMX8QXP_FLEXCAN1_TX_ADMA_SAI1_RXD IMX8QXP_FLEXCAN1_TX 3 571 1.1 jmcneill #define IMX8QXP_FLEXCAN1_TX_LSIO_GPIO1_IO18 IMX8QXP_FLEXCAN1_TX 4 572 1.1 jmcneill #define IMX8QXP_FLEXCAN2_RX_ADMA_FLEXCAN2_RX IMX8QXP_FLEXCAN2_RX 0 573 1.1 jmcneill #define IMX8QXP_FLEXCAN2_RX_ADMA_SAI3_RXD IMX8QXP_FLEXCAN2_RX 1 574 1.1 jmcneill #define IMX8QXP_FLEXCAN2_RX_ADMA_UART3_RX IMX8QXP_FLEXCAN2_RX 2 575 1.1 jmcneill #define IMX8QXP_FLEXCAN2_RX_ADMA_SAI1_RXFS IMX8QXP_FLEXCAN2_RX 3 576 1.1 jmcneill #define IMX8QXP_FLEXCAN2_RX_LSIO_GPIO1_IO19 IMX8QXP_FLEXCAN2_RX 4 577 1.1 jmcneill #define IMX8QXP_FLEXCAN2_TX_ADMA_FLEXCAN2_TX IMX8QXP_FLEXCAN2_TX 0 578 1.1 jmcneill #define IMX8QXP_FLEXCAN2_TX_ADMA_SAI3_RXFS IMX8QXP_FLEXCAN2_TX 1 579 1.1 jmcneill #define IMX8QXP_FLEXCAN2_TX_ADMA_UART3_TX IMX8QXP_FLEXCAN2_TX 2 580 1.1 jmcneill #define IMX8QXP_FLEXCAN2_TX_ADMA_SAI1_RXC IMX8QXP_FLEXCAN2_TX 3 581 1.1 jmcneill #define IMX8QXP_FLEXCAN2_TX_LSIO_GPIO1_IO20 IMX8QXP_FLEXCAN2_TX 4 582 1.1 jmcneill #define IMX8QXP_UART0_RX_ADMA_UART0_RX IMX8QXP_UART0_RX 0 583 1.1 jmcneill #define IMX8QXP_UART0_RX_ADMA_MQS_R IMX8QXP_UART0_RX 1 584 1.1 jmcneill #define IMX8QXP_UART0_RX_ADMA_FLEXCAN0_RX IMX8QXP_UART0_RX 2 585 1.1 jmcneill #define IMX8QXP_UART0_RX_LSIO_GPIO1_IO21 IMX8QXP_UART0_RX 4 586 1.1 jmcneill #define IMX8QXP_UART0_TX_ADMA_UART0_TX IMX8QXP_UART0_TX 0 587 1.1 jmcneill #define IMX8QXP_UART0_TX_ADMA_MQS_L IMX8QXP_UART0_TX 1 588 1.1 jmcneill #define IMX8QXP_UART0_TX_ADMA_FLEXCAN0_TX IMX8QXP_UART0_TX 2 589 1.1 jmcneill #define IMX8QXP_UART0_TX_LSIO_GPIO1_IO22 IMX8QXP_UART0_TX 4 590 1.1 jmcneill #define IMX8QXP_UART2_TX_ADMA_UART2_TX IMX8QXP_UART2_TX 0 591 1.1 jmcneill #define IMX8QXP_UART2_TX_ADMA_FTM_CH1 IMX8QXP_UART2_TX 1 592 1.1 jmcneill #define IMX8QXP_UART2_TX_ADMA_FLEXCAN1_TX IMX8QXP_UART2_TX 2 593 1.1 jmcneill #define IMX8QXP_UART2_TX_LSIO_GPIO1_IO23 IMX8QXP_UART2_TX 4 594 1.1 jmcneill #define IMX8QXP_UART2_RX_ADMA_UART2_RX IMX8QXP_UART2_RX 0 595 1.1 jmcneill #define IMX8QXP_UART2_RX_ADMA_FTM_CH0 IMX8QXP_UART2_RX 1 596 1.1 jmcneill #define IMX8QXP_UART2_RX_ADMA_FLEXCAN1_RX IMX8QXP_UART2_RX 2 597 1.1 jmcneill #define IMX8QXP_UART2_RX_LSIO_GPIO1_IO24 IMX8QXP_UART2_RX 4 598 1.1 jmcneill #define IMX8QXP_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL IMX8QXP_MIPI_DSI0_I2C0_SCL 0 599 1.1 jmcneill #define IMX8QXP_MIPI_DSI0_I2C0_SCL_MIPI_DSI1_GPIO0_IO02 IMX8QXP_MIPI_DSI0_I2C0_SCL 1 600 1.1 jmcneill #define IMX8QXP_MIPI_DSI0_I2C0_SCL_LSIO_GPIO1_IO25 IMX8QXP_MIPI_DSI0_I2C0_SCL 4 601 1.1 jmcneill #define IMX8QXP_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA IMX8QXP_MIPI_DSI0_I2C0_SDA 0 602 1.1 jmcneill #define IMX8QXP_MIPI_DSI0_I2C0_SDA_MIPI_DSI1_GPIO0_IO03 IMX8QXP_MIPI_DSI0_I2C0_SDA 1 603 1.1 jmcneill #define IMX8QXP_MIPI_DSI0_I2C0_SDA_LSIO_GPIO1_IO26 IMX8QXP_MIPI_DSI0_I2C0_SDA 4 604 1.1 jmcneill #define IMX8QXP_MIPI_DSI0_GPIO0_00_MIPI_DSI0_GPIO0_IO00 IMX8QXP_MIPI_DSI0_GPIO0_00 0 605 1.1 jmcneill #define IMX8QXP_MIPI_DSI0_GPIO0_00_ADMA_I2C1_SCL IMX8QXP_MIPI_DSI0_GPIO0_00 1 606 1.1 jmcneill #define IMX8QXP_MIPI_DSI0_GPIO0_00_MIPI_DSI0_PWM0_OUT IMX8QXP_MIPI_DSI0_GPIO0_00 2 607 1.1 jmcneill #define IMX8QXP_MIPI_DSI0_GPIO0_00_LSIO_GPIO1_IO27 IMX8QXP_MIPI_DSI0_GPIO0_00 4 608 1.1 jmcneill #define IMX8QXP_MIPI_DSI0_GPIO0_01_MIPI_DSI0_GPIO0_IO01 IMX8QXP_MIPI_DSI0_GPIO0_01 0 609 1.1 jmcneill #define IMX8QXP_MIPI_DSI0_GPIO0_01_ADMA_I2C1_SDA IMX8QXP_MIPI_DSI0_GPIO0_01 1 610 1.1 jmcneill #define IMX8QXP_MIPI_DSI0_GPIO0_01_LSIO_GPIO1_IO28 IMX8QXP_MIPI_DSI0_GPIO0_01 4 611 1.1 jmcneill #define IMX8QXP_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL IMX8QXP_MIPI_DSI1_I2C0_SCL 0 612 1.1 jmcneill #define IMX8QXP_MIPI_DSI1_I2C0_SCL_MIPI_DSI0_GPIO0_IO02 IMX8QXP_MIPI_DSI1_I2C0_SCL 1 613 1.1 jmcneill #define IMX8QXP_MIPI_DSI1_I2C0_SCL_LSIO_GPIO1_IO29 IMX8QXP_MIPI_DSI1_I2C0_SCL 4 614 1.1 jmcneill #define IMX8QXP_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA IMX8QXP_MIPI_DSI1_I2C0_SDA 0 615 1.1 jmcneill #define IMX8QXP_MIPI_DSI1_I2C0_SDA_MIPI_DSI0_GPIO0_IO03 IMX8QXP_MIPI_DSI1_I2C0_SDA 1 616 1.1 jmcneill #define IMX8QXP_MIPI_DSI1_I2C0_SDA_LSIO_GPIO1_IO30 IMX8QXP_MIPI_DSI1_I2C0_SDA 4 617 1.1 jmcneill #define IMX8QXP_MIPI_DSI1_GPIO0_00_MIPI_DSI1_GPIO0_IO00 IMX8QXP_MIPI_DSI1_GPIO0_00 0 618 1.1 jmcneill #define IMX8QXP_MIPI_DSI1_GPIO0_00_ADMA_I2C2_SCL IMX8QXP_MIPI_DSI1_GPIO0_00 1 619 1.1 jmcneill #define IMX8QXP_MIPI_DSI1_GPIO0_00_MIPI_DSI1_PWM0_OUT IMX8QXP_MIPI_DSI1_GPIO0_00 2 620 1.1 jmcneill #define IMX8QXP_MIPI_DSI1_GPIO0_00_LSIO_GPIO1_IO31 IMX8QXP_MIPI_DSI1_GPIO0_00 4 621 1.1 jmcneill #define IMX8QXP_MIPI_DSI1_GPIO0_01_MIPI_DSI1_GPIO0_IO01 IMX8QXP_MIPI_DSI1_GPIO0_01 0 622 1.1 jmcneill #define IMX8QXP_MIPI_DSI1_GPIO0_01_ADMA_I2C2_SDA IMX8QXP_MIPI_DSI1_GPIO0_01 1 623 1.1 jmcneill #define IMX8QXP_MIPI_DSI1_GPIO0_01_LSIO_GPIO2_IO00 IMX8QXP_MIPI_DSI1_GPIO0_01 4 624 1.1 jmcneill #define IMX8QXP_JTAG_TRST_B_SCU_JTAG_TRST_B IMX8QXP_JTAG_TRST_B 0 625 1.1 jmcneill #define IMX8QXP_JTAG_TRST_B_SCU_WDOG0_WDOG_OUT IMX8QXP_JTAG_TRST_B 1 626 1.1 jmcneill #define IMX8QXP_PMIC_I2C_SCL_SCU_PMIC_I2C_SCL IMX8QXP_PMIC_I2C_SCL 0 627 1.1 jmcneill #define IMX8QXP_PMIC_I2C_SCL_SCU_GPIO0_IOXX_PMIC_A35_ON IMX8QXP_PMIC_I2C_SCL 1 628 1.1 jmcneill #define IMX8QXP_PMIC_I2C_SCL_LSIO_GPIO2_IO01 IMX8QXP_PMIC_I2C_SCL 4 629 1.1 jmcneill #define IMX8QXP_PMIC_I2C_SDA_SCU_PMIC_I2C_SDA IMX8QXP_PMIC_I2C_SDA 0 630 1.1 jmcneill #define IMX8QXP_PMIC_I2C_SDA_SCU_GPIO0_IOXX_PMIC_GPU_ON IMX8QXP_PMIC_I2C_SDA 1 631 1.1 jmcneill #define IMX8QXP_PMIC_I2C_SDA_LSIO_GPIO2_IO02 IMX8QXP_PMIC_I2C_SDA 4 632 1.1 jmcneill #define IMX8QXP_PMIC_INT_B_SCU_DIMX8QXPMIC_INT_B IMX8QXP_PMIC_INT_B 0 633 1.1 jmcneill #define IMX8QXP_SCU_GPIO0_00_SCU_GPIO0_IO00 IMX8QXP_SCU_GPIO0_00 0 634 1.1 jmcneill #define IMX8QXP_SCU_GPIO0_00_SCU_UART0_RX IMX8QXP_SCU_GPIO0_00 1 635 1.1 jmcneill #define IMX8QXP_SCU_GPIO0_00_M40_UART0_RX IMX8QXP_SCU_GPIO0_00 2 636 1.1 jmcneill #define IMX8QXP_SCU_GPIO0_00_ADMA_UART3_RX IMX8QXP_SCU_GPIO0_00 3 637 1.1 jmcneill #define IMX8QXP_SCU_GPIO0_00_LSIO_GPIO2_IO03 IMX8QXP_SCU_GPIO0_00 4 638 1.1 jmcneill #define IMX8QXP_SCU_GPIO0_01_SCU_GPIO0_IO01 IMX8QXP_SCU_GPIO0_01 0 639 1.1 jmcneill #define IMX8QXP_SCU_GPIO0_01_SCU_UART0_TX IMX8QXP_SCU_GPIO0_01 1 640 1.1 jmcneill #define IMX8QXP_SCU_GPIO0_01_M40_UART0_TX IMX8QXP_SCU_GPIO0_01 2 641 1.1 jmcneill #define IMX8QXP_SCU_GPIO0_01_ADMA_UART3_TX IMX8QXP_SCU_GPIO0_01 3 642 1.1 jmcneill #define IMX8QXP_SCU_GPIO0_01_SCU_WDOG0_WDOG_OUT IMX8QXP_SCU_GPIO0_01 4 643 1.1 jmcneill #define IMX8QXP_SCU_PMIC_STANDBY_SCU_DIMX8QXPMIC_STANDBY IMX8QXP_SCU_PMIC_STANDBY 0 644 1.1 jmcneill #define IMX8QXP_SCU_BOOT_MODE0_SCU_DSC_BOOT_MODE0 IMX8QXP_SCU_BOOT_MODE0 0 645 1.1 jmcneill #define IMX8QXP_SCU_BOOT_MODE1_SCU_DSC_BOOT_MODE1 IMX8QXP_SCU_BOOT_MODE1 0 646 1.1 jmcneill #define IMX8QXP_SCU_BOOT_MODE2_SCU_DSC_BOOT_MODE2 IMX8QXP_SCU_BOOT_MODE2 0 647 1.1 jmcneill #define IMX8QXP_SCU_BOOT_MODE2_SCU_PMIC_I2C_SDA IMX8QXP_SCU_BOOT_MODE2 1 648 1.1 jmcneill #define IMX8QXP_SCU_BOOT_MODE3_SCU_DSC_BOOT_MODE3 IMX8QXP_SCU_BOOT_MODE3 0 649 1.1 jmcneill #define IMX8QXP_SCU_BOOT_MODE3_SCU_PMIC_I2C_SCL IMX8QXP_SCU_BOOT_MODE3 1 650 1.1 jmcneill #define IMX8QXP_SCU_BOOT_MODE3_SCU_DSC_RTC_CLOCK_OUTPUT_32K IMX8QXP_SCU_BOOT_MODE3 3 651 1.1 jmcneill #define IMX8QXP_CSI_D00_CI_PI_D02 IMX8QXP_CSI_D00 0 652 1.1 jmcneill #define IMX8QXP_CSI_D00_ADMA_SAI0_RXC IMX8QXP_CSI_D00 2 653 1.1 jmcneill #define IMX8QXP_CSI_D01_CI_PI_D03 IMX8QXP_CSI_D01 0 654 1.1 jmcneill #define IMX8QXP_CSI_D01_ADMA_SAI0_RXD IMX8QXP_CSI_D01 2 655 1.1 jmcneill #define IMX8QXP_CSI_D02_CI_PI_D04 IMX8QXP_CSI_D02 0 656 1.1 jmcneill #define IMX8QXP_CSI_D02_ADMA_SAI0_RXFS IMX8QXP_CSI_D02 2 657 1.1 jmcneill #define IMX8QXP_CSI_D03_CI_PI_D05 IMX8QXP_CSI_D03 0 658 1.1 jmcneill #define IMX8QXP_CSI_D03_ADMA_SAI2_RXC IMX8QXP_CSI_D03 2 659 1.1 jmcneill #define IMX8QXP_CSI_D04_CI_PI_D06 IMX8QXP_CSI_D04 0 660 1.1 jmcneill #define IMX8QXP_CSI_D04_ADMA_SAI2_RXD IMX8QXP_CSI_D04 2 661 1.1 jmcneill #define IMX8QXP_CSI_D05_CI_PI_D07 IMX8QXP_CSI_D05 0 662 1.1 jmcneill #define IMX8QXP_CSI_D05_ADMA_SAI2_RXFS IMX8QXP_CSI_D05 2 663 1.1 jmcneill #define IMX8QXP_CSI_D06_CI_PI_D08 IMX8QXP_CSI_D06 0 664 1.1 jmcneill #define IMX8QXP_CSI_D06_ADMA_SAI3_RXC IMX8QXP_CSI_D06 2 665 1.1 jmcneill #define IMX8QXP_CSI_D07_CI_PI_D09 IMX8QXP_CSI_D07 0 666 1.1 jmcneill #define IMX8QXP_CSI_D07_ADMA_SAI3_RXD IMX8QXP_CSI_D07 2 667 1.1 jmcneill #define IMX8QXP_CSI_HSYNC_CI_PI_HSYNC IMX8QXP_CSI_HSYNC 0 668 1.1 jmcneill #define IMX8QXP_CSI_HSYNC_CI_PI_D00 IMX8QXP_CSI_HSYNC 1 669 1.1 jmcneill #define IMX8QXP_CSI_HSYNC_ADMA_SAI3_RXFS IMX8QXP_CSI_HSYNC 2 670 1.1 jmcneill #define IMX8QXP_CSI_VSYNC_CI_PI_VSYNC IMX8QXP_CSI_VSYNC 0 671 1.1 jmcneill #define IMX8QXP_CSI_VSYNC_CI_PI_D01 IMX8QXP_CSI_VSYNC 1 672 1.1 jmcneill #define IMX8QXP_CSI_PCLK_CI_PI_PCLK IMX8QXP_CSI_PCLK 0 673 1.1 jmcneill #define IMX8QXP_CSI_PCLK_MIPI_CSI0_I2C0_SCL IMX8QXP_CSI_PCLK 1 674 1.1 jmcneill #define IMX8QXP_CSI_PCLK_ADMA_SPI1_SCK IMX8QXP_CSI_PCLK 3 675 1.1 jmcneill #define IMX8QXP_CSI_PCLK_LSIO_GPIO3_IO00 IMX8QXP_CSI_PCLK 4 676 1.1 jmcneill #define IMX8QXP_CSI_MCLK_CI_PI_MCLK IMX8QXP_CSI_MCLK 0 677 1.1 jmcneill #define IMX8QXP_CSI_MCLK_MIPI_CSI0_I2C0_SDA IMX8QXP_CSI_MCLK 1 678 1.1 jmcneill #define IMX8QXP_CSI_MCLK_ADMA_SPI1_SDO IMX8QXP_CSI_MCLK 3 679 1.1 jmcneill #define IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01 IMX8QXP_CSI_MCLK 4 680 1.1 jmcneill #define IMX8QXP_CSI_EN_CI_PI_EN IMX8QXP_CSI_EN 0 681 1.1 jmcneill #define IMX8QXP_CSI_EN_CI_PI_I2C_SCL IMX8QXP_CSI_EN 1 682 1.1 jmcneill #define IMX8QXP_CSI_EN_ADMA_I2C3_SCL IMX8QXP_CSI_EN 2 683 1.1 jmcneill #define IMX8QXP_CSI_EN_ADMA_SPI1_SDI IMX8QXP_CSI_EN 3 684 1.1 jmcneill #define IMX8QXP_CSI_EN_LSIO_GPIO3_IO02 IMX8QXP_CSI_EN 4 685 1.1 jmcneill #define IMX8QXP_CSI_RESET_CI_PI_RESET IMX8QXP_CSI_RESET 0 686 1.1 jmcneill #define IMX8QXP_CSI_RESET_CI_PI_I2C_SDA IMX8QXP_CSI_RESET 1 687 1.1 jmcneill #define IMX8QXP_CSI_RESET_ADMA_I2C3_SDA IMX8QXP_CSI_RESET 2 688 1.1 jmcneill #define IMX8QXP_CSI_RESET_ADMA_SPI1_CS0 IMX8QXP_CSI_RESET 3 689 1.1 jmcneill #define IMX8QXP_CSI_RESET_LSIO_GPIO3_IO03 IMX8QXP_CSI_RESET 4 690 1.1 jmcneill #define IMX8QXP_MIPI_CSI0_MCLK_OUT_MIPI_CSI0_ACM_MCLK_OUT IMX8QXP_MIPI_CSI0_MCLK_OUT 0 691 1.1 jmcneill #define IMX8QXP_MIPI_CSI0_MCLK_OUT_LSIO_GPIO3_IO04 IMX8QXP_MIPI_CSI0_MCLK_OUT 4 692 1.1 jmcneill #define IMX8QXP_MIPI_CSI0_I2C0_SCL_MIPI_CSI0_I2C0_SCL IMX8QXP_MIPI_CSI0_I2C0_SCL 0 693 1.1 jmcneill #define IMX8QXP_MIPI_CSI0_I2C0_SCL_MIPI_CSI0_GPIO0_IO02 IMX8QXP_MIPI_CSI0_I2C0_SCL 1 694 1.1 jmcneill #define IMX8QXP_MIPI_CSI0_I2C0_SCL_LSIO_GPIO3_IO05 IMX8QXP_MIPI_CSI0_I2C0_SCL 4 695 1.1 jmcneill #define IMX8QXP_MIPI_CSI0_I2C0_SDA_MIPI_CSI0_I2C0_SDA IMX8QXP_MIPI_CSI0_I2C0_SDA 0 696 1.1 jmcneill #define IMX8QXP_MIPI_CSI0_I2C0_SDA_MIPI_CSI0_GPIO0_IO03 IMX8QXP_MIPI_CSI0_I2C0_SDA 1 697 1.1 jmcneill #define IMX8QXP_MIPI_CSI0_I2C0_SDA_LSIO_GPIO3_IO06 IMX8QXP_MIPI_CSI0_I2C0_SDA 4 698 1.1 jmcneill #define IMX8QXP_MIPI_CSI0_GPIO0_01_MIPI_CSI0_GPIO0_IO01 IMX8QXP_MIPI_CSI0_GPIO0_01 0 699 1.1 jmcneill #define IMX8QXP_MIPI_CSI0_GPIO0_01_ADMA_I2C0_SDA IMX8QXP_MIPI_CSI0_GPIO0_01 1 700 1.1 jmcneill #define IMX8QXP_MIPI_CSI0_GPIO0_01_LSIO_GPIO3_IO07 IMX8QXP_MIPI_CSI0_GPIO0_01 4 701 1.1 jmcneill #define IMX8QXP_MIPI_CSI0_GPIO0_00_MIPI_CSI0_GPIO0_IO00 IMX8QXP_MIPI_CSI0_GPIO0_00 0 702 1.1 jmcneill #define IMX8QXP_MIPI_CSI0_GPIO0_00_ADMA_I2C0_SCL IMX8QXP_MIPI_CSI0_GPIO0_00 1 703 1.1 jmcneill #define IMX8QXP_MIPI_CSI0_GPIO0_00_LSIO_GPIO3_IO08 IMX8QXP_MIPI_CSI0_GPIO0_00 4 704 1.1 jmcneill #define IMX8QXP_QSPI0A_DATA0_LSIO_QSPI0A_DATA0 IMX8QXP_QSPI0A_DATA0 0 705 1.1 jmcneill #define IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09 IMX8QXP_QSPI0A_DATA0 4 706 1.1 jmcneill #define IMX8QXP_QSPI0A_DATA1_LSIO_QSPI0A_DATA1 IMX8QXP_QSPI0A_DATA1 0 707 1.1 jmcneill #define IMX8QXP_QSPI0A_DATA1_LSIO_GPIO3_IO10 IMX8QXP_QSPI0A_DATA1 4 708 1.1 jmcneill #define IMX8QXP_QSPI0A_DATA2_LSIO_QSPI0A_DATA2 IMX8QXP_QSPI0A_DATA2 0 709 1.1 jmcneill #define IMX8QXP_QSPI0A_DATA2_LSIO_GPIO3_IO11 IMX8QXP_QSPI0A_DATA2 4 710 1.1 jmcneill #define IMX8QXP_QSPI0A_DATA3_LSIO_QSPI0A_DATA3 IMX8QXP_QSPI0A_DATA3 0 711 1.1 jmcneill #define IMX8QXP_QSPI0A_DATA3_LSIO_GPIO3_IO12 IMX8QXP_QSPI0A_DATA3 4 712 1.1 jmcneill #define IMX8QXP_QSPI0A_DQS_LSIO_QSPI0A_DQS IMX8QXP_QSPI0A_DQS 0 713 1.1 jmcneill #define IMX8QXP_QSPI0A_DQS_LSIO_GPIO3_IO13 IMX8QXP_QSPI0A_DQS 4 714 1.1 jmcneill #define IMX8QXP_QSPI0A_SS0_B_LSIO_QSPI0A_SS0_B IMX8QXP_QSPI0A_SS0_B 0 715 1.1 jmcneill #define IMX8QXP_QSPI0A_SS0_B_LSIO_GPIO3_IO14 IMX8QXP_QSPI0A_SS0_B 4 716 1.1 jmcneill #define IMX8QXP_QSPI0A_SS1_B_LSIO_QSPI0A_SS1_B IMX8QXP_QSPI0A_SS1_B 0 717 1.1 jmcneill #define IMX8QXP_QSPI0A_SS1_B_LSIO_GPIO3_IO15 IMX8QXP_QSPI0A_SS1_B 4 718 1.1 jmcneill #define IMX8QXP_QSPI0A_SCLK_LSIO_QSPI0A_SCLK IMX8QXP_QSPI0A_SCLK 0 719 1.1 jmcneill #define IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16 IMX8QXP_QSPI0A_SCLK 4 720 1.1 jmcneill #define IMX8QXP_QSPI0B_SCLK_LSIO_QSPI0B_SCLK IMX8QXP_QSPI0B_SCLK 0 721 1.1 jmcneill #define IMX8QXP_QSPI0B_SCLK_LSIO_QSPI1A_SCLK IMX8QXP_QSPI0B_SCLK 1 722 1.1 jmcneill #define IMX8QXP_QSPI0B_SCLK_LSIO_KPP0_COL0 IMX8QXP_QSPI0B_SCLK 2 723 1.1 jmcneill #define IMX8QXP_QSPI0B_SCLK_LSIO_GPIO3_IO17 IMX8QXP_QSPI0B_SCLK 4 724 1.1 jmcneill #define IMX8QXP_QSPI0B_DATA0_LSIO_QSPI0B_DATA0 IMX8QXP_QSPI0B_DATA0 0 725 1.1 jmcneill #define IMX8QXP_QSPI0B_DATA0_LSIO_QSPI1A_DATA0 IMX8QXP_QSPI0B_DATA0 1 726 1.1 jmcneill #define IMX8QXP_QSPI0B_DATA0_LSIO_KPP0_COL1 IMX8QXP_QSPI0B_DATA0 2 727 1.1 jmcneill #define IMX8QXP_QSPI0B_DATA0_LSIO_GPIO3_IO18 IMX8QXP_QSPI0B_DATA0 4 728 1.1 jmcneill #define IMX8QXP_QSPI0B_DATA1_LSIO_QSPI0B_DATA1 IMX8QXP_QSPI0B_DATA1 0 729 1.1 jmcneill #define IMX8QXP_QSPI0B_DATA1_LSIO_QSPI1A_DATA1 IMX8QXP_QSPI0B_DATA1 1 730 1.1 jmcneill #define IMX8QXP_QSPI0B_DATA1_LSIO_KPP0_COL2 IMX8QXP_QSPI0B_DATA1 2 731 1.1 jmcneill #define IMX8QXP_QSPI0B_DATA1_LSIO_GPIO3_IO19 IMX8QXP_QSPI0B_DATA1 4 732 1.1 jmcneill #define IMX8QXP_QSPI0B_DATA2_LSIO_QSPI0B_DATA2 IMX8QXP_QSPI0B_DATA2 0 733 1.1 jmcneill #define IMX8QXP_QSPI0B_DATA2_LSIO_QSPI1A_DATA2 IMX8QXP_QSPI0B_DATA2 1 734 1.1 jmcneill #define IMX8QXP_QSPI0B_DATA2_LSIO_KPP0_COL3 IMX8QXP_QSPI0B_DATA2 2 735 1.1 jmcneill #define IMX8QXP_QSPI0B_DATA2_LSIO_GPIO3_IO20 IMX8QXP_QSPI0B_DATA2 4 736 1.1 jmcneill #define IMX8QXP_QSPI0B_DATA3_LSIO_QSPI0B_DATA3 IMX8QXP_QSPI0B_DATA3 0 737 1.1 jmcneill #define IMX8QXP_QSPI0B_DATA3_LSIO_QSPI1A_DATA3 IMX8QXP_QSPI0B_DATA3 1 738 1.1 jmcneill #define IMX8QXP_QSPI0B_DATA3_LSIO_KPP0_ROW0 IMX8QXP_QSPI0B_DATA3 2 739 1.1 jmcneill #define IMX8QXP_QSPI0B_DATA3_LSIO_GPIO3_IO21 IMX8QXP_QSPI0B_DATA3 4 740 1.1 jmcneill #define IMX8QXP_QSPI0B_DQS_LSIO_QSPI0B_DQS IMX8QXP_QSPI0B_DQS 0 741 1.1 jmcneill #define IMX8QXP_QSPI0B_DQS_LSIO_QSPI1A_DQS IMX8QXP_QSPI0B_DQS 1 742 1.1 jmcneill #define IMX8QXP_QSPI0B_DQS_LSIO_KPP0_ROW1 IMX8QXP_QSPI0B_DQS 2 743 1.1 jmcneill #define IMX8QXP_QSPI0B_DQS_LSIO_GPIO3_IO22 IMX8QXP_QSPI0B_DQS 4 744 1.1 jmcneill #define IMX8QXP_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B IMX8QXP_QSPI0B_SS0_B 0 745 1.1 jmcneill #define IMX8QXP_QSPI0B_SS0_B_LSIO_QSPI1A_SS0_B IMX8QXP_QSPI0B_SS0_B 1 746 1.1 jmcneill #define IMX8QXP_QSPI0B_SS0_B_LSIO_KPP0_ROW2 IMX8QXP_QSPI0B_SS0_B 2 747 1.1 jmcneill #define IMX8QXP_QSPI0B_SS0_B_LSIO_GPIO3_IO23 IMX8QXP_QSPI0B_SS0_B 4 748 1.1 jmcneill #define IMX8QXP_QSPI0B_SS1_B_LSIO_QSPI0B_SS1_B IMX8QXP_QSPI0B_SS1_B 0 749 1.1 jmcneill #define IMX8QXP_QSPI0B_SS1_B_LSIO_QSPI1A_SS1_B IMX8QXP_QSPI0B_SS1_B 1 750 1.1 jmcneill #define IMX8QXP_QSPI0B_SS1_B_LSIO_KPP0_ROW3 IMX8QXP_QSPI0B_SS1_B 2 751 1.1 jmcneill #define IMX8QXP_QSPI0B_SS1_B_LSIO_GPIO3_IO24 IMX8QXP_QSPI0B_SS1_B 4 752 1.1 jmcneill 753 1.1 jmcneill #endif /* _IMX8QXP_PADS_H */ 754