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      1      1.1  jmcneill /*	$NetBSD: tegra186-powergate.h,v 1.1.1.2 2020/01/03 14:33:03 skrll Exp $	*/
      2      1.1  jmcneill 
      3  1.1.1.2     skrll /* SPDX-License-Identifier: GPL-2.0-only */
      4      1.1  jmcneill /*
      5      1.1  jmcneill  * Copyright (c) 2015-2016, NVIDIA CORPORATION.  All rights reserved.
      6      1.1  jmcneill  */
      7      1.1  jmcneill 
      8      1.1  jmcneill #ifndef _DT_BINDINGS_POWER_TEGRA186_POWERGATE_H
      9      1.1  jmcneill #define _DT_BINDINGS_POWER_TEGRA186_POWERGATE_H
     10      1.1  jmcneill 
     11      1.1  jmcneill #define TEGRA186_POWER_DOMAIN_AUD	0
     12      1.1  jmcneill #define TEGRA186_POWER_DOMAIN_DFD	1
     13      1.1  jmcneill #define TEGRA186_POWER_DOMAIN_DISP	2
     14      1.1  jmcneill #define TEGRA186_POWER_DOMAIN_DISPB	3
     15      1.1  jmcneill #define TEGRA186_POWER_DOMAIN_DISPC	4
     16      1.1  jmcneill #define TEGRA186_POWER_DOMAIN_ISPA	5
     17      1.1  jmcneill #define TEGRA186_POWER_DOMAIN_NVDEC	6
     18      1.1  jmcneill #define TEGRA186_POWER_DOMAIN_NVJPG	7
     19      1.1  jmcneill #define TEGRA186_POWER_DOMAIN_MPE	8
     20      1.1  jmcneill #define TEGRA186_POWER_DOMAIN_PCX	9
     21      1.1  jmcneill #define TEGRA186_POWER_DOMAIN_SAX	10
     22      1.1  jmcneill #define TEGRA186_POWER_DOMAIN_VE	11
     23      1.1  jmcneill #define TEGRA186_POWER_DOMAIN_VIC	12
     24      1.1  jmcneill #define TEGRA186_POWER_DOMAIN_XUSBA	13
     25      1.1  jmcneill #define TEGRA186_POWER_DOMAIN_XUSBB	14
     26      1.1  jmcneill #define TEGRA186_POWER_DOMAIN_XUSBC	15
     27      1.1  jmcneill #define TEGRA186_POWER_DOMAIN_GPU	43
     28      1.1  jmcneill #define TEGRA186_POWER_DOMAIN_MAX	44
     29      1.1  jmcneill 
     30      1.1  jmcneill #endif
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