1 1.1 jmcneill /* $NetBSD: tegra194-powergate.h,v 1.1.1.1 2018/04/28 18:25:53 jmcneill Exp $ */ 2 1.1 jmcneill 3 1.1 jmcneill /* SPDX-License-Identifier: GPL-2.0 */ 4 1.1 jmcneill /* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. */ 5 1.1 jmcneill 6 1.1 jmcneill #ifndef __ABI_MACH_T194_POWERGATE_T194_H_ 7 1.1 jmcneill #define __ABI_MACH_T194_POWERGATE_T194_H_ 8 1.1 jmcneill 9 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_AUD 1 10 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_DISP 2 11 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_DISPB 3 12 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_DISPC 4 13 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_ISPA 5 14 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_NVDECA 6 15 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_NVJPG 7 16 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_NVENCA 8 17 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_NVENCB 9 18 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_NVDECB 10 19 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_SAX 11 20 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_VE 12 21 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_VIC 13 22 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_XUSBA 14 23 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_XUSBB 15 24 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_XUSBC 16 25 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_PCIEX8A 17 26 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_PCIEX4A 18 27 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_PCIEX1A 19 28 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_PCIEX8B 21 29 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_PVAA 22 30 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_PVAB 23 31 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_DLAA 24 32 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_DLAB 25 33 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_CV 26 34 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_GPU 27 35 1.1 jmcneill #define TEGRA194_POWER_DOMAIN_MAX 27 36 1.1 jmcneill 37 1.1 jmcneill #endif 38