1 1.1 jmcneill /* $NetBSD: xlnx-zynqmp-power.h,v 1.1.1.1 2019/05/25 11:29:13 jmcneill Exp $ */ 2 1.1 jmcneill 3 1.1 jmcneill /* SPDX-License-Identifier: GPL-2.0 */ 4 1.1 jmcneill /* 5 1.1 jmcneill * Copyright (C) 2018 Xilinx, Inc. 6 1.1 jmcneill */ 7 1.1 jmcneill 8 1.1 jmcneill #ifndef _DT_BINDINGS_ZYNQMP_POWER_H 9 1.1 jmcneill #define _DT_BINDINGS_ZYNQMP_POWER_H 10 1.1 jmcneill 11 1.1 jmcneill #define PD_USB_0 22 12 1.1 jmcneill #define PD_USB_1 23 13 1.1 jmcneill #define PD_TTC_0 24 14 1.1 jmcneill #define PD_TTC_1 25 15 1.1 jmcneill #define PD_TTC_2 26 16 1.1 jmcneill #define PD_TTC_3 27 17 1.1 jmcneill #define PD_SATA 28 18 1.1 jmcneill #define PD_ETH_0 29 19 1.1 jmcneill #define PD_ETH_1 30 20 1.1 jmcneill #define PD_ETH_2 31 21 1.1 jmcneill #define PD_ETH_3 32 22 1.1 jmcneill #define PD_UART_0 33 23 1.1 jmcneill #define PD_UART_1 34 24 1.1 jmcneill #define PD_SPI_0 35 25 1.1 jmcneill #define PD_SPI_1 36 26 1.1 jmcneill #define PD_I2C_0 37 27 1.1 jmcneill #define PD_I2C_1 38 28 1.1 jmcneill #define PD_SD_0 39 29 1.1 jmcneill #define PD_SD_1 40 30 1.1 jmcneill #define PD_DP 41 31 1.1 jmcneill #define PD_GDMA 42 32 1.1 jmcneill #define PD_ADMA 43 33 1.1 jmcneill #define PD_NAND 44 34 1.1 jmcneill #define PD_QSPI 45 35 1.1 jmcneill #define PD_GPIO 46 36 1.1 jmcneill #define PD_CAN_0 47 37 1.1 jmcneill #define PD_CAN_1 48 38 1.1 jmcneill #define PD_GPU 58 39 1.1 jmcneill #define PD_PCIE 59 40 1.1 jmcneill 41 1.1 jmcneill #endif 42