11.1Sjmcneill/* $NetBSD: altr,rst-mgr-a10sr.h,v 1.1.1.2 2020/01/03 14:33:06 skrll Exp $ */ 21.1Sjmcneill 31.1.1.2Sskrll/* SPDX-License-Identifier: GPL-2.0-only */ 41.1Sjmcneill/* 51.1Sjmcneill * Copyright Intel Corporation (C) 2017. All Rights Reserved 61.1Sjmcneill * 71.1Sjmcneill * Reset binding definitions for Altera Arria10 MAX5 System Resource Chip 81.1Sjmcneill * 91.1Sjmcneill * Adapted from altr,rst-mgr-a10.h 101.1Sjmcneill */ 111.1Sjmcneill 121.1Sjmcneill#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H 131.1Sjmcneill#define _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H 141.1Sjmcneill 151.1Sjmcneill/* Peripheral PHY resets */ 161.1Sjmcneill#define A10SR_RESET_ENET_HPS 0 171.1Sjmcneill#define A10SR_RESET_PCIE 1 181.1Sjmcneill#define A10SR_RESET_FILE 2 191.1Sjmcneill#define A10SR_RESET_BQSPI 3 201.1Sjmcneill#define A10SR_RESET_USB 4 211.1Sjmcneill 221.1Sjmcneill#define A10SR_RESET_NUM 5 231.1Sjmcneill 241.1Sjmcneill#endif 25