altr,rst-mgr.h revision 1.1.1.1 
1/*	$NetBSD: altr,rst-mgr.h,v 1.1.1.1 2017/06/15 20:14:23 jmcneill Exp $	*/
2
3/*
4 * Copyright (c) 2014, Steffen Trumtrar <s.trumtrar@pengutronix.de>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13 * GNU General Public License for more details.
14 */
15
16#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_H
17#define _DT_BINDINGS_RESET_ALTR_RST_MGR_H
18
19/* MPUMODRST */
20#define CPU0_RESET		0
21#define CPU1_RESET		1
22#define WDS_RESET		2
23#define SCUPER_RESET		3
24#define L2_RESET		4
25
26/* PERMODRST */
27#define EMAC0_RESET		32
28#define EMAC1_RESET		33
29#define USB0_RESET		34
30#define USB1_RESET		35
31#define NAND_RESET		36
32#define QSPI_RESET		37
33#define L4WD0_RESET		38
34#define L4WD1_RESET		39
35#define OSC1TIMER0_RESET	40
36#define OSC1TIMER1_RESET	41
37#define SPTIMER0_RESET		42
38#define SPTIMER1_RESET		43
39#define I2C0_RESET		44
40#define I2C1_RESET		45
41#define I2C2_RESET		46
42#define I2C3_RESET		47
43#define UART0_RESET		48
44#define UART1_RESET		49
45#define SPIM0_RESET		50
46#define SPIM1_RESET		51
47#define SPIS0_RESET		52
48#define SPIS1_RESET		53
49#define SDMMC_RESET		54
50#define CAN0_RESET		55
51#define CAN1_RESET		56
52#define GPIO0_RESET		57
53#define GPIO1_RESET		58
54#define GPIO2_RESET		59
55#define DMA_RESET		60
56#define SDR_RESET		61
57
58/* PER2MODRST */
59#define DMAIF0_RESET		64
60#define DMAIF1_RESET		65
61#define DMAIF2_RESET		66
62#define DMAIF3_RESET		67
63#define DMAIF4_RESET		68
64#define DMAIF5_RESET		69
65#define DMAIF6_RESET		70
66#define DMAIF7_RESET		71
67
68/* BRGMODRST */
69#define HPS2FPGA_RESET		96
70#define LWHPS2FPGA_RESET	97
71#define FPGA2HPS_RESET		98
72
73/* MISCMODRST*/
74#define ROM_RESET		128
75#define OCRAM_RESET		129
76#define SYSMGR_RESET		130
77#define SYSMGRCOLD_RESET	131
78#define FPGAMGR_RESET		132
79#define ACPIDMAP_RESET		133
80#define S2F_RESET		134
81#define S2FCOLD_RESET		135
82#define NRSTPIN_RESET		136
83#define TIMESTAMPCOLD_RESET	137
84#define CLKMGRCOLD_RESET	138
85#define SCANMGR_RESET		139
86#define FRZCTRLCOLD_RESET	140
87#define SYSDBG_RESET		141
88#define DBG_RESET		142
89#define TAPCOLD_RESET		143
90#define SDRCOLD_RESET		144
91
92#endif
93