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      1      1.1  jmcneill /*	$NetBSD: altr,rst-mgr-a10sr.h,v 1.1.1.2 2020/01/03 14:33:06 skrll Exp $	*/
      2      1.1  jmcneill 
      3  1.1.1.2     skrll /* SPDX-License-Identifier: GPL-2.0-only */
      4      1.1  jmcneill /*
      5      1.1  jmcneill  *  Copyright Intel Corporation (C) 2017. All Rights Reserved
      6      1.1  jmcneill  *
      7      1.1  jmcneill  * Reset binding definitions for Altera Arria10 MAX5 System Resource Chip
      8      1.1  jmcneill  *
      9      1.1  jmcneill  * Adapted from altr,rst-mgr-a10.h
     10      1.1  jmcneill  */
     11      1.1  jmcneill 
     12      1.1  jmcneill #ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H
     13      1.1  jmcneill #define _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H
     14      1.1  jmcneill 
     15      1.1  jmcneill /* Peripheral PHY resets */
     16      1.1  jmcneill #define A10SR_RESET_ENET_HPS	0
     17      1.1  jmcneill #define A10SR_RESET_PCIE	1
     18      1.1  jmcneill #define A10SR_RESET_FILE	2
     19      1.1  jmcneill #define A10SR_RESET_BQSPI	3
     20      1.1  jmcneill #define A10SR_RESET_USB		4
     21      1.1  jmcneill 
     22      1.1  jmcneill #define A10SR_RESET_NUM		5
     23      1.1  jmcneill 
     24      1.1  jmcneill #endif
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