amlogic,c3-reset.h revision 1.1.1.1 
1/*	$NetBSD: amlogic,c3-reset.h,v 1.1.1.1 2026/01/18 05:21:54 skrll Exp $	*/
2
3/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
4/*
5 * Copyright (c) 2023 Amlogic, Inc. All rights reserved.
6 */
7
8#ifndef _DT_BINDINGS_AMLOGIC_C3_RESET_H
9#define _DT_BINDINGS_AMLOGIC_C3_RESET_H
10
11/* RESET0 */
12/*						0-3 */
13#define RESET_USBCTRL				4
14/*						5-7 */
15#define RESET_USBPHY20				8
16/*						9 */
17#define RESET_USB2DRD				10
18#define RESET_MIPI_DSI_HOST			11
19#define RESET_MIPI_DSI_PHY			12
20/*						13-20 */
21#define RESET_GE2D				21
22#define RESET_DWAP				22
23/*						23-31 */
24
25/* RESET1 */
26#define RESET_AUDIO				32
27/*						33-34 */
28#define RESET_DDRAPB				35
29#define RESET_DDR				36
30#define RESET_DOS_CAPB3				37
31#define RESET_DOS				38
32/*						39-46 */
33#define RESET_NNA				47
34#define RESET_ETHERNET				48
35#define RESET_ISP				49
36#define RESET_VC9000E_APB			50
37#define RESET_VC9000E_A				51
38/*						52 */
39#define RESET_VC9000E_CORE			53
40/*						54-63 */
41
42/* RESET2 */
43#define RESET_ABUS_ARB				64
44#define RESET_IRCTRL				65
45/*						66 */
46#define RESET_TEMP_PII				67
47/*						68-72 */
48#define RESET_SPICC_0				73
49#define RESET_SPICC_1				74
50#define RESET_RSA				75
51
52/*						76-79 */
53#define RESET_MSR_CLK				80
54#define RESET_SPIFC				81
55#define RESET_SAR_ADC				82
56/*						83-87 */
57#define RESET_ACODEC				88
58/*						89-90 */
59#define RESET_WATCHDOG				91
60/*						92-95 */
61
62/* RESET3 */
63#define RESET_ISP_NIC_GPV			96
64#define RESET_ISP_NIC_MAIN			97
65#define RESET_ISP_NIC_VCLK			98
66#define RESET_ISP_NIC_VOUT			99
67#define RESET_ISP_NIC_ALL			100
68#define RESET_VOUT				101
69#define RESET_VOUT_VENC				102
70/*						103 */
71#define RESET_CVE_NIC_GPV			104
72#define RESET_CVE_NIC_MAIN			105
73#define RESET_CVE_NIC_GE2D			106
74#define RESET_CVE_NIC_DW			106
75#define RESET_CVE_NIC_CVE			108
76#define RESET_CVE_NIC_ALL			109
77#define RESET_CVE				110
78/*						112-127 */
79
80/* RESET4 */
81#define RESET_RTC				128
82#define RESET_PWM_AB				129
83#define RESET_PWM_CD				130
84#define RESET_PWM_EF				131
85#define RESET_PWM_GH				132
86#define RESET_PWM_IJ				133
87#define RESET_PWM_KL				134
88#define RESET_PWM_MN				135
89/*						136-137 */
90#define RESET_UART_A				138
91#define RESET_UART_B				139
92#define RESET_UART_C				140
93#define RESET_UART_D				141
94#define RESET_UART_E				142
95#define RESET_UART_F				143
96#define RESET_I2C_S_A				144
97#define RESET_I2C_M_A				145
98#define RESET_I2C_M_B				146
99#define RESET_I2C_M_C				147
100#define RESET_I2C_M_D				148
101/*						149-151 */
102#define RESET_SD_EMMC_A				152
103#define RESET_SD_EMMC_B				153
104#define RESET_SD_EMMC_C				154
105
106/* RESET5 */
107/*						160-172 */
108#define RESET_BRG_NIC_NNA			173
109#define RESET_BRG_MUX_NIC_MAIN			174
110#define RESET_BRG_AO_NIC_ALL			175
111/*						176-183 */
112#define RESET_BRG_NIC_VAPB			184
113#define RESET_BRG_NIC_SDIO_B			185
114#define RESET_BRG_NIC_SDIO_A			186
115#define RESET_BRG_NIC_EMMC			187
116#define RESET_BRG_NIC_DSU			188
117#define RESET_BRG_NIC_SYSCLK			189
118#define RESET_BRG_NIC_MAIN			190
119#define RESET_BRG_NIC_ALL			191
120
121#endif
122