11.1Sjmcneill/*	$NetBSD: nuvoton,npcm7xx-reset.h,v 1.1.1.1 2021/11/07 16:49:57 jmcneill Exp $	*/
21.1Sjmcneill
31.1Sjmcneill/* SPDX-License-Identifier: GPL-2.0 */
41.1Sjmcneill// Copyright (c) 2019 Nuvoton Technology corporation.
51.1Sjmcneill
61.1Sjmcneill#ifndef _DT_BINDINGS_NPCM7XX_RESET_H
71.1Sjmcneill#define _DT_BINDINGS_NPCM7XX_RESET_H
81.1Sjmcneill
91.1Sjmcneill#define NPCM7XX_RESET_IPSRST1		0x20
101.1Sjmcneill#define NPCM7XX_RESET_IPSRST2		0x24
111.1Sjmcneill#define NPCM7XX_RESET_IPSRST3		0x34
121.1Sjmcneill
131.1Sjmcneill/* Reset lines on IP1 reset module (NPCM7XX_RESET_IPSRST1) */
141.1Sjmcneill#define NPCM7XX_RESET_FIU3		1
151.1Sjmcneill#define NPCM7XX_RESET_UDC1		5
161.1Sjmcneill#define NPCM7XX_RESET_EMC1		6
171.1Sjmcneill#define NPCM7XX_RESET_UART_2_3		7
181.1Sjmcneill#define NPCM7XX_RESET_UDC2		8
191.1Sjmcneill#define NPCM7XX_RESET_PECI		9
201.1Sjmcneill#define NPCM7XX_RESET_AES		10
211.1Sjmcneill#define NPCM7XX_RESET_UART_0_1		11
221.1Sjmcneill#define NPCM7XX_RESET_MC		12
231.1Sjmcneill#define NPCM7XX_RESET_SMB2		13
241.1Sjmcneill#define NPCM7XX_RESET_SMB3		14
251.1Sjmcneill#define NPCM7XX_RESET_SMB4		15
261.1Sjmcneill#define NPCM7XX_RESET_SMB5		16
271.1Sjmcneill#define NPCM7XX_RESET_PWM_M0		18
281.1Sjmcneill#define NPCM7XX_RESET_TIMER_0_4		19
291.1Sjmcneill#define NPCM7XX_RESET_TIMER_5_9		20
301.1Sjmcneill#define NPCM7XX_RESET_EMC2		21
311.1Sjmcneill#define NPCM7XX_RESET_UDC4		22
321.1Sjmcneill#define NPCM7XX_RESET_UDC5		23
331.1Sjmcneill#define NPCM7XX_RESET_UDC6		24
341.1Sjmcneill#define NPCM7XX_RESET_UDC3		25
351.1Sjmcneill#define NPCM7XX_RESET_ADC		27
361.1Sjmcneill#define NPCM7XX_RESET_SMB6		28
371.1Sjmcneill#define NPCM7XX_RESET_SMB7		29
381.1Sjmcneill#define NPCM7XX_RESET_SMB0		30
391.1Sjmcneill#define NPCM7XX_RESET_SMB1		31
401.1Sjmcneill
411.1Sjmcneill/* Reset lines on IP2 reset module (NPCM7XX_RESET_IPSRST2) */
421.1Sjmcneill#define NPCM7XX_RESET_MFT0		0
431.1Sjmcneill#define NPCM7XX_RESET_MFT1		1
441.1Sjmcneill#define NPCM7XX_RESET_MFT2		2
451.1Sjmcneill#define NPCM7XX_RESET_MFT3		3
461.1Sjmcneill#define NPCM7XX_RESET_MFT4		4
471.1Sjmcneill#define NPCM7XX_RESET_MFT5		5
481.1Sjmcneill#define NPCM7XX_RESET_MFT6		6
491.1Sjmcneill#define NPCM7XX_RESET_MFT7		7
501.1Sjmcneill#define NPCM7XX_RESET_MMC		8
511.1Sjmcneill#define NPCM7XX_RESET_SDHC		9
521.1Sjmcneill#define NPCM7XX_RESET_GFX_SYS		10
531.1Sjmcneill#define NPCM7XX_RESET_AHB_PCIBRG	11
541.1Sjmcneill#define NPCM7XX_RESET_VDMA		12
551.1Sjmcneill#define NPCM7XX_RESET_ECE		13
561.1Sjmcneill#define NPCM7XX_RESET_VCD		14
571.1Sjmcneill#define NPCM7XX_RESET_OTP		16
581.1Sjmcneill#define NPCM7XX_RESET_SIOX1		18
591.1Sjmcneill#define NPCM7XX_RESET_SIOX2		19
601.1Sjmcneill#define NPCM7XX_RESET_3DES		21
611.1Sjmcneill#define NPCM7XX_RESET_PSPI1		22
621.1Sjmcneill#define NPCM7XX_RESET_PSPI2		23
631.1Sjmcneill#define NPCM7XX_RESET_GMAC2		25
641.1Sjmcneill#define NPCM7XX_RESET_USB_HOST		26
651.1Sjmcneill#define NPCM7XX_RESET_GMAC1		28
661.1Sjmcneill#define NPCM7XX_RESET_CP		31
671.1Sjmcneill
681.1Sjmcneill/* Reset lines on IP3 reset module (NPCM7XX_RESET_IPSRST3) */
691.1Sjmcneill#define NPCM7XX_RESET_PWM_M1		0
701.1Sjmcneill#define NPCM7XX_RESET_SMB12		1
711.1Sjmcneill#define NPCM7XX_RESET_SPIX		2
721.1Sjmcneill#define NPCM7XX_RESET_SMB13		3
731.1Sjmcneill#define NPCM7XX_RESET_UDC0		4
741.1Sjmcneill#define NPCM7XX_RESET_UDC7		5
751.1Sjmcneill#define NPCM7XX_RESET_UDC8		6
761.1Sjmcneill#define NPCM7XX_RESET_UDC9		7
771.1Sjmcneill#define NPCM7XX_RESET_PCI_MAILBOX	9
781.1Sjmcneill#define NPCM7XX_RESET_SMB14		12
791.1Sjmcneill#define NPCM7XX_RESET_SHA		13
801.1Sjmcneill#define NPCM7XX_RESET_SEC_ECC		14
811.1Sjmcneill#define NPCM7XX_RESET_PCIE_RC		15
821.1Sjmcneill#define NPCM7XX_RESET_TIMER_10_14	16
831.1Sjmcneill#define NPCM7XX_RESET_RNG		17
841.1Sjmcneill#define NPCM7XX_RESET_SMB15		18
851.1Sjmcneill#define NPCM7XX_RESET_SMB8		19
861.1Sjmcneill#define NPCM7XX_RESET_SMB9		20
871.1Sjmcneill#define NPCM7XX_RESET_SMB10		21
881.1Sjmcneill#define NPCM7XX_RESET_SMB11		22
891.1Sjmcneill#define NPCM7XX_RESET_ESPI		23
901.1Sjmcneill#define NPCM7XX_RESET_USB_PHY_1		24
911.1Sjmcneill#define NPCM7XX_RESET_USB_PHY_2		25
921.1Sjmcneill
931.1Sjmcneill#endif
94