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      1      1.1  jmcneill /*	$NetBSD: oxsemi,ox820.h,v 1.1.1.2 2020/01/03 14:33:06 skrll Exp $	*/
      2      1.1  jmcneill 
      3  1.1.1.2     skrll /* SPDX-License-Identifier: GPL-2.0-only */
      4      1.1  jmcneill /*
      5      1.1  jmcneill  * Copyright (C) 2016 Neil Armstrong <narmstrong (at) baylibre.com>
      6      1.1  jmcneill  */
      7      1.1  jmcneill 
      8      1.1  jmcneill #ifndef DT_RESET_OXSEMI_OX820_H
      9      1.1  jmcneill #define DT_RESET_OXSEMI_OX820_H
     10      1.1  jmcneill 
     11      1.1  jmcneill #define RESET_SCU	0
     12      1.1  jmcneill #define RESET_LEON	1
     13      1.1  jmcneill #define RESET_ARM0	2
     14      1.1  jmcneill #define RESET_ARM1	3
     15      1.1  jmcneill #define RESET_USBHS	4
     16      1.1  jmcneill #define RESET_USBPHYA	5
     17      1.1  jmcneill #define RESET_MAC	6
     18      1.1  jmcneill #define RESET_PCIEA	7
     19      1.1  jmcneill #define RESET_SGDMA	8
     20      1.1  jmcneill #define RESET_CIPHER	9
     21      1.1  jmcneill #define RESET_DDR	10
     22      1.1  jmcneill #define RESET_SATA	11
     23      1.1  jmcneill #define RESET_SATA_LINK	12
     24      1.1  jmcneill #define RESET_SATA_PHY	13
     25      1.1  jmcneill #define RESET_PCIEPHY	14
     26      1.1  jmcneill #define RESET_NAND	15
     27      1.1  jmcneill #define RESET_GPIO	16
     28      1.1  jmcneill #define RESET_UART1	17
     29      1.1  jmcneill #define RESET_UART2	18
     30      1.1  jmcneill #define RESET_MISC	19
     31      1.1  jmcneill #define RESET_I2S	20
     32      1.1  jmcneill #define RESET_SD	21
     33      1.1  jmcneill #define RESET_MAC_2	22
     34      1.1  jmcneill #define RESET_PCIEB	23
     35      1.1  jmcneill #define RESET_VIDEO	24
     36      1.1  jmcneill #define RESET_DDR_PHY	25
     37      1.1  jmcneill #define RESET_USBPHYB	26
     38      1.1  jmcneill #define RESET_USBDEV	27
     39      1.1  jmcneill /* Reserved		29 */
     40      1.1  jmcneill #define RESET_ARMDBG	29
     41      1.1  jmcneill #define RESET_PLLA	30
     42      1.1  jmcneill #define RESET_PLLB	31
     43      1.1  jmcneill 
     44      1.1  jmcneill #endif /* DT_RESET_OXSEMI_OX820_H */
     45