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      1      1.1  jmcneill /*	$NetBSD: qcom,gcc-apq8084.h,v 1.1.1.2 2020/01/03 14:33:06 skrll Exp $	*/
      2      1.1  jmcneill 
      3  1.1.1.2     skrll /* SPDX-License-Identifier: GPL-2.0-only */
      4      1.1  jmcneill /*
      5      1.1  jmcneill  * Copyright (c) 2014, The Linux Foundation. All rights reserved.
      6      1.1  jmcneill  */
      7      1.1  jmcneill 
      8      1.1  jmcneill #ifndef _DT_BINDINGS_RESET_APQ_GCC_8084_H
      9      1.1  jmcneill #define _DT_BINDINGS_RESET_APQ_GCC_8084_H
     10      1.1  jmcneill 
     11      1.1  jmcneill #define GCC_SYSTEM_NOC_BCR		0
     12      1.1  jmcneill #define GCC_CONFIG_NOC_BCR		1
     13      1.1  jmcneill #define GCC_PERIPH_NOC_BCR		2
     14      1.1  jmcneill #define GCC_IMEM_BCR			3
     15      1.1  jmcneill #define GCC_MMSS_BCR			4
     16      1.1  jmcneill #define GCC_QDSS_BCR			5
     17      1.1  jmcneill #define GCC_USB_30_BCR			6
     18      1.1  jmcneill #define GCC_USB3_PHY_BCR		7
     19      1.1  jmcneill #define GCC_USB_HS_HSIC_BCR		8
     20      1.1  jmcneill #define GCC_USB_HS_BCR			9
     21      1.1  jmcneill #define GCC_USB2A_PHY_BCR		10
     22      1.1  jmcneill #define GCC_USB2B_PHY_BCR		11
     23      1.1  jmcneill #define GCC_SDCC1_BCR			12
     24      1.1  jmcneill #define GCC_SDCC2_BCR			13
     25      1.1  jmcneill #define GCC_SDCC3_BCR			14
     26      1.1  jmcneill #define GCC_SDCC4_BCR			15
     27      1.1  jmcneill #define GCC_BLSP1_BCR			16
     28      1.1  jmcneill #define GCC_BLSP1_QUP1_BCR		17
     29      1.1  jmcneill #define GCC_BLSP1_UART1_BCR		18
     30      1.1  jmcneill #define GCC_BLSP1_QUP2_BCR		19
     31      1.1  jmcneill #define GCC_BLSP1_UART2_BCR		20
     32      1.1  jmcneill #define GCC_BLSP1_QUP3_BCR		21
     33      1.1  jmcneill #define GCC_BLSP1_UART3_BCR		22
     34      1.1  jmcneill #define GCC_BLSP1_QUP4_BCR		23
     35      1.1  jmcneill #define GCC_BLSP1_UART4_BCR		24
     36      1.1  jmcneill #define GCC_BLSP1_QUP5_BCR		25
     37      1.1  jmcneill #define GCC_BLSP1_UART5_BCR		26
     38      1.1  jmcneill #define GCC_BLSP1_QUP6_BCR		27
     39      1.1  jmcneill #define GCC_BLSP1_UART6_BCR		28
     40      1.1  jmcneill #define GCC_BLSP2_BCR			29
     41      1.1  jmcneill #define GCC_BLSP2_QUP1_BCR		30
     42      1.1  jmcneill #define GCC_BLSP2_UART1_BCR		31
     43      1.1  jmcneill #define GCC_BLSP2_QUP2_BCR		32
     44      1.1  jmcneill #define GCC_BLSP2_UART2_BCR		33
     45      1.1  jmcneill #define GCC_BLSP2_QUP3_BCR		34
     46      1.1  jmcneill #define GCC_BLSP2_UART3_BCR		35
     47      1.1  jmcneill #define GCC_BLSP2_QUP4_BCR		36
     48      1.1  jmcneill #define GCC_BLSP2_UART4_BCR		37
     49      1.1  jmcneill #define GCC_BLSP2_QUP5_BCR		38
     50      1.1  jmcneill #define GCC_BLSP2_UART5_BCR		39
     51      1.1  jmcneill #define GCC_BLSP2_QUP6_BCR		40
     52      1.1  jmcneill #define GCC_BLSP2_UART6_BCR		41
     53      1.1  jmcneill #define GCC_PDM_BCR			42
     54      1.1  jmcneill #define GCC_PRNG_BCR			43
     55      1.1  jmcneill #define GCC_BAM_DMA_BCR			44
     56      1.1  jmcneill #define GCC_TSIF_BCR			45
     57      1.1  jmcneill #define GCC_TCSR_BCR			46
     58      1.1  jmcneill #define GCC_BOOT_ROM_BCR		47
     59      1.1  jmcneill #define GCC_MSG_RAM_BCR			48
     60      1.1  jmcneill #define GCC_TLMM_BCR			49
     61      1.1  jmcneill #define GCC_MPM_BCR			50
     62      1.1  jmcneill #define GCC_MPM_AHB_RESET		51
     63      1.1  jmcneill #define GCC_MPM_NON_AHB_RESET		52
     64      1.1  jmcneill #define GCC_SEC_CTRL_BCR		53
     65      1.1  jmcneill #define GCC_SPMI_BCR			54
     66      1.1  jmcneill #define GCC_SPDM_BCR			55
     67      1.1  jmcneill #define GCC_CE1_BCR			56
     68      1.1  jmcneill #define GCC_CE2_BCR			57
     69      1.1  jmcneill #define GCC_BIMC_BCR			58
     70      1.1  jmcneill #define GCC_SNOC_BUS_TIMEOUT0_BCR	59
     71      1.1  jmcneill #define GCC_SNOC_BUS_TIMEOUT2_BCR	60
     72      1.1  jmcneill #define GCC_PNOC_BUS_TIMEOUT0_BCR	61
     73      1.1  jmcneill #define GCC_PNOC_BUS_TIMEOUT1_BCR	62
     74      1.1  jmcneill #define GCC_PNOC_BUS_TIMEOUT2_BCR	63
     75      1.1  jmcneill #define GCC_PNOC_BUS_TIMEOUT3_BCR	64
     76      1.1  jmcneill #define GCC_PNOC_BUS_TIMEOUT4_BCR	65
     77      1.1  jmcneill #define GCC_CNOC_BUS_TIMEOUT0_BCR	66
     78      1.1  jmcneill #define GCC_CNOC_BUS_TIMEOUT1_BCR	67
     79      1.1  jmcneill #define GCC_CNOC_BUS_TIMEOUT2_BCR	68
     80      1.1  jmcneill #define GCC_CNOC_BUS_TIMEOUT3_BCR	69
     81      1.1  jmcneill #define GCC_CNOC_BUS_TIMEOUT4_BCR	70
     82      1.1  jmcneill #define GCC_CNOC_BUS_TIMEOUT5_BCR	71
     83      1.1  jmcneill #define GCC_CNOC_BUS_TIMEOUT6_BCR	72
     84      1.1  jmcneill #define GCC_DEHR_BCR			73
     85      1.1  jmcneill #define GCC_RBCPR_BCR			74
     86      1.1  jmcneill #define GCC_MSS_RESTART			75
     87      1.1  jmcneill #define GCC_LPASS_RESTART		76
     88      1.1  jmcneill #define GCC_WCSS_RESTART		77
     89      1.1  jmcneill #define GCC_VENUS_RESTART		78
     90      1.1  jmcneill #define GCC_COPSS_SMMU_BCR		79
     91      1.1  jmcneill #define GCC_SPSS_BCR			80
     92      1.1  jmcneill #define GCC_PCIE_0_BCR			81
     93      1.1  jmcneill #define GCC_PCIE_0_PHY_BCR		82
     94      1.1  jmcneill #define GCC_PCIE_1_BCR			83
     95      1.1  jmcneill #define GCC_PCIE_1_PHY_BCR		84
     96      1.1  jmcneill #define GCC_USB_30_SEC_BCR		85
     97      1.1  jmcneill #define GCC_USB3_SEC_PHY_BCR		86
     98      1.1  jmcneill #define GCC_SATA_BCR			87
     99      1.1  jmcneill #define GCC_CE3_BCR			88
    100      1.1  jmcneill #define GCC_UFS_BCR			89
    101      1.1  jmcneill #define GCC_USB30_PHY_COM_BCR		90
    102      1.1  jmcneill 
    103      1.1  jmcneill #endif
    104