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qcom,gcc-msm8660.h revision 1.1.1.1.8.2
      1 /*	$NetBSD: qcom,gcc-msm8660.h,v 1.1.1.1.8.2 2017/12/03 11:38:40 jdolecek Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2013, The Linux Foundation. All rights reserved.
      5  *
      6  * This software is licensed under the terms of the GNU General Public
      7  * License version 2, as published by the Free Software Foundation, and
      8  * may be copied, distributed, and modified under those terms.
      9  *
     10  * This program is distributed in the hope that it will be useful,
     11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
     12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     13  * GNU General Public License for more details.
     14  */
     15 
     16 #ifndef _DT_BINDINGS_RESET_MSM_GCC_8660_H
     17 #define _DT_BINDINGS_RESET_MSM_GCC_8660_H
     18 
     19 #define AFAB_CORE_RESET					0
     20 #define SCSS_SYS_RESET					1
     21 #define SCSS_SYS_POR_RESET				2
     22 #define AFAB_SMPSS_S_RESET				3
     23 #define AFAB_SMPSS_M1_RESET				4
     24 #define AFAB_SMPSS_M0_RESET				5
     25 #define AFAB_EBI1_S_RESET				6
     26 #define SFAB_CORE_RESET					7
     27 #define SFAB_ADM0_M0_RESET				8
     28 #define SFAB_ADM0_M1_RESET				9
     29 #define SFAB_ADM0_M2_RESET				10
     30 #define ADM0_C2_RESET					11
     31 #define ADM0_C1_RESET					12
     32 #define ADM0_C0_RESET					13
     33 #define ADM0_PBUS_RESET					14
     34 #define ADM0_RESET					15
     35 #define SFAB_ADM1_M0_RESET				16
     36 #define SFAB_ADM1_M1_RESET				17
     37 #define SFAB_ADM1_M2_RESET				18
     38 #define MMFAB_ADM1_M3_RESET				19
     39 #define ADM1_C3_RESET					20
     40 #define ADM1_C2_RESET					21
     41 #define ADM1_C1_RESET					22
     42 #define ADM1_C0_RESET					23
     43 #define ADM1_PBUS_RESET					24
     44 #define ADM1_RESET					25
     45 #define IMEM0_RESET					26
     46 #define SFAB_LPASS_Q6_RESET				27
     47 #define SFAB_AFAB_M_RESET				28
     48 #define AFAB_SFAB_M0_RESET				29
     49 #define AFAB_SFAB_M1_RESET				30
     50 #define DFAB_CORE_RESET					31
     51 #define SFAB_DFAB_M_RESET				32
     52 #define DFAB_SFAB_M_RESET				33
     53 #define DFAB_SWAY0_RESET				34
     54 #define DFAB_SWAY1_RESET				35
     55 #define DFAB_ARB0_RESET					36
     56 #define DFAB_ARB1_RESET					37
     57 #define PPSS_PROC_RESET					38
     58 #define PPSS_RESET					39
     59 #define PMEM_RESET					40
     60 #define DMA_BAM_RESET					41
     61 #define SIC_RESET					42
     62 #define SPS_TIC_RESET					43
     63 #define CFBP0_RESET					44
     64 #define CFBP1_RESET					45
     65 #define CFBP2_RESET					46
     66 #define EBI2_RESET					47
     67 #define SFAB_CFPB_M_RESET				48
     68 #define CFPB_MASTER_RESET				49
     69 #define SFAB_CFPB_S_RESET				50
     70 #define CFPB_SPLITTER_RESET				51
     71 #define TSIF_RESET					52
     72 #define CE1_RESET					53
     73 #define CE2_RESET					54
     74 #define SFAB_SFPB_M_RESET				55
     75 #define SFAB_SFPB_S_RESET				56
     76 #define RPM_PROC_RESET					57
     77 #define RPM_BUS_RESET					58
     78 #define RPM_MSG_RAM_RESET				59
     79 #define PMIC_ARB0_RESET					60
     80 #define PMIC_ARB1_RESET					61
     81 #define PMIC_SSBI2_RESET				62
     82 #define SDC1_RESET					63
     83 #define SDC2_RESET					64
     84 #define SDC3_RESET					65
     85 #define SDC4_RESET					66
     86 #define SDC5_RESET					67
     87 #define USB_HS1_RESET					68
     88 #define USB_HS2_XCVR_RESET				69
     89 #define USB_HS2_RESET					70
     90 #define USB_FS1_XCVR_RESET				71
     91 #define USB_FS1_RESET					72
     92 #define USB_FS2_XCVR_RESET				73
     93 #define USB_FS2_RESET					74
     94 #define GSBI1_RESET					75
     95 #define GSBI2_RESET					76
     96 #define GSBI3_RESET					77
     97 #define GSBI4_RESET					78
     98 #define GSBI5_RESET					79
     99 #define GSBI6_RESET					80
    100 #define GSBI7_RESET					81
    101 #define GSBI8_RESET					82
    102 #define GSBI9_RESET					83
    103 #define GSBI10_RESET					84
    104 #define GSBI11_RESET					85
    105 #define GSBI12_RESET					86
    106 #define SPDM_RESET					87
    107 #define SEC_CTRL_RESET					88
    108 #define TLMM_H_RESET					89
    109 #define TLMM_RESET					90
    110 #define MARRM_PWRON_RESET				91
    111 #define MARM_RESET					92
    112 #define MAHB1_RESET					93
    113 #define SFAB_MSS_S_RESET				94
    114 #define MAHB2_RESET					95
    115 #define MODEM_SW_AHB_RESET				96
    116 #define MODEM_RESET					97
    117 #define SFAB_MSS_MDM1_RESET				98
    118 #define SFAB_MSS_MDM0_RESET				99
    119 #define MSS_SLP_RESET					100
    120 #define MSS_MARM_SAW_RESET				101
    121 #define MSS_WDOG_RESET					102
    122 #define TSSC_RESET					103
    123 #define PDM_RESET					104
    124 #define SCSS_CORE0_RESET				105
    125 #define SCSS_CORE0_POR_RESET				106
    126 #define SCSS_CORE1_RESET				107
    127 #define SCSS_CORE1_POR_RESET				108
    128 #define MPM_RESET					109
    129 #define EBI1_1X_DIV_RESET				110
    130 #define EBI1_RESET					111
    131 #define SFAB_SMPSS_S_RESET				112
    132 #define USB_PHY0_RESET					113
    133 #define USB_PHY1_RESET					114
    134 #define PRNG_RESET					115
    135 
    136 #endif
    137