1 1.1 jmcneill /* $NetBSD: stih407-resets.h,v 1.1.1.2 2017/11/30 19:40:51 jmcneill Exp $ */ 2 1.1 jmcneill 3 1.1.1.2 jmcneill /* SPDX-License-Identifier: GPL-2.0 */ 4 1.1 jmcneill /* 5 1.1 jmcneill * This header provides constants for the reset controller 6 1.1 jmcneill * based peripheral powerdown requests on the STMicroelectronics 7 1.1 jmcneill * STiH407 SoC. 8 1.1 jmcneill */ 9 1.1 jmcneill #ifndef _DT_BINDINGS_RESET_CONTROLLER_STIH407 10 1.1 jmcneill #define _DT_BINDINGS_RESET_CONTROLLER_STIH407 11 1.1 jmcneill 12 1.1 jmcneill /* Powerdown requests control 0 */ 13 1.1 jmcneill #define STIH407_EMISS_POWERDOWN 0 14 1.1 jmcneill #define STIH407_NAND_POWERDOWN 1 15 1.1 jmcneill 16 1.1 jmcneill /* Synp GMAC PowerDown */ 17 1.1 jmcneill #define STIH407_ETH1_POWERDOWN 2 18 1.1 jmcneill 19 1.1 jmcneill /* Powerdown requests control 1 */ 20 1.1 jmcneill #define STIH407_USB3_POWERDOWN 3 21 1.1 jmcneill #define STIH407_USB2_PORT1_POWERDOWN 4 22 1.1 jmcneill #define STIH407_USB2_PORT0_POWERDOWN 5 23 1.1 jmcneill #define STIH407_PCIE1_POWERDOWN 6 24 1.1 jmcneill #define STIH407_PCIE0_POWERDOWN 7 25 1.1 jmcneill #define STIH407_SATA1_POWERDOWN 8 26 1.1 jmcneill #define STIH407_SATA0_POWERDOWN 9 27 1.1 jmcneill 28 1.1 jmcneill /* Reset defines */ 29 1.1 jmcneill #define STIH407_ETH1_SOFTRESET 0 30 1.1 jmcneill #define STIH407_MMC1_SOFTRESET 1 31 1.1 jmcneill #define STIH407_PICOPHY_SOFTRESET 2 32 1.1 jmcneill #define STIH407_IRB_SOFTRESET 3 33 1.1 jmcneill #define STIH407_PCIE0_SOFTRESET 4 34 1.1 jmcneill #define STIH407_PCIE1_SOFTRESET 5 35 1.1 jmcneill #define STIH407_SATA0_SOFTRESET 6 36 1.1 jmcneill #define STIH407_SATA1_SOFTRESET 7 37 1.1 jmcneill #define STIH407_MIPHY0_SOFTRESET 8 38 1.1 jmcneill #define STIH407_MIPHY1_SOFTRESET 9 39 1.1 jmcneill #define STIH407_MIPHY2_SOFTRESET 10 40 1.1 jmcneill #define STIH407_SATA0_PWR_SOFTRESET 11 41 1.1 jmcneill #define STIH407_SATA1_PWR_SOFTRESET 12 42 1.1 jmcneill #define STIH407_DELTA_SOFTRESET 13 43 1.1 jmcneill #define STIH407_BLITTER_SOFTRESET 14 44 1.1 jmcneill #define STIH407_HDTVOUT_SOFTRESET 15 45 1.1 jmcneill #define STIH407_HDQVDP_SOFTRESET 16 46 1.1 jmcneill #define STIH407_VDP_AUX_SOFTRESET 17 47 1.1 jmcneill #define STIH407_COMPO_SOFTRESET 18 48 1.1 jmcneill #define STIH407_HDMI_TX_PHY_SOFTRESET 19 49 1.1 jmcneill #define STIH407_JPEG_DEC_SOFTRESET 20 50 1.1 jmcneill #define STIH407_VP8_DEC_SOFTRESET 21 51 1.1 jmcneill #define STIH407_GPU_SOFTRESET 22 52 1.1 jmcneill #define STIH407_HVA_SOFTRESET 23 53 1.1 jmcneill #define STIH407_ERAM_HVA_SOFTRESET 24 54 1.1 jmcneill #define STIH407_LPM_SOFTRESET 25 55 1.1 jmcneill #define STIH407_KEYSCAN_SOFTRESET 26 56 1.1 jmcneill #define STIH407_USB2_PORT0_SOFTRESET 27 57 1.1 jmcneill #define STIH407_USB2_PORT1_SOFTRESET 28 58 1.1 jmcneill #define STIH407_ST231_AUD_SOFTRESET 29 59 1.1 jmcneill #define STIH407_ST231_DMU_SOFTRESET 30 60 1.1 jmcneill #define STIH407_ST231_GP0_SOFTRESET 31 61 1.1 jmcneill #define STIH407_ST231_GP1_SOFTRESET 32 62 1.1 jmcneill 63 1.1 jmcneill /* Picophy reset defines */ 64 1.1 jmcneill #define STIH407_PICOPHY0_RESET 0 65 1.1 jmcneill #define STIH407_PICOPHY1_RESET 1 66 1.1 jmcneill #define STIH407_PICOPHY2_RESET 2 67 1.1 jmcneill 68 1.1 jmcneill #endif /* _DT_BINDINGS_RESET_CONTROLLER_STIH407 */ 69