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      1  1.1  skrll /*	$NetBSD: sun20i-d1-ccu.h,v 1.1 2024/08/12 10:55:56 skrll Exp $	*/
      2  1.1  skrll 
      3  1.1  skrll /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
      4  1.1  skrll /*
      5  1.1  skrll  * Copyright (c) 2020 huangzhenwei (at) allwinnertech.com
      6  1.1  skrll  * Copyright (C) 2021 Samuel Holland <samuel (at) sholland.org>
      7  1.1  skrll  */
      8  1.1  skrll 
      9  1.1  skrll #ifndef _DT_BINDINGS_RST_SUN20I_D1_CCU_H_
     10  1.1  skrll #define _DT_BINDINGS_RST_SUN20I_D1_CCU_H_
     11  1.1  skrll 
     12  1.1  skrll #define RST_MBUS		0
     13  1.1  skrll #define RST_BUS_DE		1
     14  1.1  skrll #define RST_BUS_DI		2
     15  1.1  skrll #define RST_BUS_G2D		3
     16  1.1  skrll #define RST_BUS_CE		4
     17  1.1  skrll #define RST_BUS_VE		5
     18  1.1  skrll #define RST_BUS_DMA		6
     19  1.1  skrll #define RST_BUS_MSGBOX0		7
     20  1.1  skrll #define RST_BUS_MSGBOX1		8
     21  1.1  skrll #define RST_BUS_MSGBOX2		9
     22  1.1  skrll #define RST_BUS_SPINLOCK	10
     23  1.1  skrll #define RST_BUS_HSTIMER		11
     24  1.1  skrll #define RST_BUS_DBG		12
     25  1.1  skrll #define RST_BUS_PWM		13
     26  1.1  skrll #define RST_BUS_DRAM		14
     27  1.1  skrll #define RST_BUS_MMC0		15
     28  1.1  skrll #define RST_BUS_MMC1		16
     29  1.1  skrll #define RST_BUS_MMC2		17
     30  1.1  skrll #define RST_BUS_UART0		18
     31  1.1  skrll #define RST_BUS_UART1		19
     32  1.1  skrll #define RST_BUS_UART2		20
     33  1.1  skrll #define RST_BUS_UART3		21
     34  1.1  skrll #define RST_BUS_UART4		22
     35  1.1  skrll #define RST_BUS_UART5		23
     36  1.1  skrll #define RST_BUS_I2C0		24
     37  1.1  skrll #define RST_BUS_I2C1		25
     38  1.1  skrll #define RST_BUS_I2C2		26
     39  1.1  skrll #define RST_BUS_I2C3		27
     40  1.1  skrll #define RST_BUS_SPI0		28
     41  1.1  skrll #define RST_BUS_SPI1		29
     42  1.1  skrll #define RST_BUS_EMAC		30
     43  1.1  skrll #define RST_BUS_IR_TX		31
     44  1.1  skrll #define RST_BUS_GPADC		32
     45  1.1  skrll #define RST_BUS_THS		33
     46  1.1  skrll #define RST_BUS_I2S0		34
     47  1.1  skrll #define RST_BUS_I2S1		35
     48  1.1  skrll #define RST_BUS_I2S2		36
     49  1.1  skrll #define RST_BUS_SPDIF		37
     50  1.1  skrll #define RST_BUS_DMIC		38
     51  1.1  skrll #define RST_BUS_AUDIO		39
     52  1.1  skrll #define RST_USB_PHY0		40
     53  1.1  skrll #define RST_USB_PHY1		41
     54  1.1  skrll #define RST_BUS_OHCI0		42
     55  1.1  skrll #define RST_BUS_OHCI1		43
     56  1.1  skrll #define RST_BUS_EHCI0		44
     57  1.1  skrll #define RST_BUS_EHCI1		45
     58  1.1  skrll #define RST_BUS_OTG		46
     59  1.1  skrll #define RST_BUS_LRADC		47
     60  1.1  skrll #define RST_BUS_DPSS_TOP	48
     61  1.1  skrll #define RST_BUS_HDMI_SUB	49
     62  1.1  skrll #define RST_BUS_HDMI_MAIN	50
     63  1.1  skrll #define RST_BUS_MIPI_DSI	51
     64  1.1  skrll #define RST_BUS_TCON_LCD0	52
     65  1.1  skrll #define RST_BUS_TCON_TV		53
     66  1.1  skrll #define RST_BUS_LVDS0		54
     67  1.1  skrll #define RST_BUS_TVE		55
     68  1.1  skrll #define RST_BUS_TVE_TOP		56
     69  1.1  skrll #define RST_BUS_TVD		57
     70  1.1  skrll #define RST_BUS_TVD_TOP		58
     71  1.1  skrll #define RST_BUS_LEDC		59
     72  1.1  skrll #define RST_BUS_CSI		60
     73  1.1  skrll #define RST_BUS_TPADC		61
     74  1.1  skrll #define RST_DSP			62
     75  1.1  skrll #define RST_BUS_DSP_CFG		63
     76  1.1  skrll #define RST_BUS_DSP_DBG		64
     77  1.1  skrll #define RST_BUS_RISCV_CFG	65
     78  1.1  skrll #define RST_BUS_CAN0		66
     79  1.1  skrll #define RST_BUS_CAN1		67
     80  1.1  skrll 
     81  1.1  skrll #endif /* _DT_BINDINGS_RST_SUN20I_D1_CCU_H_ */
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