11.1Sskrll/* $NetBSD: sunplus,sp7021-reset.h,v 1.1.1.1 2026/01/18 05:21:56 skrll Exp $ */ 21.1Sskrll 31.1Sskrll/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 41.1Sskrll/* 51.1Sskrll * Copyright (C) Sunplus Technology Co., Ltd. 61.1Sskrll * All rights reserved. 71.1Sskrll */ 81.1Sskrll#ifndef _DT_BINDINGS_RST_SUNPLUS_SP7021_H 91.1Sskrll#define _DT_BINDINGS_RST_SUNPLUS_SP7021_H 101.1Sskrll 111.1Sskrll#define RST_SYSTEM 0 121.1Sskrll#define RST_RTC 1 131.1Sskrll#define RST_IOCTL 2 141.1Sskrll#define RST_IOP 3 151.1Sskrll#define RST_OTPRX 4 161.1Sskrll#define RST_NOC 5 171.1Sskrll#define RST_BR 6 181.1Sskrll#define RST_RBUS_L00 7 191.1Sskrll#define RST_SPIFL 8 201.1Sskrll#define RST_SDCTRL0 9 211.1Sskrll#define RST_PERI0 10 221.1Sskrll#define RST_A926 11 231.1Sskrll#define RST_UMCTL2 12 241.1Sskrll#define RST_PERI1 13 251.1Sskrll#define RST_DDR_PHY0 14 261.1Sskrll#define RST_ACHIP 15 271.1Sskrll#define RST_STC0 16 281.1Sskrll#define RST_STC_AV0 17 291.1Sskrll#define RST_STC_AV1 18 301.1Sskrll#define RST_STC_AV2 19 311.1Sskrll#define RST_UA0 20 321.1Sskrll#define RST_UA1 21 331.1Sskrll#define RST_UA2 22 341.1Sskrll#define RST_UA3 23 351.1Sskrll#define RST_UA4 24 361.1Sskrll#define RST_HWUA 25 371.1Sskrll#define RST_DDC0 26 381.1Sskrll#define RST_UADMA 27 391.1Sskrll#define RST_CBDMA0 28 401.1Sskrll#define RST_CBDMA1 29 411.1Sskrll#define RST_SPI_COMBO_0 30 421.1Sskrll#define RST_SPI_COMBO_1 31 431.1Sskrll#define RST_SPI_COMBO_2 32 441.1Sskrll#define RST_SPI_COMBO_3 33 451.1Sskrll#define RST_AUD 34 461.1Sskrll#define RST_USBC0 35 471.1Sskrll#define RST_USBC1 36 481.1Sskrll#define RST_UPHY0 37 491.1Sskrll#define RST_UPHY1 38 501.1Sskrll#define RST_I2CM0 39 511.1Sskrll#define RST_I2CM1 40 521.1Sskrll#define RST_I2CM2 41 531.1Sskrll#define RST_I2CM3 42 541.1Sskrll#define RST_PMC 43 551.1Sskrll#define RST_CARD_CTL0 44 561.1Sskrll#define RST_CARD_CTL1 45 571.1Sskrll#define RST_CARD_CTL4 46 581.1Sskrll#define RST_BCH 47 591.1Sskrll#define RST_DDFCH 48 601.1Sskrll#define RST_CSIIW0 49 611.1Sskrll#define RST_CSIIW1 50 621.1Sskrll#define RST_MIPICSI0 51 631.1Sskrll#define RST_MIPICSI1 52 641.1Sskrll#define RST_HDMI_TX 53 651.1Sskrll#define RST_VPOST 54 661.1Sskrll#define RST_TGEN 55 671.1Sskrll#define RST_DMIX 56 681.1Sskrll#define RST_TCON 57 691.1Sskrll#define RST_INTERRUPT 58 701.1Sskrll#define RST_RGST 59 711.1Sskrll#define RST_GPIO 60 721.1Sskrll#define RST_RBUS_TOP 61 731.1Sskrll#define RST_MAILBOX 62 741.1Sskrll#define RST_SPIND 63 751.1Sskrll#define RST_I2C2CBUS 64 761.1Sskrll#define RST_SEC 65 771.1Sskrll#define RST_DVE 66 781.1Sskrll#define RST_GPOST0 67 791.1Sskrll#define RST_OSD0 68 801.1Sskrll#define RST_DISP_PWM 69 811.1Sskrll#define RST_UADBG 70 821.1Sskrll#define RST_DUMMY_MASTER 71 831.1Sskrll#define RST_FIO_CTL 72 841.1Sskrll#define RST_FPGA 73 851.1Sskrll#define RST_L2SW 74 861.1Sskrll#define RST_ICM 75 871.1Sskrll#define RST_AXI_GLOBAL 76 881.1Sskrll 891.1Sskrll#endif 90