cs35l45.h revision 1.1.1.1 
1/*	$NetBSD: cs35l45.h,v 1.1.1.1 2026/01/18 05:21:56 skrll Exp $	*/
2
3/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
4/*
5 * cs35l45.h -- CS35L45 ALSA SoC audio driver DT bindings header
6 *
7 * Copyright 2022 Cirrus Logic, Inc.
8 */
9
10#ifndef DT_CS35L45_H
11#define DT_CS35L45_H
12
13/*
14 * cirrus,asp-sdout-hiz-ctrl
15 *
16 * TX_HIZ_UNUSED:   TX pin high-impedance during unused slots.
17 * TX_HIZ_DISABLED: TX pin high-impedance when all channels disabled.
18 */
19#define CS35L45_ASP_TX_HIZ_UNUSED	0x1
20#define CS35L45_ASP_TX_HIZ_DISABLED	0x2
21
22/*
23 * Optional GPIOX Sub-nodes:
24 *  The cs35l45 node can have up to three "cirrus,gpio-ctrlX" ('X' = [1,2,3])
25 *  sub-nodes for configuring the GPIO pins.
26 *
27 * - gpio-dir : GPIO pin direction. Valid only when 'gpio-ctrl'
28 *   is 1.
29 *    0 = Output
30 *    1 = Input (Default)
31 *
32 * - gpio-lvl : GPIO level. Valid only when 'gpio-ctrl' is 1 and 'gpio-dir' is 0.
33 *
34 *    0 = Low (Default)
35 *    1 = High
36 *
37 * - gpio-op-cfg : GPIO output configuration. Valid only when 'gpio-ctrl' is 1
38 *   and 'gpio-dir' is 0.
39 *
40 *    0 = CMOS (Default)
41 *    1 = Open Drain
42 *
43 * - gpio-pol : GPIO output polarity select. Valid only when 'gpio-ctrl' is 1
44 *   and 'gpio-dir' is 0.
45 *
46 *    0 = Non-inverted, Active High (Default)
47 *    1 = Inverted, Active Low
48 *
49 * - gpio-invert : Defines the polarity of the GPIO pin if configured
50 *   as input.
51 *
52 *    0 = Not inverted (Default)
53 *    1 = Inverted
54 *
55 * - gpio-ctrl : Defines the function of the GPIO pin.
56 *
57 * GPIO1:
58 *   0 = High impedance input (Default)
59 *   1 = Pin acts as a GPIO, direction controlled by 'gpio-dir'
60 *   2 = Pin acts as MDSYNC, direction controlled by MDSYNC
61 *   3-7 = Reserved
62 *
63 * GPIO2:
64 *   0 = High impedance input (Default)
65 *   1 = Pin acts as a GPIO, direction controlled by 'gpio-dir'
66 *   2 = Pin acts as open drain INT
67 *   3 = Reserved
68 *   4 = Pin acts as push-pull output INT. Active low.
69 *   5 = Pin acts as push-pull output INT. Active high.
70 *   6,7 = Reserved
71 *
72 * GPIO3:
73 *   0 = High impedance input (Default)
74 *   1 = Pin acts as a GPIO, direction controlled by 'gpio-dir'
75 *   2-7 = Reserved
76 */
77#define CS35L45_NUM_GPIOS	0x3
78
79#endif /* DT_CS35L45_H */
80