11.1Sskrll/* $NetBSD: tlv320adc3xxx.h,v 1.1.1.1 2026/01/18 05:21:57 skrll Exp $ */ 21.1Sskrll 31.1Sskrll/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 41.1Sskrll/* 51.1Sskrll * Devicetree bindings definitions for tlv320adc3xxx driver. 61.1Sskrll * 71.1Sskrll * Copyright (C) 2021 Axis Communications AB 81.1Sskrll */ 91.1Sskrll#ifndef __DT_TLV320ADC3XXX_H 101.1Sskrll#define __DT_TLV320ADC3XXX_H 111.1Sskrll 121.1Sskrll#define ADC3XXX_GPIO_DISABLED 0 /* I/O buffers powered down */ 131.1Sskrll#define ADC3XXX_GPIO_INPUT 1 /* Various non-GPIO inputs */ 141.1Sskrll#define ADC3XXX_GPIO_GPI 2 /* General purpose input */ 151.1Sskrll#define ADC3XXX_GPIO_GPO 3 /* General purpose output */ 161.1Sskrll#define ADC3XXX_GPIO_CLKOUT 4 /* Source set in reg. CLKOUT_MUX */ 171.1Sskrll#define ADC3XXX_GPIO_INT1 5 /* INT1 output */ 181.1Sskrll#define ADC3XXX_GPIO_INT2 6 /* INT2 output */ 191.1Sskrll/* value 7 is reserved */ 201.1Sskrll#define ADC3XXX_GPIO_SECONDARY_BCLK 8 /* Codec interface secondary BCLK */ 211.1Sskrll#define ADC3XXX_GPIO_SECONDARY_WCLK 9 /* Codec interface secondary WCLK */ 221.1Sskrll#define ADC3XXX_GPIO_ADC_MOD_CLK 10 /* Clock output for digital mics */ 231.1Sskrll/* values 11-15 reserved */ 241.1Sskrll 251.1Sskrll#define ADC3XXX_MICBIAS_OFF 0 /* Micbias pin powered off */ 261.1Sskrll#define ADC3XXX_MICBIAS_2_0V 1 /* Micbias pin set to 2.0V */ 271.1Sskrll#define ADC3XXX_MICBIAS_2_5V 2 /* Micbias pin set to 2.5V */ 281.1Sskrll#define ADC3XXX_MICBIAS_AVDD 3 /* Use AVDD voltage for micbias pin */ 291.1Sskrll 301.1Sskrll#endif /* __DT_TLV320ADC3XXX_H */ 31