1 1.1 alc /* 2 1.1 alc * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 1.1 alc * Copyright (c) 2002-2006 Atheros Communications, Inc. 4 1.1 alc * 5 1.1 alc * Permission to use, copy, modify, and/or distribute this software for any 6 1.1 alc * purpose with or without fee is hereby granted, provided that the above 7 1.1 alc * copyright notice and this permission notice appear in all copies. 8 1.1 alc * 9 1.1 alc * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 1.1 alc * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 1.1 alc * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 1.1 alc * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 1.1 alc * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 1.1 alc * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 1.1 alc * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 1.1 alc * 17 1.3 cegger * $Id: ar5211_attach.c,v 1.3 2011/03/07 11:25:42 cegger Exp $ 18 1.1 alc */ 19 1.1 alc #include "opt_ah.h" 20 1.1 alc 21 1.1 alc #include "ah.h" 22 1.1 alc #include "ah_internal.h" 23 1.1 alc #include "ah_devid.h" 24 1.1 alc 25 1.1 alc #include "ar5211/ar5211.h" 26 1.1 alc #include "ar5211/ar5211reg.h" 27 1.1 alc #include "ar5211/ar5211phy.h" 28 1.1 alc 29 1.1 alc #include "ah_eeprom_v3.h" 30 1.1 alc 31 1.1 alc static HAL_BOOL ar5211GetChannelEdges(struct ath_hal *ah, 32 1.1 alc uint16_t flags, uint16_t *low, uint16_t *high); 33 1.1 alc static HAL_BOOL ar5211GetChipPowerLimits(struct ath_hal *ah, 34 1.1 alc HAL_CHANNEL *chans, uint32_t nchans); 35 1.1 alc 36 1.2 jmcneill static void ar5211ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore); 37 1.2 jmcneill static void ar5211DisablePCIE(struct ath_hal *ah); 38 1.2 jmcneill 39 1.1 alc static const struct ath_hal_private ar5211hal = {{ 40 1.1 alc .ah_magic = AR5211_MAGIC, 41 1.1 alc .ah_abi = HAL_ABI_VERSION, 42 1.1 alc .ah_countryCode = CTRY_DEFAULT, 43 1.1 alc 44 1.1 alc .ah_getRateTable = ar5211GetRateTable, 45 1.1 alc .ah_detach = ar5211Detach, 46 1.1 alc 47 1.1 alc /* Reset Functions */ 48 1.1 alc .ah_reset = ar5211Reset, 49 1.1 alc .ah_phyDisable = ar5211PhyDisable, 50 1.1 alc .ah_disable = ar5211Disable, 51 1.2 jmcneill .ah_configPCIE = ar5211ConfigPCIE, 52 1.2 jmcneill .ah_disablePCIE = ar5211DisablePCIE, 53 1.1 alc .ah_setPCUConfig = ar5211SetPCUConfig, 54 1.1 alc .ah_perCalibration = ar5211PerCalibration, 55 1.1 alc .ah_perCalibrationN = ar5211PerCalibrationN, 56 1.1 alc .ah_resetCalValid = ar5211ResetCalValid, 57 1.1 alc .ah_setTxPowerLimit = ar5211SetTxPowerLimit, 58 1.1 alc .ah_getChanNoise = ath_hal_getChanNoise, 59 1.1 alc 60 1.1 alc /* Transmit functions */ 61 1.1 alc .ah_updateTxTrigLevel = ar5211UpdateTxTrigLevel, 62 1.1 alc .ah_setupTxQueue = ar5211SetupTxQueue, 63 1.1 alc .ah_setTxQueueProps = ar5211SetTxQueueProps, 64 1.1 alc .ah_getTxQueueProps = ar5211GetTxQueueProps, 65 1.1 alc .ah_releaseTxQueue = ar5211ReleaseTxQueue, 66 1.1 alc .ah_resetTxQueue = ar5211ResetTxQueue, 67 1.1 alc .ah_getTxDP = ar5211GetTxDP, 68 1.1 alc .ah_setTxDP = ar5211SetTxDP, 69 1.1 alc .ah_numTxPending = ar5211NumTxPending, 70 1.1 alc .ah_startTxDma = ar5211StartTxDma, 71 1.1 alc .ah_stopTxDma = ar5211StopTxDma, 72 1.1 alc .ah_setupTxDesc = ar5211SetupTxDesc, 73 1.1 alc .ah_setupXTxDesc = ar5211SetupXTxDesc, 74 1.1 alc .ah_fillTxDesc = ar5211FillTxDesc, 75 1.1 alc .ah_procTxDesc = ar5211ProcTxDesc, 76 1.1 alc .ah_getTxIntrQueue = ar5211GetTxIntrQueue, 77 1.1 alc .ah_reqTxIntrDesc = ar5211IntrReqTxDesc, 78 1.1 alc 79 1.1 alc /* RX Functions */ 80 1.1 alc .ah_getRxDP = ar5211GetRxDP, 81 1.1 alc .ah_setRxDP = ar5211SetRxDP, 82 1.1 alc .ah_enableReceive = ar5211EnableReceive, 83 1.1 alc .ah_stopDmaReceive = ar5211StopDmaReceive, 84 1.1 alc .ah_startPcuReceive = ar5211StartPcuReceive, 85 1.1 alc .ah_stopPcuReceive = ar5211StopPcuReceive, 86 1.1 alc .ah_setMulticastFilter = ar5211SetMulticastFilter, 87 1.1 alc .ah_setMulticastFilterIndex = ar5211SetMulticastFilterIndex, 88 1.1 alc .ah_clrMulticastFilterIndex = ar5211ClrMulticastFilterIndex, 89 1.1 alc .ah_getRxFilter = ar5211GetRxFilter, 90 1.1 alc .ah_setRxFilter = ar5211SetRxFilter, 91 1.1 alc .ah_setupRxDesc = ar5211SetupRxDesc, 92 1.1 alc .ah_procRxDesc = ar5211ProcRxDesc, 93 1.1 alc .ah_rxMonitor = ar5211AniPoll, 94 1.1 alc .ah_procMibEvent = ar5211MibEvent, 95 1.1 alc 96 1.1 alc /* Misc Functions */ 97 1.1 alc .ah_getCapability = ar5211GetCapability, 98 1.1 alc .ah_setCapability = ar5211SetCapability, 99 1.1 alc .ah_getDiagState = ar5211GetDiagState, 100 1.1 alc .ah_getMacAddress = ar5211GetMacAddress, 101 1.1 alc .ah_setMacAddress = ar5211SetMacAddress, 102 1.1 alc .ah_getBssIdMask = ar5211GetBssIdMask, 103 1.1 alc .ah_setBssIdMask = ar5211SetBssIdMask, 104 1.1 alc .ah_setRegulatoryDomain = ar5211SetRegulatoryDomain, 105 1.1 alc .ah_setLedState = ar5211SetLedState, 106 1.1 alc .ah_writeAssocid = ar5211WriteAssocid, 107 1.1 alc .ah_gpioCfgInput = ar5211GpioCfgInput, 108 1.1 alc .ah_gpioCfgOutput = ar5211GpioCfgOutput, 109 1.1 alc .ah_gpioGet = ar5211GpioGet, 110 1.1 alc .ah_gpioSet = ar5211GpioSet, 111 1.1 alc .ah_gpioSetIntr = ar5211GpioSetIntr, 112 1.1 alc .ah_getTsf32 = ar5211GetTsf32, 113 1.1 alc .ah_getTsf64 = ar5211GetTsf64, 114 1.1 alc .ah_resetTsf = ar5211ResetTsf, 115 1.1 alc .ah_detectCardPresent = ar5211DetectCardPresent, 116 1.1 alc .ah_updateMibCounters = ar5211UpdateMibCounters, 117 1.1 alc .ah_getRfGain = ar5211GetRfgain, 118 1.1 alc .ah_getDefAntenna = ar5211GetDefAntenna, 119 1.1 alc .ah_setDefAntenna = ar5211SetDefAntenna, 120 1.1 alc .ah_getAntennaSwitch = ar5211GetAntennaSwitch, 121 1.1 alc .ah_setAntennaSwitch = ar5211SetAntennaSwitch, 122 1.1 alc .ah_setSifsTime = ar5211SetSifsTime, 123 1.1 alc .ah_getSifsTime = ar5211GetSifsTime, 124 1.1 alc .ah_setSlotTime = ar5211SetSlotTime, 125 1.1 alc .ah_getSlotTime = ar5211GetSlotTime, 126 1.1 alc .ah_setAckTimeout = ar5211SetAckTimeout, 127 1.1 alc .ah_getAckTimeout = ar5211GetAckTimeout, 128 1.1 alc .ah_setAckCTSRate = ar5211SetAckCTSRate, 129 1.1 alc .ah_getAckCTSRate = ar5211GetAckCTSRate, 130 1.1 alc .ah_setCTSTimeout = ar5211SetCTSTimeout, 131 1.1 alc .ah_getCTSTimeout = ar5211GetCTSTimeout, 132 1.1 alc .ah_setDecompMask = ar5211SetDecompMask, 133 1.1 alc .ah_setCoverageClass = ar5211SetCoverageClass, 134 1.1 alc 135 1.1 alc /* Key Cache Functions */ 136 1.1 alc .ah_getKeyCacheSize = ar5211GetKeyCacheSize, 137 1.1 alc .ah_resetKeyCacheEntry = ar5211ResetKeyCacheEntry, 138 1.1 alc .ah_isKeyCacheEntryValid = ar5211IsKeyCacheEntryValid, 139 1.1 alc .ah_setKeyCacheEntry = ar5211SetKeyCacheEntry, 140 1.1 alc .ah_setKeyCacheEntryMac = ar5211SetKeyCacheEntryMac, 141 1.1 alc 142 1.1 alc /* Power Management Functions */ 143 1.1 alc .ah_setPowerMode = ar5211SetPowerMode, 144 1.1 alc .ah_getPowerMode = ar5211GetPowerMode, 145 1.1 alc 146 1.1 alc /* Beacon Functions */ 147 1.1 alc .ah_setBeaconTimers = ar5211SetBeaconTimers, 148 1.1 alc .ah_beaconInit = ar5211BeaconInit, 149 1.1 alc .ah_setStationBeaconTimers = ar5211SetStaBeaconTimers, 150 1.1 alc .ah_resetStationBeaconTimers = ar5211ResetStaBeaconTimers, 151 1.1 alc 152 1.1 alc /* Interrupt Functions */ 153 1.1 alc .ah_isInterruptPending = ar5211IsInterruptPending, 154 1.1 alc .ah_getPendingInterrupts = ar5211GetPendingInterrupts, 155 1.1 alc .ah_getInterrupts = ar5211GetInterrupts, 156 1.1 alc .ah_setInterrupts = ar5211SetInterrupts }, 157 1.1 alc 158 1.1 alc .ah_getChannelEdges = ar5211GetChannelEdges, 159 1.1 alc .ah_getWirelessModes = ar5211GetWirelessModes, 160 1.1 alc .ah_eepromRead = ar5211EepromRead, 161 1.1 alc #ifdef AH_SUPPORT_WRITE_EEPROM 162 1.1 alc .ah_eepromWrite = ar5211EepromWrite, 163 1.1 alc #endif 164 1.1 alc .ah_gpioCfgInput = ar5211GpioCfgInput, 165 1.1 alc .ah_gpioCfgOutput = ar5211GpioCfgOutput, 166 1.1 alc .ah_gpioGet = ar5211GpioGet, 167 1.1 alc .ah_gpioSet = ar5211GpioSet, 168 1.1 alc .ah_gpioSetIntr = ar5211GpioSetIntr, 169 1.1 alc .ah_getChipPowerLimits = ar5211GetChipPowerLimits, 170 1.1 alc }; 171 1.1 alc 172 1.1 alc static HAL_BOOL ar5211ChipTest(struct ath_hal *); 173 1.1 alc static HAL_BOOL ar5211FillCapabilityInfo(struct ath_hal *ah); 174 1.1 alc 175 1.1 alc /* 176 1.1 alc * Return the revsion id for the radio chip. This 177 1.1 alc * fetched via the PHY. 178 1.1 alc */ 179 1.1 alc static uint32_t 180 1.1 alc ar5211GetRadioRev(struct ath_hal *ah) 181 1.1 alc { 182 1.1 alc uint32_t val; 183 1.1 alc int i; 184 1.1 alc 185 1.1 alc OS_REG_WRITE(ah, (AR_PHY_BASE + (0x34 << 2)), 0x00001c16); 186 1.1 alc for (i = 0; i < 8; i++) 187 1.1 alc OS_REG_WRITE(ah, (AR_PHY_BASE + (0x20 << 2)), 0x00010000); 188 1.1 alc val = (OS_REG_READ(ah, AR_PHY_BASE + (256 << 2)) >> 24) & 0xff; 189 1.1 alc val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4); 190 1.1 alc return ath_hal_reverseBits(val, 8); 191 1.1 alc } 192 1.1 alc 193 1.1 alc /* 194 1.1 alc * Attach for an AR5211 part. 195 1.1 alc */ 196 1.1 alc struct ath_hal * 197 1.1 alc ar5211Attach(uint16_t devid, HAL_SOFTC sc, 198 1.1 alc HAL_BUS_TAG st, HAL_BUS_HANDLE sh, HAL_STATUS *status) 199 1.1 alc { 200 1.1 alc #define N(a) (sizeof(a)/sizeof(a[0])) 201 1.1 alc struct ath_hal_5211 *ahp; 202 1.1 alc struct ath_hal *ah; 203 1.1 alc uint32_t val; 204 1.1 alc uint16_t eeval; 205 1.1 alc HAL_STATUS ecode; 206 1.1 alc 207 1.1 alc HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n", 208 1.1 alc __func__, sc, (void*) st, (void*) sh); 209 1.1 alc 210 1.1 alc /* NB: memory is returned zero'd */ 211 1.1 alc ahp = ath_hal_malloc(sizeof (struct ath_hal_5211)); 212 1.1 alc if (ahp == AH_NULL) { 213 1.1 alc HALDEBUG(AH_NULL, HAL_DEBUG_ANY, 214 1.1 alc "%s: cannot allocate memory for state block\n", __func__); 215 1.1 alc ecode = HAL_ENOMEM; 216 1.1 alc goto bad; 217 1.1 alc } 218 1.1 alc ah = &ahp->ah_priv.h; 219 1.1 alc /* set initial values */ 220 1.1 alc OS_MEMCPY(&ahp->ah_priv, &ar5211hal, sizeof(struct ath_hal_private)); 221 1.1 alc ah->ah_sc = sc; 222 1.1 alc ah->ah_st = st; 223 1.1 alc ah->ah_sh = sh; 224 1.1 alc 225 1.1 alc ah->ah_devid = devid; /* NB: for AH_DEBUG_ALQ */ 226 1.1 alc AH_PRIVATE(ah)->ah_devid = devid; 227 1.1 alc AH_PRIVATE(ah)->ah_subvendorid = 0; /* XXX */ 228 1.1 alc 229 1.1 alc AH_PRIVATE(ah)->ah_powerLimit = MAX_RATE_POWER; 230 1.1 alc AH_PRIVATE(ah)->ah_tpScale = HAL_TP_SCALE_MAX; /* no scaling */ 231 1.1 alc 232 1.1 alc ahp->ah_diversityControl = HAL_ANT_VARIABLE; 233 1.1 alc ahp->ah_staId1Defaults = 0; 234 1.1 alc ahp->ah_rssiThr = INIT_RSSI_THR; 235 1.1 alc ahp->ah_sifstime = (u_int) -1; 236 1.1 alc ahp->ah_slottime = (u_int) -1; 237 1.1 alc ahp->ah_acktimeout = (u_int) -1; 238 1.1 alc ahp->ah_ctstimeout = (u_int) -1; 239 1.1 alc 240 1.1 alc if (!ar5211ChipReset(ah, AH_FALSE)) { /* reset chip */ 241 1.1 alc HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__); 242 1.1 alc ecode = HAL_EIO; 243 1.1 alc goto bad; 244 1.1 alc } 245 1.1 alc if (AH_PRIVATE(ah)->ah_devid == AR5211_FPGA11B) { 246 1.1 alc /* set it back to OFDM mode to be able to read analog rev id */ 247 1.1 alc OS_REG_WRITE(ah, AR5211_PHY_MODE, AR5211_PHY_MODE_OFDM); 248 1.1 alc OS_REG_WRITE(ah, AR_PHY_PLL_CTL, AR_PHY_PLL_CTL_44); 249 1.1 alc OS_DELAY(1000); 250 1.1 alc } 251 1.1 alc 252 1.1 alc /* Read Revisions from Chips */ 253 1.1 alc val = OS_REG_READ(ah, AR_SREV) & AR_SREV_ID_M; 254 1.1 alc AH_PRIVATE(ah)->ah_macVersion = val >> AR_SREV_ID_S; 255 1.1 alc AH_PRIVATE(ah)->ah_macRev = val & AR_SREV_REVISION_M; 256 1.1 alc 257 1.1 alc if (AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_MAUI_2 || 258 1.1 alc AH_PRIVATE(ah)->ah_macVersion > AR_SREV_VERSION_OAHU) { 259 1.1 alc HALDEBUG(ah, HAL_DEBUG_ANY, 260 1.1 alc "%s: Mac Chip Rev 0x%x is not supported by this driver\n", 261 1.1 alc __func__, AH_PRIVATE(ah)->ah_macVersion); 262 1.1 alc ecode = HAL_ENOTSUPP; 263 1.1 alc goto bad; 264 1.1 alc } 265 1.1 alc 266 1.1 alc AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID); 267 1.1 alc 268 1.1 alc if (!ar5211ChipTest(ah)) { 269 1.1 alc HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n", 270 1.1 alc __func__); 271 1.1 alc ecode = HAL_ESELFTEST; 272 1.1 alc goto bad; 273 1.1 alc } 274 1.1 alc 275 1.1 alc /* Set correct Baseband to analog shift setting to access analog chips. */ 276 1.1 alc if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_OAHU) { 277 1.1 alc OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000007); 278 1.1 alc } else { 279 1.1 alc OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000047); 280 1.1 alc } 281 1.1 alc OS_DELAY(2000); 282 1.1 alc 283 1.1 alc /* Read Radio Chip Rev Extract */ 284 1.1 alc AH_PRIVATE(ah)->ah_analog5GhzRev = ar5211GetRadioRev(ah); 285 1.1 alc if ((AH_PRIVATE(ah)->ah_analog5GhzRev & 0xf0) != RAD5_SREV_MAJOR) { 286 1.1 alc HALDEBUG(ah, HAL_DEBUG_ANY, 287 1.1 alc "%s: 5G Radio Chip Rev 0x%02X is not supported by this " 288 1.1 alc "driver\n", __func__, AH_PRIVATE(ah)->ah_analog5GhzRev); 289 1.1 alc ecode = HAL_ENOTSUPP; 290 1.1 alc goto bad; 291 1.1 alc } 292 1.1 alc 293 1.1 alc val = (OS_REG_READ(ah, AR_PCICFG) & AR_PCICFG_EEPROM_SIZE_M) >> 294 1.1 alc AR_PCICFG_EEPROM_SIZE_S; 295 1.1 alc if (val != AR_PCICFG_EEPROM_SIZE_16K) { 296 1.1 alc HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unsupported EEPROM size " 297 1.1 alc "%u (0x%x) found\n", __func__, val, val); 298 1.1 alc ecode = HAL_EESIZE; 299 1.1 alc goto bad; 300 1.1 alc } 301 1.1 alc ecode = ath_hal_legacyEepromAttach(ah); 302 1.1 alc if (ecode != HAL_OK) { 303 1.1 alc goto bad; 304 1.1 alc } 305 1.1 alc 306 1.1 alc /* If Bmode and AR5211, verify 2.4 analog exists */ 307 1.1 alc if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_OAHU && 308 1.1 alc ath_hal_eepromGetFlag(ah, AR_EEP_BMODE)) { 309 1.1 alc /* Set correct Baseband to analog shift setting to access analog chips. */ 310 1.1 alc OS_REG_WRITE(ah, AR_PHY_BASE, 0x00004007); 311 1.1 alc OS_DELAY(2000); 312 1.1 alc AH_PRIVATE(ah)->ah_analog2GhzRev = ar5211GetRadioRev(ah); 313 1.1 alc 314 1.1 alc /* Set baseband for 5GHz chip */ 315 1.1 alc OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000007); 316 1.1 alc OS_DELAY(2000); 317 1.1 alc if ((AH_PRIVATE(ah)->ah_analog2GhzRev & 0xF0) != RAD2_SREV_MAJOR) { 318 1.1 alc HALDEBUG(ah, HAL_DEBUG_ANY, 319 1.1 alc "%s: 2G Radio Chip Rev 0x%x is not supported by " 320 1.1 alc "this driver\n", __func__, 321 1.1 alc AH_PRIVATE(ah)->ah_analog2GhzRev); 322 1.1 alc ecode = HAL_ENOTSUPP; 323 1.1 alc goto bad; 324 1.1 alc } 325 1.1 alc } else { 326 1.1 alc ath_hal_eepromSet(ah, AR_EEP_BMODE, AH_FALSE); 327 1.1 alc } 328 1.1 alc 329 1.1 alc ecode = ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, &eeval); 330 1.1 alc if (ecode != HAL_OK) { 331 1.1 alc HALDEBUG(ah, HAL_DEBUG_ANY, 332 1.1 alc "%s: cannot read regulatory domain from EEPROM\n", 333 1.1 alc __func__); 334 1.1 alc goto bad; 335 1.1 alc } 336 1.1 alc AH_PRIVATE(ah)->ah_currentRD = eeval; 337 1.1 alc AH_PRIVATE(ah)->ah_getNfAdjust = ar5211GetNfAdjust; 338 1.1 alc 339 1.1 alc /* 340 1.1 alc * Got everything we need now to setup the capabilities. 341 1.1 alc */ 342 1.1 alc (void) ar5211FillCapabilityInfo(ah); 343 1.1 alc 344 1.1 alc /* Initialize gain ladder thermal calibration structure */ 345 1.1 alc ar5211InitializeGainValues(ah); 346 1.1 alc 347 1.1 alc ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr); 348 1.1 alc if (ecode != HAL_OK) { 349 1.1 alc HALDEBUG(ah, HAL_DEBUG_ANY, 350 1.1 alc "%s: error getting mac address from EEPROM\n", __func__); 351 1.1 alc goto bad; 352 1.1 alc } 353 1.1 alc 354 1.1 alc HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__); 355 1.1 alc 356 1.1 alc return ah; 357 1.1 alc bad: 358 1.1 alc if (ahp) 359 1.1 alc ar5211Detach((struct ath_hal *) ahp); 360 1.1 alc if (status) 361 1.1 alc *status = ecode; 362 1.1 alc return AH_NULL; 363 1.1 alc #undef N 364 1.1 alc } 365 1.1 alc 366 1.1 alc void 367 1.1 alc ar5211Detach(struct ath_hal *ah) 368 1.1 alc { 369 1.1 alc HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s:\n", __func__); 370 1.1 alc 371 1.1 alc HALASSERT(ah != AH_NULL); 372 1.1 alc HALASSERT(ah->ah_magic == AR5211_MAGIC); 373 1.1 alc 374 1.1 alc ath_hal_eepromDetach(ah); 375 1.1 alc ath_hal_free(ah); 376 1.1 alc } 377 1.1 alc 378 1.1 alc static HAL_BOOL 379 1.1 alc ar5211ChipTest(struct ath_hal *ah) 380 1.1 alc { 381 1.1 alc uint32_t regAddr[2] = { AR_STA_ID0, AR_PHY_BASE+(8 << 2) }; 382 1.1 alc uint32_t regHold[2]; 383 1.1 alc uint32_t patternData[4] = 384 1.1 alc { 0x55555555, 0xaaaaaaaa, 0x66666666, 0x99999999 }; 385 1.1 alc int i, j; 386 1.1 alc 387 1.1 alc /* Test PHY & MAC registers */ 388 1.1 alc for (i = 0; i < 2; i++) { 389 1.1 alc uint32_t addr = regAddr[i]; 390 1.1 alc uint32_t wrData, rdData; 391 1.1 alc 392 1.1 alc regHold[i] = OS_REG_READ(ah, addr); 393 1.1 alc for (j = 0; j < 0x100; j++) { 394 1.1 alc wrData = (j << 16) | j; 395 1.1 alc OS_REG_WRITE(ah, addr, wrData); 396 1.1 alc rdData = OS_REG_READ(ah, addr); 397 1.1 alc if (rdData != wrData) { 398 1.1 alc HALDEBUG(ah, HAL_DEBUG_ANY, 399 1.1 alc "%s: address test failed addr: 0x%08x - wr:0x%08x != rd:0x%08x\n", 400 1.1 alc __func__, addr, wrData, rdData); 401 1.1 alc return AH_FALSE; 402 1.1 alc } 403 1.1 alc } 404 1.1 alc for (j = 0; j < 4; j++) { 405 1.1 alc wrData = patternData[j]; 406 1.1 alc OS_REG_WRITE(ah, addr, wrData); 407 1.1 alc rdData = OS_REG_READ(ah, addr); 408 1.1 alc if (wrData != rdData) { 409 1.1 alc HALDEBUG(ah, HAL_DEBUG_ANY, 410 1.1 alc "%s: address test failed addr: 0x%08x - wr:0x%08x != rd:0x%08x\n", 411 1.1 alc __func__, addr, wrData, rdData); 412 1.1 alc return AH_FALSE; 413 1.1 alc } 414 1.1 alc } 415 1.1 alc OS_REG_WRITE(ah, regAddr[i], regHold[i]); 416 1.1 alc } 417 1.1 alc OS_DELAY(100); 418 1.1 alc return AH_TRUE; 419 1.1 alc } 420 1.1 alc 421 1.1 alc /* 422 1.1 alc * Store the channel edges for the requested operational mode 423 1.1 alc */ 424 1.1 alc static HAL_BOOL 425 1.1 alc ar5211GetChannelEdges(struct ath_hal *ah, 426 1.1 alc uint16_t flags, uint16_t *low, uint16_t *high) 427 1.1 alc { 428 1.1 alc if (flags & CHANNEL_5GHZ) { 429 1.1 alc *low = 4920; 430 1.1 alc *high = 6100; 431 1.1 alc return AH_TRUE; 432 1.1 alc } 433 1.1 alc if (flags & CHANNEL_2GHZ && ath_hal_eepromGetFlag(ah, AR_EEP_BMODE)) { 434 1.1 alc *low = 2312; 435 1.1 alc *high = 2732; 436 1.1 alc return AH_TRUE; 437 1.1 alc } 438 1.1 alc return AH_FALSE; 439 1.1 alc } 440 1.1 alc 441 1.1 alc static HAL_BOOL 442 1.1 alc ar5211GetChipPowerLimits(struct ath_hal *ah, HAL_CHANNEL *chans, uint32_t nchans) 443 1.1 alc { 444 1.1 alc HAL_CHANNEL *chan; 445 1.1 alc int i; 446 1.1 alc 447 1.1 alc /* XXX fill in, this is just a placeholder */ 448 1.1 alc for (i = 0; i < nchans; i++) { 449 1.1 alc chan = &chans[i]; 450 1.1 alc HALDEBUG(ah, HAL_DEBUG_ATTACH, 451 1.1 alc "%s: no min/max power for %u/0x%x\n", 452 1.1 alc __func__, chan->channel, chan->channelFlags); 453 1.1 alc chan->maxTxPower = MAX_RATE_POWER; 454 1.1 alc chan->minTxPower = 0; 455 1.1 alc } 456 1.1 alc return AH_TRUE; 457 1.1 alc } 458 1.1 alc 459 1.2 jmcneill static void 460 1.2 jmcneill ar5211ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore) 461 1.2 jmcneill { 462 1.2 jmcneill } 463 1.2 jmcneill 464 1.2 jmcneill static void 465 1.2 jmcneill ar5211DisablePCIE(struct ath_hal *ah) 466 1.2 jmcneill { 467 1.2 jmcneill } 468 1.2 jmcneill 469 1.1 alc /* 470 1.1 alc * Fill all software cached or static hardware state information. 471 1.1 alc */ 472 1.1 alc static HAL_BOOL 473 1.1 alc ar5211FillCapabilityInfo(struct ath_hal *ah) 474 1.1 alc { 475 1.1 alc struct ath_hal_private *ahpriv = AH_PRIVATE(ah); 476 1.1 alc HAL_CAPABILITIES *pCap = &ahpriv->ah_caps; 477 1.1 alc 478 1.1 alc /* Construct wireless mode from EEPROM */ 479 1.1 alc pCap->halWirelessModes = 0; 480 1.1 alc if (ath_hal_eepromGetFlag(ah, AR_EEP_AMODE)) { 481 1.1 alc pCap->halWirelessModes |= HAL_MODE_11A; 482 1.1 alc if (!ath_hal_eepromGetFlag(ah, AR_EEP_TURBO5DISABLE)) 483 1.1 alc pCap->halWirelessModes |= HAL_MODE_TURBO; 484 1.1 alc } 485 1.1 alc if (ath_hal_eepromGetFlag(ah, AR_EEP_BMODE)) 486 1.1 alc pCap->halWirelessModes |= HAL_MODE_11B; 487 1.1 alc 488 1.1 alc pCap->halLow2GhzChan = 2312; 489 1.1 alc pCap->halHigh2GhzChan = 2732; 490 1.1 alc pCap->halLow5GhzChan = 4920; 491 1.1 alc pCap->halHigh5GhzChan = 6100; 492 1.1 alc 493 1.1 alc pCap->halChanSpreadSupport = AH_TRUE; 494 1.1 alc pCap->halSleepAfterBeaconBroken = AH_TRUE; 495 1.1 alc pCap->halPSPollBroken = AH_TRUE; 496 1.1 alc pCap->halVEOLSupport = AH_TRUE; 497 1.1 alc 498 1.1 alc pCap->halTotalQueues = HAL_NUM_TX_QUEUES; 499 1.1 alc pCap->halKeyCacheSize = 128; 500 1.1 alc 501 1.1 alc /* XXX not needed */ 502 1.1 alc pCap->halChanHalfRate = AH_FALSE; 503 1.1 alc pCap->halChanQuarterRate = AH_FALSE; 504 1.1 alc 505 1.1 alc if (ath_hal_eepromGetFlag(ah, AR_EEP_RFKILL) && 506 1.1 alc ath_hal_eepromGet(ah, AR_EEP_RFSILENT, &ahpriv->ah_rfsilent) == HAL_OK) { 507 1.1 alc /* NB: enabled by default */ 508 1.1 alc ahpriv->ah_rfkillEnabled = AH_TRUE; 509 1.1 alc pCap->halRfSilentSupport = AH_TRUE; 510 1.1 alc } 511 1.1 alc 512 1.1 alc pCap->halTstampPrecision = 13; 513 1.3 cegger pCap->halIntrMask = HAL_INT_COMMON 514 1.3 cegger | HAL_INT_RX 515 1.3 cegger | HAL_INT_TX 516 1.3 cegger | HAL_INT_FATAL 517 1.3 cegger | HAL_INT_BNR 518 1.3 cegger | HAL_INT_TIM 519 1.3 cegger ; 520 1.1 alc 521 1.1 alc /* XXX might be ok w/ some chip revs */ 522 1.1 alc ahpriv->ah_rxornIsFatal = AH_TRUE; 523 1.1 alc return AH_TRUE; 524 1.1 alc } 525 1.1 alc 526 1.1 alc static const char* 527 1.1 alc ar5211Probe(uint16_t vendorid, uint16_t devid) 528 1.1 alc { 529 1.1 alc if (vendorid == ATHEROS_VENDOR_ID) { 530 1.1 alc if (devid == AR5211_DEVID || devid == AR5311_DEVID || 531 1.1 alc devid == AR5211_DEFAULT) 532 1.1 alc return "Atheros 5211"; 533 1.1 alc if (devid == AR5211_FPGA11B) 534 1.1 alc return "Atheros 5211 (FPGA)"; 535 1.1 alc } 536 1.1 alc return AH_NULL; 537 1.1 alc } 538 1.1 alc AH_CHIP(AR5211, ar5211Probe, ar5211Attach); 539