ar2316.c revision 1.2.10.2
1 1.2.10.2 snj /* 2 1.2.10.2 snj * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 1.2.10.2 snj * Copyright (c) 2002-2008 Atheros Communications, Inc. 4 1.2.10.2 snj * 5 1.2.10.2 snj * Permission to use, copy, modify, and/or distribute this software for any 6 1.2.10.2 snj * purpose with or without fee is hereby granted, provided that the above 7 1.2.10.2 snj * copyright notice and this permission notice appear in all copies. 8 1.2.10.2 snj * 9 1.2.10.2 snj * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 1.2.10.2 snj * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 1.2.10.2 snj * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 1.2.10.2 snj * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 1.2.10.2 snj * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 1.2.10.2 snj * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 1.2.10.2 snj * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 1.2.10.2 snj * 17 1.2.10.2 snj * $Id: ar2316.c,v 1.2.10.2 2009/08/07 06:43:39 snj Exp $ 18 1.2.10.2 snj */ 19 1.2.10.2 snj #include "opt_ah.h" 20 1.2.10.2 snj 21 1.2.10.2 snj #include "ah.h" 22 1.2.10.2 snj #include "ah_internal.h" 23 1.2.10.2 snj 24 1.2.10.2 snj #include "ar5212/ar5212.h" 25 1.2.10.2 snj #include "ar5212/ar5212reg.h" 26 1.2.10.2 snj #include "ar5212/ar5212phy.h" 27 1.2.10.2 snj 28 1.2.10.2 snj #include "ah_eeprom_v3.h" 29 1.2.10.2 snj 30 1.2.10.2 snj #define AH_5212_2316 31 1.2.10.2 snj #include "ar5212/ar5212.ini" 32 1.2.10.2 snj 33 1.2.10.2 snj #define N(a) (sizeof(a)/sizeof(a[0])) 34 1.2.10.2 snj 35 1.2.10.2 snj typedef RAW_DATA_STRUCT_2413 RAW_DATA_STRUCT_2316; 36 1.2.10.2 snj typedef RAW_DATA_PER_CHANNEL_2413 RAW_DATA_PER_CHANNEL_2316; 37 1.2.10.2 snj #define PWR_TABLE_SIZE_2316 PWR_TABLE_SIZE_2413 38 1.2.10.2 snj 39 1.2.10.2 snj struct ar2316State { 40 1.2.10.2 snj RF_HAL_FUNCS base; /* public state, must be first */ 41 1.2.10.2 snj uint16_t pcdacTable[PWR_TABLE_SIZE_2316]; 42 1.2.10.2 snj 43 1.2.10.2 snj uint32_t Bank1Data[N(ar5212Bank1_2316)]; 44 1.2.10.2 snj uint32_t Bank2Data[N(ar5212Bank2_2316)]; 45 1.2.10.2 snj uint32_t Bank3Data[N(ar5212Bank3_2316)]; 46 1.2.10.2 snj uint32_t Bank6Data[N(ar5212Bank6_2316)]; 47 1.2.10.2 snj uint32_t Bank7Data[N(ar5212Bank7_2316)]; 48 1.2.10.2 snj 49 1.2.10.2 snj /* 50 1.2.10.2 snj * Private state for reduced stack usage. 51 1.2.10.2 snj */ 52 1.2.10.2 snj /* filled out Vpd table for all pdGains (chanL) */ 53 1.2.10.2 snj uint16_t vpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL] 54 1.2.10.2 snj [MAX_PWR_RANGE_IN_HALF_DB]; 55 1.2.10.2 snj /* filled out Vpd table for all pdGains (chanR) */ 56 1.2.10.2 snj uint16_t vpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL] 57 1.2.10.2 snj [MAX_PWR_RANGE_IN_HALF_DB]; 58 1.2.10.2 snj /* filled out Vpd table for all pdGains (interpolated) */ 59 1.2.10.2 snj uint16_t vpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL] 60 1.2.10.2 snj [MAX_PWR_RANGE_IN_HALF_DB]; 61 1.2.10.2 snj }; 62 1.2.10.2 snj #define AR2316(ah) ((struct ar2316State *) AH5212(ah)->ah_rfHal) 63 1.2.10.2 snj 64 1.2.10.2 snj extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32, 65 1.2.10.2 snj uint32_t numBits, uint32_t firstBit, uint32_t column); 66 1.2.10.2 snj 67 1.2.10.2 snj static void 68 1.2.10.2 snj ar2316WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, 69 1.2.10.2 snj int regWrites) 70 1.2.10.2 snj { 71 1.2.10.2 snj struct ath_hal_5212 *ahp = AH5212(ah); 72 1.2.10.2 snj 73 1.2.10.2 snj HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2316, modesIndex, regWrites); 74 1.2.10.2 snj HAL_INI_WRITE_ARRAY(ah, ar5212Common_2316, 1, regWrites); 75 1.2.10.2 snj HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_2316, freqIndex, regWrites); 76 1.2.10.2 snj 77 1.2.10.2 snj /* For AP51 */ 78 1.2.10.2 snj if (!ahp->ah_cwCalRequire) { 79 1.2.10.2 snj OS_REG_WRITE(ah, 0xa358, (OS_REG_READ(ah, 0xa358) & ~0x2)); 80 1.2.10.2 snj } else { 81 1.2.10.2 snj ahp->ah_cwCalRequire = AH_FALSE; 82 1.2.10.2 snj } 83 1.2.10.2 snj } 84 1.2.10.2 snj 85 1.2.10.2 snj /* 86 1.2.10.2 snj * Take the MHz channel value and set the Channel value 87 1.2.10.2 snj * 88 1.2.10.2 snj * ASSUMES: Writes enabled to analog bus 89 1.2.10.2 snj */ 90 1.2.10.2 snj static HAL_BOOL 91 1.2.10.2 snj ar2316SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) 92 1.2.10.2 snj { 93 1.2.10.2 snj uint32_t channelSel = 0; 94 1.2.10.2 snj uint32_t bModeSynth = 0; 95 1.2.10.2 snj uint32_t aModeRefSel = 0; 96 1.2.10.2 snj uint32_t reg32 = 0; 97 1.2.10.2 snj 98 1.2.10.2 snj OS_MARK(ah, AH_MARK_SETCHANNEL, chan->channel); 99 1.2.10.2 snj 100 1.2.10.2 snj if (chan->channel < 4800) { 101 1.2.10.2 snj uint32_t txctl; 102 1.2.10.2 snj 103 1.2.10.2 snj if (((chan->channel - 2192) % 5) == 0) { 104 1.2.10.2 snj channelSel = ((chan->channel - 672) * 2 - 3040)/10; 105 1.2.10.2 snj bModeSynth = 0; 106 1.2.10.2 snj } else if (((chan->channel - 2224) % 5) == 0) { 107 1.2.10.2 snj channelSel = ((chan->channel - 704) * 2 - 3040) / 10; 108 1.2.10.2 snj bModeSynth = 1; 109 1.2.10.2 snj } else { 110 1.2.10.2 snj HALDEBUG(ah, HAL_DEBUG_ANY, 111 1.2.10.2 snj "%s: invalid channel %u MHz\n", 112 1.2.10.2 snj __func__, chan->channel); 113 1.2.10.2 snj return AH_FALSE; 114 1.2.10.2 snj } 115 1.2.10.2 snj 116 1.2.10.2 snj channelSel = (channelSel << 2) & 0xff; 117 1.2.10.2 snj channelSel = ath_hal_reverseBits(channelSel, 8); 118 1.2.10.2 snj 119 1.2.10.2 snj txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); 120 1.2.10.2 snj if (chan->channel == 2484) { 121 1.2.10.2 snj /* Enable channel spreading for channel 14 */ 122 1.2.10.2 snj OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 123 1.2.10.2 snj txctl | AR_PHY_CCK_TX_CTRL_JAPAN); 124 1.2.10.2 snj } else { 125 1.2.10.2 snj OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 126 1.2.10.2 snj txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN); 127 1.2.10.2 snj } 128 1.2.10.2 snj } else if ((chan->channel % 20) == 0 && chan->channel >= 5120) { 129 1.2.10.2 snj channelSel = ath_hal_reverseBits( 130 1.2.10.2 snj ((chan->channel - 4800) / 20 << 2), 8); 131 1.2.10.2 snj aModeRefSel = ath_hal_reverseBits(3, 2); 132 1.2.10.2 snj } else if ((chan->channel % 10) == 0) { 133 1.2.10.2 snj channelSel = ath_hal_reverseBits( 134 1.2.10.2 snj ((chan->channel - 4800) / 10 << 1), 8); 135 1.2.10.2 snj aModeRefSel = ath_hal_reverseBits(2, 2); 136 1.2.10.2 snj } else if ((chan->channel % 5) == 0) { 137 1.2.10.2 snj channelSel = ath_hal_reverseBits( 138 1.2.10.2 snj (chan->channel - 4800) / 5, 8); 139 1.2.10.2 snj aModeRefSel = ath_hal_reverseBits(1, 2); 140 1.2.10.2 snj } else { 141 1.2.10.2 snj HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n", 142 1.2.10.2 snj __func__, chan->channel); 143 1.2.10.2 snj return AH_FALSE; 144 1.2.10.2 snj } 145 1.2.10.2 snj 146 1.2.10.2 snj reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) | 147 1.2.10.2 snj (1 << 12) | 0x1; 148 1.2.10.2 snj OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff); 149 1.2.10.2 snj 150 1.2.10.2 snj reg32 >>= 8; 151 1.2.10.2 snj OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f); 152 1.2.10.2 snj 153 1.2.10.2 snj AH_PRIVATE(ah)->ah_curchan = chan; 154 1.2.10.2 snj return AH_TRUE; 155 1.2.10.2 snj } 156 1.2.10.2 snj 157 1.2.10.2 snj /* 158 1.2.10.2 snj * Reads EEPROM header info from device structure and programs 159 1.2.10.2 snj * all rf registers 160 1.2.10.2 snj * 161 1.2.10.2 snj * REQUIRES: Access to the analog rf device 162 1.2.10.2 snj */ 163 1.2.10.2 snj static HAL_BOOL 164 1.2.10.2 snj ar2316SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t modesIndex, uint16_t *rfXpdGain) 165 1.2.10.2 snj { 166 1.2.10.2 snj #define RF_BANK_SETUP(_priv, _ix, _col) do { \ 167 1.2.10.2 snj int i; \ 168 1.2.10.2 snj for (i = 0; i < N(ar5212Bank##_ix##_2316); i++) \ 169 1.2.10.2 snj (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_2316[i][_col];\ 170 1.2.10.2 snj } while (0) 171 1.2.10.2 snj struct ath_hal_5212 *ahp = AH5212(ah); 172 1.2.10.2 snj const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 173 1.2.10.2 snj uint16_t ob2GHz = 0, db2GHz = 0; 174 1.2.10.2 snj struct ar2316State *priv = AR2316(ah); 175 1.2.10.2 snj int regWrites = 0; 176 1.2.10.2 snj 177 1.2.10.2 snj HALDEBUG(ah, HAL_DEBUG_RFPARAM, 178 1.2.10.2 snj "%s: chan 0x%x flag 0x%x modesIndex 0x%x\n", 179 1.2.10.2 snj __func__, chan->channel, chan->channelFlags, modesIndex); 180 1.2.10.2 snj 181 1.2.10.2 snj HALASSERT(priv != AH_NULL); 182 1.2.10.2 snj 183 1.2.10.2 snj /* Setup rf parameters */ 184 1.2.10.2 snj switch (chan->channelFlags & CHANNEL_ALL) { 185 1.2.10.2 snj case CHANNEL_B: 186 1.2.10.2 snj ob2GHz = ee->ee_obFor24; 187 1.2.10.2 snj db2GHz = ee->ee_dbFor24; 188 1.2.10.2 snj break; 189 1.2.10.2 snj case CHANNEL_G: 190 1.2.10.2 snj case CHANNEL_108G: 191 1.2.10.2 snj ob2GHz = ee->ee_obFor24g; 192 1.2.10.2 snj db2GHz = ee->ee_dbFor24g; 193 1.2.10.2 snj break; 194 1.2.10.2 snj default: 195 1.2.10.2 snj HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", 196 1.2.10.2 snj __func__, chan->channelFlags); 197 1.2.10.2 snj return AH_FALSE; 198 1.2.10.2 snj } 199 1.2.10.2 snj 200 1.2.10.2 snj /* Bank 1 Write */ 201 1.2.10.2 snj RF_BANK_SETUP(priv, 1, 1); 202 1.2.10.2 snj 203 1.2.10.2 snj /* Bank 2 Write */ 204 1.2.10.2 snj RF_BANK_SETUP(priv, 2, modesIndex); 205 1.2.10.2 snj 206 1.2.10.2 snj /* Bank 3 Write */ 207 1.2.10.2 snj RF_BANK_SETUP(priv, 3, modesIndex); 208 1.2.10.2 snj 209 1.2.10.2 snj /* Bank 6 Write */ 210 1.2.10.2 snj RF_BANK_SETUP(priv, 6, modesIndex); 211 1.2.10.2 snj 212 1.2.10.2 snj ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 178, 0); 213 1.2.10.2 snj ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 175, 0); 214 1.2.10.2 snj 215 1.2.10.2 snj /* Bank 7 Setup */ 216 1.2.10.2 snj RF_BANK_SETUP(priv, 7, modesIndex); 217 1.2.10.2 snj 218 1.2.10.2 snj /* Write Analog registers */ 219 1.2.10.2 snj HAL_INI_WRITE_BANK(ah, ar5212Bank1_2316, priv->Bank1Data, regWrites); 220 1.2.10.2 snj HAL_INI_WRITE_BANK(ah, ar5212Bank2_2316, priv->Bank2Data, regWrites); 221 1.2.10.2 snj HAL_INI_WRITE_BANK(ah, ar5212Bank3_2316, priv->Bank3Data, regWrites); 222 1.2.10.2 snj HAL_INI_WRITE_BANK(ah, ar5212Bank6_2316, priv->Bank6Data, regWrites); 223 1.2.10.2 snj HAL_INI_WRITE_BANK(ah, ar5212Bank7_2316, priv->Bank7Data, regWrites); 224 1.2.10.2 snj 225 1.2.10.2 snj /* Now that we have reprogrammed rfgain value, clear the flag. */ 226 1.2.10.2 snj ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE; 227 1.2.10.2 snj 228 1.2.10.2 snj return AH_TRUE; 229 1.2.10.2 snj #undef RF_BANK_SETUP 230 1.2.10.2 snj } 231 1.2.10.2 snj 232 1.2.10.2 snj /* 233 1.2.10.2 snj * Return a reference to the requested RF Bank. 234 1.2.10.2 snj */ 235 1.2.10.2 snj static uint32_t * 236 1.2.10.2 snj ar2316GetRfBank(struct ath_hal *ah, int bank) 237 1.2.10.2 snj { 238 1.2.10.2 snj struct ar2316State *priv = AR2316(ah); 239 1.2.10.2 snj 240 1.2.10.2 snj HALASSERT(priv != AH_NULL); 241 1.2.10.2 snj switch (bank) { 242 1.2.10.2 snj case 1: return priv->Bank1Data; 243 1.2.10.2 snj case 2: return priv->Bank2Data; 244 1.2.10.2 snj case 3: return priv->Bank3Data; 245 1.2.10.2 snj case 6: return priv->Bank6Data; 246 1.2.10.2 snj case 7: return priv->Bank7Data; 247 1.2.10.2 snj } 248 1.2.10.2 snj HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n", 249 1.2.10.2 snj __func__, bank); 250 1.2.10.2 snj return AH_NULL; 251 1.2.10.2 snj } 252 1.2.10.2 snj 253 1.2.10.2 snj /* 254 1.2.10.2 snj * Return indices surrounding the value in sorted integer lists. 255 1.2.10.2 snj * 256 1.2.10.2 snj * NB: the input list is assumed to be sorted in ascending order 257 1.2.10.2 snj */ 258 1.2.10.2 snj static void 259 1.2.10.2 snj GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize, 260 1.2.10.2 snj uint32_t *vlo, uint32_t *vhi) 261 1.2.10.2 snj { 262 1.2.10.2 snj int16_t target = v; 263 1.2.10.2 snj const int16_t *ep = lp+listSize; 264 1.2.10.2 snj const int16_t *tp; 265 1.2.10.2 snj 266 1.2.10.2 snj /* 267 1.2.10.2 snj * Check first and last elements for out-of-bounds conditions. 268 1.2.10.2 snj */ 269 1.2.10.2 snj if (target < lp[0]) { 270 1.2.10.2 snj *vlo = *vhi = 0; 271 1.2.10.2 snj return; 272 1.2.10.2 snj } 273 1.2.10.2 snj if (target >= ep[-1]) { 274 1.2.10.2 snj *vlo = *vhi = listSize - 1; 275 1.2.10.2 snj return; 276 1.2.10.2 snj } 277 1.2.10.2 snj 278 1.2.10.2 snj /* look for value being near or between 2 values in list */ 279 1.2.10.2 snj for (tp = lp; tp < ep; tp++) { 280 1.2.10.2 snj /* 281 1.2.10.2 snj * If value is close to the current value of the list 282 1.2.10.2 snj * then target is not between values, it is one of the values 283 1.2.10.2 snj */ 284 1.2.10.2 snj if (*tp == target) { 285 1.2.10.2 snj *vlo = *vhi = tp - (const int16_t *) lp; 286 1.2.10.2 snj return; 287 1.2.10.2 snj } 288 1.2.10.2 snj /* 289 1.2.10.2 snj * Look for value being between current value and next value 290 1.2.10.2 snj * if so return these 2 values 291 1.2.10.2 snj */ 292 1.2.10.2 snj if (target < tp[1]) { 293 1.2.10.2 snj *vlo = tp - (const int16_t *) lp; 294 1.2.10.2 snj *vhi = *vlo + 1; 295 1.2.10.2 snj return; 296 1.2.10.2 snj } 297 1.2.10.2 snj } 298 1.2.10.2 snj } 299 1.2.10.2 snj 300 1.2.10.2 snj /* 301 1.2.10.2 snj * Fill the Vpdlist for indices Pmax-Pmin 302 1.2.10.2 snj */ 303 1.2.10.2 snj static HAL_BOOL 304 1.2.10.2 snj ar2316FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t Pmax, 305 1.2.10.2 snj const int16_t *pwrList, const int16_t *VpdList, 306 1.2.10.2 snj uint16_t numIntercepts, uint16_t retVpdList[][64]) 307 1.2.10.2 snj { 308 1.2.10.2 snj uint16_t ii, jj, kk; 309 1.2.10.2 snj int16_t currPwr = (int16_t)(2*Pmin); 310 1.2.10.2 snj /* since Pmin is pwr*2 and pwrList is 4*pwr */ 311 1.2.10.2 snj uint32_t idxL = 0, idxR = 0; 312 1.2.10.2 snj 313 1.2.10.2 snj ii = 0; 314 1.2.10.2 snj jj = 0; 315 1.2.10.2 snj 316 1.2.10.2 snj if (numIntercepts < 2) 317 1.2.10.2 snj return AH_FALSE; 318 1.2.10.2 snj 319 1.2.10.2 snj while (ii <= (uint16_t)(Pmax - Pmin)) { 320 1.2.10.2 snj GetLowerUpperIndex(currPwr, pwrList, numIntercepts, 321 1.2.10.2 snj &(idxL), &(idxR)); 322 1.2.10.2 snj if (idxR < 1) 323 1.2.10.2 snj idxR = 1; /* extrapolate below */ 324 1.2.10.2 snj if (idxL == (uint32_t)(numIntercepts - 1)) 325 1.2.10.2 snj idxL = numIntercepts - 2; /* extrapolate above */ 326 1.2.10.2 snj if (pwrList[idxL] == pwrList[idxR]) 327 1.2.10.2 snj kk = VpdList[idxL]; 328 1.2.10.2 snj else 329 1.2.10.2 snj kk = (uint16_t) 330 1.2.10.2 snj (((currPwr - pwrList[idxL])*VpdList[idxR]+ 331 1.2.10.2 snj (pwrList[idxR] - currPwr)*VpdList[idxL])/ 332 1.2.10.2 snj (pwrList[idxR] - pwrList[idxL])); 333 1.2.10.2 snj retVpdList[pdGainIdx][ii] = kk; 334 1.2.10.2 snj ii++; 335 1.2.10.2 snj currPwr += 2; /* half dB steps */ 336 1.2.10.2 snj } 337 1.2.10.2 snj 338 1.2.10.2 snj return AH_TRUE; 339 1.2.10.2 snj } 340 1.2.10.2 snj 341 1.2.10.2 snj /* 342 1.2.10.2 snj * Returns interpolated or the scaled up interpolated value 343 1.2.10.2 snj */ 344 1.2.10.2 snj static int16_t 345 1.2.10.2 snj interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight, 346 1.2.10.2 snj int16_t targetLeft, int16_t targetRight) 347 1.2.10.2 snj { 348 1.2.10.2 snj int16_t rv; 349 1.2.10.2 snj 350 1.2.10.2 snj if (srcRight != srcLeft) { 351 1.2.10.2 snj rv = ((target - srcLeft)*targetRight + 352 1.2.10.2 snj (srcRight - target)*targetLeft) / (srcRight - srcLeft); 353 1.2.10.2 snj } else { 354 1.2.10.2 snj rv = targetLeft; 355 1.2.10.2 snj } 356 1.2.10.2 snj return rv; 357 1.2.10.2 snj } 358 1.2.10.2 snj 359 1.2.10.2 snj /* 360 1.2.10.2 snj * Uses the data points read from EEPROM to reconstruct the pdadc power table 361 1.2.10.2 snj * Called by ar2316SetPowerTable() 362 1.2.10.2 snj */ 363 1.2.10.2 snj static int 364 1.2.10.2 snj ar2316getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel, 365 1.2.10.2 snj const RAW_DATA_STRUCT_2316 *pRawDataset, 366 1.2.10.2 snj uint16_t pdGainOverlap_t2, 367 1.2.10.2 snj int16_t *pMinCalPower, uint16_t pPdGainBoundaries[], 368 1.2.10.2 snj uint16_t pPdGainValues[], uint16_t pPDADCValues[]) 369 1.2.10.2 snj { 370 1.2.10.2 snj struct ar2316State *priv = AR2316(ah); 371 1.2.10.2 snj #define VpdTable_L priv->vpdTable_L 372 1.2.10.2 snj #define VpdTable_R priv->vpdTable_R 373 1.2.10.2 snj #define VpdTable_I priv->vpdTable_I 374 1.2.10.2 snj uint32_t ii, jj, kk; 375 1.2.10.2 snj int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */ 376 1.2.10.2 snj uint32_t idxL = 0, idxR = 0; 377 1.2.10.2 snj uint32_t numPdGainsUsed = 0; 378 1.2.10.2 snj /* 379 1.2.10.2 snj * If desired to support -ve power levels in future, just 380 1.2.10.2 snj * change pwr_I_0 to signed 5-bits. 381 1.2.10.2 snj */ 382 1.2.10.2 snj int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL]; 383 1.2.10.2 snj /* to accomodate -ve power levels later on. */ 384 1.2.10.2 snj int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL]; 385 1.2.10.2 snj /* to accomodate -ve power levels later on */ 386 1.2.10.2 snj uint16_t numVpd = 0; 387 1.2.10.2 snj uint16_t Vpd_step; 388 1.2.10.2 snj int16_t tmpVal ; 389 1.2.10.2 snj uint32_t sizeCurrVpdTable, maxIndex, tgtIndex; 390 1.2.10.2 snj 391 1.2.10.2 snj /* Get upper lower index */ 392 1.2.10.2 snj GetLowerUpperIndex(channel, pRawDataset->pChannels, 393 1.2.10.2 snj pRawDataset->numChannels, &(idxL), &(idxR)); 394 1.2.10.2 snj 395 1.2.10.2 snj for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 396 1.2.10.2 snj jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1; 397 1.2.10.2 snj /* work backwards 'cause highest pdGain for lowest power */ 398 1.2.10.2 snj numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd; 399 1.2.10.2 snj if (numVpd > 0) { 400 1.2.10.2 snj pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain; 401 1.2.10.2 snj Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]; 402 1.2.10.2 snj if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) { 403 1.2.10.2 snj Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]; 404 1.2.10.2 snj } 405 1.2.10.2 snj Pmin_t2[numPdGainsUsed] = (int16_t) 406 1.2.10.2 snj (Pmin_t2[numPdGainsUsed] / 2); 407 1.2.10.2 snj Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1]; 408 1.2.10.2 snj if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1]) 409 1.2.10.2 snj Pmax_t2[numPdGainsUsed] = 410 1.2.10.2 snj pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1]; 411 1.2.10.2 snj Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2); 412 1.2.10.2 snj ar2316FillVpdTable( 413 1.2.10.2 snj numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed], 414 1.2.10.2 snj &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]), 415 1.2.10.2 snj &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L 416 1.2.10.2 snj ); 417 1.2.10.2 snj ar2316FillVpdTable( 418 1.2.10.2 snj numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed], 419 1.2.10.2 snj &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]), 420 1.2.10.2 snj &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R 421 1.2.10.2 snj ); 422 1.2.10.2 snj for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) { 423 1.2.10.2 snj VpdTable_I[numPdGainsUsed][kk] = 424 1.2.10.2 snj interpolate_signed( 425 1.2.10.2 snj channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR], 426 1.2.10.2 snj (int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]); 427 1.2.10.2 snj } 428 1.2.10.2 snj /* fill VpdTable_I for this pdGain */ 429 1.2.10.2 snj numPdGainsUsed++; 430 1.2.10.2 snj } 431 1.2.10.2 snj /* if this pdGain is used */ 432 1.2.10.2 snj } 433 1.2.10.2 snj 434 1.2.10.2 snj *pMinCalPower = Pmin_t2[0]; 435 1.2.10.2 snj kk = 0; /* index for the final table */ 436 1.2.10.2 snj for (ii = 0; ii < numPdGainsUsed; ii++) { 437 1.2.10.2 snj if (ii == (numPdGainsUsed - 1)) 438 1.2.10.2 snj pPdGainBoundaries[ii] = Pmax_t2[ii] + 439 1.2.10.2 snj PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB; 440 1.2.10.2 snj else 441 1.2.10.2 snj pPdGainBoundaries[ii] = (uint16_t) 442 1.2.10.2 snj ((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 ); 443 1.2.10.2 snj if (pPdGainBoundaries[ii] > 63) { 444 1.2.10.2 snj HALDEBUG(ah, HAL_DEBUG_ANY, 445 1.2.10.2 snj "%s: clamp pPdGainBoundaries[%d] %d\n", 446 1.2.10.2 snj __func__, ii, pPdGainBoundaries[ii]);/*XXX*/ 447 1.2.10.2 snj pPdGainBoundaries[ii] = 63; 448 1.2.10.2 snj } 449 1.2.10.2 snj 450 1.2.10.2 snj /* Find starting index for this pdGain */ 451 1.2.10.2 snj if (ii == 0) 452 1.2.10.2 snj ss = 0; /* for the first pdGain, start from index 0 */ 453 1.2.10.2 snj else 454 1.2.10.2 snj ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) - 455 1.2.10.2 snj pdGainOverlap_t2; 456 1.2.10.2 snj Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]); 457 1.2.10.2 snj Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step); 458 1.2.10.2 snj /* 459 1.2.10.2 snj *-ve ss indicates need to extrapolate data below for this pdGain 460 1.2.10.2 snj */ 461 1.2.10.2 snj while (ss < 0) { 462 1.2.10.2 snj tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step); 463 1.2.10.2 snj pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal); 464 1.2.10.2 snj ss++; 465 1.2.10.2 snj } 466 1.2.10.2 snj 467 1.2.10.2 snj sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii]; 468 1.2.10.2 snj tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii]; 469 1.2.10.2 snj maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable; 470 1.2.10.2 snj 471 1.2.10.2 snj while (ss < (int16_t)maxIndex) 472 1.2.10.2 snj pPDADCValues[kk++] = VpdTable_I[ii][ss++]; 473 1.2.10.2 snj 474 1.2.10.2 snj Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] - 475 1.2.10.2 snj VpdTable_I[ii][sizeCurrVpdTable-2]); 476 1.2.10.2 snj Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step); 477 1.2.10.2 snj /* 478 1.2.10.2 snj * for last gain, pdGainBoundary == Pmax_t2, so will 479 1.2.10.2 snj * have to extrapolate 480 1.2.10.2 snj */ 481 1.2.10.2 snj if (tgtIndex > maxIndex) { /* need to extrapolate above */ 482 1.2.10.2 snj while(ss < (int16_t)tgtIndex) { 483 1.2.10.2 snj tmpVal = (uint16_t) 484 1.2.10.2 snj (VpdTable_I[ii][sizeCurrVpdTable-1] + 485 1.2.10.2 snj (ss-maxIndex)*Vpd_step); 486 1.2.10.2 snj pPDADCValues[kk++] = (tmpVal > 127) ? 487 1.2.10.2 snj 127 : tmpVal; 488 1.2.10.2 snj ss++; 489 1.2.10.2 snj } 490 1.2.10.2 snj } /* extrapolated above */ 491 1.2.10.2 snj } /* for all pdGainUsed */ 492 1.2.10.2 snj 493 1.2.10.2 snj while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) { 494 1.2.10.2 snj pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1]; 495 1.2.10.2 snj ii++; 496 1.2.10.2 snj } 497 1.2.10.2 snj while (kk < 128) { 498 1.2.10.2 snj pPDADCValues[kk] = pPDADCValues[kk-1]; 499 1.2.10.2 snj kk++; 500 1.2.10.2 snj } 501 1.2.10.2 snj 502 1.2.10.2 snj return numPdGainsUsed; 503 1.2.10.2 snj #undef VpdTable_L 504 1.2.10.2 snj #undef VpdTable_R 505 1.2.10.2 snj #undef VpdTable_I 506 1.2.10.2 snj } 507 1.2.10.2 snj 508 1.2.10.2 snj static HAL_BOOL 509 1.2.10.2 snj ar2316SetPowerTable(struct ath_hal *ah, 510 1.2.10.2 snj int16_t *minPower, int16_t *maxPower, HAL_CHANNEL_INTERNAL *chan, 511 1.2.10.2 snj uint16_t *rfXpdGain) 512 1.2.10.2 snj { 513 1.2.10.2 snj struct ath_hal_5212 *ahp = AH5212(ah); 514 1.2.10.2 snj const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 515 1.2.10.2 snj const RAW_DATA_STRUCT_2316 *pRawDataset = AH_NULL; 516 1.2.10.2 snj uint16_t pdGainOverlap_t2; 517 1.2.10.2 snj int16_t minCalPower2316_t2; 518 1.2.10.2 snj uint16_t *pdadcValues = ahp->ah_pcdacTable; 519 1.2.10.2 snj uint16_t gainBoundaries[4]; 520 1.2.10.2 snj uint32_t reg32, regoffset; 521 1.2.10.2 snj int i, numPdGainsUsed; 522 1.2.10.2 snj #ifndef AH_USE_INIPDGAIN 523 1.2.10.2 snj uint32_t tpcrg1; 524 1.2.10.2 snj #endif 525 1.2.10.2 snj 526 1.2.10.2 snj HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan 0x%x flag 0x%x\n", 527 1.2.10.2 snj __func__, chan->channel,chan->channelFlags); 528 1.2.10.2 snj 529 1.2.10.2 snj if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) 530 1.2.10.2 snj pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; 531 1.2.10.2 snj else if (IS_CHAN_B(chan)) 532 1.2.10.2 snj pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; 533 1.2.10.2 snj else { 534 1.2.10.2 snj HALDEBUG(ah, HAL_DEBUG_ANY, "%s: illegal mode\n", __func__); 535 1.2.10.2 snj return AH_FALSE; 536 1.2.10.2 snj } 537 1.2.10.2 snj 538 1.2.10.2 snj pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5), 539 1.2.10.2 snj AR_PHY_TPCRG5_PD_GAIN_OVERLAP); 540 1.2.10.2 snj 541 1.2.10.2 snj numPdGainsUsed = ar2316getGainBoundariesAndPdadcsForPowers(ah, 542 1.2.10.2 snj chan->channel, pRawDataset, pdGainOverlap_t2, 543 1.2.10.2 snj &minCalPower2316_t2,gainBoundaries, rfXpdGain, pdadcValues); 544 1.2.10.2 snj HALASSERT(1 <= numPdGainsUsed && numPdGainsUsed <= 3); 545 1.2.10.2 snj 546 1.2.10.2 snj #ifdef AH_USE_INIPDGAIN 547 1.2.10.2 snj /* 548 1.2.10.2 snj * Use pd_gains curve from eeprom; Atheros always uses 549 1.2.10.2 snj * the default curve from the ini file but some vendors 550 1.2.10.2 snj * (e.g. Zcomax) want to override this curve and not 551 1.2.10.2 snj * honoring their settings results in tx power 5dBm low. 552 1.2.10.2 snj */ 553 1.2.10.2 snj OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN, 554 1.2.10.2 snj (pRawDataset->pDataPerChannel[0].numPdGains - 1)); 555 1.2.10.2 snj #else 556 1.2.10.2 snj tpcrg1 = OS_REG_READ(ah, AR_PHY_TPCRG1); 557 1.2.10.2 snj tpcrg1 = (tpcrg1 &~ AR_PHY_TPCRG1_NUM_PD_GAIN) 558 1.2.10.2 snj | SM(numPdGainsUsed-1, AR_PHY_TPCRG1_NUM_PD_GAIN); 559 1.2.10.2 snj switch (numPdGainsUsed) { 560 1.2.10.2 snj case 3: 561 1.2.10.2 snj tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING3; 562 1.2.10.2 snj tpcrg1 |= SM(rfXpdGain[2], AR_PHY_TPCRG1_PDGAIN_SETTING3); 563 1.2.10.2 snj /* fall thru... */ 564 1.2.10.2 snj case 2: 565 1.2.10.2 snj tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING2; 566 1.2.10.2 snj tpcrg1 |= SM(rfXpdGain[1], AR_PHY_TPCRG1_PDGAIN_SETTING2); 567 1.2.10.2 snj /* fall thru... */ 568 1.2.10.2 snj case 1: 569 1.2.10.2 snj tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING1; 570 1.2.10.2 snj tpcrg1 |= SM(rfXpdGain[0], AR_PHY_TPCRG1_PDGAIN_SETTING1); 571 1.2.10.2 snj break; 572 1.2.10.2 snj } 573 1.2.10.2 snj #ifdef AH_DEBUG 574 1.2.10.2 snj if (tpcrg1 != OS_REG_READ(ah, AR_PHY_TPCRG1)) 575 1.2.10.2 snj HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: using non-default " 576 1.2.10.2 snj "pd_gains (default 0x%x, calculated 0x%x)\n", 577 1.2.10.2 snj __func__, OS_REG_READ(ah, AR_PHY_TPCRG1), tpcrg1); 578 1.2.10.2 snj #endif 579 1.2.10.2 snj OS_REG_WRITE(ah, AR_PHY_TPCRG1, tpcrg1); 580 1.2.10.2 snj #endif 581 1.2.10.2 snj 582 1.2.10.2 snj /* 583 1.2.10.2 snj * Note the pdadc table may not start at 0 dBm power, could be 584 1.2.10.2 snj * negative or greater than 0. Need to offset the power 585 1.2.10.2 snj * values by the amount of minPower for griffin 586 1.2.10.2 snj */ 587 1.2.10.2 snj if (minCalPower2316_t2 != 0) 588 1.2.10.2 snj ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower2316_t2); 589 1.2.10.2 snj else 590 1.2.10.2 snj ahp->ah_txPowerIndexOffset = 0; 591 1.2.10.2 snj 592 1.2.10.2 snj /* Finally, write the power values into the baseband power table */ 593 1.2.10.2 snj regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */ 594 1.2.10.2 snj for (i = 0; i < 32; i++) { 595 1.2.10.2 snj reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) | 596 1.2.10.2 snj ((pdadcValues[4*i + 1] & 0xFF) << 8) | 597 1.2.10.2 snj ((pdadcValues[4*i + 2] & 0xFF) << 16) | 598 1.2.10.2 snj ((pdadcValues[4*i + 3] & 0xFF) << 24) ; 599 1.2.10.2 snj OS_REG_WRITE(ah, regoffset, reg32); 600 1.2.10.2 snj regoffset += 4; 601 1.2.10.2 snj } 602 1.2.10.2 snj 603 1.2.10.2 snj OS_REG_WRITE(ah, AR_PHY_TPCRG5, 604 1.2.10.2 snj SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) | 605 1.2.10.2 snj SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) | 606 1.2.10.2 snj SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) | 607 1.2.10.2 snj SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) | 608 1.2.10.2 snj SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4)); 609 1.2.10.2 snj 610 1.2.10.2 snj return AH_TRUE; 611 1.2.10.2 snj } 612 1.2.10.2 snj 613 1.2.10.2 snj static int16_t 614 1.2.10.2 snj ar2316GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2316 *data) 615 1.2.10.2 snj { 616 1.2.10.2 snj uint32_t ii,jj; 617 1.2.10.2 snj uint16_t Pmin=0,numVpd; 618 1.2.10.2 snj 619 1.2.10.2 snj for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 620 1.2.10.2 snj jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1; 621 1.2.10.2 snj /* work backwards 'cause highest pdGain for lowest power */ 622 1.2.10.2 snj numVpd = data->pDataPerPDGain[jj].numVpd; 623 1.2.10.2 snj if (numVpd > 0) { 624 1.2.10.2 snj Pmin = data->pDataPerPDGain[jj].pwr_t4[0]; 625 1.2.10.2 snj return(Pmin); 626 1.2.10.2 snj } 627 1.2.10.2 snj } 628 1.2.10.2 snj return(Pmin); 629 1.2.10.2 snj } 630 1.2.10.2 snj 631 1.2.10.2 snj static int16_t 632 1.2.10.2 snj ar2316GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2316 *data) 633 1.2.10.2 snj { 634 1.2.10.2 snj uint32_t ii; 635 1.2.10.2 snj uint16_t Pmax=0,numVpd; 636 1.2.10.2 snj 637 1.2.10.2 snj for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 638 1.2.10.2 snj /* work forwards cuase lowest pdGain for highest power */ 639 1.2.10.2 snj numVpd = data->pDataPerPDGain[ii].numVpd; 640 1.2.10.2 snj if (numVpd > 0) { 641 1.2.10.2 snj Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1]; 642 1.2.10.2 snj return(Pmax); 643 1.2.10.2 snj } 644 1.2.10.2 snj } 645 1.2.10.2 snj return(Pmax); 646 1.2.10.2 snj } 647 1.2.10.2 snj 648 1.2.10.2 snj static HAL_BOOL 649 1.2.10.2 snj ar2316GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, 650 1.2.10.2 snj int16_t *maxPow, int16_t *minPow) 651 1.2.10.2 snj { 652 1.2.10.2 snj const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 653 1.2.10.2 snj const RAW_DATA_STRUCT_2316 *pRawDataset = AH_NULL; 654 1.2.10.2 snj const RAW_DATA_PER_CHANNEL_2316 *data=AH_NULL; 655 1.2.10.2 snj uint16_t numChannels; 656 1.2.10.2 snj int totalD,totalF, totalMin,last, i; 657 1.2.10.2 snj 658 1.2.10.2 snj *maxPow = 0; 659 1.2.10.2 snj 660 1.2.10.2 snj if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) 661 1.2.10.2 snj pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; 662 1.2.10.2 snj else if (IS_CHAN_B(chan)) 663 1.2.10.2 snj pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; 664 1.2.10.2 snj else 665 1.2.10.2 snj return(AH_FALSE); 666 1.2.10.2 snj 667 1.2.10.2 snj numChannels = pRawDataset->numChannels; 668 1.2.10.2 snj data = pRawDataset->pDataPerChannel; 669 1.2.10.2 snj 670 1.2.10.2 snj /* Make sure the channel is in the range of the TP values 671 1.2.10.2 snj * (freq piers) 672 1.2.10.2 snj */ 673 1.2.10.2 snj if (numChannels < 1) 674 1.2.10.2 snj return(AH_FALSE); 675 1.2.10.2 snj 676 1.2.10.2 snj if ((chan->channel < data[0].channelValue) || 677 1.2.10.2 snj (chan->channel > data[numChannels-1].channelValue)) { 678 1.2.10.2 snj if (chan->channel < data[0].channelValue) { 679 1.2.10.2 snj *maxPow = ar2316GetMaxPower(ah, &data[0]); 680 1.2.10.2 snj *minPow = ar2316GetMinPower(ah, &data[0]); 681 1.2.10.2 snj return(AH_TRUE); 682 1.2.10.2 snj } else { 683 1.2.10.2 snj *maxPow = ar2316GetMaxPower(ah, &data[numChannels - 1]); 684 1.2.10.2 snj *minPow = ar2316GetMinPower(ah, &data[numChannels - 1]); 685 1.2.10.2 snj return(AH_TRUE); 686 1.2.10.2 snj } 687 1.2.10.2 snj } 688 1.2.10.2 snj 689 1.2.10.2 snj /* Linearly interpolate the power value now */ 690 1.2.10.2 snj for (last=0,i=0; (i<numChannels) && (chan->channel > data[i].channelValue); 691 1.2.10.2 snj last = i++); 692 1.2.10.2 snj totalD = data[i].channelValue - data[last].channelValue; 693 1.2.10.2 snj if (totalD > 0) { 694 1.2.10.2 snj totalF = ar2316GetMaxPower(ah, &data[i]) - ar2316GetMaxPower(ah, &data[last]); 695 1.2.10.2 snj *maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) + 696 1.2.10.2 snj ar2316GetMaxPower(ah, &data[last])*totalD)/totalD); 697 1.2.10.2 snj totalMin = ar2316GetMinPower(ah, &data[i]) - ar2316GetMinPower(ah, &data[last]); 698 1.2.10.2 snj *minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) + 699 1.2.10.2 snj ar2316GetMinPower(ah, &data[last])*totalD)/totalD); 700 1.2.10.2 snj return(AH_TRUE); 701 1.2.10.2 snj } else { 702 1.2.10.2 snj if (chan->channel == data[i].channelValue) { 703 1.2.10.2 snj *maxPow = ar2316GetMaxPower(ah, &data[i]); 704 1.2.10.2 snj *minPow = ar2316GetMinPower(ah, &data[i]); 705 1.2.10.2 snj return(AH_TRUE); 706 1.2.10.2 snj } else 707 1.2.10.2 snj return(AH_FALSE); 708 1.2.10.2 snj } 709 1.2.10.2 snj } 710 1.2.10.2 snj 711 1.2.10.2 snj /* 712 1.2.10.2 snj * Free memory for analog bank scratch buffers 713 1.2.10.2 snj */ 714 1.2.10.2 snj static void 715 1.2.10.2 snj ar2316RfDetach(struct ath_hal *ah) 716 1.2.10.2 snj { 717 1.2.10.2 snj struct ath_hal_5212 *ahp = AH5212(ah); 718 1.2.10.2 snj 719 1.2.10.2 snj HALASSERT(ahp->ah_rfHal != AH_NULL); 720 1.2.10.2 snj ath_hal_free(ahp->ah_rfHal); 721 1.2.10.2 snj ahp->ah_rfHal = AH_NULL; 722 1.2.10.2 snj } 723 1.2.10.2 snj 724 1.2.10.2 snj /* 725 1.2.10.2 snj * Allocate memory for private state. 726 1.2.10.2 snj * Scratch Buffer will be reinitialized every reset so no need to zero now 727 1.2.10.2 snj */ 728 1.2.10.2 snj static HAL_BOOL 729 1.2.10.2 snj ar2316RfAttach(struct ath_hal *ah, HAL_STATUS *status) 730 1.2.10.2 snj { 731 1.2.10.2 snj struct ath_hal_5212 *ahp = AH5212(ah); 732 1.2.10.2 snj struct ar2316State *priv; 733 1.2.10.2 snj 734 1.2.10.2 snj HALASSERT(ah->ah_magic == AR5212_MAGIC); 735 1.2.10.2 snj 736 1.2.10.2 snj HALASSERT(ahp->ah_rfHal == AH_NULL); 737 1.2.10.2 snj priv = ath_hal_malloc(sizeof(struct ar2316State)); 738 1.2.10.2 snj if (priv == AH_NULL) { 739 1.2.10.2 snj HALDEBUG(ah, HAL_DEBUG_ANY, 740 1.2.10.2 snj "%s: cannot allocate private state\n", __func__); 741 1.2.10.2 snj *status = HAL_ENOMEM; /* XXX */ 742 1.2.10.2 snj return AH_FALSE; 743 1.2.10.2 snj } 744 1.2.10.2 snj priv->base.rfDetach = ar2316RfDetach; 745 1.2.10.2 snj priv->base.writeRegs = ar2316WriteRegs; 746 1.2.10.2 snj priv->base.getRfBank = ar2316GetRfBank; 747 1.2.10.2 snj priv->base.setChannel = ar2316SetChannel; 748 1.2.10.2 snj priv->base.setRfRegs = ar2316SetRfRegs; 749 1.2.10.2 snj priv->base.setPowerTable = ar2316SetPowerTable; 750 1.2.10.2 snj priv->base.getChannelMaxMinPower = ar2316GetChannelMaxMinPower; 751 1.2.10.2 snj priv->base.getNfAdjust = ar5212GetNfAdjust; 752 1.2.10.2 snj 753 1.2.10.2 snj ahp->ah_pcdacTable = priv->pcdacTable; 754 1.2.10.2 snj ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable); 755 1.2.10.2 snj ahp->ah_rfHal = &priv->base; 756 1.2.10.2 snj 757 1.2.10.2 snj ahp->ah_cwCalRequire = AH_TRUE; /* force initial cal */ 758 1.2.10.2 snj 759 1.2.10.2 snj return AH_TRUE; 760 1.2.10.2 snj } 761 1.2.10.2 snj 762 1.2.10.2 snj static HAL_BOOL 763 1.2.10.2 snj ar2316Probe(struct ath_hal *ah) 764 1.2.10.2 snj { 765 1.2.10.2 snj return IS_2316(ah); 766 1.2.10.2 snj } 767 1.2.10.2 snj AH_RF(RF2316, ar2316Probe, ar2316RfAttach); 768
Indexes created Sun Oct 12 09:09:55 GMT 2025