ar2317.c revision 1.3.4.2 1 1.3.4.2 skrll /*
2 1.3.4.2 skrll * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
3 1.3.4.2 skrll * Copyright (c) 2002-2008 Atheros Communications, Inc.
4 1.3.4.2 skrll *
5 1.3.4.2 skrll * Permission to use, copy, modify, and/or distribute this software for any
6 1.3.4.2 skrll * purpose with or without fee is hereby granted, provided that the above
7 1.3.4.2 skrll * copyright notice and this permission notice appear in all copies.
8 1.3.4.2 skrll *
9 1.3.4.2 skrll * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 1.3.4.2 skrll * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 1.3.4.2 skrll * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 1.3.4.2 skrll * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 1.3.4.2 skrll * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 1.3.4.2 skrll * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 1.3.4.2 skrll * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 1.3.4.2 skrll *
17 1.3.4.2 skrll * $Id: ar2317.c,v 1.3.4.2 2009/01/19 13:19:26 skrll Exp $
18 1.3.4.2 skrll */
19 1.3.4.2 skrll #include "opt_ah.h"
20 1.3.4.2 skrll
21 1.3.4.2 skrll #include "ah.h"
22 1.3.4.2 skrll #include "ah_devid.h"
23 1.3.4.2 skrll #include "ah_internal.h"
24 1.3.4.2 skrll
25 1.3.4.2 skrll #include "ar5212/ar5212.h"
26 1.3.4.2 skrll #include "ar5212/ar5212reg.h"
27 1.3.4.2 skrll #include "ar5212/ar5212phy.h"
28 1.3.4.2 skrll
29 1.3.4.2 skrll #include "ah_eeprom_v3.h"
30 1.3.4.2 skrll
31 1.3.4.2 skrll #define AH_5212_2317
32 1.3.4.2 skrll #include "ar5212/ar5212.ini"
33 1.3.4.2 skrll
34 1.3.4.2 skrll #define N(a) (sizeof(a)/sizeof(a[0]))
35 1.3.4.2 skrll
36 1.3.4.2 skrll typedef RAW_DATA_STRUCT_2413 RAW_DATA_STRUCT_2317;
37 1.3.4.2 skrll typedef RAW_DATA_PER_CHANNEL_2413 RAW_DATA_PER_CHANNEL_2317;
38 1.3.4.2 skrll #define PWR_TABLE_SIZE_2317 PWR_TABLE_SIZE_2413
39 1.3.4.2 skrll
40 1.3.4.2 skrll struct ar2317State {
41 1.3.4.2 skrll RF_HAL_FUNCS base; /* public state, must be first */
42 1.3.4.2 skrll uint16_t pcdacTable[PWR_TABLE_SIZE_2317];
43 1.3.4.2 skrll
44 1.3.4.2 skrll uint32_t Bank1Data[N(ar5212Bank1_2317)];
45 1.3.4.2 skrll uint32_t Bank2Data[N(ar5212Bank2_2317)];
46 1.3.4.2 skrll uint32_t Bank3Data[N(ar5212Bank3_2317)];
47 1.3.4.2 skrll uint32_t Bank6Data[N(ar5212Bank6_2317)];
48 1.3.4.2 skrll uint32_t Bank7Data[N(ar5212Bank7_2317)];
49 1.3.4.2 skrll
50 1.3.4.2 skrll /*
51 1.3.4.2 skrll * Private state for reduced stack usage.
52 1.3.4.2 skrll */
53 1.3.4.2 skrll /* filled out Vpd table for all pdGains (chanL) */
54 1.3.4.2 skrll uint16_t vpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL]
55 1.3.4.2 skrll [MAX_PWR_RANGE_IN_HALF_DB];
56 1.3.4.2 skrll /* filled out Vpd table for all pdGains (chanR) */
57 1.3.4.2 skrll uint16_t vpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL]
58 1.3.4.2 skrll [MAX_PWR_RANGE_IN_HALF_DB];
59 1.3.4.2 skrll /* filled out Vpd table for all pdGains (interpolated) */
60 1.3.4.2 skrll uint16_t vpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL]
61 1.3.4.2 skrll [MAX_PWR_RANGE_IN_HALF_DB];
62 1.3.4.2 skrll };
63 1.3.4.2 skrll #define AR2317(ah) ((struct ar2317State *) AH5212(ah)->ah_rfHal)
64 1.3.4.2 skrll
65 1.3.4.2 skrll extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32,
66 1.3.4.2 skrll uint32_t numBits, uint32_t firstBit, uint32_t column);
67 1.3.4.2 skrll
68 1.3.4.2 skrll static void
69 1.3.4.2 skrll ar2317WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
70 1.3.4.2 skrll int writes)
71 1.3.4.2 skrll {
72 1.3.4.2 skrll HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2317, modesIndex, writes);
73 1.3.4.2 skrll HAL_INI_WRITE_ARRAY(ah, ar5212Common_2317, 1, writes);
74 1.3.4.2 skrll HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_2317, freqIndex, writes);
75 1.3.4.2 skrll }
76 1.3.4.2 skrll
77 1.3.4.2 skrll /*
78 1.3.4.2 skrll * Take the MHz channel value and set the Channel value
79 1.3.4.2 skrll *
80 1.3.4.2 skrll * ASSUMES: Writes enabled to analog bus
81 1.3.4.2 skrll */
82 1.3.4.2 skrll static HAL_BOOL
83 1.3.4.2 skrll ar2317SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan)
84 1.3.4.2 skrll {
85 1.3.4.2 skrll uint32_t channelSel = 0;
86 1.3.4.2 skrll uint32_t bModeSynth = 0;
87 1.3.4.2 skrll uint32_t aModeRefSel = 0;
88 1.3.4.2 skrll uint32_t reg32 = 0;
89 1.3.4.2 skrll
90 1.3.4.2 skrll OS_MARK(ah, AH_MARK_SETCHANNEL, chan->channel);
91 1.3.4.2 skrll
92 1.3.4.2 skrll if (chan->channel < 4800) {
93 1.3.4.2 skrll uint32_t txctl;
94 1.3.4.2 skrll channelSel = chan->channel - 2272 ;
95 1.3.4.2 skrll channelSel = ath_hal_reverseBits(channelSel, 8);
96 1.3.4.2 skrll
97 1.3.4.2 skrll txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
98 1.3.4.2 skrll if (chan->channel == 2484) {
99 1.3.4.2 skrll /* Enable channel spreading for channel 14 */
100 1.3.4.2 skrll OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
101 1.3.4.2 skrll txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
102 1.3.4.2 skrll } else {
103 1.3.4.2 skrll OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
104 1.3.4.2 skrll txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
105 1.3.4.2 skrll }
106 1.3.4.2 skrll } else if ((chan->channel % 20) == 0 && chan->channel >= 5120) {
107 1.3.4.2 skrll channelSel = ath_hal_reverseBits(
108 1.3.4.2 skrll ((chan->channel - 4800) / 20 << 2), 8);
109 1.3.4.2 skrll aModeRefSel = ath_hal_reverseBits(3, 2);
110 1.3.4.2 skrll } else if ((chan->channel % 10) == 0) {
111 1.3.4.2 skrll channelSel = ath_hal_reverseBits(
112 1.3.4.2 skrll ((chan->channel - 4800) / 10 << 1), 8);
113 1.3.4.2 skrll aModeRefSel = ath_hal_reverseBits(2, 2);
114 1.3.4.2 skrll } else if ((chan->channel % 5) == 0) {
115 1.3.4.2 skrll channelSel = ath_hal_reverseBits(
116 1.3.4.2 skrll (chan->channel - 4800) / 5, 8);
117 1.3.4.2 skrll aModeRefSel = ath_hal_reverseBits(1, 2);
118 1.3.4.2 skrll } else {
119 1.3.4.2 skrll HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
120 1.3.4.2 skrll __func__, chan->channel);
121 1.3.4.2 skrll return AH_FALSE;
122 1.3.4.2 skrll }
123 1.3.4.2 skrll
124 1.3.4.2 skrll reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) |
125 1.3.4.2 skrll (1 << 12) | 0x1;
126 1.3.4.2 skrll OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);
127 1.3.4.2 skrll
128 1.3.4.2 skrll reg32 >>= 8;
129 1.3.4.2 skrll OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);
130 1.3.4.2 skrll
131 1.3.4.2 skrll AH_PRIVATE(ah)->ah_curchan = chan;
132 1.3.4.2 skrll return AH_TRUE;
133 1.3.4.2 skrll }
134 1.3.4.2 skrll
135 1.3.4.2 skrll /*
136 1.3.4.2 skrll * Reads EEPROM header info from device structure and programs
137 1.3.4.2 skrll * all rf registers
138 1.3.4.2 skrll *
139 1.3.4.2 skrll * REQUIRES: Access to the analog rf device
140 1.3.4.2 skrll */
141 1.3.4.2 skrll static HAL_BOOL
142 1.3.4.2 skrll ar2317SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t modesIndex, uint16_t *rfXpdGain)
143 1.3.4.2 skrll {
144 1.3.4.2 skrll #define RF_BANK_SETUP(_priv, _ix, _col) do { \
145 1.3.4.2 skrll int i; \
146 1.3.4.2 skrll for (i = 0; i < N(ar5212Bank##_ix##_2317); i++) \
147 1.3.4.2 skrll (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_2317[i][_col];\
148 1.3.4.2 skrll } while (0)
149 1.3.4.2 skrll struct ath_hal_5212 *ahp = AH5212(ah);
150 1.3.4.2 skrll const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
151 1.3.4.2 skrll uint16_t ob2GHz = 0, db2GHz = 0;
152 1.3.4.2 skrll struct ar2317State *priv = AR2317(ah);
153 1.3.4.2 skrll int regWrites = 0;
154 1.3.4.2 skrll
155 1.3.4.2 skrll HALDEBUG(ah, HAL_DEBUG_RFPARAM,
156 1.3.4.2 skrll "%s: chan 0x%x flag 0x%x modesIndex 0x%x\n",
157 1.3.4.2 skrll __func__, chan->channel, chan->channelFlags, modesIndex);
158 1.3.4.2 skrll
159 1.3.4.2 skrll HALASSERT(priv);
160 1.3.4.2 skrll
161 1.3.4.2 skrll /* Setup rf parameters */
162 1.3.4.2 skrll switch (chan->channelFlags & CHANNEL_ALL) {
163 1.3.4.2 skrll case CHANNEL_B:
164 1.3.4.2 skrll ob2GHz = ee->ee_obFor24;
165 1.3.4.2 skrll db2GHz = ee->ee_dbFor24;
166 1.3.4.2 skrll break;
167 1.3.4.2 skrll case CHANNEL_G:
168 1.3.4.2 skrll case CHANNEL_108G:
169 1.3.4.2 skrll ob2GHz = ee->ee_obFor24g;
170 1.3.4.2 skrll db2GHz = ee->ee_dbFor24g;
171 1.3.4.2 skrll break;
172 1.3.4.2 skrll default:
173 1.3.4.2 skrll HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n",
174 1.3.4.2 skrll __func__, chan->channelFlags);
175 1.3.4.2 skrll return AH_FALSE;
176 1.3.4.2 skrll }
177 1.3.4.2 skrll
178 1.3.4.2 skrll /* Bank 1 Write */
179 1.3.4.2 skrll RF_BANK_SETUP(priv, 1, 1);
180 1.3.4.2 skrll
181 1.3.4.2 skrll /* Bank 2 Write */
182 1.3.4.2 skrll RF_BANK_SETUP(priv, 2, modesIndex);
183 1.3.4.2 skrll
184 1.3.4.2 skrll /* Bank 3 Write */
185 1.3.4.2 skrll RF_BANK_SETUP(priv, 3, modesIndex);
186 1.3.4.2 skrll
187 1.3.4.2 skrll /* Bank 6 Write */
188 1.3.4.2 skrll RF_BANK_SETUP(priv, 6, modesIndex);
189 1.3.4.2 skrll
190 1.3.4.2 skrll ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 193, 0);
191 1.3.4.2 skrll ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 190, 0);
192 1.3.4.2 skrll
193 1.3.4.2 skrll /* Bank 7 Setup */
194 1.3.4.2 skrll RF_BANK_SETUP(priv, 7, modesIndex);
195 1.3.4.2 skrll
196 1.3.4.2 skrll /* Write Analog registers */
197 1.3.4.2 skrll HAL_INI_WRITE_BANK(ah, ar5212Bank1_2317, priv->Bank1Data, regWrites);
198 1.3.4.2 skrll HAL_INI_WRITE_BANK(ah, ar5212Bank2_2317, priv->Bank2Data, regWrites);
199 1.3.4.2 skrll HAL_INI_WRITE_BANK(ah, ar5212Bank3_2317, priv->Bank3Data, regWrites);
200 1.3.4.2 skrll HAL_INI_WRITE_BANK(ah, ar5212Bank6_2317, priv->Bank6Data, regWrites);
201 1.3.4.2 skrll HAL_INI_WRITE_BANK(ah, ar5212Bank7_2317, priv->Bank7Data, regWrites);
202 1.3.4.2 skrll /* Now that we have reprogrammed rfgain value, clear the flag. */
203 1.3.4.2 skrll ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE;
204 1.3.4.2 skrll
205 1.3.4.2 skrll return AH_TRUE;
206 1.3.4.2 skrll #undef RF_BANK_SETUP
207 1.3.4.2 skrll }
208 1.3.4.2 skrll
209 1.3.4.2 skrll /*
210 1.3.4.2 skrll * Return a reference to the requested RF Bank.
211 1.3.4.2 skrll */
212 1.3.4.2 skrll static uint32_t *
213 1.3.4.2 skrll ar2317GetRfBank(struct ath_hal *ah, int bank)
214 1.3.4.2 skrll {
215 1.3.4.2 skrll struct ar2317State *priv = AR2317(ah);
216 1.3.4.2 skrll
217 1.3.4.2 skrll HALASSERT(priv != AH_NULL);
218 1.3.4.2 skrll switch (bank) {
219 1.3.4.2 skrll case 1: return priv->Bank1Data;
220 1.3.4.2 skrll case 2: return priv->Bank2Data;
221 1.3.4.2 skrll case 3: return priv->Bank3Data;
222 1.3.4.2 skrll case 6: return priv->Bank6Data;
223 1.3.4.2 skrll case 7: return priv->Bank7Data;
224 1.3.4.2 skrll }
225 1.3.4.2 skrll HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
226 1.3.4.2 skrll __func__, bank);
227 1.3.4.2 skrll return AH_NULL;
228 1.3.4.2 skrll }
229 1.3.4.2 skrll
230 1.3.4.2 skrll /*
231 1.3.4.2 skrll * Return indices surrounding the value in sorted integer lists.
232 1.3.4.2 skrll *
233 1.3.4.2 skrll * NB: the input list is assumed to be sorted in ascending order
234 1.3.4.2 skrll */
235 1.3.4.2 skrll static void
236 1.3.4.2 skrll GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize,
237 1.3.4.2 skrll uint32_t *vlo, uint32_t *vhi)
238 1.3.4.2 skrll {
239 1.3.4.2 skrll int16_t target = v;
240 1.3.4.2 skrll const int16_t *ep = lp+listSize;
241 1.3.4.2 skrll const int16_t *tp;
242 1.3.4.2 skrll
243 1.3.4.2 skrll /*
244 1.3.4.2 skrll * Check first and last elements for out-of-bounds conditions.
245 1.3.4.2 skrll */
246 1.3.4.2 skrll if (target < lp[0]) {
247 1.3.4.2 skrll *vlo = *vhi = 0;
248 1.3.4.2 skrll return;
249 1.3.4.2 skrll }
250 1.3.4.2 skrll if (target >= ep[-1]) {
251 1.3.4.2 skrll *vlo = *vhi = listSize - 1;
252 1.3.4.2 skrll return;
253 1.3.4.2 skrll }
254 1.3.4.2 skrll
255 1.3.4.2 skrll /* look for value being near or between 2 values in list */
256 1.3.4.2 skrll for (tp = lp; tp < ep; tp++) {
257 1.3.4.2 skrll /*
258 1.3.4.2 skrll * If value is close to the current value of the list
259 1.3.4.2 skrll * then target is not between values, it is one of the values
260 1.3.4.2 skrll */
261 1.3.4.2 skrll if (*tp == target) {
262 1.3.4.2 skrll *vlo = *vhi = tp - (const int16_t *) lp;
263 1.3.4.2 skrll return;
264 1.3.4.2 skrll }
265 1.3.4.2 skrll /*
266 1.3.4.2 skrll * Look for value being between current value and next value
267 1.3.4.2 skrll * if so return these 2 values
268 1.3.4.2 skrll */
269 1.3.4.2 skrll if (target < tp[1]) {
270 1.3.4.2 skrll *vlo = tp - (const int16_t *) lp;
271 1.3.4.2 skrll *vhi = *vlo + 1;
272 1.3.4.2 skrll return;
273 1.3.4.2 skrll }
274 1.3.4.2 skrll }
275 1.3.4.2 skrll }
276 1.3.4.2 skrll
277 1.3.4.2 skrll /*
278 1.3.4.2 skrll * Fill the Vpdlist for indices Pmax-Pmin
279 1.3.4.2 skrll */
280 1.3.4.2 skrll static HAL_BOOL
281 1.3.4.2 skrll ar2317FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t Pmax,
282 1.3.4.2 skrll const int16_t *pwrList, const int16_t *VpdList,
283 1.3.4.2 skrll uint16_t numIntercepts, uint16_t retVpdList[][64])
284 1.3.4.2 skrll {
285 1.3.4.2 skrll uint16_t ii, jj, kk;
286 1.3.4.2 skrll int16_t currPwr = (int16_t)(2*Pmin);
287 1.3.4.2 skrll /* since Pmin is pwr*2 and pwrList is 4*pwr */
288 1.3.4.2 skrll uint32_t idxL = 0, idxR = 0;
289 1.3.4.2 skrll
290 1.3.4.2 skrll ii = 0;
291 1.3.4.2 skrll jj = 0;
292 1.3.4.2 skrll
293 1.3.4.2 skrll if (numIntercepts < 2)
294 1.3.4.2 skrll return AH_FALSE;
295 1.3.4.2 skrll
296 1.3.4.2 skrll while (ii <= (uint16_t)(Pmax - Pmin)) {
297 1.3.4.2 skrll GetLowerUpperIndex(currPwr, pwrList, numIntercepts,
298 1.3.4.2 skrll &(idxL), &(idxR));
299 1.3.4.2 skrll if (idxR < 1)
300 1.3.4.2 skrll idxR = 1; /* extrapolate below */
301 1.3.4.2 skrll if (idxL == (uint32_t)(numIntercepts - 1))
302 1.3.4.2 skrll idxL = numIntercepts - 2; /* extrapolate above */
303 1.3.4.2 skrll if (pwrList[idxL] == pwrList[idxR])
304 1.3.4.2 skrll kk = VpdList[idxL];
305 1.3.4.2 skrll else
306 1.3.4.2 skrll kk = (uint16_t)
307 1.3.4.2 skrll (((currPwr - pwrList[idxL])*VpdList[idxR]+
308 1.3.4.2 skrll (pwrList[idxR] - currPwr)*VpdList[idxL])/
309 1.3.4.2 skrll (pwrList[idxR] - pwrList[idxL]));
310 1.3.4.2 skrll retVpdList[pdGainIdx][ii] = kk;
311 1.3.4.2 skrll ii++;
312 1.3.4.2 skrll currPwr += 2; /* half dB steps */
313 1.3.4.2 skrll }
314 1.3.4.2 skrll
315 1.3.4.2 skrll return AH_TRUE;
316 1.3.4.2 skrll }
317 1.3.4.2 skrll
318 1.3.4.2 skrll /*
319 1.3.4.2 skrll * Returns interpolated or the scaled up interpolated value
320 1.3.4.2 skrll */
321 1.3.4.2 skrll static int16_t
322 1.3.4.2 skrll interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight,
323 1.3.4.2 skrll int16_t targetLeft, int16_t targetRight)
324 1.3.4.2 skrll {
325 1.3.4.2 skrll int16_t rv;
326 1.3.4.2 skrll
327 1.3.4.2 skrll if (srcRight != srcLeft) {
328 1.3.4.2 skrll rv = ((target - srcLeft)*targetRight +
329 1.3.4.2 skrll (srcRight - target)*targetLeft) / (srcRight - srcLeft);
330 1.3.4.2 skrll } else {
331 1.3.4.2 skrll rv = targetLeft;
332 1.3.4.2 skrll }
333 1.3.4.2 skrll return rv;
334 1.3.4.2 skrll }
335 1.3.4.2 skrll
336 1.3.4.2 skrll /*
337 1.3.4.2 skrll * Uses the data points read from EEPROM to reconstruct the pdadc power table
338 1.3.4.2 skrll * Called by ar2317SetPowerTable()
339 1.3.4.2 skrll */
340 1.3.4.2 skrll static int
341 1.3.4.2 skrll ar2317getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
342 1.3.4.2 skrll const RAW_DATA_STRUCT_2317 *pRawDataset,
343 1.3.4.2 skrll uint16_t pdGainOverlap_t2,
344 1.3.4.2 skrll int16_t *pMinCalPower, uint16_t pPdGainBoundaries[],
345 1.3.4.2 skrll uint16_t pPdGainValues[], uint16_t pPDADCValues[])
346 1.3.4.2 skrll {
347 1.3.4.2 skrll struct ar2317State *priv = AR2317(ah);
348 1.3.4.2 skrll #define VpdTable_L priv->vpdTable_L
349 1.3.4.2 skrll #define VpdTable_R priv->vpdTable_R
350 1.3.4.2 skrll #define VpdTable_I priv->vpdTable_I
351 1.3.4.2 skrll /* XXX excessive stack usage? */
352 1.3.4.2 skrll uint32_t ii, jj, kk;
353 1.3.4.2 skrll int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */
354 1.3.4.2 skrll uint32_t idxL = 0, idxR = 0;
355 1.3.4.2 skrll uint32_t numPdGainsUsed = 0;
356 1.3.4.2 skrll /*
357 1.3.4.2 skrll * If desired to support -ve power levels in future, just
358 1.3.4.2 skrll * change pwr_I_0 to signed 5-bits.
359 1.3.4.2 skrll */
360 1.3.4.2 skrll int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
361 1.3.4.2 skrll /* to accomodate -ve power levels later on. */
362 1.3.4.2 skrll int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
363 1.3.4.2 skrll /* to accomodate -ve power levels later on */
364 1.3.4.2 skrll uint16_t numVpd = 0;
365 1.3.4.2 skrll uint16_t Vpd_step;
366 1.3.4.2 skrll int16_t tmpVal ;
367 1.3.4.2 skrll uint32_t sizeCurrVpdTable, maxIndex, tgtIndex;
368 1.3.4.2 skrll
369 1.3.4.2 skrll /* Get upper lower index */
370 1.3.4.2 skrll GetLowerUpperIndex(channel, pRawDataset->pChannels,
371 1.3.4.2 skrll pRawDataset->numChannels, &(idxL), &(idxR));
372 1.3.4.2 skrll
373 1.3.4.2 skrll for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
374 1.3.4.2 skrll jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
375 1.3.4.2 skrll /* work backwards 'cause highest pdGain for lowest power */
376 1.3.4.2 skrll numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd;
377 1.3.4.2 skrll if (numVpd > 0) {
378 1.3.4.2 skrll pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain;
379 1.3.4.2 skrll Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0];
380 1.3.4.2 skrll if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) {
381 1.3.4.2 skrll Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0];
382 1.3.4.2 skrll }
383 1.3.4.2 skrll Pmin_t2[numPdGainsUsed] = (int16_t)
384 1.3.4.2 skrll (Pmin_t2[numPdGainsUsed] / 2);
385 1.3.4.2 skrll Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1];
386 1.3.4.2 skrll if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1])
387 1.3.4.2 skrll Pmax_t2[numPdGainsUsed] =
388 1.3.4.2 skrll pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1];
389 1.3.4.2 skrll Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2);
390 1.3.4.2 skrll ar2317FillVpdTable(
391 1.3.4.2 skrll numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
392 1.3.4.2 skrll &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]),
393 1.3.4.2 skrll &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L
394 1.3.4.2 skrll );
395 1.3.4.2 skrll ar2317FillVpdTable(
396 1.3.4.2 skrll numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
397 1.3.4.2 skrll &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]),
398 1.3.4.2 skrll &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R
399 1.3.4.2 skrll );
400 1.3.4.2 skrll for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) {
401 1.3.4.2 skrll VpdTable_I[numPdGainsUsed][kk] =
402 1.3.4.2 skrll interpolate_signed(
403 1.3.4.2 skrll channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR],
404 1.3.4.2 skrll (int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]);
405 1.3.4.2 skrll }
406 1.3.4.2 skrll /* fill VpdTable_I for this pdGain */
407 1.3.4.2 skrll numPdGainsUsed++;
408 1.3.4.2 skrll }
409 1.3.4.2 skrll /* if this pdGain is used */
410 1.3.4.2 skrll }
411 1.3.4.2 skrll
412 1.3.4.2 skrll *pMinCalPower = Pmin_t2[0];
413 1.3.4.2 skrll kk = 0; /* index for the final table */
414 1.3.4.2 skrll for (ii = 0; ii < numPdGainsUsed; ii++) {
415 1.3.4.2 skrll if (ii == (numPdGainsUsed - 1))
416 1.3.4.2 skrll pPdGainBoundaries[ii] = Pmax_t2[ii] +
417 1.3.4.2 skrll PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB;
418 1.3.4.2 skrll else
419 1.3.4.2 skrll pPdGainBoundaries[ii] = (uint16_t)
420 1.3.4.2 skrll ((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 );
421 1.3.4.2 skrll if (pPdGainBoundaries[ii] > 63) {
422 1.3.4.2 skrll HALDEBUG(ah, HAL_DEBUG_ANY,
423 1.3.4.2 skrll "%s: clamp pPdGainBoundaries[%d] %d\n",
424 1.3.4.2 skrll __func__, ii, pPdGainBoundaries[ii]);/*XXX*/
425 1.3.4.2 skrll pPdGainBoundaries[ii] = 63;
426 1.3.4.2 skrll }
427 1.3.4.2 skrll
428 1.3.4.2 skrll /* Find starting index for this pdGain */
429 1.3.4.2 skrll if (ii == 0)
430 1.3.4.2 skrll ss = 0; /* for the first pdGain, start from index 0 */
431 1.3.4.2 skrll else
432 1.3.4.2 skrll ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) -
433 1.3.4.2 skrll pdGainOverlap_t2;
434 1.3.4.2 skrll Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]);
435 1.3.4.2 skrll Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
436 1.3.4.2 skrll /*
437 1.3.4.2 skrll *-ve ss indicates need to extrapolate data below for this pdGain
438 1.3.4.2 skrll */
439 1.3.4.2 skrll while (ss < 0) {
440 1.3.4.2 skrll tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step);
441 1.3.4.2 skrll pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal);
442 1.3.4.2 skrll ss++;
443 1.3.4.2 skrll }
444 1.3.4.2 skrll
445 1.3.4.2 skrll sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii];
446 1.3.4.2 skrll tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii];
447 1.3.4.2 skrll maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable;
448 1.3.4.2 skrll
449 1.3.4.2 skrll while (ss < (int16_t)maxIndex)
450 1.3.4.2 skrll pPDADCValues[kk++] = VpdTable_I[ii][ss++];
451 1.3.4.2 skrll
452 1.3.4.2 skrll Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] -
453 1.3.4.2 skrll VpdTable_I[ii][sizeCurrVpdTable-2]);
454 1.3.4.2 skrll Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
455 1.3.4.2 skrll /*
456 1.3.4.2 skrll * for last gain, pdGainBoundary == Pmax_t2, so will
457 1.3.4.2 skrll * have to extrapolate
458 1.3.4.2 skrll */
459 1.3.4.2 skrll if (tgtIndex > maxIndex) { /* need to extrapolate above */
460 1.3.4.2 skrll while(ss < (int16_t)tgtIndex) {
461 1.3.4.2 skrll tmpVal = (uint16_t)
462 1.3.4.2 skrll (VpdTable_I[ii][sizeCurrVpdTable-1] +
463 1.3.4.2 skrll (ss-maxIndex)*Vpd_step);
464 1.3.4.2 skrll pPDADCValues[kk++] = (tmpVal > 127) ?
465 1.3.4.2 skrll 127 : tmpVal;
466 1.3.4.2 skrll ss++;
467 1.3.4.2 skrll }
468 1.3.4.2 skrll } /* extrapolated above */
469 1.3.4.2 skrll } /* for all pdGainUsed */
470 1.3.4.2 skrll
471 1.3.4.2 skrll while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) {
472 1.3.4.2 skrll pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1];
473 1.3.4.2 skrll ii++;
474 1.3.4.2 skrll }
475 1.3.4.2 skrll while (kk < 128) {
476 1.3.4.2 skrll pPDADCValues[kk] = pPDADCValues[kk-1];
477 1.3.4.2 skrll kk++;
478 1.3.4.2 skrll }
479 1.3.4.2 skrll
480 1.3.4.2 skrll return numPdGainsUsed;
481 1.3.4.2 skrll #undef VpdTable_L
482 1.3.4.2 skrll #undef VpdTable_R
483 1.3.4.2 skrll #undef VpdTable_I
484 1.3.4.2 skrll }
485 1.3.4.2 skrll
486 1.3.4.2 skrll static HAL_BOOL
487 1.3.4.2 skrll ar2317SetPowerTable(struct ath_hal *ah,
488 1.3.4.2 skrll int16_t *minPower, int16_t *maxPower, HAL_CHANNEL_INTERNAL *chan,
489 1.3.4.2 skrll uint16_t *rfXpdGain)
490 1.3.4.2 skrll {
491 1.3.4.2 skrll struct ath_hal_5212 *ahp = AH5212(ah);
492 1.3.4.2 skrll const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
493 1.3.4.2 skrll const RAW_DATA_STRUCT_2317 *pRawDataset = AH_NULL;
494 1.3.4.2 skrll uint16_t pdGainOverlap_t2;
495 1.3.4.2 skrll int16_t minCalPower2317_t2;
496 1.3.4.2 skrll uint16_t *pdadcValues = ahp->ah_pcdacTable;
497 1.3.4.2 skrll uint16_t gainBoundaries[4];
498 1.3.4.2 skrll uint32_t reg32, regoffset;
499 1.3.4.2 skrll int i, numPdGainsUsed;
500 1.3.4.2 skrll #ifndef AH_USE_INIPDGAIN
501 1.3.4.2 skrll uint32_t tpcrg1;
502 1.3.4.2 skrll #endif
503 1.3.4.2 skrll
504 1.3.4.2 skrll HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan 0x%x flag 0x%x\n",
505 1.3.4.2 skrll __func__, chan->channel,chan->channelFlags);
506 1.3.4.2 skrll
507 1.3.4.2 skrll if (IS_CHAN_G(chan) || IS_CHAN_108G(chan))
508 1.3.4.2 skrll pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
509 1.3.4.2 skrll else if (IS_CHAN_B(chan))
510 1.3.4.2 skrll pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
511 1.3.4.2 skrll else {
512 1.3.4.2 skrll HALDEBUG(ah, HAL_DEBUG_ANY, "%s: illegal mode\n", __func__);
513 1.3.4.2 skrll return AH_FALSE;
514 1.3.4.2 skrll }
515 1.3.4.2 skrll
516 1.3.4.2 skrll pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5),
517 1.3.4.2 skrll AR_PHY_TPCRG5_PD_GAIN_OVERLAP);
518 1.3.4.2 skrll
519 1.3.4.2 skrll numPdGainsUsed = ar2317getGainBoundariesAndPdadcsForPowers(ah,
520 1.3.4.2 skrll chan->channel, pRawDataset, pdGainOverlap_t2,
521 1.3.4.2 skrll &minCalPower2317_t2,gainBoundaries, rfXpdGain, pdadcValues);
522 1.3.4.2 skrll HALASSERT(1 <= numPdGainsUsed && numPdGainsUsed <= 3);
523 1.3.4.2 skrll
524 1.3.4.2 skrll #ifdef AH_USE_INIPDGAIN
525 1.3.4.2 skrll /*
526 1.3.4.2 skrll * Use pd_gains curve from eeprom; Atheros always uses
527 1.3.4.2 skrll * the default curve from the ini file but some vendors
528 1.3.4.2 skrll * (e.g. Zcomax) want to override this curve and not
529 1.3.4.2 skrll * honoring their settings results in tx power 5dBm low.
530 1.3.4.2 skrll */
531 1.3.4.2 skrll OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
532 1.3.4.2 skrll (pRawDataset->pDataPerChannel[0].numPdGains - 1));
533 1.3.4.2 skrll #else
534 1.3.4.2 skrll tpcrg1 = OS_REG_READ(ah, AR_PHY_TPCRG1);
535 1.3.4.2 skrll tpcrg1 = (tpcrg1 &~ AR_PHY_TPCRG1_NUM_PD_GAIN)
536 1.3.4.2 skrll | SM(numPdGainsUsed-1, AR_PHY_TPCRG1_NUM_PD_GAIN);
537 1.3.4.2 skrll switch (numPdGainsUsed) {
538 1.3.4.2 skrll case 3:
539 1.3.4.2 skrll tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING3;
540 1.3.4.2 skrll tpcrg1 |= SM(rfXpdGain[2], AR_PHY_TPCRG1_PDGAIN_SETTING3);
541 1.3.4.2 skrll /* fall thru... */
542 1.3.4.2 skrll case 2:
543 1.3.4.2 skrll tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING2;
544 1.3.4.2 skrll tpcrg1 |= SM(rfXpdGain[1], AR_PHY_TPCRG1_PDGAIN_SETTING2);
545 1.3.4.2 skrll /* fall thru... */
546 1.3.4.2 skrll case 1:
547 1.3.4.2 skrll tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING1;
548 1.3.4.2 skrll tpcrg1 |= SM(rfXpdGain[0], AR_PHY_TPCRG1_PDGAIN_SETTING1);
549 1.3.4.2 skrll break;
550 1.3.4.2 skrll }
551 1.3.4.2 skrll #ifdef AH_DEBUG
552 1.3.4.2 skrll if (tpcrg1 != OS_REG_READ(ah, AR_PHY_TPCRG1))
553 1.3.4.2 skrll HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: using non-default "
554 1.3.4.2 skrll "pd_gains (default 0x%x, calculated 0x%x)\n",
555 1.3.4.2 skrll __func__, OS_REG_READ(ah, AR_PHY_TPCRG1), tpcrg1);
556 1.3.4.2 skrll #endif
557 1.3.4.2 skrll OS_REG_WRITE(ah, AR_PHY_TPCRG1, tpcrg1);
558 1.3.4.2 skrll #endif
559 1.3.4.2 skrll
560 1.3.4.2 skrll /*
561 1.3.4.2 skrll * Note the pdadc table may not start at 0 dBm power, could be
562 1.3.4.2 skrll * negative or greater than 0. Need to offset the power
563 1.3.4.2 skrll * values by the amount of minPower for griffin
564 1.3.4.2 skrll */
565 1.3.4.2 skrll if (minCalPower2317_t2 != 0)
566 1.3.4.2 skrll ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower2317_t2);
567 1.3.4.2 skrll else
568 1.3.4.2 skrll ahp->ah_txPowerIndexOffset = 0;
569 1.3.4.2 skrll
570 1.3.4.2 skrll /* Finally, write the power values into the baseband power table */
571 1.3.4.2 skrll regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */
572 1.3.4.2 skrll for (i = 0; i < 32; i++) {
573 1.3.4.2 skrll reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) |
574 1.3.4.2 skrll ((pdadcValues[4*i + 1] & 0xFF) << 8) |
575 1.3.4.2 skrll ((pdadcValues[4*i + 2] & 0xFF) << 16) |
576 1.3.4.2 skrll ((pdadcValues[4*i + 3] & 0xFF) << 24) ;
577 1.3.4.2 skrll OS_REG_WRITE(ah, regoffset, reg32);
578 1.3.4.2 skrll regoffset += 4;
579 1.3.4.2 skrll }
580 1.3.4.2 skrll
581 1.3.4.2 skrll OS_REG_WRITE(ah, AR_PHY_TPCRG5,
582 1.3.4.2 skrll SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |
583 1.3.4.2 skrll SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) |
584 1.3.4.2 skrll SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) |
585 1.3.4.2 skrll SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) |
586 1.3.4.2 skrll SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));
587 1.3.4.2 skrll
588 1.3.4.2 skrll return AH_TRUE;
589 1.3.4.2 skrll }
590 1.3.4.2 skrll
591 1.3.4.2 skrll static int16_t
592 1.3.4.2 skrll ar2317GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2317 *data)
593 1.3.4.2 skrll {
594 1.3.4.2 skrll uint32_t ii,jj;
595 1.3.4.2 skrll uint16_t Pmin=0,numVpd;
596 1.3.4.2 skrll
597 1.3.4.2 skrll for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
598 1.3.4.2 skrll jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
599 1.3.4.2 skrll /* work backwards 'cause highest pdGain for lowest power */
600 1.3.4.2 skrll numVpd = data->pDataPerPDGain[jj].numVpd;
601 1.3.4.2 skrll if (numVpd > 0) {
602 1.3.4.2 skrll Pmin = data->pDataPerPDGain[jj].pwr_t4[0];
603 1.3.4.2 skrll return(Pmin);
604 1.3.4.2 skrll }
605 1.3.4.2 skrll }
606 1.3.4.2 skrll return(Pmin);
607 1.3.4.2 skrll }
608 1.3.4.2 skrll
609 1.3.4.2 skrll static int16_t
610 1.3.4.2 skrll ar2317GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2317 *data)
611 1.3.4.2 skrll {
612 1.3.4.2 skrll uint32_t ii;
613 1.3.4.2 skrll uint16_t Pmax=0,numVpd;
614 1.3.4.2 skrll uint16_t vpdmax;
615 1.3.4.2 skrll
616 1.3.4.2 skrll for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
617 1.3.4.2 skrll /* work forwards cuase lowest pdGain for highest power */
618 1.3.4.2 skrll numVpd = data->pDataPerPDGain[ii].numVpd;
619 1.3.4.2 skrll if (numVpd > 0) {
620 1.3.4.2 skrll Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1];
621 1.3.4.2 skrll vpdmax = data->pDataPerPDGain[ii].Vpd[numVpd-1];
622 1.3.4.2 skrll return(Pmax);
623 1.3.4.2 skrll }
624 1.3.4.2 skrll }
625 1.3.4.2 skrll return(Pmax);
626 1.3.4.2 skrll }
627 1.3.4.2 skrll
628 1.3.4.2 skrll static HAL_BOOL
629 1.3.4.2 skrll ar2317GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan,
630 1.3.4.2 skrll int16_t *maxPow, int16_t *minPow)
631 1.3.4.2 skrll {
632 1.3.4.2 skrll const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
633 1.3.4.2 skrll const RAW_DATA_STRUCT_2317 *pRawDataset = AH_NULL;
634 1.3.4.2 skrll const RAW_DATA_PER_CHANNEL_2317 *data=AH_NULL;
635 1.3.4.2 skrll uint16_t numChannels;
636 1.3.4.2 skrll int totalD,totalF, totalMin,last, i;
637 1.3.4.2 skrll
638 1.3.4.2 skrll *maxPow = 0;
639 1.3.4.2 skrll
640 1.3.4.2 skrll if (IS_CHAN_G(chan) || IS_CHAN_108G(chan))
641 1.3.4.2 skrll pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
642 1.3.4.2 skrll else if (IS_CHAN_B(chan))
643 1.3.4.2 skrll pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
644 1.3.4.2 skrll else
645 1.3.4.2 skrll return(AH_FALSE);
646 1.3.4.2 skrll
647 1.3.4.2 skrll numChannels = pRawDataset->numChannels;
648 1.3.4.2 skrll data = pRawDataset->pDataPerChannel;
649 1.3.4.2 skrll
650 1.3.4.2 skrll /* Make sure the channel is in the range of the TP values
651 1.3.4.2 skrll * (freq piers)
652 1.3.4.2 skrll */
653 1.3.4.2 skrll if (numChannels < 1)
654 1.3.4.2 skrll return(AH_FALSE);
655 1.3.4.2 skrll
656 1.3.4.2 skrll if ((chan->channel < data[0].channelValue) ||
657 1.3.4.2 skrll (chan->channel > data[numChannels-1].channelValue)) {
658 1.3.4.2 skrll if (chan->channel < data[0].channelValue) {
659 1.3.4.2 skrll *maxPow = ar2317GetMaxPower(ah, &data[0]);
660 1.3.4.2 skrll *minPow = ar2317GetMinPower(ah, &data[0]);
661 1.3.4.2 skrll return(AH_TRUE);
662 1.3.4.2 skrll } else {
663 1.3.4.2 skrll *maxPow = ar2317GetMaxPower(ah, &data[numChannels - 1]);
664 1.3.4.2 skrll *minPow = ar2317GetMinPower(ah, &data[numChannels - 1]);
665 1.3.4.2 skrll return(AH_TRUE);
666 1.3.4.2 skrll }
667 1.3.4.2 skrll }
668 1.3.4.2 skrll
669 1.3.4.2 skrll /* Linearly interpolate the power value now */
670 1.3.4.2 skrll for (last=0,i=0; (i<numChannels) && (chan->channel > data[i].channelValue);
671 1.3.4.2 skrll last = i++);
672 1.3.4.2 skrll totalD = data[i].channelValue - data[last].channelValue;
673 1.3.4.2 skrll if (totalD > 0) {
674 1.3.4.2 skrll totalF = ar2317GetMaxPower(ah, &data[i]) - ar2317GetMaxPower(ah, &data[last]);
675 1.3.4.2 skrll *maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) +
676 1.3.4.2 skrll ar2317GetMaxPower(ah, &data[last])*totalD)/totalD);
677 1.3.4.2 skrll totalMin = ar2317GetMinPower(ah, &data[i]) - ar2317GetMinPower(ah, &data[last]);
678 1.3.4.2 skrll *minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) +
679 1.3.4.2 skrll ar2317GetMinPower(ah, &data[last])*totalD)/totalD);
680 1.3.4.2 skrll return(AH_TRUE);
681 1.3.4.2 skrll } else {
682 1.3.4.2 skrll if (chan->channel == data[i].channelValue) {
683 1.3.4.2 skrll *maxPow = ar2317GetMaxPower(ah, &data[i]);
684 1.3.4.2 skrll *minPow = ar2317GetMinPower(ah, &data[i]);
685 1.3.4.2 skrll return(AH_TRUE);
686 1.3.4.2 skrll } else
687 1.3.4.2 skrll return(AH_FALSE);
688 1.3.4.2 skrll }
689 1.3.4.2 skrll }
690 1.3.4.2 skrll
691 1.3.4.2 skrll /*
692 1.3.4.2 skrll * Free memory for analog bank scratch buffers
693 1.3.4.2 skrll */
694 1.3.4.2 skrll static void
695 1.3.4.2 skrll ar2317RfDetach(struct ath_hal *ah)
696 1.3.4.2 skrll {
697 1.3.4.2 skrll struct ath_hal_5212 *ahp = AH5212(ah);
698 1.3.4.2 skrll
699 1.3.4.2 skrll HALASSERT(ahp->ah_rfHal != AH_NULL);
700 1.3.4.2 skrll ath_hal_free(ahp->ah_rfHal);
701 1.3.4.2 skrll ahp->ah_rfHal = AH_NULL;
702 1.3.4.2 skrll }
703 1.3.4.2 skrll
704 1.3.4.2 skrll /*
705 1.3.4.2 skrll * Allocate memory for analog bank scratch buffers
706 1.3.4.2 skrll * Scratch Buffer will be reinitialized every reset so no need to zero now
707 1.3.4.2 skrll */
708 1.3.4.2 skrll static HAL_BOOL
709 1.3.4.2 skrll ar2317RfAttach(struct ath_hal *ah, HAL_STATUS *status)
710 1.3.4.2 skrll {
711 1.3.4.2 skrll struct ath_hal_5212 *ahp = AH5212(ah);
712 1.3.4.2 skrll struct ar2317State *priv;
713 1.3.4.2 skrll
714 1.3.4.2 skrll HALASSERT(ah->ah_magic == AR5212_MAGIC);
715 1.3.4.2 skrll
716 1.3.4.2 skrll HALASSERT(ahp->ah_rfHal == AH_NULL);
717 1.3.4.2 skrll priv = ath_hal_malloc(sizeof(struct ar2317State));
718 1.3.4.2 skrll if (priv == AH_NULL) {
719 1.3.4.2 skrll HALDEBUG(ah, HAL_DEBUG_ANY,
720 1.3.4.2 skrll "%s: cannot allocate private state\n", __func__);
721 1.3.4.2 skrll *status = HAL_ENOMEM; /* XXX */
722 1.3.4.2 skrll return AH_FALSE;
723 1.3.4.2 skrll }
724 1.3.4.2 skrll priv->base.rfDetach = ar2317RfDetach;
725 1.3.4.2 skrll priv->base.writeRegs = ar2317WriteRegs;
726 1.3.4.2 skrll priv->base.getRfBank = ar2317GetRfBank;
727 1.3.4.2 skrll priv->base.setChannel = ar2317SetChannel;
728 1.3.4.2 skrll priv->base.setRfRegs = ar2317SetRfRegs;
729 1.3.4.2 skrll priv->base.setPowerTable = ar2317SetPowerTable;
730 1.3.4.2 skrll priv->base.getChannelMaxMinPower = ar2317GetChannelMaxMinPower;
731 1.3.4.2 skrll priv->base.getNfAdjust = ar5212GetNfAdjust;
732 1.3.4.2 skrll
733 1.3.4.2 skrll ahp->ah_pcdacTable = priv->pcdacTable;
734 1.3.4.2 skrll ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
735 1.3.4.2 skrll ahp->ah_rfHal = &priv->base;
736 1.3.4.2 skrll
737 1.3.4.2 skrll return AH_TRUE;
738 1.3.4.2 skrll }
739 1.3.4.2 skrll
740 1.3.4.2 skrll static HAL_BOOL
741 1.3.4.2 skrll ar2317Probe(struct ath_hal *ah)
742 1.3.4.2 skrll {
743 1.3.4.2 skrll return IS_2317(ah);
744 1.3.4.2 skrll }
745 1.3.4.2 skrll AH_RF(RF2317, ar2317Probe, ar2317RfAttach);
746