ar2425.c revision 1.2.4.2 1 1.2.4.2 skrll /*
2 1.2.4.2 skrll * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
3 1.2.4.2 skrll * Copyright (c) 2002-2008 Atheros Communications, Inc.
4 1.2.4.2 skrll *
5 1.2.4.2 skrll * Permission to use, copy, modify, and/or distribute this software for any
6 1.2.4.2 skrll * purpose with or without fee is hereby granted, provided that the above
7 1.2.4.2 skrll * copyright notice and this permission notice appear in all copies.
8 1.2.4.2 skrll *
9 1.2.4.2 skrll * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 1.2.4.2 skrll * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 1.2.4.2 skrll * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 1.2.4.2 skrll * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 1.2.4.2 skrll * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 1.2.4.2 skrll * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 1.2.4.2 skrll * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 1.2.4.2 skrll *
17 1.2.4.2 skrll * $Id: ar2425.c,v 1.2.4.2 2009/01/19 13:19:26 skrll Exp $
18 1.2.4.2 skrll */
19 1.2.4.2 skrll #include "opt_ah.h"
20 1.2.4.2 skrll
21 1.2.4.2 skrll #include "ah.h"
22 1.2.4.2 skrll #include "ah_internal.h"
23 1.2.4.2 skrll
24 1.2.4.2 skrll #include "ar5212/ar5212.h"
25 1.2.4.2 skrll #include "ar5212/ar5212reg.h"
26 1.2.4.2 skrll #include "ar5212/ar5212phy.h"
27 1.2.4.2 skrll
28 1.2.4.2 skrll #include "ah_eeprom_v3.h"
29 1.2.4.2 skrll
30 1.2.4.2 skrll #define AH_5212_2425
31 1.2.4.2 skrll #define AH_5212_2417
32 1.2.4.2 skrll #include "ar5212/ar5212.ini"
33 1.2.4.2 skrll
34 1.2.4.2 skrll #define N(a) (sizeof(a)/sizeof(a[0]))
35 1.2.4.2 skrll
36 1.2.4.2 skrll struct ar2425State {
37 1.2.4.2 skrll RF_HAL_FUNCS base; /* public state, must be first */
38 1.2.4.2 skrll uint16_t pcdacTable[PWR_TABLE_SIZE_2413];
39 1.2.4.2 skrll
40 1.2.4.2 skrll uint32_t Bank1Data[N(ar5212Bank1_2425)];
41 1.2.4.2 skrll uint32_t Bank2Data[N(ar5212Bank2_2425)];
42 1.2.4.2 skrll uint32_t Bank3Data[N(ar5212Bank3_2425)];
43 1.2.4.2 skrll uint32_t Bank6Data[N(ar5212Bank6_2425)]; /* 2417 is same size */
44 1.2.4.2 skrll uint32_t Bank7Data[N(ar5212Bank7_2425)];
45 1.2.4.2 skrll };
46 1.2.4.2 skrll #define AR2425(ah) ((struct ar2425State *) AH5212(ah)->ah_rfHal)
47 1.2.4.2 skrll
48 1.2.4.2 skrll extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32,
49 1.2.4.2 skrll uint32_t numBits, uint32_t firstBit, uint32_t column);
50 1.2.4.2 skrll
51 1.2.4.2 skrll static void
52 1.2.4.2 skrll ar2425WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
53 1.2.4.2 skrll int writes)
54 1.2.4.2 skrll {
55 1.2.4.2 skrll HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2425, modesIndex, writes);
56 1.2.4.2 skrll HAL_INI_WRITE_ARRAY(ah, ar5212Common_2425, 1, writes);
57 1.2.4.2 skrll HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_2425, freqIndex, writes);
58 1.2.4.2 skrll #if 0
59 1.2.4.2 skrll /*
60 1.2.4.2 skrll * for SWAN similar to Condor
61 1.2.4.2 skrll * Bit 0 enables link to go to L1 when MAC goes to sleep.
62 1.2.4.2 skrll * Bit 3 enables the loop back the link down to reset.
63 1.2.4.2 skrll */
64 1.2.4.2 skrll if (IS_PCIE(ah) && ath_hal_pcieL1SKPEnable) {
65 1.2.4.2 skrll OS_REG_WRITE(ah, AR_PCIE_PMC,
66 1.2.4.2 skrll AR_PCIE_PMC_ENA_L1 | AR_PCIE_PMC_ENA_RESET);
67 1.2.4.2 skrll }
68 1.2.4.2 skrll /*
69 1.2.4.2 skrll * for Standby issue in Swan/Condor.
70 1.2.4.2 skrll * Bit 9 (MAC_WOW_PWR_STATE_MASK_D2)to be set to avoid skips
71 1.2.4.2 skrll * before last Training Sequence 2 (TS2)
72 1.2.4.2 skrll * Bit 8 (MAC_WOW_PWR_STATE_MASK_D1)to be unset to assert
73 1.2.4.2 skrll * Power Reset along with PCI Reset
74 1.2.4.2 skrll */
75 1.2.4.2 skrll OS_REG_SET_BIT(ah, AR_PCIE_PMC, MAC_WOW_PWR_STATE_MASK_D2);
76 1.2.4.2 skrll #endif
77 1.2.4.2 skrll }
78 1.2.4.2 skrll
79 1.2.4.2 skrll /*
80 1.2.4.2 skrll * Take the MHz channel value and set the Channel value
81 1.2.4.2 skrll *
82 1.2.4.2 skrll * ASSUMES: Writes enabled to analog bus
83 1.2.4.2 skrll */
84 1.2.4.2 skrll static HAL_BOOL
85 1.2.4.2 skrll ar2425SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan)
86 1.2.4.2 skrll {
87 1.2.4.2 skrll uint32_t channelSel = 0;
88 1.2.4.2 skrll uint32_t bModeSynth = 0;
89 1.2.4.2 skrll uint32_t aModeRefSel = 0;
90 1.2.4.2 skrll uint32_t reg32 = 0;
91 1.2.4.2 skrll uint16_t freq;
92 1.2.4.2 skrll
93 1.2.4.2 skrll OS_MARK(ah, AH_MARK_SETCHANNEL, chan->channel);
94 1.2.4.2 skrll
95 1.2.4.2 skrll if (chan->channel < 4800) {
96 1.2.4.2 skrll uint32_t txctl;
97 1.2.4.2 skrll
98 1.2.4.2 skrll channelSel = chan->channel - 2272;
99 1.2.4.2 skrll channelSel = ath_hal_reverseBits(channelSel, 8);
100 1.2.4.2 skrll
101 1.2.4.2 skrll txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
102 1.2.4.2 skrll if (chan->channel == 2484) {
103 1.2.4.2 skrll // Enable channel spreading for channel 14
104 1.2.4.2 skrll OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
105 1.2.4.2 skrll txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
106 1.2.4.2 skrll } else {
107 1.2.4.2 skrll OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
108 1.2.4.2 skrll txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
109 1.2.4.2 skrll }
110 1.2.4.2 skrll
111 1.2.4.2 skrll } else if (((chan->channel % 5) == 2) && (chan->channel <= 5435)) {
112 1.2.4.2 skrll freq = chan->channel - 2; /* Align to even 5MHz raster */
113 1.2.4.2 skrll channelSel = ath_hal_reverseBits(
114 1.2.4.2 skrll (uint32_t)(((freq - 4800)*10)/25 + 1), 8);
115 1.2.4.2 skrll aModeRefSel = ath_hal_reverseBits(0, 2);
116 1.2.4.2 skrll } else if ((chan->channel % 20) == 0 && chan->channel >= 5120) {
117 1.2.4.2 skrll channelSel = ath_hal_reverseBits(
118 1.2.4.2 skrll ((chan->channel - 4800) / 20 << 2), 8);
119 1.2.4.2 skrll aModeRefSel = ath_hal_reverseBits(1, 2);
120 1.2.4.2 skrll } else if ((chan->channel % 10) == 0) {
121 1.2.4.2 skrll channelSel = ath_hal_reverseBits(
122 1.2.4.2 skrll ((chan->channel - 4800) / 10 << 1), 8);
123 1.2.4.2 skrll aModeRefSel = ath_hal_reverseBits(1, 2);
124 1.2.4.2 skrll } else if ((chan->channel % 5) == 0) {
125 1.2.4.2 skrll channelSel = ath_hal_reverseBits(
126 1.2.4.2 skrll (chan->channel - 4800) / 5, 8);
127 1.2.4.2 skrll aModeRefSel = ath_hal_reverseBits(1, 2);
128 1.2.4.2 skrll } else {
129 1.2.4.2 skrll HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
130 1.2.4.2 skrll __func__, chan->channel);
131 1.2.4.2 skrll return AH_FALSE;
132 1.2.4.2 skrll }
133 1.2.4.2 skrll
134 1.2.4.2 skrll reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) |
135 1.2.4.2 skrll (1 << 12) | 0x1;
136 1.2.4.2 skrll OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);
137 1.2.4.2 skrll
138 1.2.4.2 skrll reg32 >>= 8;
139 1.2.4.2 skrll OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);
140 1.2.4.2 skrll
141 1.2.4.2 skrll AH_PRIVATE(ah)->ah_curchan = chan;
142 1.2.4.2 skrll return AH_TRUE;
143 1.2.4.2 skrll }
144 1.2.4.2 skrll
145 1.2.4.2 skrll /*
146 1.2.4.2 skrll * Reads EEPROM header info from device structure and programs
147 1.2.4.2 skrll * all rf registers
148 1.2.4.2 skrll *
149 1.2.4.2 skrll * REQUIRES: Access to the analog rf device
150 1.2.4.2 skrll */
151 1.2.4.2 skrll static HAL_BOOL
152 1.2.4.2 skrll ar2425SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t modesIndex, uint16_t *rfXpdGain)
153 1.2.4.2 skrll {
154 1.2.4.2 skrll #define RF_BANK_SETUP(_priv, _ix, _col) do { \
155 1.2.4.2 skrll int i; \
156 1.2.4.2 skrll for (i = 0; i < N(ar5212Bank##_ix##_2425); i++) \
157 1.2.4.2 skrll (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_2425[i][_col];\
158 1.2.4.2 skrll } while (0)
159 1.2.4.2 skrll struct ath_hal_5212 *ahp = AH5212(ah);
160 1.2.4.2 skrll const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
161 1.2.4.2 skrll struct ar2425State *priv = AR2425(ah);
162 1.2.4.2 skrll uint16_t ob2GHz = 0, db2GHz = 0;
163 1.2.4.2 skrll int regWrites = 0;
164 1.2.4.2 skrll
165 1.2.4.2 skrll HALDEBUG(ah, HAL_DEBUG_RFPARAM,
166 1.2.4.2 skrll "==>%s:chan 0x%x flag 0x%x modesIndex 0x%x\n",
167 1.2.4.2 skrll __func__, chan->channel, chan->channelFlags, modesIndex);
168 1.2.4.2 skrll
169 1.2.4.2 skrll HALASSERT(priv);
170 1.2.4.2 skrll
171 1.2.4.2 skrll /* Setup rf parameters */
172 1.2.4.2 skrll switch (chan->channelFlags & CHANNEL_ALL) {
173 1.2.4.2 skrll case CHANNEL_B:
174 1.2.4.2 skrll ob2GHz = ee->ee_obFor24;
175 1.2.4.2 skrll db2GHz = ee->ee_dbFor24;
176 1.2.4.2 skrll break;
177 1.2.4.2 skrll case CHANNEL_G:
178 1.2.4.2 skrll case CHANNEL_108G:
179 1.2.4.2 skrll ob2GHz = ee->ee_obFor24g;
180 1.2.4.2 skrll db2GHz = ee->ee_dbFor24g;
181 1.2.4.2 skrll break;
182 1.2.4.2 skrll default:
183 1.2.4.2 skrll HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n",
184 1.2.4.2 skrll __func__, chan->channelFlags);
185 1.2.4.2 skrll return AH_FALSE;
186 1.2.4.2 skrll }
187 1.2.4.2 skrll
188 1.2.4.2 skrll /* Bank 1 Write */
189 1.2.4.2 skrll RF_BANK_SETUP(priv, 1, 1);
190 1.2.4.2 skrll
191 1.2.4.2 skrll /* Bank 2 Write */
192 1.2.4.2 skrll RF_BANK_SETUP(priv, 2, modesIndex);
193 1.2.4.2 skrll
194 1.2.4.2 skrll /* Bank 3 Write */
195 1.2.4.2 skrll RF_BANK_SETUP(priv, 3, modesIndex);
196 1.2.4.2 skrll
197 1.2.4.2 skrll /* Bank 6 Write */
198 1.2.4.2 skrll RF_BANK_SETUP(priv, 6, modesIndex);
199 1.2.4.2 skrll
200 1.2.4.2 skrll ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 193, 0);
201 1.2.4.2 skrll ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 190, 0);
202 1.2.4.2 skrll
203 1.2.4.2 skrll /* Bank 7 Setup */
204 1.2.4.2 skrll RF_BANK_SETUP(priv, 7, modesIndex);
205 1.2.4.2 skrll
206 1.2.4.2 skrll /* Write Analog registers */
207 1.2.4.2 skrll HAL_INI_WRITE_BANK(ah, ar5212Bank1_2425, priv->Bank1Data, regWrites);
208 1.2.4.2 skrll HAL_INI_WRITE_BANK(ah, ar5212Bank2_2425, priv->Bank2Data, regWrites);
209 1.2.4.2 skrll HAL_INI_WRITE_BANK(ah, ar5212Bank3_2425, priv->Bank3Data, regWrites);
210 1.2.4.2 skrll if (IS_2417(ah)) {
211 1.2.4.2 skrll HALASSERT(N(ar5212Bank6_2425) == N(ar5212Bank6_2417));
212 1.2.4.2 skrll HAL_INI_WRITE_BANK(ah, ar5212Bank6_2417, priv->Bank6Data,
213 1.2.4.2 skrll regWrites);
214 1.2.4.2 skrll } else
215 1.2.4.2 skrll HAL_INI_WRITE_BANK(ah, ar5212Bank6_2425, priv->Bank6Data,
216 1.2.4.2 skrll regWrites);
217 1.2.4.2 skrll HAL_INI_WRITE_BANK(ah, ar5212Bank7_2425, priv->Bank7Data, regWrites);
218 1.2.4.2 skrll
219 1.2.4.2 skrll /* Now that we have reprogrammed rfgain value, clear the flag. */
220 1.2.4.2 skrll ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE;
221 1.2.4.2 skrll
222 1.2.4.2 skrll HALDEBUG(ah, HAL_DEBUG_RFPARAM, "<==%s\n", __func__);
223 1.2.4.2 skrll return AH_TRUE;
224 1.2.4.2 skrll #undef RF_BANK_SETUP
225 1.2.4.2 skrll }
226 1.2.4.2 skrll
227 1.2.4.2 skrll /*
228 1.2.4.2 skrll * Return a reference to the requested RF Bank.
229 1.2.4.2 skrll */
230 1.2.4.2 skrll static uint32_t *
231 1.2.4.2 skrll ar2425GetRfBank(struct ath_hal *ah, int bank)
232 1.2.4.2 skrll {
233 1.2.4.2 skrll struct ar2425State *priv = AR2425(ah);
234 1.2.4.2 skrll
235 1.2.4.2 skrll HALASSERT(priv != AH_NULL);
236 1.2.4.2 skrll switch (bank) {
237 1.2.4.2 skrll case 1: return priv->Bank1Data;
238 1.2.4.2 skrll case 2: return priv->Bank2Data;
239 1.2.4.2 skrll case 3: return priv->Bank3Data;
240 1.2.4.2 skrll case 6: return priv->Bank6Data;
241 1.2.4.2 skrll case 7: return priv->Bank7Data;
242 1.2.4.2 skrll }
243 1.2.4.2 skrll HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
244 1.2.4.2 skrll __func__, bank);
245 1.2.4.2 skrll return AH_NULL;
246 1.2.4.2 skrll }
247 1.2.4.2 skrll
248 1.2.4.2 skrll /*
249 1.2.4.2 skrll * Return indices surrounding the value in sorted integer lists.
250 1.2.4.2 skrll *
251 1.2.4.2 skrll * NB: the input list is assumed to be sorted in ascending order
252 1.2.4.2 skrll */
253 1.2.4.2 skrll static void
254 1.2.4.2 skrll GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize,
255 1.2.4.2 skrll uint32_t *vlo, uint32_t *vhi)
256 1.2.4.2 skrll {
257 1.2.4.2 skrll int16_t target = v;
258 1.2.4.2 skrll const uint16_t *ep = lp+listSize;
259 1.2.4.2 skrll const uint16_t *tp;
260 1.2.4.2 skrll
261 1.2.4.2 skrll /*
262 1.2.4.2 skrll * Check first and last elements for out-of-bounds conditions.
263 1.2.4.2 skrll */
264 1.2.4.2 skrll if (target < lp[0]) {
265 1.2.4.2 skrll *vlo = *vhi = 0;
266 1.2.4.2 skrll return;
267 1.2.4.2 skrll }
268 1.2.4.2 skrll if (target >= ep[-1]) {
269 1.2.4.2 skrll *vlo = *vhi = listSize - 1;
270 1.2.4.2 skrll return;
271 1.2.4.2 skrll }
272 1.2.4.2 skrll
273 1.2.4.2 skrll /* look for value being near or between 2 values in list */
274 1.2.4.2 skrll for (tp = lp; tp < ep; tp++) {
275 1.2.4.2 skrll /*
276 1.2.4.2 skrll * If value is close to the current value of the list
277 1.2.4.2 skrll * then target is not between values, it is one of the values
278 1.2.4.2 skrll */
279 1.2.4.2 skrll if (*tp == target) {
280 1.2.4.2 skrll *vlo = *vhi = tp - (const uint16_t *) lp;
281 1.2.4.2 skrll return;
282 1.2.4.2 skrll }
283 1.2.4.2 skrll /*
284 1.2.4.2 skrll * Look for value being between current value and next value
285 1.2.4.2 skrll * if so return these 2 values
286 1.2.4.2 skrll */
287 1.2.4.2 skrll if (target < tp[1]) {
288 1.2.4.2 skrll *vlo = tp - (const uint16_t *) lp;
289 1.2.4.2 skrll *vhi = *vlo + 1;
290 1.2.4.2 skrll return;
291 1.2.4.2 skrll }
292 1.2.4.2 skrll }
293 1.2.4.2 skrll }
294 1.2.4.2 skrll
295 1.2.4.2 skrll /*
296 1.2.4.2 skrll * Fill the Vpdlist for indices Pmax-Pmin
297 1.2.4.2 skrll */
298 1.2.4.2 skrll static HAL_BOOL
299 1.2.4.2 skrll ar2425FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t Pmax,
300 1.2.4.2 skrll const int16_t *pwrList, const uint16_t *VpdList,
301 1.2.4.2 skrll uint16_t numIntercepts,
302 1.2.4.2 skrll uint16_t retVpdList[][64])
303 1.2.4.2 skrll {
304 1.2.4.2 skrll uint16_t ii, jj, kk;
305 1.2.4.2 skrll int16_t currPwr = (int16_t)(2*Pmin);
306 1.2.4.2 skrll /* since Pmin is pwr*2 and pwrList is 4*pwr */
307 1.2.4.2 skrll uint32_t idxL = 0, idxR = 0;
308 1.2.4.2 skrll
309 1.2.4.2 skrll ii = 0;
310 1.2.4.2 skrll jj = 0;
311 1.2.4.2 skrll
312 1.2.4.2 skrll if (numIntercepts < 2)
313 1.2.4.2 skrll return AH_FALSE;
314 1.2.4.2 skrll
315 1.2.4.2 skrll while (ii <= (uint16_t)(Pmax - Pmin)) {
316 1.2.4.2 skrll GetLowerUpperIndex(currPwr, (const uint16_t *) pwrList,
317 1.2.4.2 skrll numIntercepts, &(idxL), &(idxR));
318 1.2.4.2 skrll if (idxR < 1)
319 1.2.4.2 skrll idxR = 1; /* extrapolate below */
320 1.2.4.2 skrll if (idxL == (uint32_t)(numIntercepts - 1))
321 1.2.4.2 skrll idxL = numIntercepts - 2; /* extrapolate above */
322 1.2.4.2 skrll if (pwrList[idxL] == pwrList[idxR])
323 1.2.4.2 skrll kk = VpdList[idxL];
324 1.2.4.2 skrll else
325 1.2.4.2 skrll kk = (uint16_t)
326 1.2.4.2 skrll (((currPwr - pwrList[idxL])*VpdList[idxR]+
327 1.2.4.2 skrll (pwrList[idxR] - currPwr)*VpdList[idxL])/
328 1.2.4.2 skrll (pwrList[idxR] - pwrList[idxL]));
329 1.2.4.2 skrll retVpdList[pdGainIdx][ii] = kk;
330 1.2.4.2 skrll ii++;
331 1.2.4.2 skrll currPwr += 2; /* half dB steps */
332 1.2.4.2 skrll }
333 1.2.4.2 skrll
334 1.2.4.2 skrll return AH_TRUE;
335 1.2.4.2 skrll }
336 1.2.4.2 skrll
337 1.2.4.2 skrll /*
338 1.2.4.2 skrll * Returns interpolated or the scaled up interpolated value
339 1.2.4.2 skrll */
340 1.2.4.2 skrll static int16_t
341 1.2.4.2 skrll interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight,
342 1.2.4.2 skrll int16_t targetLeft, int16_t targetRight)
343 1.2.4.2 skrll {
344 1.2.4.2 skrll int16_t rv;
345 1.2.4.2 skrll
346 1.2.4.2 skrll if (srcRight != srcLeft) {
347 1.2.4.2 skrll rv = ((target - srcLeft)*targetRight +
348 1.2.4.2 skrll (srcRight - target)*targetLeft) / (srcRight - srcLeft);
349 1.2.4.2 skrll } else {
350 1.2.4.2 skrll rv = targetLeft;
351 1.2.4.2 skrll }
352 1.2.4.2 skrll return rv;
353 1.2.4.2 skrll }
354 1.2.4.2 skrll
355 1.2.4.2 skrll /*
356 1.2.4.2 skrll * Uses the data points read from EEPROM to reconstruct the pdadc power table
357 1.2.4.2 skrll * Called by ar2425SetPowerTable()
358 1.2.4.2 skrll */
359 1.2.4.2 skrll static void
360 1.2.4.2 skrll ar2425getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
361 1.2.4.2 skrll const RAW_DATA_STRUCT_2413 *pRawDataset,
362 1.2.4.2 skrll uint16_t pdGainOverlap_t2,
363 1.2.4.2 skrll int16_t *pMinCalPower, uint16_t pPdGainBoundaries[],
364 1.2.4.2 skrll uint16_t pPdGainValues[], uint16_t pPDADCValues[])
365 1.2.4.2 skrll {
366 1.2.4.2 skrll /* Note the items statically allocated below are to reduce stack usage */
367 1.2.4.2 skrll uint32_t ii, jj, kk;
368 1.2.4.2 skrll int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */
369 1.2.4.2 skrll uint32_t idxL = 0, idxR = 0;
370 1.2.4.2 skrll uint32_t numPdGainsUsed = 0;
371 1.2.4.2 skrll static uint16_t VpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB];
372 1.2.4.2 skrll /* filled out Vpd table for all pdGains (chanL) */
373 1.2.4.2 skrll static uint16_t VpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB];
374 1.2.4.2 skrll /* filled out Vpd table for all pdGains (chanR) */
375 1.2.4.2 skrll static uint16_t VpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB];
376 1.2.4.2 skrll /* filled out Vpd table for all pdGains (interpolated) */
377 1.2.4.2 skrll /*
378 1.2.4.2 skrll * If desired to support -ve power levels in future, just
379 1.2.4.2 skrll * change pwr_I_0 to signed 5-bits.
380 1.2.4.2 skrll */
381 1.2.4.2 skrll static int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
382 1.2.4.2 skrll /* to accomodate -ve power levels later on. */
383 1.2.4.2 skrll static int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
384 1.2.4.2 skrll /* to accomodate -ve power levels later on */
385 1.2.4.2 skrll uint16_t numVpd = 0;
386 1.2.4.2 skrll uint16_t Vpd_step;
387 1.2.4.2 skrll int16_t tmpVal ;
388 1.2.4.2 skrll uint32_t sizeCurrVpdTable, maxIndex, tgtIndex;
389 1.2.4.2 skrll
390 1.2.4.2 skrll HALDEBUG(ah, HAL_DEBUG_RFPARAM, "==>%s:\n", __func__);
391 1.2.4.2 skrll
392 1.2.4.2 skrll /* Get upper lower index */
393 1.2.4.2 skrll GetLowerUpperIndex(channel, pRawDataset->pChannels,
394 1.2.4.2 skrll pRawDataset->numChannels, &(idxL), &(idxR));
395 1.2.4.2 skrll
396 1.2.4.2 skrll for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
397 1.2.4.2 skrll jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
398 1.2.4.2 skrll /* work backwards 'cause highest pdGain for lowest power */
399 1.2.4.2 skrll numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd;
400 1.2.4.2 skrll if (numVpd > 0) {
401 1.2.4.2 skrll pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain;
402 1.2.4.2 skrll Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0];
403 1.2.4.2 skrll if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) {
404 1.2.4.2 skrll Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0];
405 1.2.4.2 skrll }
406 1.2.4.2 skrll Pmin_t2[numPdGainsUsed] = (int16_t)
407 1.2.4.2 skrll (Pmin_t2[numPdGainsUsed] / 2);
408 1.2.4.2 skrll Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1];
409 1.2.4.2 skrll if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1])
410 1.2.4.2 skrll Pmax_t2[numPdGainsUsed] =
411 1.2.4.2 skrll pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1];
412 1.2.4.2 skrll Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2);
413 1.2.4.2 skrll ar2425FillVpdTable(
414 1.2.4.2 skrll numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
415 1.2.4.2 skrll &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]),
416 1.2.4.2 skrll &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L
417 1.2.4.2 skrll );
418 1.2.4.2 skrll ar2425FillVpdTable(
419 1.2.4.2 skrll numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
420 1.2.4.2 skrll &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]),
421 1.2.4.2 skrll &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R
422 1.2.4.2 skrll );
423 1.2.4.2 skrll for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) {
424 1.2.4.2 skrll VpdTable_I[numPdGainsUsed][kk] =
425 1.2.4.2 skrll interpolate_signed(
426 1.2.4.2 skrll channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR],
427 1.2.4.2 skrll (int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]);
428 1.2.4.2 skrll }
429 1.2.4.2 skrll /* fill VpdTable_I for this pdGain */
430 1.2.4.2 skrll numPdGainsUsed++;
431 1.2.4.2 skrll }
432 1.2.4.2 skrll /* if this pdGain is used */
433 1.2.4.2 skrll }
434 1.2.4.2 skrll
435 1.2.4.2 skrll *pMinCalPower = Pmin_t2[0];
436 1.2.4.2 skrll kk = 0; /* index for the final table */
437 1.2.4.2 skrll for (ii = 0; ii < numPdGainsUsed; ii++) {
438 1.2.4.2 skrll if (ii == (numPdGainsUsed - 1))
439 1.2.4.2 skrll pPdGainBoundaries[ii] = Pmax_t2[ii] +
440 1.2.4.2 skrll PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB;
441 1.2.4.2 skrll else
442 1.2.4.2 skrll pPdGainBoundaries[ii] = (uint16_t)
443 1.2.4.2 skrll ((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 );
444 1.2.4.2 skrll
445 1.2.4.2 skrll /* Find starting index for this pdGain */
446 1.2.4.2 skrll if (ii == 0)
447 1.2.4.2 skrll ss = 0; /* for the first pdGain, start from index 0 */
448 1.2.4.2 skrll else
449 1.2.4.2 skrll ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) -
450 1.2.4.2 skrll pdGainOverlap_t2;
451 1.2.4.2 skrll Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]);
452 1.2.4.2 skrll Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
453 1.2.4.2 skrll /*
454 1.2.4.2 skrll *-ve ss indicates need to extrapolate data below for this pdGain
455 1.2.4.2 skrll */
456 1.2.4.2 skrll while (ss < 0) {
457 1.2.4.2 skrll tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step);
458 1.2.4.2 skrll pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal);
459 1.2.4.2 skrll ss++;
460 1.2.4.2 skrll }
461 1.2.4.2 skrll
462 1.2.4.2 skrll sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii];
463 1.2.4.2 skrll tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii];
464 1.2.4.2 skrll maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable;
465 1.2.4.2 skrll
466 1.2.4.2 skrll while (ss < (int16_t)maxIndex)
467 1.2.4.2 skrll pPDADCValues[kk++] = VpdTable_I[ii][ss++];
468 1.2.4.2 skrll
469 1.2.4.2 skrll Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] -
470 1.2.4.2 skrll VpdTable_I[ii][sizeCurrVpdTable-2]);
471 1.2.4.2 skrll Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
472 1.2.4.2 skrll /*
473 1.2.4.2 skrll * for last gain, pdGainBoundary == Pmax_t2, so will
474 1.2.4.2 skrll * have to extrapolate
475 1.2.4.2 skrll */
476 1.2.4.2 skrll if (tgtIndex > maxIndex) { /* need to extrapolate above */
477 1.2.4.2 skrll while(ss < (int16_t)tgtIndex) {
478 1.2.4.2 skrll tmpVal = (uint16_t)
479 1.2.4.2 skrll (VpdTable_I[ii][sizeCurrVpdTable-1] +
480 1.2.4.2 skrll (ss-maxIndex)*Vpd_step);
481 1.2.4.2 skrll pPDADCValues[kk++] = (tmpVal > 127) ?
482 1.2.4.2 skrll 127 : tmpVal;
483 1.2.4.2 skrll ss++;
484 1.2.4.2 skrll }
485 1.2.4.2 skrll } /* extrapolated above */
486 1.2.4.2 skrll } /* for all pdGainUsed */
487 1.2.4.2 skrll
488 1.2.4.2 skrll while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) {
489 1.2.4.2 skrll pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1];
490 1.2.4.2 skrll ii++;
491 1.2.4.2 skrll }
492 1.2.4.2 skrll while (kk < 128) {
493 1.2.4.2 skrll pPDADCValues[kk] = pPDADCValues[kk-1];
494 1.2.4.2 skrll kk++;
495 1.2.4.2 skrll }
496 1.2.4.2 skrll
497 1.2.4.2 skrll HALDEBUG(ah, HAL_DEBUG_RFPARAM, "<==%s\n", __func__);
498 1.2.4.2 skrll }
499 1.2.4.2 skrll
500 1.2.4.2 skrll
501 1.2.4.2 skrll /* Same as 2413 set power table */
502 1.2.4.2 skrll static HAL_BOOL
503 1.2.4.2 skrll ar2425SetPowerTable(struct ath_hal *ah,
504 1.2.4.2 skrll int16_t *minPower, int16_t *maxPower, HAL_CHANNEL_INTERNAL *chan,
505 1.2.4.2 skrll uint16_t *rfXpdGain)
506 1.2.4.2 skrll {
507 1.2.4.2 skrll struct ath_hal_5212 *ahp = AH5212(ah);
508 1.2.4.2 skrll const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
509 1.2.4.2 skrll const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;
510 1.2.4.2 skrll uint16_t pdGainOverlap_t2;
511 1.2.4.2 skrll int16_t minCalPower2413_t2;
512 1.2.4.2 skrll uint16_t *pdadcValues = ahp->ah_pcdacTable;
513 1.2.4.2 skrll uint16_t gainBoundaries[4];
514 1.2.4.2 skrll uint32_t i, reg32, regoffset;
515 1.2.4.2 skrll
516 1.2.4.2 skrll HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s:chan 0x%x flag 0x%x\n",
517 1.2.4.2 skrll __func__, chan->channel,chan->channelFlags);
518 1.2.4.2 skrll
519 1.2.4.2 skrll if (IS_CHAN_G(chan) || IS_CHAN_108G(chan))
520 1.2.4.2 skrll pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
521 1.2.4.2 skrll else if (IS_CHAN_B(chan))
522 1.2.4.2 skrll pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
523 1.2.4.2 skrll else {
524 1.2.4.2 skrll HALDEBUG(ah, HAL_DEBUG_ANY, "%s:illegal mode\n", __func__);
525 1.2.4.2 skrll return AH_FALSE;
526 1.2.4.2 skrll }
527 1.2.4.2 skrll
528 1.2.4.2 skrll pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5),
529 1.2.4.2 skrll AR_PHY_TPCRG5_PD_GAIN_OVERLAP);
530 1.2.4.2 skrll
531 1.2.4.2 skrll ar2425getGainBoundariesAndPdadcsForPowers(ah, chan->channel,
532 1.2.4.2 skrll pRawDataset, pdGainOverlap_t2,&minCalPower2413_t2,gainBoundaries,
533 1.2.4.2 skrll rfXpdGain, pdadcValues);
534 1.2.4.2 skrll
535 1.2.4.2 skrll OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
536 1.2.4.2 skrll (pRawDataset->pDataPerChannel[0].numPdGains - 1));
537 1.2.4.2 skrll
538 1.2.4.2 skrll /*
539 1.2.4.2 skrll * Note the pdadc table may not start at 0 dBm power, could be
540 1.2.4.2 skrll * negative or greater than 0. Need to offset the power
541 1.2.4.2 skrll * values by the amount of minPower for griffin
542 1.2.4.2 skrll */
543 1.2.4.2 skrll if (minCalPower2413_t2 != 0)
544 1.2.4.2 skrll ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower2413_t2);
545 1.2.4.2 skrll else
546 1.2.4.2 skrll ahp->ah_txPowerIndexOffset = 0;
547 1.2.4.2 skrll
548 1.2.4.2 skrll /* Finally, write the power values into the baseband power table */
549 1.2.4.2 skrll regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */
550 1.2.4.2 skrll for (i = 0; i < 32; i++) {
551 1.2.4.2 skrll reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) |
552 1.2.4.2 skrll ((pdadcValues[4*i + 1] & 0xFF) << 8) |
553 1.2.4.2 skrll ((pdadcValues[4*i + 2] & 0xFF) << 16) |
554 1.2.4.2 skrll ((pdadcValues[4*i + 3] & 0xFF) << 24) ;
555 1.2.4.2 skrll OS_REG_WRITE(ah, regoffset, reg32);
556 1.2.4.2 skrll regoffset += 4;
557 1.2.4.2 skrll }
558 1.2.4.2 skrll
559 1.2.4.2 skrll OS_REG_WRITE(ah, AR_PHY_TPCRG5,
560 1.2.4.2 skrll SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |
561 1.2.4.2 skrll SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) |
562 1.2.4.2 skrll SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) |
563 1.2.4.2 skrll SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) |
564 1.2.4.2 skrll SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));
565 1.2.4.2 skrll
566 1.2.4.2 skrll return AH_TRUE;
567 1.2.4.2 skrll }
568 1.2.4.2 skrll
569 1.2.4.2 skrll static int16_t
570 1.2.4.2 skrll ar2425GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
571 1.2.4.2 skrll {
572 1.2.4.2 skrll uint32_t ii,jj;
573 1.2.4.2 skrll uint16_t Pmin=0,numVpd;
574 1.2.4.2 skrll
575 1.2.4.2 skrll for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
576 1.2.4.2 skrll jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
577 1.2.4.2 skrll /* work backwards 'cause highest pdGain for lowest power */
578 1.2.4.2 skrll numVpd = data->pDataPerPDGain[jj].numVpd;
579 1.2.4.2 skrll if (numVpd > 0) {
580 1.2.4.2 skrll Pmin = data->pDataPerPDGain[jj].pwr_t4[0];
581 1.2.4.2 skrll return(Pmin);
582 1.2.4.2 skrll }
583 1.2.4.2 skrll }
584 1.2.4.2 skrll return(Pmin);
585 1.2.4.2 skrll }
586 1.2.4.2 skrll
587 1.2.4.2 skrll static int16_t
588 1.2.4.2 skrll ar2425GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
589 1.2.4.2 skrll {
590 1.2.4.2 skrll uint32_t ii;
591 1.2.4.2 skrll uint16_t Pmax=0,numVpd;
592 1.2.4.2 skrll
593 1.2.4.2 skrll for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
594 1.2.4.2 skrll /* work forwards cuase lowest pdGain for highest power */
595 1.2.4.2 skrll numVpd = data->pDataPerPDGain[ii].numVpd;
596 1.2.4.2 skrll if (numVpd > 0) {
597 1.2.4.2 skrll Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1];
598 1.2.4.2 skrll return(Pmax);
599 1.2.4.2 skrll }
600 1.2.4.2 skrll }
601 1.2.4.2 skrll return(Pmax);
602 1.2.4.2 skrll }
603 1.2.4.2 skrll
604 1.2.4.2 skrll static
605 1.2.4.2 skrll HAL_BOOL
606 1.2.4.2 skrll ar2425GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan,
607 1.2.4.2 skrll int16_t *maxPow, int16_t *minPow)
608 1.2.4.2 skrll {
609 1.2.4.2 skrll const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
610 1.2.4.2 skrll const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;
611 1.2.4.2 skrll const RAW_DATA_PER_CHANNEL_2413 *data = AH_NULL;
612 1.2.4.2 skrll uint16_t numChannels;
613 1.2.4.2 skrll int totalD,totalF, totalMin,last, i;
614 1.2.4.2 skrll
615 1.2.4.2 skrll *maxPow = 0;
616 1.2.4.2 skrll
617 1.2.4.2 skrll if (IS_CHAN_G(chan) || IS_CHAN_108G(chan))
618 1.2.4.2 skrll pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
619 1.2.4.2 skrll else if (IS_CHAN_B(chan))
620 1.2.4.2 skrll pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
621 1.2.4.2 skrll else
622 1.2.4.2 skrll return(AH_FALSE);
623 1.2.4.2 skrll
624 1.2.4.2 skrll numChannels = pRawDataset->numChannels;
625 1.2.4.2 skrll data = pRawDataset->pDataPerChannel;
626 1.2.4.2 skrll
627 1.2.4.2 skrll /* Make sure the channel is in the range of the TP values
628 1.2.4.2 skrll * (freq piers)
629 1.2.4.2 skrll */
630 1.2.4.2 skrll if (numChannels < 1)
631 1.2.4.2 skrll return(AH_FALSE);
632 1.2.4.2 skrll
633 1.2.4.2 skrll if ((chan->channel < data[0].channelValue) ||
634 1.2.4.2 skrll (chan->channel > data[numChannels-1].channelValue)) {
635 1.2.4.2 skrll if (chan->channel < data[0].channelValue) {
636 1.2.4.2 skrll *maxPow = ar2425GetMaxPower(ah, &data[0]);
637 1.2.4.2 skrll *minPow = ar2425GetMinPower(ah, &data[0]);
638 1.2.4.2 skrll return(AH_TRUE);
639 1.2.4.2 skrll } else {
640 1.2.4.2 skrll *maxPow = ar2425GetMaxPower(ah, &data[numChannels - 1]);
641 1.2.4.2 skrll *minPow = ar2425GetMinPower(ah, &data[numChannels - 1]);
642 1.2.4.2 skrll return(AH_TRUE);
643 1.2.4.2 skrll }
644 1.2.4.2 skrll }
645 1.2.4.2 skrll
646 1.2.4.2 skrll /* Linearly interpolate the power value now */
647 1.2.4.2 skrll for (last=0,i=0; (i<numChannels) && (chan->channel > data[i].channelValue);
648 1.2.4.2 skrll last = i++);
649 1.2.4.2 skrll totalD = data[i].channelValue - data[last].channelValue;
650 1.2.4.2 skrll if (totalD > 0) {
651 1.2.4.2 skrll totalF = ar2425GetMaxPower(ah, &data[i]) - ar2425GetMaxPower(ah, &data[last]);
652 1.2.4.2 skrll *maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) +
653 1.2.4.2 skrll ar2425GetMaxPower(ah, &data[last])*totalD)/totalD);
654 1.2.4.2 skrll totalMin = ar2425GetMinPower(ah, &data[i]) - ar2425GetMinPower(ah, &data[last]);
655 1.2.4.2 skrll *minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) +
656 1.2.4.2 skrll ar2425GetMinPower(ah, &data[last])*totalD)/totalD);
657 1.2.4.2 skrll return(AH_TRUE);
658 1.2.4.2 skrll } else {
659 1.2.4.2 skrll if (chan->channel == data[i].channelValue) {
660 1.2.4.2 skrll *maxPow = ar2425GetMaxPower(ah, &data[i]);
661 1.2.4.2 skrll *minPow = ar2425GetMinPower(ah, &data[i]);
662 1.2.4.2 skrll return(AH_TRUE);
663 1.2.4.2 skrll } else
664 1.2.4.2 skrll return(AH_FALSE);
665 1.2.4.2 skrll }
666 1.2.4.2 skrll }
667 1.2.4.2 skrll
668 1.2.4.2 skrll /*
669 1.2.4.2 skrll * Free memory for analog bank scratch buffers
670 1.2.4.2 skrll */
671 1.2.4.2 skrll static void
672 1.2.4.2 skrll ar2425RfDetach(struct ath_hal *ah)
673 1.2.4.2 skrll {
674 1.2.4.2 skrll struct ath_hal_5212 *ahp = AH5212(ah);
675 1.2.4.2 skrll
676 1.2.4.2 skrll HALASSERT(ahp->ah_rfHal != AH_NULL);
677 1.2.4.2 skrll ath_hal_free(ahp->ah_rfHal);
678 1.2.4.2 skrll ahp->ah_rfHal = AH_NULL;
679 1.2.4.2 skrll }
680 1.2.4.2 skrll
681 1.2.4.2 skrll /*
682 1.2.4.2 skrll * Allocate memory for analog bank scratch buffers
683 1.2.4.2 skrll * Scratch Buffer will be reinitialized every reset so no need to zero now
684 1.2.4.2 skrll */
685 1.2.4.2 skrll static HAL_BOOL
686 1.2.4.2 skrll ar2425RfAttach(struct ath_hal *ah, HAL_STATUS *status)
687 1.2.4.2 skrll {
688 1.2.4.2 skrll struct ath_hal_5212 *ahp = AH5212(ah);
689 1.2.4.2 skrll struct ar2425State *priv;
690 1.2.4.2 skrll
691 1.2.4.2 skrll HALASSERT(ah->ah_magic == AR5212_MAGIC);
692 1.2.4.2 skrll
693 1.2.4.2 skrll HALASSERT(ahp->ah_rfHal == AH_NULL);
694 1.2.4.2 skrll priv = ath_hal_malloc(sizeof(struct ar2425State));
695 1.2.4.2 skrll if (priv == AH_NULL) {
696 1.2.4.2 skrll HALDEBUG(ah, HAL_DEBUG_ANY,
697 1.2.4.2 skrll "%s: cannot allocate private state\n", __func__);
698 1.2.4.2 skrll *status = HAL_ENOMEM; /* XXX */
699 1.2.4.2 skrll return AH_FALSE;
700 1.2.4.2 skrll }
701 1.2.4.2 skrll priv->base.rfDetach = ar2425RfDetach;
702 1.2.4.2 skrll priv->base.writeRegs = ar2425WriteRegs;
703 1.2.4.2 skrll priv->base.getRfBank = ar2425GetRfBank;
704 1.2.4.2 skrll priv->base.setChannel = ar2425SetChannel;
705 1.2.4.2 skrll priv->base.setRfRegs = ar2425SetRfRegs;
706 1.2.4.2 skrll priv->base.setPowerTable = ar2425SetPowerTable;
707 1.2.4.2 skrll priv->base.getChannelMaxMinPower = ar2425GetChannelMaxMinPower;
708 1.2.4.2 skrll priv->base.getNfAdjust = ar5212GetNfAdjust;
709 1.2.4.2 skrll
710 1.2.4.2 skrll ahp->ah_pcdacTable = priv->pcdacTable;
711 1.2.4.2 skrll ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
712 1.2.4.2 skrll ahp->ah_rfHal = &priv->base;
713 1.2.4.2 skrll
714 1.2.4.2 skrll return AH_TRUE;
715 1.2.4.2 skrll }
716 1.2.4.2 skrll
717 1.2.4.2 skrll static HAL_BOOL
718 1.2.4.2 skrll ar2425Probe(struct ath_hal *ah)
719 1.2.4.2 skrll {
720 1.2.4.2 skrll return IS_2425(ah) || IS_2417(ah);
721 1.2.4.2 skrll }
722 1.2.4.2 skrll AH_RF(RF2425, ar2425Probe, ar2425RfAttach);
723