ar5413.c revision 1.2.4.2 1 1.2.4.2 skrll /*
2 1.2.4.2 skrll * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
3 1.2.4.2 skrll * Copyright (c) 2002-2008 Atheros Communications, Inc.
4 1.2.4.2 skrll *
5 1.2.4.2 skrll * Permission to use, copy, modify, and/or distribute this software for any
6 1.2.4.2 skrll * purpose with or without fee is hereby granted, provided that the above
7 1.2.4.2 skrll * copyright notice and this permission notice appear in all copies.
8 1.2.4.2 skrll *
9 1.2.4.2 skrll * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 1.2.4.2 skrll * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 1.2.4.2 skrll * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 1.2.4.2 skrll * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 1.2.4.2 skrll * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 1.2.4.2 skrll * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 1.2.4.2 skrll * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 1.2.4.2 skrll *
17 1.2.4.2 skrll * $Id: ar5413.c,v 1.2.4.2 2009/01/19 13:19:27 skrll Exp $
18 1.2.4.2 skrll */
19 1.2.4.2 skrll #include "opt_ah.h"
20 1.2.4.2 skrll
21 1.2.4.2 skrll #include "ah.h"
22 1.2.4.2 skrll #include "ah_internal.h"
23 1.2.4.2 skrll
24 1.2.4.2 skrll #include "ah_eeprom_v3.h"
25 1.2.4.2 skrll
26 1.2.4.2 skrll #include "ar5212/ar5212.h"
27 1.2.4.2 skrll #include "ar5212/ar5212reg.h"
28 1.2.4.2 skrll #include "ar5212/ar5212phy.h"
29 1.2.4.2 skrll
30 1.2.4.2 skrll #define AH_5212_5413
31 1.2.4.2 skrll #include "ar5212/ar5212.ini"
32 1.2.4.2 skrll
33 1.2.4.2 skrll #define N(a) (sizeof(a)/sizeof(a[0]))
34 1.2.4.2 skrll
35 1.2.4.2 skrll struct ar5413State {
36 1.2.4.2 skrll RF_HAL_FUNCS base; /* public state, must be first */
37 1.2.4.2 skrll uint16_t pcdacTable[PWR_TABLE_SIZE_2413];
38 1.2.4.2 skrll
39 1.2.4.2 skrll uint32_t Bank1Data[N(ar5212Bank1_5413)];
40 1.2.4.2 skrll uint32_t Bank2Data[N(ar5212Bank2_5413)];
41 1.2.4.2 skrll uint32_t Bank3Data[N(ar5212Bank3_5413)];
42 1.2.4.2 skrll uint32_t Bank6Data[N(ar5212Bank6_5413)];
43 1.2.4.2 skrll uint32_t Bank7Data[N(ar5212Bank7_5413)];
44 1.2.4.2 skrll
45 1.2.4.2 skrll /*
46 1.2.4.2 skrll * Private state for reduced stack usage.
47 1.2.4.2 skrll */
48 1.2.4.2 skrll /* filled out Vpd table for all pdGains (chanL) */
49 1.2.4.2 skrll uint16_t vpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL]
50 1.2.4.2 skrll [MAX_PWR_RANGE_IN_HALF_DB];
51 1.2.4.2 skrll /* filled out Vpd table for all pdGains (chanR) */
52 1.2.4.2 skrll uint16_t vpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL]
53 1.2.4.2 skrll [MAX_PWR_RANGE_IN_HALF_DB];
54 1.2.4.2 skrll /* filled out Vpd table for all pdGains (interpolated) */
55 1.2.4.2 skrll uint16_t vpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL]
56 1.2.4.2 skrll [MAX_PWR_RANGE_IN_HALF_DB];
57 1.2.4.2 skrll };
58 1.2.4.2 skrll #define AR5413(ah) ((struct ar5413State *) AH5212(ah)->ah_rfHal)
59 1.2.4.2 skrll
60 1.2.4.2 skrll extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32,
61 1.2.4.2 skrll uint32_t numBits, uint32_t firstBit, uint32_t column);
62 1.2.4.2 skrll
63 1.2.4.2 skrll static void
64 1.2.4.2 skrll ar5413WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
65 1.2.4.2 skrll int writes)
66 1.2.4.2 skrll {
67 1.2.4.2 skrll HAL_INI_WRITE_ARRAY(ah, ar5212Modes_5413, modesIndex, writes);
68 1.2.4.2 skrll HAL_INI_WRITE_ARRAY(ah, ar5212Common_5413, 1, writes);
69 1.2.4.2 skrll HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_5413, freqIndex, writes);
70 1.2.4.2 skrll }
71 1.2.4.2 skrll
72 1.2.4.2 skrll /*
73 1.2.4.2 skrll * Take the MHz channel value and set the Channel value
74 1.2.4.2 skrll *
75 1.2.4.2 skrll * ASSUMES: Writes enabled to analog bus
76 1.2.4.2 skrll */
77 1.2.4.2 skrll static HAL_BOOL
78 1.2.4.2 skrll ar5413SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan)
79 1.2.4.2 skrll {
80 1.2.4.2 skrll uint32_t channelSel = 0;
81 1.2.4.2 skrll uint32_t bModeSynth = 0;
82 1.2.4.2 skrll uint32_t aModeRefSel = 0;
83 1.2.4.2 skrll uint32_t reg32 = 0;
84 1.2.4.2 skrll uint16_t freq;
85 1.2.4.2 skrll
86 1.2.4.2 skrll OS_MARK(ah, AH_MARK_SETCHANNEL, chan->channel);
87 1.2.4.2 skrll
88 1.2.4.2 skrll if (chan->channel < 4800) {
89 1.2.4.2 skrll uint32_t txctl;
90 1.2.4.2 skrll
91 1.2.4.2 skrll if (((chan->channel - 2192) % 5) == 0) {
92 1.2.4.2 skrll channelSel = ((chan->channel - 672) * 2 - 3040)/10;
93 1.2.4.2 skrll bModeSynth = 0;
94 1.2.4.2 skrll } else if (((chan->channel - 2224) % 5) == 0) {
95 1.2.4.2 skrll channelSel = ((chan->channel - 704) * 2 - 3040) / 10;
96 1.2.4.2 skrll bModeSynth = 1;
97 1.2.4.2 skrll } else {
98 1.2.4.2 skrll HALDEBUG(ah, HAL_DEBUG_ANY,
99 1.2.4.2 skrll "%s: invalid channel %u MHz\n",
100 1.2.4.2 skrll __func__, chan->channel);
101 1.2.4.2 skrll return AH_FALSE;
102 1.2.4.2 skrll }
103 1.2.4.2 skrll
104 1.2.4.2 skrll channelSel = (channelSel << 2) & 0xff;
105 1.2.4.2 skrll channelSel = ath_hal_reverseBits(channelSel, 8);
106 1.2.4.2 skrll
107 1.2.4.2 skrll txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
108 1.2.4.2 skrll if (chan->channel == 2484) {
109 1.2.4.2 skrll /* Enable channel spreading for channel 14 */
110 1.2.4.2 skrll OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
111 1.2.4.2 skrll txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
112 1.2.4.2 skrll } else {
113 1.2.4.2 skrll OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
114 1.2.4.2 skrll txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
115 1.2.4.2 skrll }
116 1.2.4.2 skrll } else if (((chan->channel % 5) == 2) && (chan->channel <= 5435)) {
117 1.2.4.2 skrll freq = chan->channel - 2; /* Align to even 5MHz raster */
118 1.2.4.2 skrll channelSel = ath_hal_reverseBits(
119 1.2.4.2 skrll (uint32_t)(((freq - 4800)*10)/25 + 1), 8);
120 1.2.4.2 skrll aModeRefSel = ath_hal_reverseBits(0, 2);
121 1.2.4.2 skrll } else if ((chan->channel % 20) == 0 && chan->channel >= 5120) {
122 1.2.4.2 skrll channelSel = ath_hal_reverseBits(
123 1.2.4.2 skrll ((chan->channel - 4800) / 20 << 2), 8);
124 1.2.4.2 skrll aModeRefSel = ath_hal_reverseBits(1, 2);
125 1.2.4.2 skrll } else if ((chan->channel % 10) == 0) {
126 1.2.4.2 skrll channelSel = ath_hal_reverseBits(
127 1.2.4.2 skrll ((chan->channel - 4800) / 10 << 1), 8);
128 1.2.4.2 skrll aModeRefSel = ath_hal_reverseBits(1, 2);
129 1.2.4.2 skrll } else if ((chan->channel % 5) == 0) {
130 1.2.4.2 skrll channelSel = ath_hal_reverseBits(
131 1.2.4.2 skrll (chan->channel - 4800) / 5, 8);
132 1.2.4.2 skrll aModeRefSel = ath_hal_reverseBits(1, 2);
133 1.2.4.2 skrll } else {
134 1.2.4.2 skrll HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
135 1.2.4.2 skrll __func__, chan->channel);
136 1.2.4.2 skrll return AH_FALSE;
137 1.2.4.2 skrll }
138 1.2.4.2 skrll
139 1.2.4.2 skrll reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) |
140 1.2.4.2 skrll (1 << 12) | 0x1;
141 1.2.4.2 skrll OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);
142 1.2.4.2 skrll
143 1.2.4.2 skrll reg32 >>= 8;
144 1.2.4.2 skrll OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);
145 1.2.4.2 skrll
146 1.2.4.2 skrll AH_PRIVATE(ah)->ah_curchan = chan;
147 1.2.4.2 skrll return AH_TRUE;
148 1.2.4.2 skrll }
149 1.2.4.2 skrll
150 1.2.4.2 skrll /*
151 1.2.4.2 skrll * Reads EEPROM header info from device structure and programs
152 1.2.4.2 skrll * all rf registers
153 1.2.4.2 skrll *
154 1.2.4.2 skrll * REQUIRES: Access to the analog rf device
155 1.2.4.2 skrll */
156 1.2.4.2 skrll static HAL_BOOL
157 1.2.4.2 skrll ar5413SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t modesIndex, uint16_t *rfXpdGain)
158 1.2.4.2 skrll {
159 1.2.4.2 skrll #define RF_BANK_SETUP(_priv, _ix, _col) do { \
160 1.2.4.2 skrll int i; \
161 1.2.4.2 skrll for (i = 0; i < N(ar5212Bank##_ix##_5413); i++) \
162 1.2.4.2 skrll (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_5413[i][_col];\
163 1.2.4.2 skrll } while (0)
164 1.2.4.2 skrll struct ath_hal_5212 *ahp = AH5212(ah);
165 1.2.4.2 skrll const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
166 1.2.4.2 skrll uint16_t ob5GHz = 0, db5GHz = 0;
167 1.2.4.2 skrll uint16_t ob2GHz = 0, db2GHz = 0;
168 1.2.4.2 skrll struct ar5413State *priv = AR5413(ah);
169 1.2.4.2 skrll int regWrites = 0;
170 1.2.4.2 skrll
171 1.2.4.2 skrll HALDEBUG(ah, HAL_DEBUG_RFPARAM,
172 1.2.4.2 skrll "%s: chan 0x%x flag 0x%x modesIndex 0x%x\n",
173 1.2.4.2 skrll __func__, chan->channel, chan->channelFlags, modesIndex);
174 1.2.4.2 skrll
175 1.2.4.2 skrll HALASSERT(priv != AH_NULL);
176 1.2.4.2 skrll
177 1.2.4.2 skrll /* Setup rf parameters */
178 1.2.4.2 skrll switch (chan->channelFlags & CHANNEL_ALL) {
179 1.2.4.2 skrll case CHANNEL_A:
180 1.2.4.2 skrll case CHANNEL_T:
181 1.2.4.2 skrll if (chan->channel > 4000 && chan->channel < 5260) {
182 1.2.4.2 skrll ob5GHz = ee->ee_ob1;
183 1.2.4.2 skrll db5GHz = ee->ee_db1;
184 1.2.4.2 skrll } else if (chan->channel >= 5260 && chan->channel < 5500) {
185 1.2.4.2 skrll ob5GHz = ee->ee_ob2;
186 1.2.4.2 skrll db5GHz = ee->ee_db2;
187 1.2.4.2 skrll } else if (chan->channel >= 5500 && chan->channel < 5725) {
188 1.2.4.2 skrll ob5GHz = ee->ee_ob3;
189 1.2.4.2 skrll db5GHz = ee->ee_db3;
190 1.2.4.2 skrll } else if (chan->channel >= 5725) {
191 1.2.4.2 skrll ob5GHz = ee->ee_ob4;
192 1.2.4.2 skrll db5GHz = ee->ee_db4;
193 1.2.4.2 skrll } else {
194 1.2.4.2 skrll /* XXX else */
195 1.2.4.2 skrll }
196 1.2.4.2 skrll break;
197 1.2.4.2 skrll case CHANNEL_B:
198 1.2.4.2 skrll ob2GHz = ee->ee_obFor24;
199 1.2.4.2 skrll db2GHz = ee->ee_dbFor24;
200 1.2.4.2 skrll break;
201 1.2.4.2 skrll case CHANNEL_G:
202 1.2.4.2 skrll case CHANNEL_108G:
203 1.2.4.2 skrll ob2GHz = ee->ee_obFor24g;
204 1.2.4.2 skrll db2GHz = ee->ee_dbFor24g;
205 1.2.4.2 skrll break;
206 1.2.4.2 skrll default:
207 1.2.4.2 skrll HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n",
208 1.2.4.2 skrll __func__, chan->channelFlags);
209 1.2.4.2 skrll return AH_FALSE;
210 1.2.4.2 skrll }
211 1.2.4.2 skrll
212 1.2.4.2 skrll /* Bank 1 Write */
213 1.2.4.2 skrll RF_BANK_SETUP(priv, 1, 1);
214 1.2.4.2 skrll
215 1.2.4.2 skrll /* Bank 2 Write */
216 1.2.4.2 skrll RF_BANK_SETUP(priv, 2, modesIndex);
217 1.2.4.2 skrll
218 1.2.4.2 skrll /* Bank 3 Write */
219 1.2.4.2 skrll RF_BANK_SETUP(priv, 3, modesIndex);
220 1.2.4.2 skrll
221 1.2.4.2 skrll /* Bank 6 Write */
222 1.2.4.2 skrll RF_BANK_SETUP(priv, 6, modesIndex);
223 1.2.4.2 skrll
224 1.2.4.2 skrll /* Only the 5 or 2 GHz OB/DB need to be set for a mode */
225 1.2.4.2 skrll if (IS_CHAN_2GHZ(chan)) {
226 1.2.4.2 skrll ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 241, 0);
227 1.2.4.2 skrll ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 238, 0);
228 1.2.4.2 skrll
229 1.2.4.2 skrll /* TODO - only for Eagle 1.0 2GHz - remove for production */
230 1.2.4.2 skrll /* XXX: but without this bit G doesn't work. */
231 1.2.4.2 skrll ar5212ModifyRfBuffer(priv->Bank6Data, 1 , 1, 291, 2);
232 1.2.4.2 skrll
233 1.2.4.2 skrll /* Optimum value for rf_pwd_iclobuf2G for PCIe chips only */
234 1.2.4.2 skrll if (IS_PCIE(ah)) {
235 1.2.4.2 skrll ar5212ModifyRfBuffer(priv->Bank6Data, ath_hal_reverseBits(6, 3),
236 1.2.4.2 skrll 3, 131, 3);
237 1.2.4.2 skrll }
238 1.2.4.2 skrll } else {
239 1.2.4.2 skrll ar5212ModifyRfBuffer(priv->Bank6Data, ob5GHz, 3, 247, 0);
240 1.2.4.2 skrll ar5212ModifyRfBuffer(priv->Bank6Data, db5GHz, 3, 244, 0);
241 1.2.4.2 skrll
242 1.2.4.2 skrll }
243 1.2.4.2 skrll
244 1.2.4.2 skrll /* Bank 7 Setup */
245 1.2.4.2 skrll RF_BANK_SETUP(priv, 7, modesIndex);
246 1.2.4.2 skrll
247 1.2.4.2 skrll /* Write Analog registers */
248 1.2.4.2 skrll HAL_INI_WRITE_BANK(ah, ar5212Bank1_5413, priv->Bank1Data, regWrites);
249 1.2.4.2 skrll HAL_INI_WRITE_BANK(ah, ar5212Bank2_5413, priv->Bank2Data, regWrites);
250 1.2.4.2 skrll HAL_INI_WRITE_BANK(ah, ar5212Bank3_5413, priv->Bank3Data, regWrites);
251 1.2.4.2 skrll HAL_INI_WRITE_BANK(ah, ar5212Bank6_5413, priv->Bank6Data, regWrites);
252 1.2.4.2 skrll HAL_INI_WRITE_BANK(ah, ar5212Bank7_5413, priv->Bank7Data, regWrites);
253 1.2.4.2 skrll
254 1.2.4.2 skrll /* Now that we have reprogrammed rfgain value, clear the flag. */
255 1.2.4.2 skrll ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE;
256 1.2.4.2 skrll
257 1.2.4.2 skrll return AH_TRUE;
258 1.2.4.2 skrll #undef RF_BANK_SETUP
259 1.2.4.2 skrll }
260 1.2.4.2 skrll
261 1.2.4.2 skrll /*
262 1.2.4.2 skrll * Return a reference to the requested RF Bank.
263 1.2.4.2 skrll */
264 1.2.4.2 skrll static uint32_t *
265 1.2.4.2 skrll ar5413GetRfBank(struct ath_hal *ah, int bank)
266 1.2.4.2 skrll {
267 1.2.4.2 skrll struct ar5413State *priv = AR5413(ah);
268 1.2.4.2 skrll
269 1.2.4.2 skrll HALASSERT(priv != AH_NULL);
270 1.2.4.2 skrll switch (bank) {
271 1.2.4.2 skrll case 1: return priv->Bank1Data;
272 1.2.4.2 skrll case 2: return priv->Bank2Data;
273 1.2.4.2 skrll case 3: return priv->Bank3Data;
274 1.2.4.2 skrll case 6: return priv->Bank6Data;
275 1.2.4.2 skrll case 7: return priv->Bank7Data;
276 1.2.4.2 skrll }
277 1.2.4.2 skrll HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
278 1.2.4.2 skrll __func__, bank);
279 1.2.4.2 skrll return AH_NULL;
280 1.2.4.2 skrll }
281 1.2.4.2 skrll
282 1.2.4.2 skrll /*
283 1.2.4.2 skrll * Return indices surrounding the value in sorted integer lists.
284 1.2.4.2 skrll *
285 1.2.4.2 skrll * NB: the input list is assumed to be sorted in ascending order
286 1.2.4.2 skrll */
287 1.2.4.2 skrll static void
288 1.2.4.2 skrll GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize,
289 1.2.4.2 skrll uint32_t *vlo, uint32_t *vhi)
290 1.2.4.2 skrll {
291 1.2.4.2 skrll int16_t target = v;
292 1.2.4.2 skrll const uint16_t *ep = lp+listSize;
293 1.2.4.2 skrll const uint16_t *tp;
294 1.2.4.2 skrll
295 1.2.4.2 skrll /*
296 1.2.4.2 skrll * Check first and last elements for out-of-bounds conditions.
297 1.2.4.2 skrll */
298 1.2.4.2 skrll if (target < lp[0]) {
299 1.2.4.2 skrll *vlo = *vhi = 0;
300 1.2.4.2 skrll return;
301 1.2.4.2 skrll }
302 1.2.4.2 skrll if (target >= ep[-1]) {
303 1.2.4.2 skrll *vlo = *vhi = listSize - 1;
304 1.2.4.2 skrll return;
305 1.2.4.2 skrll }
306 1.2.4.2 skrll
307 1.2.4.2 skrll /* look for value being near or between 2 values in list */
308 1.2.4.2 skrll for (tp = lp; tp < ep; tp++) {
309 1.2.4.2 skrll /*
310 1.2.4.2 skrll * If value is close to the current value of the list
311 1.2.4.2 skrll * then target is not between values, it is one of the values
312 1.2.4.2 skrll */
313 1.2.4.2 skrll if (*tp == target) {
314 1.2.4.2 skrll *vlo = *vhi = tp - (const uint16_t *) lp;
315 1.2.4.2 skrll return;
316 1.2.4.2 skrll }
317 1.2.4.2 skrll /*
318 1.2.4.2 skrll * Look for value being between current value and next value
319 1.2.4.2 skrll * if so return these 2 values
320 1.2.4.2 skrll */
321 1.2.4.2 skrll if (target < tp[1]) {
322 1.2.4.2 skrll *vlo = tp - (const uint16_t *) lp;
323 1.2.4.2 skrll *vhi = *vlo + 1;
324 1.2.4.2 skrll return;
325 1.2.4.2 skrll }
326 1.2.4.2 skrll }
327 1.2.4.2 skrll }
328 1.2.4.2 skrll
329 1.2.4.2 skrll /*
330 1.2.4.2 skrll * Fill the Vpdlist for indices Pmax-Pmin
331 1.2.4.2 skrll */
332 1.2.4.2 skrll static HAL_BOOL
333 1.2.4.2 skrll ar5413FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t Pmax,
334 1.2.4.2 skrll const int16_t *pwrList, const uint16_t *VpdList,
335 1.2.4.2 skrll uint16_t numIntercepts,
336 1.2.4.2 skrll uint16_t retVpdList[][64])
337 1.2.4.2 skrll {
338 1.2.4.2 skrll uint16_t ii, jj, kk;
339 1.2.4.2 skrll int16_t currPwr = (int16_t)(2*Pmin);
340 1.2.4.2 skrll /* since Pmin is pwr*2 and pwrList is 4*pwr */
341 1.2.4.2 skrll uint32_t idxL = 0, idxR = 0;
342 1.2.4.2 skrll
343 1.2.4.2 skrll ii = 0;
344 1.2.4.2 skrll jj = 0;
345 1.2.4.2 skrll
346 1.2.4.2 skrll if (numIntercepts < 2)
347 1.2.4.2 skrll return AH_FALSE;
348 1.2.4.2 skrll
349 1.2.4.2 skrll while (ii <= (uint16_t)(Pmax - Pmin)) {
350 1.2.4.2 skrll GetLowerUpperIndex(currPwr, (const uint16_t *) pwrList,
351 1.2.4.2 skrll numIntercepts, &(idxL), &(idxR));
352 1.2.4.2 skrll if (idxR < 1)
353 1.2.4.2 skrll idxR = 1; /* extrapolate below */
354 1.2.4.2 skrll if (idxL == (uint32_t)(numIntercepts - 1))
355 1.2.4.2 skrll idxL = numIntercepts - 2; /* extrapolate above */
356 1.2.4.2 skrll if (pwrList[idxL] == pwrList[idxR])
357 1.2.4.2 skrll kk = VpdList[idxL];
358 1.2.4.2 skrll else
359 1.2.4.2 skrll kk = (uint16_t)
360 1.2.4.2 skrll (((currPwr - pwrList[idxL])*VpdList[idxR]+
361 1.2.4.2 skrll (pwrList[idxR] - currPwr)*VpdList[idxL])/
362 1.2.4.2 skrll (pwrList[idxR] - pwrList[idxL]));
363 1.2.4.2 skrll retVpdList[pdGainIdx][ii] = kk;
364 1.2.4.2 skrll ii++;
365 1.2.4.2 skrll currPwr += 2; /* half dB steps */
366 1.2.4.2 skrll }
367 1.2.4.2 skrll
368 1.2.4.2 skrll return AH_TRUE;
369 1.2.4.2 skrll }
370 1.2.4.2 skrll
371 1.2.4.2 skrll /*
372 1.2.4.2 skrll * Returns interpolated or the scaled up interpolated value
373 1.2.4.2 skrll */
374 1.2.4.2 skrll static int16_t
375 1.2.4.2 skrll interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight,
376 1.2.4.2 skrll int16_t targetLeft, int16_t targetRight)
377 1.2.4.2 skrll {
378 1.2.4.2 skrll int16_t rv;
379 1.2.4.2 skrll
380 1.2.4.2 skrll if (srcRight != srcLeft) {
381 1.2.4.2 skrll rv = ((target - srcLeft)*targetRight +
382 1.2.4.2 skrll (srcRight - target)*targetLeft) / (srcRight - srcLeft);
383 1.2.4.2 skrll } else {
384 1.2.4.2 skrll rv = targetLeft;
385 1.2.4.2 skrll }
386 1.2.4.2 skrll return rv;
387 1.2.4.2 skrll }
388 1.2.4.2 skrll
389 1.2.4.2 skrll /*
390 1.2.4.2 skrll * Uses the data points read from EEPROM to reconstruct the pdadc power table
391 1.2.4.2 skrll * Called by ar5413SetPowerTable()
392 1.2.4.2 skrll */
393 1.2.4.2 skrll static int
394 1.2.4.2 skrll ar5413getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
395 1.2.4.2 skrll const RAW_DATA_STRUCT_2413 *pRawDataset,
396 1.2.4.2 skrll uint16_t pdGainOverlap_t2,
397 1.2.4.2 skrll int16_t *pMinCalPower, uint16_t pPdGainBoundaries[],
398 1.2.4.2 skrll uint16_t pPdGainValues[], uint16_t pPDADCValues[])
399 1.2.4.2 skrll {
400 1.2.4.2 skrll struct ar5413State *priv = AR5413(ah);
401 1.2.4.2 skrll #define VpdTable_L priv->vpdTable_L
402 1.2.4.2 skrll #define VpdTable_R priv->vpdTable_R
403 1.2.4.2 skrll #define VpdTable_I priv->vpdTable_I
404 1.2.4.2 skrll uint32_t ii, jj, kk;
405 1.2.4.2 skrll int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */
406 1.2.4.2 skrll uint32_t idxL = 0, idxR = 0;
407 1.2.4.2 skrll uint32_t numPdGainsUsed = 0;
408 1.2.4.2 skrll /*
409 1.2.4.2 skrll * If desired to support -ve power levels in future, just
410 1.2.4.2 skrll * change pwr_I_0 to signed 5-bits.
411 1.2.4.2 skrll */
412 1.2.4.2 skrll int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
413 1.2.4.2 skrll /* to accomodate -ve power levels later on. */
414 1.2.4.2 skrll int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
415 1.2.4.2 skrll /* to accomodate -ve power levels later on */
416 1.2.4.2 skrll uint16_t numVpd = 0;
417 1.2.4.2 skrll uint16_t Vpd_step;
418 1.2.4.2 skrll int16_t tmpVal ;
419 1.2.4.2 skrll uint32_t sizeCurrVpdTable, maxIndex, tgtIndex;
420 1.2.4.2 skrll
421 1.2.4.2 skrll /* Get upper lower index */
422 1.2.4.2 skrll GetLowerUpperIndex(channel, pRawDataset->pChannels,
423 1.2.4.2 skrll pRawDataset->numChannels, &(idxL), &(idxR));
424 1.2.4.2 skrll
425 1.2.4.2 skrll for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
426 1.2.4.2 skrll jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
427 1.2.4.2 skrll /* work backwards 'cause highest pdGain for lowest power */
428 1.2.4.2 skrll numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd;
429 1.2.4.2 skrll if (numVpd > 0) {
430 1.2.4.2 skrll pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain;
431 1.2.4.2 skrll Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0];
432 1.2.4.2 skrll if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) {
433 1.2.4.2 skrll Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0];
434 1.2.4.2 skrll }
435 1.2.4.2 skrll Pmin_t2[numPdGainsUsed] = (int16_t)
436 1.2.4.2 skrll (Pmin_t2[numPdGainsUsed] / 2);
437 1.2.4.2 skrll Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1];
438 1.2.4.2 skrll if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1])
439 1.2.4.2 skrll Pmax_t2[numPdGainsUsed] =
440 1.2.4.2 skrll pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1];
441 1.2.4.2 skrll Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2);
442 1.2.4.2 skrll ar5413FillVpdTable(
443 1.2.4.2 skrll numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
444 1.2.4.2 skrll &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]),
445 1.2.4.2 skrll &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L
446 1.2.4.2 skrll );
447 1.2.4.2 skrll ar5413FillVpdTable(
448 1.2.4.2 skrll numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
449 1.2.4.2 skrll &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]),
450 1.2.4.2 skrll &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R
451 1.2.4.2 skrll );
452 1.2.4.2 skrll for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) {
453 1.2.4.2 skrll VpdTable_I[numPdGainsUsed][kk] =
454 1.2.4.2 skrll interpolate_signed(
455 1.2.4.2 skrll channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR],
456 1.2.4.2 skrll (int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]);
457 1.2.4.2 skrll }
458 1.2.4.2 skrll /* fill VpdTable_I for this pdGain */
459 1.2.4.2 skrll numPdGainsUsed++;
460 1.2.4.2 skrll }
461 1.2.4.2 skrll /* if this pdGain is used */
462 1.2.4.2 skrll }
463 1.2.4.2 skrll
464 1.2.4.2 skrll *pMinCalPower = Pmin_t2[0];
465 1.2.4.2 skrll kk = 0; /* index for the final table */
466 1.2.4.2 skrll for (ii = 0; ii < numPdGainsUsed; ii++) {
467 1.2.4.2 skrll if (ii == (numPdGainsUsed - 1))
468 1.2.4.2 skrll pPdGainBoundaries[ii] = Pmax_t2[ii] +
469 1.2.4.2 skrll PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB;
470 1.2.4.2 skrll else
471 1.2.4.2 skrll pPdGainBoundaries[ii] = (uint16_t)
472 1.2.4.2 skrll ((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 );
473 1.2.4.2 skrll if (pPdGainBoundaries[ii] > 63) {
474 1.2.4.2 skrll HALDEBUG(ah, HAL_DEBUG_ANY,
475 1.2.4.2 skrll "%s: clamp pPdGainBoundaries[%d] %d\n",
476 1.2.4.2 skrll __func__, ii, pPdGainBoundaries[ii]);/*XXX*/
477 1.2.4.2 skrll pPdGainBoundaries[ii] = 63;
478 1.2.4.2 skrll }
479 1.2.4.2 skrll
480 1.2.4.2 skrll /* Find starting index for this pdGain */
481 1.2.4.2 skrll if (ii == 0)
482 1.2.4.2 skrll ss = 0; /* for the first pdGain, start from index 0 */
483 1.2.4.2 skrll else
484 1.2.4.2 skrll ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) -
485 1.2.4.2 skrll pdGainOverlap_t2;
486 1.2.4.2 skrll Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]);
487 1.2.4.2 skrll Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
488 1.2.4.2 skrll /*
489 1.2.4.2 skrll *-ve ss indicates need to extrapolate data below for this pdGain
490 1.2.4.2 skrll */
491 1.2.4.2 skrll while (ss < 0) {
492 1.2.4.2 skrll tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step);
493 1.2.4.2 skrll pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal);
494 1.2.4.2 skrll ss++;
495 1.2.4.2 skrll }
496 1.2.4.2 skrll
497 1.2.4.2 skrll sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii];
498 1.2.4.2 skrll tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii];
499 1.2.4.2 skrll maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable;
500 1.2.4.2 skrll
501 1.2.4.2 skrll while (ss < (int16_t)maxIndex)
502 1.2.4.2 skrll pPDADCValues[kk++] = VpdTable_I[ii][ss++];
503 1.2.4.2 skrll
504 1.2.4.2 skrll Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] -
505 1.2.4.2 skrll VpdTable_I[ii][sizeCurrVpdTable-2]);
506 1.2.4.2 skrll Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
507 1.2.4.2 skrll /*
508 1.2.4.2 skrll * for last gain, pdGainBoundary == Pmax_t2, so will
509 1.2.4.2 skrll * have to extrapolate
510 1.2.4.2 skrll */
511 1.2.4.2 skrll if (tgtIndex > maxIndex) { /* need to extrapolate above */
512 1.2.4.2 skrll while(ss < (int16_t)tgtIndex) {
513 1.2.4.2 skrll tmpVal = (uint16_t)
514 1.2.4.2 skrll (VpdTable_I[ii][sizeCurrVpdTable-1] +
515 1.2.4.2 skrll (ss-maxIndex)*Vpd_step);
516 1.2.4.2 skrll pPDADCValues[kk++] = (tmpVal > 127) ?
517 1.2.4.2 skrll 127 : tmpVal;
518 1.2.4.2 skrll ss++;
519 1.2.4.2 skrll }
520 1.2.4.2 skrll } /* extrapolated above */
521 1.2.4.2 skrll } /* for all pdGainUsed */
522 1.2.4.2 skrll
523 1.2.4.2 skrll while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) {
524 1.2.4.2 skrll pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1];
525 1.2.4.2 skrll ii++;
526 1.2.4.2 skrll }
527 1.2.4.2 skrll while (kk < 128) {
528 1.2.4.2 skrll pPDADCValues[kk] = pPDADCValues[kk-1];
529 1.2.4.2 skrll kk++;
530 1.2.4.2 skrll }
531 1.2.4.2 skrll
532 1.2.4.2 skrll return numPdGainsUsed;
533 1.2.4.2 skrll #undef VpdTable_L
534 1.2.4.2 skrll #undef VpdTable_R
535 1.2.4.2 skrll #undef VpdTable_I
536 1.2.4.2 skrll }
537 1.2.4.2 skrll
538 1.2.4.2 skrll static HAL_BOOL
539 1.2.4.2 skrll ar5413SetPowerTable(struct ath_hal *ah,
540 1.2.4.2 skrll int16_t *minPower, int16_t *maxPower, HAL_CHANNEL_INTERNAL *chan,
541 1.2.4.2 skrll uint16_t *rfXpdGain)
542 1.2.4.2 skrll {
543 1.2.4.2 skrll struct ath_hal_5212 *ahp = AH5212(ah);
544 1.2.4.2 skrll const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
545 1.2.4.2 skrll const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;
546 1.2.4.2 skrll uint16_t pdGainOverlap_t2;
547 1.2.4.2 skrll int16_t minCalPower5413_t2;
548 1.2.4.2 skrll uint16_t *pdadcValues = ahp->ah_pcdacTable;
549 1.2.4.2 skrll uint16_t gainBoundaries[4];
550 1.2.4.2 skrll uint32_t reg32, regoffset;
551 1.2.4.2 skrll int i, numPdGainsUsed;
552 1.2.4.2 skrll #ifndef AH_USE_INIPDGAIN
553 1.2.4.2 skrll uint32_t tpcrg1;
554 1.2.4.2 skrll #endif
555 1.2.4.2 skrll
556 1.2.4.2 skrll HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan 0x%x flag 0x%x\n",
557 1.2.4.2 skrll __func__, chan->channel,chan->channelFlags);
558 1.2.4.2 skrll
559 1.2.4.2 skrll if (IS_CHAN_G(chan) || IS_CHAN_108G(chan))
560 1.2.4.2 skrll pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
561 1.2.4.2 skrll else if (IS_CHAN_B(chan))
562 1.2.4.2 skrll pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
563 1.2.4.2 skrll else {
564 1.2.4.2 skrll HALASSERT(IS_CHAN_5GHZ(chan));
565 1.2.4.2 skrll pRawDataset = &ee->ee_rawDataset2413[headerInfo11A];
566 1.2.4.2 skrll }
567 1.2.4.2 skrll
568 1.2.4.2 skrll pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5),
569 1.2.4.2 skrll AR_PHY_TPCRG5_PD_GAIN_OVERLAP);
570 1.2.4.2 skrll
571 1.2.4.2 skrll numPdGainsUsed = ar5413getGainBoundariesAndPdadcsForPowers(ah,
572 1.2.4.2 skrll chan->channel, pRawDataset, pdGainOverlap_t2,
573 1.2.4.2 skrll &minCalPower5413_t2,gainBoundaries, rfXpdGain, pdadcValues);
574 1.2.4.2 skrll HALASSERT(1 <= numPdGainsUsed && numPdGainsUsed <= 3);
575 1.2.4.2 skrll
576 1.2.4.2 skrll #ifdef AH_USE_INIPDGAIN
577 1.2.4.2 skrll /*
578 1.2.4.2 skrll * Use pd_gains curve from eeprom; Atheros always uses
579 1.2.4.2 skrll * the default curve from the ini file but some vendors
580 1.2.4.2 skrll * (e.g. Zcomax) want to override this curve and not
581 1.2.4.2 skrll * honoring their settings results in tx power 5dBm low.
582 1.2.4.2 skrll */
583 1.2.4.2 skrll OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
584 1.2.4.2 skrll (pRawDataset->pDataPerChannel[0].numPdGains - 1));
585 1.2.4.2 skrll #else
586 1.2.4.2 skrll tpcrg1 = OS_REG_READ(ah, AR_PHY_TPCRG1);
587 1.2.4.2 skrll tpcrg1 = (tpcrg1 &~ AR_PHY_TPCRG1_NUM_PD_GAIN)
588 1.2.4.2 skrll | SM(numPdGainsUsed-1, AR_PHY_TPCRG1_NUM_PD_GAIN);
589 1.2.4.2 skrll switch (numPdGainsUsed) {
590 1.2.4.2 skrll case 3:
591 1.2.4.2 skrll tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING3;
592 1.2.4.2 skrll tpcrg1 |= SM(rfXpdGain[2], AR_PHY_TPCRG1_PDGAIN_SETTING3);
593 1.2.4.2 skrll /* fall thru... */
594 1.2.4.2 skrll case 2:
595 1.2.4.2 skrll tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING2;
596 1.2.4.2 skrll tpcrg1 |= SM(rfXpdGain[1], AR_PHY_TPCRG1_PDGAIN_SETTING2);
597 1.2.4.2 skrll /* fall thru... */
598 1.2.4.2 skrll case 1:
599 1.2.4.2 skrll tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING1;
600 1.2.4.2 skrll tpcrg1 |= SM(rfXpdGain[0], AR_PHY_TPCRG1_PDGAIN_SETTING1);
601 1.2.4.2 skrll break;
602 1.2.4.2 skrll }
603 1.2.4.2 skrll #ifdef AH_DEBUG
604 1.2.4.2 skrll if (tpcrg1 != OS_REG_READ(ah, AR_PHY_TPCRG1))
605 1.2.4.2 skrll HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: using non-default "
606 1.2.4.2 skrll "pd_gains (default 0x%x, calculated 0x%x)\n",
607 1.2.4.2 skrll __func__, OS_REG_READ(ah, AR_PHY_TPCRG1), tpcrg1);
608 1.2.4.2 skrll #endif
609 1.2.4.2 skrll OS_REG_WRITE(ah, AR_PHY_TPCRG1, tpcrg1);
610 1.2.4.2 skrll #endif
611 1.2.4.2 skrll
612 1.2.4.2 skrll /*
613 1.2.4.2 skrll * Note the pdadc table may not start at 0 dBm power, could be
614 1.2.4.2 skrll * negative or greater than 0. Need to offset the power
615 1.2.4.2 skrll * values by the amount of minPower for griffin
616 1.2.4.2 skrll */
617 1.2.4.2 skrll if (minCalPower5413_t2 != 0)
618 1.2.4.2 skrll ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower5413_t2);
619 1.2.4.2 skrll else
620 1.2.4.2 skrll ahp->ah_txPowerIndexOffset = 0;
621 1.2.4.2 skrll
622 1.2.4.2 skrll /* Finally, write the power values into the baseband power table */
623 1.2.4.2 skrll regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */
624 1.2.4.2 skrll for (i = 0; i < 32; i++) {
625 1.2.4.2 skrll reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) |
626 1.2.4.2 skrll ((pdadcValues[4*i + 1] & 0xFF) << 8) |
627 1.2.4.2 skrll ((pdadcValues[4*i + 2] & 0xFF) << 16) |
628 1.2.4.2 skrll ((pdadcValues[4*i + 3] & 0xFF) << 24) ;
629 1.2.4.2 skrll OS_REG_WRITE(ah, regoffset, reg32);
630 1.2.4.2 skrll regoffset += 4;
631 1.2.4.2 skrll }
632 1.2.4.2 skrll
633 1.2.4.2 skrll OS_REG_WRITE(ah, AR_PHY_TPCRG5,
634 1.2.4.2 skrll SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |
635 1.2.4.2 skrll SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) |
636 1.2.4.2 skrll SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) |
637 1.2.4.2 skrll SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) |
638 1.2.4.2 skrll SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));
639 1.2.4.2 skrll
640 1.2.4.2 skrll return AH_TRUE;
641 1.2.4.2 skrll }
642 1.2.4.2 skrll
643 1.2.4.2 skrll static int16_t
644 1.2.4.2 skrll ar5413GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
645 1.2.4.2 skrll {
646 1.2.4.2 skrll uint32_t ii,jj;
647 1.2.4.2 skrll uint16_t Pmin=0,numVpd;
648 1.2.4.2 skrll
649 1.2.4.2 skrll for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
650 1.2.4.2 skrll jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
651 1.2.4.2 skrll /* work backwards 'cause highest pdGain for lowest power */
652 1.2.4.2 skrll numVpd = data->pDataPerPDGain[jj].numVpd;
653 1.2.4.2 skrll if (numVpd > 0) {
654 1.2.4.2 skrll Pmin = data->pDataPerPDGain[jj].pwr_t4[0];
655 1.2.4.2 skrll return(Pmin);
656 1.2.4.2 skrll }
657 1.2.4.2 skrll }
658 1.2.4.2 skrll return(Pmin);
659 1.2.4.2 skrll }
660 1.2.4.2 skrll
661 1.2.4.2 skrll static int16_t
662 1.2.4.2 skrll ar5413GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
663 1.2.4.2 skrll {
664 1.2.4.2 skrll uint32_t ii;
665 1.2.4.2 skrll uint16_t Pmax=0,numVpd;
666 1.2.4.2 skrll
667 1.2.4.2 skrll for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
668 1.2.4.2 skrll /* work forwards cuase lowest pdGain for highest power */
669 1.2.4.2 skrll numVpd = data->pDataPerPDGain[ii].numVpd;
670 1.2.4.2 skrll if (numVpd > 0) {
671 1.2.4.2 skrll Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1];
672 1.2.4.2 skrll return(Pmax);
673 1.2.4.2 skrll }
674 1.2.4.2 skrll }
675 1.2.4.2 skrll return(Pmax);
676 1.2.4.2 skrll }
677 1.2.4.2 skrll
678 1.2.4.2 skrll static HAL_BOOL
679 1.2.4.2 skrll ar5413GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan,
680 1.2.4.2 skrll int16_t *maxPow, int16_t *minPow)
681 1.2.4.2 skrll {
682 1.2.4.2 skrll const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
683 1.2.4.2 skrll const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;
684 1.2.4.2 skrll const RAW_DATA_PER_CHANNEL_2413 *data=AH_NULL;
685 1.2.4.2 skrll uint16_t numChannels;
686 1.2.4.2 skrll int totalD,totalF, totalMin,last, i;
687 1.2.4.2 skrll
688 1.2.4.2 skrll *maxPow = 0;
689 1.2.4.2 skrll
690 1.2.4.2 skrll if (IS_CHAN_G(chan) || IS_CHAN_108G(chan))
691 1.2.4.2 skrll pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
692 1.2.4.2 skrll else if (IS_CHAN_B(chan))
693 1.2.4.2 skrll pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
694 1.2.4.2 skrll else {
695 1.2.4.2 skrll HALASSERT(IS_CHAN_5GHZ(chan));
696 1.2.4.2 skrll pRawDataset = &ee->ee_rawDataset2413[headerInfo11A];
697 1.2.4.2 skrll }
698 1.2.4.2 skrll
699 1.2.4.2 skrll numChannels = pRawDataset->numChannels;
700 1.2.4.2 skrll data = pRawDataset->pDataPerChannel;
701 1.2.4.2 skrll
702 1.2.4.2 skrll /* Make sure the channel is in the range of the TP values
703 1.2.4.2 skrll * (freq piers)
704 1.2.4.2 skrll */
705 1.2.4.2 skrll if (numChannels < 1)
706 1.2.4.2 skrll return(AH_FALSE);
707 1.2.4.2 skrll
708 1.2.4.2 skrll if ((chan->channel < data[0].channelValue) ||
709 1.2.4.2 skrll (chan->channel > data[numChannels-1].channelValue)) {
710 1.2.4.2 skrll if (chan->channel < data[0].channelValue) {
711 1.2.4.2 skrll *maxPow = ar5413GetMaxPower(ah, &data[0]);
712 1.2.4.2 skrll *minPow = ar5413GetMinPower(ah, &data[0]);
713 1.2.4.2 skrll return(AH_TRUE);
714 1.2.4.2 skrll } else {
715 1.2.4.2 skrll *maxPow = ar5413GetMaxPower(ah, &data[numChannels - 1]);
716 1.2.4.2 skrll *minPow = ar5413GetMinPower(ah, &data[numChannels - 1]);
717 1.2.4.2 skrll return(AH_TRUE);
718 1.2.4.2 skrll }
719 1.2.4.2 skrll }
720 1.2.4.2 skrll
721 1.2.4.2 skrll /* Linearly interpolate the power value now */
722 1.2.4.2 skrll for (last=0,i=0; (i<numChannels) && (chan->channel > data[i].channelValue);
723 1.2.4.2 skrll last = i++);
724 1.2.4.2 skrll totalD = data[i].channelValue - data[last].channelValue;
725 1.2.4.2 skrll if (totalD > 0) {
726 1.2.4.2 skrll totalF = ar5413GetMaxPower(ah, &data[i]) - ar5413GetMaxPower(ah, &data[last]);
727 1.2.4.2 skrll *maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) +
728 1.2.4.2 skrll ar5413GetMaxPower(ah, &data[last])*totalD)/totalD);
729 1.2.4.2 skrll totalMin = ar5413GetMinPower(ah, &data[i]) - ar5413GetMinPower(ah, &data[last]);
730 1.2.4.2 skrll *minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) +
731 1.2.4.2 skrll ar5413GetMinPower(ah, &data[last])*totalD)/totalD);
732 1.2.4.2 skrll return(AH_TRUE);
733 1.2.4.2 skrll } else {
734 1.2.4.2 skrll if (chan->channel == data[i].channelValue) {
735 1.2.4.2 skrll *maxPow = ar5413GetMaxPower(ah, &data[i]);
736 1.2.4.2 skrll *minPow = ar5413GetMinPower(ah, &data[i]);
737 1.2.4.2 skrll return(AH_TRUE);
738 1.2.4.2 skrll } else
739 1.2.4.2 skrll return(AH_FALSE);
740 1.2.4.2 skrll }
741 1.2.4.2 skrll }
742 1.2.4.2 skrll
743 1.2.4.2 skrll /*
744 1.2.4.2 skrll * Free memory for analog bank scratch buffers
745 1.2.4.2 skrll */
746 1.2.4.2 skrll static void
747 1.2.4.2 skrll ar5413RfDetach(struct ath_hal *ah)
748 1.2.4.2 skrll {
749 1.2.4.2 skrll struct ath_hal_5212 *ahp = AH5212(ah);
750 1.2.4.2 skrll
751 1.2.4.2 skrll HALASSERT(ahp->ah_rfHal != AH_NULL);
752 1.2.4.2 skrll ath_hal_free(ahp->ah_rfHal);
753 1.2.4.2 skrll ahp->ah_rfHal = AH_NULL;
754 1.2.4.2 skrll }
755 1.2.4.2 skrll
756 1.2.4.2 skrll /*
757 1.2.4.2 skrll * Allocate memory for analog bank scratch buffers
758 1.2.4.2 skrll * Scratch Buffer will be reinitialized every reset so no need to zero now
759 1.2.4.2 skrll */
760 1.2.4.2 skrll static HAL_BOOL
761 1.2.4.2 skrll ar5413RfAttach(struct ath_hal *ah, HAL_STATUS *status)
762 1.2.4.2 skrll {
763 1.2.4.2 skrll struct ath_hal_5212 *ahp = AH5212(ah);
764 1.2.4.2 skrll struct ar5413State *priv;
765 1.2.4.2 skrll
766 1.2.4.2 skrll HALASSERT(ah->ah_magic == AR5212_MAGIC);
767 1.2.4.2 skrll
768 1.2.4.2 skrll HALASSERT(ahp->ah_rfHal == AH_NULL);
769 1.2.4.2 skrll priv = ath_hal_malloc(sizeof(struct ar5413State));
770 1.2.4.2 skrll if (priv == AH_NULL) {
771 1.2.4.2 skrll HALDEBUG(ah, HAL_DEBUG_ANY,
772 1.2.4.2 skrll "%s: cannot allocate private state\n", __func__);
773 1.2.4.2 skrll *status = HAL_ENOMEM; /* XXX */
774 1.2.4.2 skrll return AH_FALSE;
775 1.2.4.2 skrll }
776 1.2.4.2 skrll priv->base.rfDetach = ar5413RfDetach;
777 1.2.4.2 skrll priv->base.writeRegs = ar5413WriteRegs;
778 1.2.4.2 skrll priv->base.getRfBank = ar5413GetRfBank;
779 1.2.4.2 skrll priv->base.setChannel = ar5413SetChannel;
780 1.2.4.2 skrll priv->base.setRfRegs = ar5413SetRfRegs;
781 1.2.4.2 skrll priv->base.setPowerTable = ar5413SetPowerTable;
782 1.2.4.2 skrll priv->base.getChannelMaxMinPower = ar5413GetChannelMaxMinPower;
783 1.2.4.2 skrll priv->base.getNfAdjust = ar5212GetNfAdjust;
784 1.2.4.2 skrll
785 1.2.4.2 skrll ahp->ah_pcdacTable = priv->pcdacTable;
786 1.2.4.2 skrll ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
787 1.2.4.2 skrll ahp->ah_rfHal = &priv->base;
788 1.2.4.2 skrll
789 1.2.4.2 skrll return AH_TRUE;
790 1.2.4.2 skrll }
791 1.2.4.2 skrll
792 1.2.4.2 skrll static HAL_BOOL
793 1.2.4.2 skrll ar5413Probe(struct ath_hal *ah)
794 1.2.4.2 skrll {
795 1.2.4.2 skrll return IS_5413(ah);
796 1.2.4.2 skrll }
797 1.2.4.2 skrll AH_RF(RF5413, ar5413Probe, ar5413RfAttach);
798