ah_osdep.c revision 1.1
1 /*- 2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * 29 * $Id: ah_osdep.c,v 1.1 2008/12/11 05:37:40 alc Exp $ 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: ah_osdep.c,v 1.1 2008/12/11 05:37:40 alc Exp $"); 34 35 #include "opt_athhal.h" 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/sysctl.h> 41 #include <sys/malloc.h> 42 #include <sys/proc.h> 43 #include <sys/kauth.h> 44 45 #include <machine/stdarg.h> 46 47 #include <net/if.h> 48 #include <net/if_dl.h> 49 #include <net/if_media.h> 50 #include <net/if_arp.h> 51 #include <net/if_ether.h> 52 53 #include <external/isc/atheros_hal/dist/ah.h> 54 55 #ifdef __mips__ 56 #include <sys/cpu.h> 57 58 #define ENTER lwp_t *savlwp = curlwp; curlwp = cpu_info_store.ci_curlwp; 59 #define EXIT curlwp = savlwp; 60 #else 61 #define ENTER /* nothing */ 62 #define EXIT /* nothing */ 63 #endif 64 65 extern void ath_hal_printf(struct ath_hal *, const char*, ...) 66 __printflike(2,3); 67 extern void ath_hal_vprintf(struct ath_hal *, const char*, va_list) 68 __printflike(2, 0); 69 extern const char* ath_hal_ether_sprintf(const u_int8_t *mac); 70 extern void *ath_hal_malloc(size_t); 71 extern void ath_hal_free(void *); 72 #ifdef ATHHAL_ASSERT 73 extern void ath_hal_assert_failed(const char* filename, 74 int lineno, const char* msg); 75 #endif 76 #ifdef ATHHAL_DEBUG 77 extern void HALDEBUG(struct ath_hal *ah, const char* fmt, ...); 78 extern void HALDEBUGn(struct ath_hal *ah, u_int level, const char* fmt, ...); 79 #endif /* ATHHAL_DEBUG */ 80 81 #ifdef ATHHAL_DEBUG 82 static int ath_hal_debug = 0; 83 #endif /* ATHHAL_DEBUG */ 84 85 int ath_hal_dma_beacon_response_time = 2; /* in TU's */ 86 int ath_hal_sw_beacon_response_time = 10; /* in TU's */ 87 int ath_hal_additional_swba_backoff = 0; /* in TU's */ 88 89 SYSCTL_SETUP(sysctl_ath_hal, "sysctl ath.hal subtree setup") 90 { 91 int rc; 92 const struct sysctlnode *cnode, *rnode; 93 94 if ((rc = sysctl_createv(clog, 0, NULL, &rnode, CTLFLAG_PERMANENT, 95 CTLTYPE_NODE, "hw", NULL, NULL, 0, NULL, 0, CTL_HW, CTL_EOL)) != 0) 96 goto err; 97 98 if ((rc = sysctl_createv(clog, 0, &rnode, &rnode, CTLFLAG_PERMANENT, 99 CTLTYPE_NODE, "ath", SYSCTL_DESCR("Atheros driver parameters"), 100 NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL)) != 0) 101 goto err; 102 103 if ((rc = sysctl_createv(clog, 0, &rnode, &rnode, CTLFLAG_PERMANENT, 104 CTLTYPE_NODE, "hal", SYSCTL_DESCR("Atheros HAL parameters"), 105 NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL)) != 0) 106 goto err; 107 108 #if 0 109 if ((rc = sysctl_createv(clog, 0, &rnode, &cnode, 110 CTLFLAG_PERMANENT|CTLFLAG_READONLY, CTLTYPE_STRING, "version", 111 SYSCTL_DESCR("Atheros HAL version"), NULL, 0, &ath_hal_version, 0, 112 CTL_CREATE, CTL_EOL)) != 0) 113 goto err; 114 #endif 115 116 if ((rc = sysctl_createv(clog, 0, &rnode, &cnode, 117 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, "dma_brt", 118 SYSCTL_DESCR("Atheros HAL DMA beacon response time"), NULL, 0, 119 &ath_hal_dma_beacon_response_time, 0, CTL_CREATE, CTL_EOL)) != 0) 120 goto err; 121 122 if ((rc = sysctl_createv(clog, 0, &rnode, &cnode, 123 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, "sw_brt", 124 SYSCTL_DESCR("Atheros HAL software beacon response time"), NULL, 0, 125 &ath_hal_sw_beacon_response_time, 0, CTL_CREATE, CTL_EOL)) != 0) 126 goto err; 127 128 if ((rc = sysctl_createv(clog, 0, &rnode, &cnode, 129 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, "swba_backoff", 130 SYSCTL_DESCR("Atheros HAL additional SWBA backoff time"), NULL, 0, 131 &ath_hal_additional_swba_backoff, 0, CTL_CREATE, CTL_EOL)) != 0) 132 goto err; 133 134 #ifdef ATHHAL_DEBUG 135 if ((rc = sysctl_createv(clog, 0, &rnode, &cnode, 136 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, "debug", 137 SYSCTL_DESCR("Atheros HAL debugging printfs"), NULL, 0, 138 &ath_hal_debug, 0, CTL_CREATE, CTL_EOL)) != 0) 139 goto err; 140 #endif /* ATHHAL_DEBUG */ 141 return; 142 err: 143 printf("%s: sysctl_createv failed (rc = %d)\n", __func__, rc); 144 } 145 146 MALLOC_DEFINE(M_ATH_HAL, "ath_hal", "ath hal data"); 147 148 void* 149 ath_hal_malloc(size_t size) 150 { 151 void *ret; 152 ENTER 153 ret = malloc(size, M_ATH_HAL, M_NOWAIT | M_ZERO); 154 EXIT 155 return ret; 156 } 157 158 void 159 ath_hal_free(void* p) 160 { 161 ENTER 162 free(p, M_ATH_HAL); 163 EXIT 164 } 165 166 void 167 ath_hal_vprintf(struct ath_hal *ah, const char* fmt, va_list ap) 168 { 169 ENTER 170 vprintf(fmt, ap); 171 EXIT 172 } 173 174 void 175 ath_hal_printf(struct ath_hal *ah, const char* fmt, ...) 176 { 177 va_list ap; 178 ENTER 179 va_start(ap, fmt); 180 ath_hal_vprintf(ah, fmt, ap); 181 va_end(ap); 182 EXIT 183 } 184 185 const char* 186 ath_hal_ether_sprintf(const u_int8_t *mac) 187 { 188 const char *ret; 189 ENTER 190 ret = ether_sprintf(mac); 191 EXIT 192 return ret; 193 } 194 195 #ifdef ATHHAL_DEBUG 196 void 197 HALDEBUG(struct ath_hal *ah, const char* fmt, ...) 198 { 199 if (ath_hal_debug) { 200 va_list ap; 201 ENTER 202 va_start(ap, fmt); 203 ath_hal_vprintf(ah, fmt, ap); 204 va_end(ap); 205 EXIT 206 } 207 } 208 209 void 210 HALDEBUGn(struct ath_hal *ah, u_int level, const char* fmt, ...) 211 { 212 if (ath_hal_debug >= level) { 213 va_list ap; 214 ENTER 215 va_start(ap, fmt); 216 ath_hal_vprintf(ah, fmt, ap); 217 va_end(ap); 218 EXIT 219 } 220 } 221 #endif /* ATHHAL_DEBUG */ 222 223 #ifdef ATHHAL_DEBUG_ALQ 224 /* 225 * ALQ register tracing support. 226 * 227 * Setting hw.ath.hal.alq=1 enables tracing of all register reads and 228 * writes to the file /tmp/ath_hal.log. The file format is a simple 229 * fixed-size array of records. When done logging set hw.ath.hal.alq=0 230 * and then decode the file with the arcode program (that is part of the 231 * HAL). If you start+stop tracing the data will be appended to an 232 * existing file. 233 * 234 * NB: doesn't handle multiple devices properly; only one DEVICE record 235 * is emitted and the different devices are not identified. 236 */ 237 #include <sys/alq.h> 238 #include <sys/pcpu.h> 239 #include <contrib/dev/ath/ah_decode.h> 240 241 static struct alq *ath_hal_alq; 242 static int ath_hal_alq_emitdev; /* need to emit DEVICE record */ 243 static u_int ath_hal_alq_lost; /* count of lost records */ 244 static const char *ath_hal_logfile = "/tmp/ath_hal.log"; 245 static u_int ath_hal_alq_qsize = 64*1024; 246 247 static int 248 ath_hal_setlogging(int enable) 249 { 250 int error; 251 252 if (enable) { 253 error = kauth_authorize_network(curlwp->l_cred, 254 KAUTH_NETWORK_INTERFACE, 255 KAUTH_REQ_NETWORK_INTERFACE_SETPRIV, NULL, NULL, NULL); 256 if (error == 0) { 257 error = alq_open(&ath_hal_alq, ath_hal_logfile, 258 curproc->p_ucred, 259 sizeof (struct athregrec), ath_hal_alq_qsize); 260 ath_hal_alq_lost = 0; 261 ath_hal_alq_emitdev = 1; 262 printf("ath_hal: logging to %s enabled\n", 263 ath_hal_logfile); 264 } 265 } else { 266 if (ath_hal_alq) 267 alq_close(ath_hal_alq); 268 ath_hal_alq = NULL; 269 printf("ath_hal: logging disabled\n"); 270 error = 0; 271 } 272 return (error); 273 } 274 275 static int 276 sysctl_hw_ath_hal_log(SYSCTL_HANDLER_ARGS) 277 { 278 int error, enable; 279 280 enable = (ath_hal_alq != NULL); 281 error = sysctl_handle_int(oidp, &enable, 0, req); 282 if (error || !req->newptr) 283 return (error); 284 else 285 return (ath_hal_setlogging(enable)); 286 } 287 SYSCTL_PROC(_hw_ath_hal, OID_AUTO, alq, CTLTYPE_INT|CTLFLAG_RW, 288 0, 0, sysctl_hw_ath_hal_log, "I", "Enable HAL register logging"); 289 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_size, CTLFLAG_RW, 290 &ath_hal_alq_qsize, 0, "In-memory log size (#records)"); 291 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_lost, CTLFLAG_RW, 292 &ath_hal_alq_lost, 0, "Register operations not logged"); 293 294 static struct ale * 295 ath_hal_alq_get(struct ath_hal *ah) 296 { 297 struct ale *ale; 298 299 if (ath_hal_alq_emitdev) { 300 ale = alq_get(ath_hal_alq, ALQ_NOWAIT); 301 if (ale) { 302 struct athregrec *r = 303 (struct athregrec *) ale->ae_data; 304 r->op = OP_DEVICE; 305 r->reg = 0; 306 r->val = ah->ah_devid; 307 alq_post(ath_hal_alq, ale); 308 ath_hal_alq_emitdev = 0; 309 } else 310 ath_hal_alq_lost++; 311 } 312 ale = alq_get(ath_hal_alq, ALQ_NOWAIT); 313 if (!ale) 314 ath_hal_alq_lost++; 315 return ale; 316 } 317 318 void 319 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) 320 { 321 bus_space_tag_t t = BUSTAG(ah); 322 ENTER 323 324 if (ath_hal_alq) { 325 struct ale *ale = ath_hal_alq_get(ah); 326 if (ale) { 327 struct athregrec *r = (struct athregrec *) ale->ae_data; 328 r->op = OP_WRITE; 329 r->reg = reg; 330 r->val = val; 331 alq_post(ath_hal_alq, ale); 332 } 333 } 334 #if _BYTE_ORDER == _BIG_ENDIAN 335 if (reg >= 0x4000 && reg < 0x5000) 336 bus_space_write_4(t, h, reg, val); 337 else 338 #endif 339 bus_space_write_stream_4(t, h, reg, val); 340 341 EXIT 342 } 343 344 u_int32_t 345 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) 346 { 347 u_int32_t val; 348 bus_space_handle_t h = BUSHANDLE(ah); 349 bus_space_tag_t t = BUSTAG(ah); 350 ENTER 351 352 #if _BYTE_ORDER == _BIG_ENDIAN 353 if (reg >= 0x4000 && reg < 0x5000) 354 val = bus_space_read_4(t, h, reg); 355 else 356 #endif 357 val = bus_space_read_stream_4(t, h, reg); 358 359 if (ath_hal_alq) { 360 struct ale *ale = ath_hal_alq_get(ah); 361 if (ale) { 362 struct athregrec *r = (struct athregrec *) ale->ae_data; 363 r->op = OP_READ; 364 r->reg = reg; 365 r->val = val; 366 alq_post(ath_hal_alq, ale); 367 } 368 } 369 370 EXIT 371 return val; 372 } 373 374 void 375 OS_MARK(struct ath_hal *ah, u_int id, u_int32_t v) 376 { 377 if (ath_hal_alq) { 378 struct ale *ale = ath_hal_alq_get(ah); 379 ENTER 380 if (ale) { 381 struct athregrec *r = (struct athregrec *) ale->ae_data; 382 r->op = OP_MARK; 383 r->reg = id; 384 r->val = v; 385 alq_post(ath_hal_alq, ale); 386 } 387 EXIT 388 } 389 } 390 #elif defined(ATHHAL_DEBUG) || defined(AH_REGOPS_FUNC) 391 /* 392 * Memory-mapped device register read/write. These are here 393 * as routines when debugging support is enabled and/or when 394 * explicitly configured to use function calls. The latter is 395 * for architectures that might need to do something before 396 * referencing memory (e.g. remap an i/o window). 397 * 398 * NB: see the comments in ah_osdep.h about byte-swapping register 399 * reads and writes to understand what's going on below. 400 */ 401 402 void 403 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) 404 { 405 bus_space_handle_t h = BUSHANDLE(ah); 406 bus_space_tag_t t = BUSTAG(ah); 407 ENTER 408 409 #if _BYTE_ORDER == _BIG_ENDIAN 410 if (reg >= 0x4000 && reg < 0x5000) 411 bus_space_write_4(t, h, reg, val); 412 else 413 #endif 414 bus_space_write_stream_4(t, h, reg, val); 415 EXIT 416 } 417 418 u_int32_t 419 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) 420 { 421 bus_space_handle_t h = BUSHANDLE(ah); 422 bus_space_tag_t t = BUSTAG(ah); 423 uint32_t ret; 424 ENTER 425 426 #if _BYTE_ORDER == _BIG_ENDIAN 427 if (reg >= 0x4000 && reg < 0x5000) 428 ret = bus_space_read_4(t, h, reg); 429 else 430 #endif 431 ret = bus_space_read_stream_4(t, h, reg); 432 EXIT 433 434 return ret; 435 } 436 #endif /* ATHHAL_DEBUG || AH_REGOPS_FUNC */ 437 438 #ifdef ATHHAL_ASSERT 439 void 440 ath_hal_assert_failed(const char* filename, int lineno, const char *msg) 441 { 442 ENTER 443 printf("Atheros HAL assertion failure: %s: line %u: %s\n", 444 filename, lineno, msg); 445 panic("ath_hal_assert"); 446 } 447 #endif /* ATHHAL_ASSERT */ 448 449 /* 450 * Delay n microseconds. 451 */ 452 void 453 ath_hal_delay(int n) 454 { 455 ENTER 456 DELAY(n); 457 EXIT 458 } 459 460 u_int32_t 461 ath_hal_getuptime(struct ath_hal *ah) 462 { 463 struct bintime bt; 464 uint32_t ret; 465 ENTER 466 getbinuptime(&bt); 467 ret = (bt.sec * 1000) + 468 (((uint64_t)1000 * (uint32_t)(bt.frac >> 32)) >> 32); 469 EXIT 470 return ret; 471 } 472 473 void 474 ath_hal_memzero(void *dst, size_t n) 475 { 476 ENTER 477 (void)memset(dst, 0, n); 478 EXIT 479 } 480 481 void * 482 ath_hal_memcpy(void *dst, const void *src, size_t n) 483 { 484 void *ret; 485 ENTER 486 ret = memcpy(dst, src, n); 487 EXIT 488 return ret; 489 } 490
Indexes created Fri Oct 03 02:09:57 GMT 2025