ah_osdep.c revision 1.2.2.3
1 /*- 2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * 29 * $Id: ah_osdep.c,v 1.2.2.3 2009/08/19 18:48:12 yamt Exp $ 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: ah_osdep.c,v 1.2.2.3 2009/08/19 18:48:12 yamt Exp $"); 34 35 #include "opt_athhal.h" 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/sysctl.h> 41 #include <sys/malloc.h> 42 #include <sys/proc.h> 43 #include <sys/kauth.h> 44 45 #include <machine/stdarg.h> 46 47 #include <net/if.h> 48 #include <net/if_dl.h> 49 #include <net/if_media.h> 50 #include <net/if_arp.h> 51 #include <net/if_ether.h> 52 53 #include <external/isc/atheros_hal/dist/ah.h> 54 55 extern void ath_hal_printf(struct ath_hal *, const char*, ...) 56 __printflike(2,3); 57 extern void ath_hal_vprintf(struct ath_hal *, const char*, va_list) 58 __printflike(2, 0); 59 extern const char* ath_hal_ether_sprintf(const u_int8_t *mac); 60 extern void *ath_hal_malloc(size_t); 61 extern void ath_hal_free(void *); 62 #ifdef ATHHAL_ASSERT 63 extern void ath_hal_assert_failed(const char* filename, 64 int lineno, const char* msg); 65 #endif 66 #ifdef ATHHAL_DEBUG 67 extern void HALDEBUG(struct ath_hal *ah, const char* fmt, ...); 68 extern void HALDEBUGn(struct ath_hal *ah, u_int level, const char* fmt, ...); 69 #endif /* ATHHAL_DEBUG */ 70 71 #ifdef ATHHAL_DEBUG 72 static int ath_hal_debug = 0; 73 #endif /* ATHHAL_DEBUG */ 74 75 int ath_hal_dma_beacon_response_time = 2; /* in TU's */ 76 int ath_hal_sw_beacon_response_time = 10; /* in TU's */ 77 int ath_hal_additional_swba_backoff = 0; /* in TU's */ 78 79 SYSCTL_SETUP(sysctl_ath_hal, "sysctl ath.hal subtree setup") 80 { 81 int rc; 82 const struct sysctlnode *cnode, *rnode; 83 84 if ((rc = sysctl_createv(clog, 0, NULL, &rnode, CTLFLAG_PERMANENT, 85 CTLTYPE_NODE, "hw", NULL, NULL, 0, NULL, 0, CTL_HW, CTL_EOL)) != 0) 86 goto err; 87 88 if ((rc = sysctl_createv(clog, 0, &rnode, &rnode, CTLFLAG_PERMANENT, 89 CTLTYPE_NODE, "ath", SYSCTL_DESCR("Atheros driver parameters"), 90 NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL)) != 0) 91 goto err; 92 93 if ((rc = sysctl_createv(clog, 0, &rnode, &rnode, CTLFLAG_PERMANENT, 94 CTLTYPE_NODE, "hal", SYSCTL_DESCR("Atheros HAL parameters"), 95 NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL)) != 0) 96 goto err; 97 98 #if 0 99 if ((rc = sysctl_createv(clog, 0, &rnode, &cnode, 100 CTLFLAG_PERMANENT|CTLFLAG_READONLY, CTLTYPE_STRING, "version", 101 SYSCTL_DESCR("Atheros HAL version"), NULL, 0, &ath_hal_version, 0, 102 CTL_CREATE, CTL_EOL)) != 0) 103 goto err; 104 #endif 105 106 if ((rc = sysctl_createv(clog, 0, &rnode, &cnode, 107 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, "dma_brt", 108 SYSCTL_DESCR("Atheros HAL DMA beacon response time"), NULL, 0, 109 &ath_hal_dma_beacon_response_time, 0, CTL_CREATE, CTL_EOL)) != 0) 110 goto err; 111 112 if ((rc = sysctl_createv(clog, 0, &rnode, &cnode, 113 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, "sw_brt", 114 SYSCTL_DESCR("Atheros HAL software beacon response time"), NULL, 0, 115 &ath_hal_sw_beacon_response_time, 0, CTL_CREATE, CTL_EOL)) != 0) 116 goto err; 117 118 if ((rc = sysctl_createv(clog, 0, &rnode, &cnode, 119 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, "swba_backoff", 120 SYSCTL_DESCR("Atheros HAL additional SWBA backoff time"), NULL, 0, 121 &ath_hal_additional_swba_backoff, 0, CTL_CREATE, CTL_EOL)) != 0) 122 goto err; 123 124 #ifdef ATHHAL_DEBUG 125 if ((rc = sysctl_createv(clog, 0, &rnode, &cnode, 126 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, "debug", 127 SYSCTL_DESCR("Atheros HAL debugging printfs"), NULL, 0, 128 &ath_hal_debug, 0, CTL_CREATE, CTL_EOL)) != 0) 129 goto err; 130 #endif /* ATHHAL_DEBUG */ 131 return; 132 err: 133 printf("%s: sysctl_createv failed (rc = %d)\n", __func__, rc); 134 } 135 136 MALLOC_DEFINE(M_ATH_HAL, "ath_hal", "ath hal data"); 137 138 void* 139 ath_hal_malloc(size_t size) 140 { 141 return malloc(size, M_ATH_HAL, M_NOWAIT | M_ZERO); 142 } 143 144 void 145 ath_hal_free(void* p) 146 { 147 free(p, M_ATH_HAL); 148 } 149 150 void 151 ath_hal_vprintf(struct ath_hal *ah, const char* fmt, va_list ap) 152 { 153 vprintf(fmt, ap); 154 } 155 156 void 157 ath_hal_printf(struct ath_hal *ah, const char* fmt, ...) 158 { 159 va_list ap; 160 va_start(ap, fmt); 161 ath_hal_vprintf(ah, fmt, ap); 162 va_end(ap); 163 } 164 165 const char* 166 ath_hal_ether_sprintf(const u_int8_t *mac) 167 { 168 return ether_sprintf(mac); 169 } 170 171 #ifdef ATHHAL_DEBUG 172 void 173 HALDEBUG(struct ath_hal *ah, const char* fmt, ...) 174 { 175 if (ath_hal_debug) { 176 va_list ap; 177 va_start(ap, fmt); 178 ath_hal_vprintf(ah, fmt, ap); 179 va_end(ap); 180 } 181 } 182 183 void 184 HALDEBUGn(struct ath_hal *ah, u_int level, const char* fmt, ...) 185 { 186 if (ath_hal_debug >= level) { 187 va_list ap; 188 va_start(ap, fmt); 189 ath_hal_vprintf(ah, fmt, ap); 190 va_end(ap); 191 } 192 } 193 #endif /* ATHHAL_DEBUG */ 194 195 #ifdef ATHHAL_DEBUG_ALQ 196 /* 197 * ALQ register tracing support. 198 * 199 * Setting hw.ath.hal.alq=1 enables tracing of all register reads and 200 * writes to the file /tmp/ath_hal.log. The file format is a simple 201 * fixed-size array of records. When done logging set hw.ath.hal.alq=0 202 * and then decode the file with the arcode program (that is part of the 203 * HAL). If you start+stop tracing the data will be appended to an 204 * existing file. 205 * 206 * NB: doesn't handle multiple devices properly; only one DEVICE record 207 * is emitted and the different devices are not identified. 208 */ 209 #include <sys/alq.h> 210 #include <sys/pcpu.h> 211 212 static struct alq *ath_hal_alq; 213 static int ath_hal_alq_emitdev; /* need to emit DEVICE record */ 214 static u_int ath_hal_alq_lost; /* count of lost records */ 215 static const char *ath_hal_logfile = "/tmp/ath_hal.log"; 216 static u_int ath_hal_alq_qsize = 64*1024; 217 218 static int 219 ath_hal_setlogging(int enable) 220 { 221 int error; 222 223 if (enable) { 224 error = kauth_authorize_network(curlwp->l_cred, 225 KAUTH_NETWORK_INTERFACE, 226 KAUTH_REQ_NETWORK_INTERFACE_SETPRIV, NULL, NULL, NULL); 227 if (error == 0) { 228 error = alq_open(&ath_hal_alq, ath_hal_logfile, 229 curproc->p_ucred, 230 sizeof (struct athregrec), ath_hal_alq_qsize); 231 ath_hal_alq_lost = 0; 232 ath_hal_alq_emitdev = 1; 233 printf("ath_hal: logging to %s enabled\n", 234 ath_hal_logfile); 235 } 236 } else { 237 if (ath_hal_alq) 238 alq_close(ath_hal_alq); 239 ath_hal_alq = NULL; 240 printf("ath_hal: logging disabled\n"); 241 error = 0; 242 } 243 return (error); 244 } 245 246 static int 247 sysctl_hw_ath_hal_log(SYSCTL_HANDLER_ARGS) 248 { 249 int error, enable; 250 251 enable = (ath_hal_alq != NULL); 252 error = sysctl_handle_int(oidp, &enable, 0, req); 253 if (error || !req->newptr) 254 return (error); 255 else 256 return (ath_hal_setlogging(enable)); 257 } 258 SYSCTL_PROC(_hw_ath_hal, OID_AUTO, alq, CTLTYPE_INT|CTLFLAG_RW, 259 0, 0, sysctl_hw_ath_hal_log, "I", "Enable HAL register logging"); 260 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_size, CTLFLAG_RW, 261 &ath_hal_alq_qsize, 0, "In-memory log size (#records)"); 262 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_lost, CTLFLAG_RW, 263 &ath_hal_alq_lost, 0, "Register operations not logged"); 264 265 static struct ale * 266 ath_hal_alq_get(struct ath_hal *ah) 267 { 268 struct ale *ale; 269 270 if (ath_hal_alq_emitdev) { 271 ale = alq_get(ath_hal_alq, ALQ_NOWAIT); 272 if (ale) { 273 struct athregrec *r = 274 (struct athregrec *) ale->ae_data; 275 r->op = OP_DEVICE; 276 r->reg = 0; 277 r->val = ah->ah_devid; 278 alq_post(ath_hal_alq, ale); 279 ath_hal_alq_emitdev = 0; 280 } else 281 ath_hal_alq_lost++; 282 } 283 ale = alq_get(ath_hal_alq, ALQ_NOWAIT); 284 if (!ale) 285 ath_hal_alq_lost++; 286 return ale; 287 } 288 289 void 290 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) 291 { 292 bus_space_tag_t t = BUSTAG(ah); 293 294 if (ath_hal_alq) { 295 struct ale *ale = ath_hal_alq_get(ah); 296 if (ale) { 297 struct athregrec *r = (struct athregrec *) ale->ae_data; 298 r->op = OP_WRITE; 299 r->reg = reg; 300 r->val = val; 301 alq_post(ath_hal_alq, ale); 302 } 303 } 304 #if _BYTE_ORDER == _BIG_ENDIAN 305 if (reg >= 0x4000 && reg < 0x5000) 306 bus_space_write_4(t, h, reg, val); 307 else 308 #endif 309 bus_space_write_stream_4(t, h, reg, val); 310 } 311 312 u_int32_t 313 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) 314 { 315 u_int32_t val; 316 bus_space_handle_t h = BUSHANDLE(ah); 317 bus_space_tag_t t = BUSTAG(ah); 318 319 #if _BYTE_ORDER == _BIG_ENDIAN 320 if (reg >= 0x4000 && reg < 0x5000) 321 val = bus_space_read_4(t, h, reg); 322 else 323 #endif 324 val = bus_space_read_stream_4(t, h, reg); 325 326 if (ath_hal_alq) { 327 struct ale *ale = ath_hal_alq_get(ah); 328 if (ale) { 329 struct athregrec *r = (struct athregrec *) ale->ae_data; 330 r->op = OP_READ; 331 r->reg = reg; 332 r->val = val; 333 alq_post(ath_hal_alq, ale); 334 } 335 } 336 337 return val; 338 } 339 340 void 341 OS_MARK(struct ath_hal *ah, u_int id, u_int32_t v) 342 { 343 if (ath_hal_alq) { 344 struct ale *ale = ath_hal_alq_get(ah); 345 346 if (ale) { 347 struct athregrec *r = (struct athregrec *) ale->ae_data; 348 r->op = OP_MARK; 349 r->reg = id; 350 r->val = v; 351 alq_post(ath_hal_alq, ale); 352 } 353 } 354 } 355 #elif defined(ATHHAL_DEBUG) || defined(AH_REGOPS_FUNC) 356 /* 357 * Memory-mapped device register read/write. These are here 358 * as routines when debugging support is enabled and/or when 359 * explicitly configured to use function calls. The latter is 360 * for architectures that might need to do something before 361 * referencing memory (e.g. remap an i/o window). 362 * 363 * NB: see the comments in ah_osdep.h about byte-swapping register 364 * reads and writes to understand what's going on below. 365 */ 366 367 void 368 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) 369 { 370 bus_space_handle_t h = BUSHANDLE(ah); 371 bus_space_tag_t t = BUSTAG(ah); 372 373 #if _BYTE_ORDER == _BIG_ENDIAN 374 if (reg >= 0x4000 && reg < 0x5000) 375 bus_space_write_4(t, h, reg, val); 376 else 377 #endif 378 bus_space_write_stream_4(t, h, reg, val); 379 } 380 381 u_int32_t 382 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) 383 { 384 bus_space_handle_t h = BUSHANDLE(ah); 385 bus_space_tag_t t = BUSTAG(ah); 386 uint32_t ret; 387 388 #if _BYTE_ORDER == _BIG_ENDIAN 389 if (reg >= 0x4000 && reg < 0x5000) 390 ret = bus_space_read_4(t, h, reg); 391 else 392 #endif 393 ret = bus_space_read_stream_4(t, h, reg); 394 395 return ret; 396 } 397 #endif /* ATHHAL_DEBUG || AH_REGOPS_FUNC */ 398 399 #ifdef ATHHAL_ASSERT 400 void 401 ath_hal_assert_failed(const char* filename, int lineno, const char *msg) 402 { 403 printf("Atheros HAL assertion failure: %s: line %u: %s\n", 404 filename, lineno, msg); 405 panic("ath_hal_assert"); 406 } 407 #endif /* ATHHAL_ASSERT */ 408 409 /* 410 * Delay n microseconds. 411 */ 412 void 413 ath_hal_delay(int n) 414 { 415 DELAY(n); 416 } 417 418 u_int32_t 419 ath_hal_getuptime(struct ath_hal *ah) 420 { 421 struct bintime bt; 422 uint32_t ret; 423 getbinuptime(&bt); 424 ret = (bt.sec * 1000) + 425 (((uint64_t)1000 * (uint32_t)(bt.frac >> 32)) >> 32); 426 return ret; 427 } 428 429 void 430 ath_hal_memzero(void *dst, size_t n) 431 { 432 (void)memset(dst, 0, n); 433 } 434 435 void * 436 ath_hal_memcpy(void *dst, const void *src, size_t n) 437 { 438 return memcpy(dst, src, n); 439 } 440
Indexes created Thu Oct 23 22:10:10 GMT 2025