subr_cpu.c revision 1.18 1 1.18 andvar /* $NetBSD: subr_cpu.c,v 1.18 2022/01/24 09:42:14 andvar Exp $ */
2 1.1 ad
3 1.1 ad /*-
4 1.6 ad * Copyright (c) 2007, 2008, 2009, 2010, 2012, 2019, 2020
5 1.6 ad * The NetBSD Foundation, Inc.
6 1.1 ad * All rights reserved.
7 1.1 ad *
8 1.1 ad * This code is derived from software contributed to The NetBSD Foundation
9 1.1 ad * by Andrew Doran.
10 1.1 ad *
11 1.1 ad * Redistribution and use in source and binary forms, with or without
12 1.1 ad * modification, are permitted provided that the following conditions
13 1.1 ad * are met:
14 1.1 ad * 1. Redistributions of source code must retain the above copyright
15 1.1 ad * notice, this list of conditions and the following disclaimer.
16 1.1 ad * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 ad * notice, this list of conditions and the following disclaimer in the
18 1.1 ad * documentation and/or other materials provided with the distribution.
19 1.1 ad *
20 1.1 ad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 1.1 ad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 1.1 ad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 1.1 ad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 1.1 ad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 1.1 ad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 1.1 ad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 1.1 ad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 1.1 ad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 1.1 ad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 1.1 ad * POSSIBILITY OF SUCH DAMAGE.
31 1.1 ad */
32 1.1 ad
33 1.1 ad /*-
34 1.1 ad * Copyright (c)2007 YAMAMOTO Takashi,
35 1.1 ad * All rights reserved.
36 1.1 ad *
37 1.1 ad * Redistribution and use in source and binary forms, with or without
38 1.1 ad * modification, are permitted provided that the following conditions
39 1.1 ad * are met:
40 1.1 ad * 1. Redistributions of source code must retain the above copyright
41 1.1 ad * notice, this list of conditions and the following disclaimer.
42 1.1 ad * 2. Redistributions in binary form must reproduce the above copyright
43 1.1 ad * notice, this list of conditions and the following disclaimer in the
44 1.1 ad * documentation and/or other materials provided with the distribution.
45 1.1 ad *
46 1.1 ad * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
47 1.1 ad * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
48 1.1 ad * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
49 1.1 ad * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
50 1.1 ad * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
51 1.1 ad * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
52 1.1 ad * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
53 1.1 ad * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
54 1.1 ad * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
55 1.1 ad * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
56 1.1 ad * SUCH DAMAGE.
57 1.1 ad */
58 1.1 ad
59 1.1 ad /*
60 1.1 ad * CPU related routines shared with rump.
61 1.1 ad */
62 1.1 ad
63 1.1 ad #include <sys/cdefs.h>
64 1.18 andvar __KERNEL_RCSID(0, "$NetBSD: subr_cpu.c,v 1.18 2022/01/24 09:42:14 andvar Exp $");
65 1.1 ad
66 1.1 ad #include <sys/param.h>
67 1.15 ad #include <sys/atomic.h>
68 1.1 ad #include <sys/systm.h>
69 1.1 ad #include <sys/sched.h>
70 1.1 ad #include <sys/conf.h>
71 1.1 ad #include <sys/cpu.h>
72 1.1 ad #include <sys/proc.h>
73 1.1 ad #include <sys/kernel.h>
74 1.1 ad #include <sys/kmem.h>
75 1.1 ad
76 1.5 ad static void cpu_topology_fake1(struct cpu_info *);
77 1.5 ad
78 1.1 ad kmutex_t cpu_lock __cacheline_aligned;
79 1.1 ad int ncpu __read_mostly;
80 1.1 ad int ncpuonline __read_mostly;
81 1.1 ad bool mp_online __read_mostly;
82 1.1 ad static bool cpu_topology_present __read_mostly;
83 1.6 ad static bool cpu_topology_haveslow __read_mostly;
84 1.1 ad int64_t cpu_counts[CPU_COUNT_MAX];
85 1.1 ad
86 1.1 ad /* An array of CPUs. There are ncpu entries. */
87 1.1 ad struct cpu_info **cpu_infos __read_mostly;
88 1.1 ad
89 1.1 ad /* Note: set on mi_cpu_attach() and idle_loop(). */
90 1.1 ad kcpuset_t * kcpuset_attached __read_mostly = NULL;
91 1.1 ad kcpuset_t * kcpuset_running __read_mostly = NULL;
92 1.1 ad
93 1.1 ad static char cpu_model[128];
94 1.1 ad
95 1.1 ad /*
96 1.1 ad * mi_cpu_init: early initialisation of MI CPU related structures.
97 1.1 ad *
98 1.1 ad * Note: may not block and memory allocator is not yet available.
99 1.1 ad */
100 1.1 ad void
101 1.1 ad mi_cpu_init(void)
102 1.1 ad {
103 1.4 ad struct cpu_info *ci;
104 1.1 ad
105 1.1 ad mutex_init(&cpu_lock, MUTEX_DEFAULT, IPL_NONE);
106 1.1 ad
107 1.1 ad kcpuset_create(&kcpuset_attached, true);
108 1.1 ad kcpuset_create(&kcpuset_running, true);
109 1.1 ad kcpuset_set(kcpuset_running, 0);
110 1.4 ad
111 1.4 ad ci = curcpu();
112 1.5 ad cpu_topology_fake1(ci);
113 1.1 ad }
114 1.1 ad
115 1.1 ad int
116 1.1 ad cpu_setmodel(const char *fmt, ...)
117 1.1 ad {
118 1.1 ad int len;
119 1.1 ad va_list ap;
120 1.1 ad
121 1.1 ad va_start(ap, fmt);
122 1.1 ad len = vsnprintf(cpu_model, sizeof(cpu_model), fmt, ap);
123 1.1 ad va_end(ap);
124 1.1 ad return len;
125 1.1 ad }
126 1.1 ad
127 1.1 ad const char *
128 1.1 ad cpu_getmodel(void)
129 1.1 ad {
130 1.1 ad return cpu_model;
131 1.1 ad }
132 1.1 ad
133 1.1 ad bool
134 1.1 ad cpu_softintr_p(void)
135 1.1 ad {
136 1.1 ad
137 1.1 ad return (curlwp->l_pflag & LP_INTR) != 0;
138 1.1 ad }
139 1.1 ad
140 1.1 ad /*
141 1.1 ad * Collect CPU topology information as each CPU is attached. This can be
142 1.1 ad * called early during boot, so we need to be careful what we do.
143 1.1 ad */
144 1.1 ad void
145 1.1 ad cpu_topology_set(struct cpu_info *ci, u_int package_id, u_int core_id,
146 1.13 skrll u_int smt_id, u_int numa_id)
147 1.1 ad {
148 1.1 ad enum cpu_rel rel;
149 1.1 ad
150 1.1 ad cpu_topology_present = true;
151 1.1 ad ci->ci_package_id = package_id;
152 1.1 ad ci->ci_core_id = core_id;
153 1.1 ad ci->ci_smt_id = smt_id;
154 1.1 ad ci->ci_numa_id = numa_id;
155 1.1 ad for (rel = 0; rel < __arraycount(ci->ci_sibling); rel++) {
156 1.1 ad ci->ci_sibling[rel] = ci;
157 1.1 ad ci->ci_nsibling[rel] = 1;
158 1.1 ad }
159 1.1 ad }
160 1.1 ad
161 1.1 ad /*
162 1.13 skrll * Collect CPU relative speed
163 1.13 skrll */
164 1.13 skrll void
165 1.13 skrll cpu_topology_setspeed(struct cpu_info *ci, bool slow)
166 1.13 skrll {
167 1.13 skrll
168 1.13 skrll cpu_topology_haveslow |= slow;
169 1.13 skrll ci->ci_is_slow = slow;
170 1.13 skrll }
171 1.13 skrll
172 1.13 skrll /*
173 1.1 ad * Link a CPU into the given circular list.
174 1.1 ad */
175 1.1 ad static void
176 1.1 ad cpu_topology_link(struct cpu_info *ci, struct cpu_info *ci2, enum cpu_rel rel)
177 1.1 ad {
178 1.1 ad struct cpu_info *ci3;
179 1.1 ad
180 1.1 ad /* Walk to the end of the existing circular list and append. */
181 1.1 ad for (ci3 = ci2;; ci3 = ci3->ci_sibling[rel]) {
182 1.1 ad ci3->ci_nsibling[rel]++;
183 1.1 ad if (ci3->ci_sibling[rel] == ci2) {
184 1.1 ad break;
185 1.1 ad }
186 1.1 ad }
187 1.1 ad ci->ci_sibling[rel] = ci2;
188 1.1 ad ci3->ci_sibling[rel] = ci;
189 1.1 ad ci->ci_nsibling[rel] = ci3->ci_nsibling[rel];
190 1.1 ad }
191 1.1 ad
192 1.1 ad /*
193 1.1 ad * Print out the topology lists.
194 1.1 ad */
195 1.1 ad static void
196 1.1 ad cpu_topology_dump(void)
197 1.1 ad {
198 1.6 ad #ifdef DEBUG
199 1.1 ad CPU_INFO_ITERATOR cii;
200 1.1 ad struct cpu_info *ci, *ci2;
201 1.6 ad const char *names[] = { "core", "pkg", "1st" };
202 1.1 ad enum cpu_rel rel;
203 1.1 ad int i;
204 1.1 ad
205 1.10 mrg CTASSERT(__arraycount(names) >= __arraycount(ci->ci_sibling));
206 1.16 simonb if (ncpu == 1) {
207 1.16 simonb return;
208 1.16 simonb }
209 1.10 mrg
210 1.1 ad for (CPU_INFO_FOREACH(cii, ci)) {
211 1.10 mrg if (cpu_topology_haveslow)
212 1.10 mrg printf("%s ", ci->ci_is_slow ? "slow" : "fast");
213 1.1 ad for (rel = 0; rel < __arraycount(ci->ci_sibling); rel++) {
214 1.1 ad printf("%s has %d %s siblings:", cpu_name(ci),
215 1.1 ad ci->ci_nsibling[rel], names[rel]);
216 1.1 ad ci2 = ci->ci_sibling[rel];
217 1.1 ad i = 0;
218 1.1 ad do {
219 1.1 ad printf(" %s", cpu_name(ci2));
220 1.1 ad ci2 = ci2->ci_sibling[rel];
221 1.1 ad } while (++i < 64 && ci2 != ci->ci_sibling[rel]);
222 1.1 ad if (i == 64) {
223 1.1 ad printf(" GAVE UP");
224 1.1 ad }
225 1.1 ad printf("\n");
226 1.1 ad }
227 1.8 ad printf("%s first in package: %s\n", cpu_name(ci),
228 1.8 ad cpu_name(ci->ci_package1st));
229 1.1 ad }
230 1.1 ad #endif /* DEBUG */
231 1.1 ad }
232 1.1 ad
233 1.1 ad /*
234 1.1 ad * Fake up topology info if we have none, or if what we got was bogus.
235 1.5 ad * Used early in boot, and by cpu_topology_fake().
236 1.5 ad */
237 1.5 ad static void
238 1.5 ad cpu_topology_fake1(struct cpu_info *ci)
239 1.5 ad {
240 1.5 ad enum cpu_rel rel;
241 1.5 ad
242 1.5 ad for (rel = 0; rel < __arraycount(ci->ci_sibling); rel++) {
243 1.5 ad ci->ci_sibling[rel] = ci;
244 1.5 ad ci->ci_nsibling[rel] = 1;
245 1.5 ad }
246 1.5 ad if (!cpu_topology_present) {
247 1.5 ad ci->ci_package_id = cpu_index(ci);
248 1.5 ad }
249 1.6 ad ci->ci_schedstate.spc_flags |=
250 1.6 ad (SPCF_CORE1ST | SPCF_PACKAGE1ST | SPCF_1STCLASS);
251 1.8 ad ci->ci_package1st = ci;
252 1.14 ad if (!cpu_topology_haveslow) {
253 1.14 ad ci->ci_is_slow = false;
254 1.14 ad }
255 1.5 ad }
256 1.5 ad
257 1.5 ad /*
258 1.5 ad * Fake up topology info if we have none, or if what we got was bogus.
259 1.1 ad * Don't override ci_package_id, etc, if cpu_topology_present is set.
260 1.1 ad * MD code also uses these.
261 1.1 ad */
262 1.1 ad static void
263 1.1 ad cpu_topology_fake(void)
264 1.1 ad {
265 1.1 ad CPU_INFO_ITERATOR cii;
266 1.1 ad struct cpu_info *ci;
267 1.1 ad
268 1.1 ad for (CPU_INFO_FOREACH(cii, ci)) {
269 1.5 ad cpu_topology_fake1(ci);
270 1.11 ad /* Undo (early boot) flag set so everything links OK. */
271 1.11 ad ci->ci_schedstate.spc_flags &=
272 1.11 ad ~(SPCF_CORE1ST | SPCF_PACKAGE1ST | SPCF_1STCLASS);
273 1.1 ad }
274 1.11 ad }
275 1.1 ad
276 1.1 ad /*
277 1.1 ad * Fix up basic CPU topology info. Right now that means attach each CPU to
278 1.12 skrll * circular lists of its siblings in the same core, and in the same package.
279 1.1 ad */
280 1.1 ad void
281 1.1 ad cpu_topology_init(void)
282 1.1 ad {
283 1.1 ad CPU_INFO_ITERATOR cii, cii2;
284 1.1 ad struct cpu_info *ci, *ci2, *ci3;
285 1.6 ad u_int minsmt, mincore;
286 1.1 ad
287 1.1 ad if (!cpu_topology_present) {
288 1.1 ad cpu_topology_fake();
289 1.11 ad goto linkit;
290 1.1 ad }
291 1.1 ad
292 1.1 ad /* Find siblings in same core and package. */
293 1.1 ad for (CPU_INFO_FOREACH(cii, ci)) {
294 1.6 ad ci->ci_schedstate.spc_flags &=
295 1.6 ad ~(SPCF_CORE1ST | SPCF_PACKAGE1ST | SPCF_1STCLASS);
296 1.1 ad for (CPU_INFO_FOREACH(cii2, ci2)) {
297 1.1 ad /* Avoid bad things happening. */
298 1.1 ad if (ci2->ci_package_id == ci->ci_package_id &&
299 1.1 ad ci2->ci_core_id == ci->ci_core_id &&
300 1.1 ad ci2->ci_smt_id == ci->ci_smt_id &&
301 1.1 ad ci2 != ci) {
302 1.10 mrg #ifdef DEBUG
303 1.10 mrg printf("cpu%u %p pkg %u core %u smt %u same as "
304 1.12 skrll "cpu%u %p pkg %u core %u smt %u\n",
305 1.10 mrg cpu_index(ci), ci, ci->ci_package_id,
306 1.10 mrg ci->ci_core_id, ci->ci_smt_id,
307 1.10 mrg cpu_index(ci2), ci2, ci2->ci_package_id,
308 1.10 mrg ci2->ci_core_id, ci2->ci_smt_id);
309 1.10 mrg #endif
310 1.1 ad printf("cpu_topology_init: info bogus, "
311 1.1 ad "faking it\n");
312 1.1 ad cpu_topology_fake();
313 1.11 ad goto linkit;
314 1.1 ad }
315 1.1 ad if (ci2 == ci ||
316 1.1 ad ci2->ci_package_id != ci->ci_package_id) {
317 1.1 ad continue;
318 1.1 ad }
319 1.1 ad /* Find CPUs in the same core. */
320 1.1 ad if (ci->ci_nsibling[CPUREL_CORE] == 1 &&
321 1.1 ad ci->ci_core_id == ci2->ci_core_id) {
322 1.1 ad cpu_topology_link(ci, ci2, CPUREL_CORE);
323 1.1 ad }
324 1.1 ad /* Find CPUs in the same package. */
325 1.1 ad if (ci->ci_nsibling[CPUREL_PACKAGE] == 1) {
326 1.1 ad cpu_topology_link(ci, ci2, CPUREL_PACKAGE);
327 1.1 ad }
328 1.1 ad if (ci->ci_nsibling[CPUREL_CORE] > 1 &&
329 1.1 ad ci->ci_nsibling[CPUREL_PACKAGE] > 1) {
330 1.1 ad break;
331 1.1 ad }
332 1.1 ad }
333 1.1 ad }
334 1.1 ad
335 1.11 ad linkit:
336 1.6 ad /* Identify lowest numbered SMT in each core. */
337 1.1 ad for (CPU_INFO_FOREACH(cii, ci)) {
338 1.6 ad ci2 = ci3 = ci;
339 1.6 ad minsmt = ci->ci_smt_id;
340 1.6 ad do {
341 1.6 ad if (ci2->ci_smt_id < minsmt) {
342 1.6 ad ci3 = ci2;
343 1.6 ad minsmt = ci2->ci_smt_id;
344 1.1 ad }
345 1.6 ad ci2 = ci2->ci_sibling[CPUREL_CORE];
346 1.6 ad } while (ci2 != ci);
347 1.6 ad ci3->ci_schedstate.spc_flags |= SPCF_CORE1ST;
348 1.1 ad }
349 1.1 ad
350 1.6 ad /* Identify lowest numbered SMT in each package. */
351 1.6 ad ci3 = NULL;
352 1.1 ad for (CPU_INFO_FOREACH(cii, ci)) {
353 1.6 ad if ((ci->ci_schedstate.spc_flags & SPCF_CORE1ST) == 0) {
354 1.6 ad continue;
355 1.1 ad }
356 1.1 ad ci2 = ci3 = ci;
357 1.6 ad mincore = ci->ci_core_id;
358 1.1 ad do {
359 1.6 ad if ((ci2->ci_schedstate.spc_flags &
360 1.6 ad SPCF_CORE1ST) != 0 &&
361 1.6 ad ci2->ci_core_id < mincore) {
362 1.1 ad ci3 = ci2;
363 1.6 ad mincore = ci2->ci_core_id;
364 1.1 ad }
365 1.6 ad ci2 = ci2->ci_sibling[CPUREL_PACKAGE];
366 1.6 ad } while (ci2 != ci);
367 1.6 ad
368 1.6 ad if ((ci3->ci_schedstate.spc_flags & SPCF_PACKAGE1ST) != 0) {
369 1.6 ad /* Already identified - nothing more to do. */
370 1.6 ad continue;
371 1.6 ad }
372 1.6 ad ci3->ci_schedstate.spc_flags |= SPCF_PACKAGE1ST;
373 1.6 ad
374 1.6 ad /* Walk through all CPUs in package and point to first. */
375 1.8 ad ci2 = ci3;
376 1.6 ad do {
377 1.8 ad ci2->ci_package1st = ci3;
378 1.6 ad ci2->ci_sibling[CPUREL_PACKAGE1ST] = ci3;
379 1.6 ad ci2 = ci2->ci_sibling[CPUREL_PACKAGE];
380 1.11 ad } while (ci2 != ci3);
381 1.1 ad
382 1.6 ad /* Now look for somebody else to link to. */
383 1.6 ad for (CPU_INFO_FOREACH(cii2, ci2)) {
384 1.6 ad if ((ci2->ci_schedstate.spc_flags & SPCF_PACKAGE1ST)
385 1.6 ad != 0 && ci2 != ci3) {
386 1.6 ad cpu_topology_link(ci3, ci2, CPUREL_PACKAGE1ST);
387 1.6 ad break;
388 1.6 ad }
389 1.6 ad }
390 1.6 ad }
391 1.6 ad
392 1.6 ad /* Walk through all packages, starting with value of ci3 from above. */
393 1.6 ad KASSERT(ci3 != NULL);
394 1.6 ad ci = ci3;
395 1.6 ad do {
396 1.6 ad /* Walk through CPUs in the package and copy in PACKAGE1ST. */
397 1.1 ad ci2 = ci;
398 1.1 ad do {
399 1.6 ad ci2->ci_sibling[CPUREL_PACKAGE1ST] =
400 1.6 ad ci->ci_sibling[CPUREL_PACKAGE1ST];
401 1.6 ad ci2->ci_nsibling[CPUREL_PACKAGE1ST] =
402 1.6 ad ci->ci_nsibling[CPUREL_PACKAGE1ST];
403 1.6 ad ci2 = ci2->ci_sibling[CPUREL_PACKAGE];
404 1.1 ad } while (ci2 != ci);
405 1.6 ad ci = ci->ci_sibling[CPUREL_PACKAGE1ST];
406 1.6 ad } while (ci != ci3);
407 1.6 ad
408 1.6 ad if (cpu_topology_haveslow) {
409 1.6 ad /*
410 1.9 ad * For asymmetric systems where some CPUs are slower than
411 1.6 ad * others, mark first class CPUs for the scheduler. This
412 1.6 ad * conflicts with SMT right now so whinge if observed.
413 1.6 ad */
414 1.8 ad if (curcpu()->ci_nsibling[CPUREL_CORE] > 1) {
415 1.6 ad printf("cpu_topology_init: asymmetric & SMT??\n");
416 1.6 ad }
417 1.6 ad for (CPU_INFO_FOREACH(cii, ci)) {
418 1.6 ad if (!ci->ci_is_slow) {
419 1.6 ad ci->ci_schedstate.spc_flags |= SPCF_1STCLASS;
420 1.6 ad }
421 1.6 ad }
422 1.6 ad } else {
423 1.6 ad /*
424 1.6 ad * For any other configuration mark the 1st CPU in each
425 1.6 ad * core as a first class CPU.
426 1.6 ad */
427 1.6 ad for (CPU_INFO_FOREACH(cii, ci)) {
428 1.6 ad if ((ci->ci_schedstate.spc_flags & SPCF_CORE1ST) != 0) {
429 1.6 ad ci->ci_schedstate.spc_flags |= SPCF_1STCLASS;
430 1.6 ad }
431 1.6 ad }
432 1.1 ad }
433 1.6 ad
434 1.6 ad cpu_topology_dump();
435 1.1 ad }
436 1.1 ad
437 1.1 ad /*
438 1.1 ad * Adjust one count, for a counter that's NOT updated from interrupt
439 1.1 ad * context. Hardly worth making an inline due to preemption stuff.
440 1.1 ad */
441 1.1 ad void
442 1.1 ad cpu_count(enum cpu_count idx, int64_t delta)
443 1.1 ad {
444 1.1 ad lwp_t *l = curlwp;
445 1.1 ad KPREEMPT_DISABLE(l);
446 1.1 ad l->l_cpu->ci_counts[idx] += delta;
447 1.1 ad KPREEMPT_ENABLE(l);
448 1.1 ad }
449 1.1 ad
450 1.1 ad /*
451 1.1 ad * Fetch fresh sum total for all counts. Expensive - don't call often.
452 1.15 ad *
453 1.18 andvar * If poll is true, the caller is okay with less recent values (but
454 1.15 ad * no more than 1/hz seconds old). Where this is called very often that
455 1.15 ad * should be the case.
456 1.15 ad *
457 1.15 ad * This should be reasonably quick so that any value collected get isn't
458 1.15 ad * totally out of whack, and it can also be called from interrupt context,
459 1.15 ad * so go to splvm() while summing the counters. It's tempting to use a spin
460 1.15 ad * mutex here but this routine is called from DDB.
461 1.1 ad */
462 1.1 ad void
463 1.15 ad cpu_count_sync(bool poll)
464 1.1 ad {
465 1.1 ad CPU_INFO_ITERATOR cii;
466 1.1 ad struct cpu_info *ci;
467 1.1 ad int64_t sum[CPU_COUNT_MAX], *ptr;
468 1.15 ad static int lasttick;
469 1.15 ad int curtick, s;
470 1.1 ad enum cpu_count i;
471 1.1 ad
472 1.1 ad KASSERT(sizeof(ci->ci_counts) == sizeof(cpu_counts));
473 1.1 ad
474 1.15 ad if (__predict_false(!mp_online)) {
475 1.1 ad memcpy(cpu_counts, curcpu()->ci_counts, sizeof(cpu_counts));
476 1.15 ad return;
477 1.1 ad }
478 1.1 ad
479 1.15 ad s = splvm();
480 1.15 ad curtick = getticks();
481 1.15 ad if (poll && atomic_load_acquire(&lasttick) == curtick) {
482 1.1 ad splx(s);
483 1.15 ad return;
484 1.1 ad }
485 1.15 ad memset(sum, 0, sizeof(sum));
486 1.15 ad curcpu()->ci_counts[CPU_COUNT_SYNC]++;
487 1.15 ad for (CPU_INFO_FOREACH(cii, ci)) {
488 1.15 ad ptr = ci->ci_counts;
489 1.15 ad for (i = 0; i < CPU_COUNT_MAX; i += 8) {
490 1.15 ad sum[i+0] += ptr[i+0];
491 1.15 ad sum[i+1] += ptr[i+1];
492 1.15 ad sum[i+2] += ptr[i+2];
493 1.15 ad sum[i+3] += ptr[i+3];
494 1.15 ad sum[i+4] += ptr[i+4];
495 1.15 ad sum[i+5] += ptr[i+5];
496 1.15 ad sum[i+6] += ptr[i+6];
497 1.15 ad sum[i+7] += ptr[i+7];
498 1.15 ad }
499 1.15 ad KASSERT(i == CPU_COUNT_MAX);
500 1.15 ad }
501 1.15 ad memcpy(cpu_counts, sum, sizeof(cpu_counts));
502 1.15 ad atomic_store_release(&lasttick, curtick);
503 1.15 ad splx(s);
504 1.1 ad }
505