subr_pcu.c revision 1.22 1 1.22 thorpej /* $NetBSD: subr_pcu.c,v 1.22 2020/06/06 18:13:01 thorpej Exp $ */
2 1.1 rmind
3 1.1 rmind /*-
4 1.18 rmind * Copyright (c) 2011, 2014 The NetBSD Foundation, Inc.
5 1.1 rmind * All rights reserved.
6 1.1 rmind *
7 1.1 rmind * This code is derived from software contributed to The NetBSD Foundation
8 1.1 rmind * by Mindaugas Rasiukevicius.
9 1.1 rmind *
10 1.1 rmind * Redistribution and use in source and binary forms, with or without
11 1.1 rmind * modification, are permitted provided that the following conditions
12 1.1 rmind * are met:
13 1.1 rmind * 1. Redistributions of source code must retain the above copyright
14 1.1 rmind * notice, this list of conditions and the following disclaimer.
15 1.1 rmind * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 rmind * notice, this list of conditions and the following disclaimer in the
17 1.1 rmind * documentation and/or other materials provided with the distribution.
18 1.1 rmind *
19 1.1 rmind * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 rmind * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 rmind * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 rmind * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 rmind * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 rmind * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 rmind * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 rmind * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 rmind * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 rmind * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 rmind * POSSIBILITY OF SUCH DAMAGE.
30 1.1 rmind */
31 1.1 rmind
32 1.1 rmind /*
33 1.1 rmind * Per CPU Unit (PCU) - is an interface to manage synchronization of any
34 1.1 rmind * per CPU context (unit) tied with LWP context. Typical use: FPU state.
35 1.1 rmind *
36 1.1 rmind * Concurrency notes:
37 1.1 rmind *
38 1.1 rmind * PCU state may be loaded only by the current LWP, that is, curlwp.
39 1.1 rmind * Therefore, only LWP itself can set a CPU for lwp_t::l_pcu_cpu[id].
40 1.1 rmind *
41 1.18 rmind * There are some important rules about operation calls. The request
42 1.18 rmind * for a PCU release can be from a) the owner LWP (regardless whether
43 1.18 rmind * the PCU state is on the current CPU or remote CPU) b) any other LWP
44 1.18 rmind * running on that CPU (in such case, the owner LWP is on a remote CPU
45 1.18 rmind * or sleeping).
46 1.18 rmind *
47 1.18 rmind * In any case, the PCU state can *only* be changed from the current
48 1.18 rmind * CPU. If said PCU state is on the remote CPU, a cross-call will be
49 1.18 rmind * sent by the owner LWP. Therefore struct cpu_info::ci_pcu_curlwp[id]
50 1.18 rmind * may only be changed by the current CPU and lwp_t::l_pcu_cpu[id] may
51 1.18 rmind * only be cleared by the CPU which has the PCU state loaded.
52 1.1 rmind */
53 1.1 rmind
54 1.1 rmind #include <sys/cdefs.h>
55 1.22 thorpej __KERNEL_RCSID(0, "$NetBSD: subr_pcu.c,v 1.22 2020/06/06 18:13:01 thorpej Exp $");
56 1.1 rmind
57 1.1 rmind #include <sys/param.h>
58 1.1 rmind #include <sys/cpu.h>
59 1.1 rmind #include <sys/lwp.h>
60 1.1 rmind #include <sys/pcu.h>
61 1.19 rmind #include <sys/ipi.h>
62 1.1 rmind
63 1.3 matt #if PCU_UNIT_COUNT > 0
64 1.3 matt
65 1.13 matt static inline void pcu_do_op(const pcu_ops_t *, lwp_t * const, const int);
66 1.13 matt static void pcu_lwp_op(const pcu_ops_t *, lwp_t *, const int);
67 1.13 matt
68 1.18 rmind /*
69 1.18 rmind * Internal PCU commands for the pcu_do_op() function.
70 1.18 rmind */
71 1.18 rmind #define PCU_CMD_SAVE 0x01 /* save PCU state to the LWP */
72 1.18 rmind #define PCU_CMD_RELEASE 0x02 /* release PCU state on the CPU */
73 1.13 matt
74 1.18 rmind /*
75 1.19 rmind * Message structure for another CPU passed via ipi(9).
76 1.18 rmind */
77 1.18 rmind typedef struct {
78 1.18 rmind const pcu_ops_t *pcu;
79 1.18 rmind lwp_t * owner;
80 1.18 rmind const int flags;
81 1.19 rmind } pcu_ipi_msg_t;
82 1.19 rmind
83 1.19 rmind /*
84 1.19 rmind * PCU IPIs run at IPL_HIGH (aka IPL_PCU in this code).
85 1.19 rmind */
86 1.19 rmind #define splpcu splhigh
87 1.1 rmind
88 1.18 rmind /* PCU operations structure provided by the MD code. */
89 1.18 rmind extern const pcu_ops_t * const pcu_ops_md_defs[];
90 1.4 rmind
91 1.11 yamt /*
92 1.11 yamt * pcu_switchpoint: release PCU state if the LWP is being run on another CPU.
93 1.19 rmind * This routine is called on each context switch by by mi_switch().
94 1.11 yamt */
95 1.1 rmind void
96 1.4 rmind pcu_switchpoint(lwp_t *l)
97 1.1 rmind {
98 1.18 rmind const uint32_t pcu_valid = l->l_pcu_valid;
99 1.19 rmind int s;
100 1.1 rmind
101 1.12 matt KASSERTMSG(l == curlwp, "l %p != curlwp %p", l, curlwp);
102 1.4 rmind
103 1.18 rmind if (__predict_true(pcu_valid == 0)) {
104 1.4 rmind /* PCUs are not in use. */
105 1.4 rmind return;
106 1.4 rmind }
107 1.19 rmind s = splpcu();
108 1.13 matt for (u_int id = 0; id < PCU_UNIT_COUNT; id++) {
109 1.18 rmind if ((pcu_valid & (1U << id)) == 0) {
110 1.4 rmind continue;
111 1.4 rmind }
112 1.5 matt struct cpu_info * const pcu_ci = l->l_pcu_cpu[id];
113 1.21 bouyer if (pcu_ci == l->l_cpu) {
114 1.21 bouyer KASSERT(pcu_ci->ci_pcu_curlwp[id] == l);
115 1.4 rmind continue;
116 1.4 rmind }
117 1.4 rmind const pcu_ops_t * const pcu = pcu_ops_md_defs[id];
118 1.18 rmind pcu->pcu_state_release(l);
119 1.4 rmind }
120 1.19 rmind splx(s);
121 1.1 rmind }
122 1.1 rmind
123 1.11 yamt /*
124 1.11 yamt * pcu_discard_all: discard PCU state of the given LWP.
125 1.11 yamt *
126 1.11 yamt * Used by exec and LWP exit.
127 1.11 yamt */
128 1.7 matt void
129 1.7 matt pcu_discard_all(lwp_t *l)
130 1.7 matt {
131 1.18 rmind const uint32_t pcu_valid = l->l_pcu_valid;
132 1.7 matt
133 1.22 thorpej /*
134 1.22 thorpej * The check for LSIDL here is to catch the case where the LWP exits
135 1.22 thorpej * due to an error in the LWP creation path before it ever runs.
136 1.22 thorpej */
137 1.22 thorpej KASSERT(l == curlwp || l->l_stat == LSIDL ||
138 1.22 thorpej ((l->l_flag & LW_SYSTEM) && pcu_valid == 0));
139 1.7 matt
140 1.18 rmind if (__predict_true(pcu_valid == 0)) {
141 1.7 matt /* PCUs are not in use. */
142 1.7 matt return;
143 1.7 matt }
144 1.7 matt for (u_int id = 0; id < PCU_UNIT_COUNT; id++) {
145 1.18 rmind if ((pcu_valid & (1U << id)) == 0) {
146 1.7 matt continue;
147 1.7 matt }
148 1.7 matt if (__predict_true(l->l_pcu_cpu[id] == NULL)) {
149 1.7 matt continue;
150 1.7 matt }
151 1.7 matt const pcu_ops_t * const pcu = pcu_ops_md_defs[id];
152 1.18 rmind pcu_lwp_op(pcu, l, PCU_CMD_RELEASE);
153 1.7 matt }
154 1.18 rmind l->l_pcu_valid = 0;
155 1.7 matt }
156 1.7 matt
157 1.11 yamt /*
158 1.11 yamt * pcu_save_all: save PCU state of the given LWP so that eg. coredump can
159 1.11 yamt * examine it.
160 1.11 yamt */
161 1.7 matt void
162 1.7 matt pcu_save_all(lwp_t *l)
163 1.7 matt {
164 1.18 rmind const uint32_t pcu_valid = l->l_pcu_valid;
165 1.18 rmind int flags = PCU_CMD_SAVE;
166 1.18 rmind
167 1.18 rmind /* If LW_WCORE, we are also releasing the state. */
168 1.18 rmind if (__predict_false(l->l_flag & LW_WCORE)) {
169 1.18 rmind flags |= PCU_CMD_RELEASE;
170 1.18 rmind }
171 1.7 matt
172 1.9 matt /*
173 1.9 matt * Normally we save for the current LWP, but sometimes we get called
174 1.9 matt * with a different LWP (forking a system LWP or doing a coredump of
175 1.9 matt * a process with multiple threads) and we need to deal with that.
176 1.9 matt */
177 1.18 rmind KASSERT(l == curlwp || (((l->l_flag & LW_SYSTEM) ||
178 1.18 rmind (curlwp->l_proc == l->l_proc && l->l_stat == LSSUSPENDED)) &&
179 1.18 rmind pcu_valid == 0));
180 1.7 matt
181 1.18 rmind if (__predict_true(pcu_valid == 0)) {
182 1.7 matt /* PCUs are not in use. */
183 1.7 matt return;
184 1.7 matt }
185 1.7 matt for (u_int id = 0; id < PCU_UNIT_COUNT; id++) {
186 1.18 rmind if ((pcu_valid & (1U << id)) == 0) {
187 1.7 matt continue;
188 1.7 matt }
189 1.7 matt if (__predict_true(l->l_pcu_cpu[id] == NULL)) {
190 1.7 matt continue;
191 1.7 matt }
192 1.7 matt const pcu_ops_t * const pcu = pcu_ops_md_defs[id];
193 1.9 matt pcu_lwp_op(pcu, l, flags);
194 1.7 matt }
195 1.7 matt }
196 1.7 matt
197 1.1 rmind /*
198 1.4 rmind * pcu_do_op: save/release PCU state on the current CPU.
199 1.1 rmind *
200 1.19 rmind * => Must be called at IPL_PCU or from the interrupt.
201 1.1 rmind */
202 1.4 rmind static inline void
203 1.4 rmind pcu_do_op(const pcu_ops_t *pcu, lwp_t * const l, const int flags)
204 1.4 rmind {
205 1.4 rmind struct cpu_info * const ci = curcpu();
206 1.4 rmind const u_int id = pcu->pcu_id;
207 1.18 rmind
208 1.18 rmind KASSERT(l->l_pcu_cpu[id] == ci);
209 1.18 rmind
210 1.18 rmind if (flags & PCU_CMD_SAVE) {
211 1.18 rmind pcu->pcu_state_save(l);
212 1.18 rmind }
213 1.18 rmind if (flags & PCU_CMD_RELEASE) {
214 1.18 rmind pcu->pcu_state_release(l);
215 1.4 rmind ci->ci_pcu_curlwp[id] = NULL;
216 1.4 rmind l->l_pcu_cpu[id] = NULL;
217 1.4 rmind }
218 1.4 rmind }
219 1.4 rmind
220 1.4 rmind /*
221 1.19 rmind * pcu_cpu_ipi: helper routine to call pcu_do_op() via ipi(9).
222 1.4 rmind */
223 1.1 rmind static void
224 1.19 rmind pcu_cpu_ipi(void *arg)
225 1.1 rmind {
226 1.19 rmind const pcu_ipi_msg_t *pcu_msg = arg;
227 1.18 rmind const pcu_ops_t *pcu = pcu_msg->pcu;
228 1.1 rmind const u_int id = pcu->pcu_id;
229 1.18 rmind lwp_t *l = pcu_msg->owner;
230 1.4 rmind
231 1.18 rmind KASSERT(pcu_msg->owner != NULL);
232 1.1 rmind
233 1.18 rmind if (curcpu()->ci_pcu_curlwp[id] != l) {
234 1.18 rmind /*
235 1.18 rmind * Different ownership: another LWP raced with us and
236 1.18 rmind * perform save and release. There is nothing to do.
237 1.18 rmind */
238 1.18 rmind KASSERT(l->l_pcu_cpu[id] == NULL);
239 1.1 rmind return;
240 1.1 rmind }
241 1.18 rmind pcu_do_op(pcu, l, pcu_msg->flags);
242 1.1 rmind }
243 1.1 rmind
244 1.1 rmind /*
245 1.1 rmind * pcu_lwp_op: perform PCU state save, release or both operations on LWP.
246 1.1 rmind */
247 1.1 rmind static void
248 1.13 matt pcu_lwp_op(const pcu_ops_t *pcu, lwp_t *l, const int flags)
249 1.1 rmind {
250 1.1 rmind const u_int id = pcu->pcu_id;
251 1.1 rmind struct cpu_info *ci;
252 1.1 rmind int s;
253 1.1 rmind
254 1.1 rmind /*
255 1.1 rmind * Caller should have re-checked if there is any state to manage.
256 1.1 rmind * Block the interrupts and inspect again, since cross-call sent
257 1.1 rmind * by remote CPU could have changed the state.
258 1.1 rmind */
259 1.19 rmind s = splpcu();
260 1.1 rmind ci = l->l_pcu_cpu[id];
261 1.1 rmind if (ci == curcpu()) {
262 1.1 rmind /*
263 1.1 rmind * State is on the current CPU - just perform the operations.
264 1.1 rmind */
265 1.6 matt KASSERTMSG(ci->ci_pcu_curlwp[id] == l,
266 1.10 jym "%s: cpu%u: pcu_curlwp[%u] (%p) != l (%p)",
267 1.10 jym __func__, cpu_index(ci), id, ci->ci_pcu_curlwp[id], l);
268 1.4 rmind pcu_do_op(pcu, l, flags);
269 1.1 rmind splx(s);
270 1.1 rmind return;
271 1.1 rmind }
272 1.1 rmind if (__predict_false(ci == NULL)) {
273 1.1 rmind /* Cross-call has won the race - no state to manage. */
274 1.19 rmind splx(s);
275 1.1 rmind return;
276 1.1 rmind }
277 1.1 rmind
278 1.1 rmind /*
279 1.18 rmind * The state is on the remote CPU: perform the operation(s) there.
280 1.1 rmind */
281 1.19 rmind pcu_ipi_msg_t pcu_msg = { .pcu = pcu, .owner = l, .flags = flags };
282 1.19 rmind ipi_msg_t ipi_msg = { .func = pcu_cpu_ipi, .arg = &pcu_msg };
283 1.19 rmind ipi_unicast(&ipi_msg, ci);
284 1.19 rmind splx(s);
285 1.19 rmind
286 1.19 rmind /* Wait for completion. */
287 1.19 rmind ipi_wait(&ipi_msg);
288 1.1 rmind
289 1.18 rmind KASSERT((flags & PCU_CMD_RELEASE) == 0 || l->l_pcu_cpu[id] == NULL);
290 1.1 rmind }
291 1.1 rmind
292 1.1 rmind /*
293 1.1 rmind * pcu_load: load/initialize the PCU state of current LWP on current CPU.
294 1.1 rmind */
295 1.1 rmind void
296 1.1 rmind pcu_load(const pcu_ops_t *pcu)
297 1.1 rmind {
298 1.18 rmind lwp_t *oncpu_lwp, * const l = curlwp;
299 1.1 rmind const u_int id = pcu->pcu_id;
300 1.1 rmind struct cpu_info *ci, *curci;
301 1.1 rmind int s;
302 1.1 rmind
303 1.1 rmind KASSERT(!cpu_intr_p() && !cpu_softintr_p());
304 1.1 rmind
305 1.19 rmind s = splpcu();
306 1.1 rmind curci = curcpu();
307 1.1 rmind ci = l->l_pcu_cpu[id];
308 1.1 rmind
309 1.1 rmind /* Does this CPU already have our PCU state loaded? */
310 1.1 rmind if (ci == curci) {
311 1.19 rmind /*
312 1.19 rmind * Fault reoccurred while the PCU state is loaded and
313 1.19 rmind * therefore PCU should be reenabled. This happens
314 1.19 rmind * if LWP is context switched to another CPU and then
315 1.19 rmind * switched back to the original CPU while the state
316 1.19 rmind * on that CPU has not been changed by other LWPs.
317 1.19 rmind *
318 1.19 rmind * It may also happen due to instruction "bouncing" on
319 1.19 rmind * some architectures.
320 1.19 rmind */
321 1.1 rmind KASSERT(curci->ci_pcu_curlwp[id] == l);
322 1.20 chs KASSERT(pcu_valid_p(pcu, l));
323 1.18 rmind pcu->pcu_state_load(l, PCU_VALID | PCU_REENABLE);
324 1.1 rmind splx(s);
325 1.1 rmind return;
326 1.1 rmind }
327 1.1 rmind
328 1.1 rmind /* If PCU state of this LWP is on the remote CPU - save it there. */
329 1.1 rmind if (ci) {
330 1.19 rmind pcu_ipi_msg_t pcu_msg = { .pcu = pcu, .owner = l,
331 1.19 rmind .flags = PCU_CMD_SAVE | PCU_CMD_RELEASE };
332 1.19 rmind ipi_msg_t ipi_msg = { .func = pcu_cpu_ipi, .arg = &pcu_msg };
333 1.19 rmind ipi_unicast(&ipi_msg, ci);
334 1.1 rmind splx(s);
335 1.18 rmind
336 1.19 rmind /*
337 1.19 rmind * Wait for completion, re-enter IPL_PCU and re-fetch
338 1.19 rmind * the current CPU.
339 1.19 rmind */
340 1.19 rmind ipi_wait(&ipi_msg);
341 1.19 rmind s = splpcu();
342 1.1 rmind curci = curcpu();
343 1.1 rmind }
344 1.1 rmind KASSERT(l->l_pcu_cpu[id] == NULL);
345 1.1 rmind
346 1.1 rmind /* Save the PCU state on the current CPU, if there is any. */
347 1.18 rmind if ((oncpu_lwp = curci->ci_pcu_curlwp[id]) != NULL) {
348 1.18 rmind pcu_do_op(pcu, oncpu_lwp, PCU_CMD_SAVE | PCU_CMD_RELEASE);
349 1.18 rmind KASSERT(curci->ci_pcu_curlwp[id] == NULL);
350 1.18 rmind }
351 1.1 rmind
352 1.1 rmind /*
353 1.1 rmind * Finally, load the state for this LWP on this CPU. Indicate to
354 1.18 rmind * the load function whether PCU state was valid before this call.
355 1.1 rmind */
356 1.18 rmind const bool valid = ((1U << id) & l->l_pcu_valid) != 0;
357 1.18 rmind pcu->pcu_state_load(l, valid ? PCU_VALID : 0);
358 1.18 rmind curci->ci_pcu_curlwp[id] = l;
359 1.18 rmind l->l_pcu_cpu[id] = curci;
360 1.18 rmind l->l_pcu_valid |= (1U << id);
361 1.1 rmind splx(s);
362 1.1 rmind }
363 1.1 rmind
364 1.1 rmind /*
365 1.20 chs * pcu_discard: discard the PCU state of the given LWP. If "valid"
366 1.18 rmind * parameter is true, then keep considering the PCU state as valid.
367 1.1 rmind */
368 1.1 rmind void
369 1.20 chs pcu_discard(const pcu_ops_t *pcu, lwp_t *l, bool valid)
370 1.1 rmind {
371 1.1 rmind const u_int id = pcu->pcu_id;
372 1.1 rmind
373 1.1 rmind KASSERT(!cpu_intr_p() && !cpu_softintr_p());
374 1.1 rmind
375 1.18 rmind if (__predict_false(valid)) {
376 1.18 rmind l->l_pcu_valid |= (1U << id);
377 1.18 rmind } else {
378 1.18 rmind l->l_pcu_valid &= ~(1U << id);
379 1.18 rmind }
380 1.1 rmind if (__predict_true(l->l_pcu_cpu[id] == NULL)) {
381 1.1 rmind return;
382 1.1 rmind }
383 1.18 rmind pcu_lwp_op(pcu, l, PCU_CMD_RELEASE);
384 1.1 rmind }
385 1.1 rmind
386 1.1 rmind /*
387 1.1 rmind * pcu_save_lwp: save PCU state to the given LWP.
388 1.1 rmind */
389 1.1 rmind void
390 1.20 chs pcu_save(const pcu_ops_t *pcu, lwp_t *l)
391 1.1 rmind {
392 1.1 rmind const u_int id = pcu->pcu_id;
393 1.1 rmind
394 1.1 rmind KASSERT(!cpu_intr_p() && !cpu_softintr_p());
395 1.1 rmind
396 1.1 rmind if (__predict_true(l->l_pcu_cpu[id] == NULL)) {
397 1.1 rmind return;
398 1.1 rmind }
399 1.18 rmind pcu_lwp_op(pcu, l, PCU_CMD_SAVE | PCU_CMD_RELEASE);
400 1.1 rmind }
401 1.1 rmind
402 1.1 rmind /*
403 1.18 rmind * pcu_save_all_on_cpu: save all PCU states on the current CPU.
404 1.15 drochner */
405 1.15 drochner void
406 1.15 drochner pcu_save_all_on_cpu(void)
407 1.15 drochner {
408 1.18 rmind int s;
409 1.15 drochner
410 1.19 rmind s = splpcu();
411 1.15 drochner for (u_int id = 0; id < PCU_UNIT_COUNT; id++) {
412 1.18 rmind const pcu_ops_t * const pcu = pcu_ops_md_defs[id];
413 1.18 rmind lwp_t *l;
414 1.18 rmind
415 1.18 rmind if ((l = curcpu()->ci_pcu_curlwp[id]) != NULL) {
416 1.18 rmind pcu_do_op(pcu, l, PCU_CMD_SAVE | PCU_CMD_RELEASE);
417 1.18 rmind }
418 1.15 drochner }
419 1.18 rmind splx(s);
420 1.15 drochner }
421 1.15 drochner
422 1.15 drochner /*
423 1.18 rmind * pcu_valid_p: return true if PCU state is considered valid. Generally,
424 1.18 rmind * it always becomes "valid" when pcu_load() is called.
425 1.1 rmind */
426 1.1 rmind bool
427 1.20 chs pcu_valid_p(const pcu_ops_t *pcu, const lwp_t *l)
428 1.1 rmind {
429 1.1 rmind const u_int id = pcu->pcu_id;
430 1.1 rmind
431 1.18 rmind return (l->l_pcu_valid & (1U << id)) != 0;
432 1.1 rmind }
433 1.3 matt
434 1.3 matt #endif /* PCU_UNIT_COUNT > 0 */
435