divdi3.S revision 1.2.4.2 1 1.2.4.2 elad .file "__divdi3.s"
2 1.2.4.2 elad
3 1.2.4.2 elad // $NetBSD: divdi3.S,v 1.2.4.2 2006/04/19 04:36:01 elad Exp $
4 1.2.4.2 elad
5 1.2.4.2 elad //-
6 1.2.4.2 elad // Copyright (c) 2000, Intel Corporation
7 1.2.4.2 elad // All rights reserved.
8 1.2.4.2 elad //
9 1.2.4.2 elad // Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache,
10 1.2.4.2 elad // Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab,
11 1.2.4.2 elad // Intel Corporation.
12 1.2.4.2 elad //
13 1.2.4.2 elad // WARRANTY DISCLAIMER
14 1.2.4.2 elad //
15 1.2.4.2 elad // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16 1.2.4.2 elad // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17 1.2.4.2 elad // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18 1.2.4.2 elad // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
19 1.2.4.2 elad // CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
20 1.2.4.2 elad // EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
21 1.2.4.2 elad // PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
22 1.2.4.2 elad // PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
23 1.2.4.2 elad // OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
24 1.2.4.2 elad // NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25 1.2.4.2 elad // SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 1.2.4.2 elad //
27 1.2.4.2 elad // Intel Corporation is the author of this code, and requests that all
28 1.2.4.2 elad // problem reports or change requests be submitted to it directly at
29 1.2.4.2 elad // http://developer.intel.com/opensource.
30 1.2.4.2 elad //
31 1.2.4.2 elad
32 1.2.4.2 elad .section .text
33 1.2.4.2 elad .proc __divdi3#
34 1.2.4.2 elad .align 32
35 1.2.4.2 elad .global __divdi3#
36 1.2.4.2 elad .align 32
37 1.2.4.2 elad
38 1.2.4.2 elad // 64-bit signed integer divide
39 1.2.4.2 elad
40 1.2.4.2 elad __divdi3:
41 1.2.4.2 elad
42 1.2.4.2 elad { .mii
43 1.2.4.2 elad alloc r31=ar.pfs,2,0,0,0
44 1.2.4.2 elad nop.i 0
45 1.2.4.2 elad nop.i 0;;
46 1.2.4.2 elad } { .mmi
47 1.2.4.2 elad
48 1.2.4.2 elad // 64-BIT SIGNED INTEGER DIVIDE BEGINS HERE
49 1.2.4.2 elad
50 1.2.4.2 elad setf.sig f8=r32
51 1.2.4.2 elad setf.sig f9=r33
52 1.2.4.2 elad nop.i 0;;
53 1.2.4.2 elad } { .mfb
54 1.2.4.2 elad nop.m 0
55 1.2.4.2 elad fcvt.xf f6=f8
56 1.2.4.2 elad nop.b 0
57 1.2.4.2 elad } { .mfb
58 1.2.4.2 elad nop.m 0
59 1.2.4.2 elad fcvt.xf f7=f9
60 1.2.4.2 elad nop.b 0;;
61 1.2.4.2 elad } { .mfi
62 1.2.4.2 elad nop.m 0
63 1.2.4.2 elad // Step (1)
64 1.2.4.2 elad // y0 = 1 / b in f8
65 1.2.4.2 elad frcpa.s1 f8,p6=f6,f7
66 1.2.4.2 elad nop.i 0;;
67 1.2.4.2 elad } { .mfi
68 1.2.4.2 elad nop.m 0
69 1.2.4.2 elad // Step (2)
70 1.2.4.2 elad // e0 = 1 - b * y0 in f9
71 1.2.4.2 elad (p6) fnma.s1 f9=f7,f8,f1
72 1.2.4.2 elad nop.i 0
73 1.2.4.2 elad } { .mfi
74 1.2.4.2 elad nop.m 0
75 1.2.4.2 elad // Step (3)
76 1.2.4.2 elad // q0 = a * y0 in f10
77 1.2.4.2 elad (p6) fma.s1 f10=f6,f8,f0
78 1.2.4.2 elad nop.i 0;;
79 1.2.4.2 elad } { .mfi
80 1.2.4.2 elad nop.m 0
81 1.2.4.2 elad // Step (4)
82 1.2.4.2 elad // e1 = e0 * e0 in f11
83 1.2.4.2 elad (p6) fma.s1 f11=f9,f9,f0
84 1.2.4.2 elad nop.i 0
85 1.2.4.2 elad } { .mfi
86 1.2.4.2 elad nop.m 0
87 1.2.4.2 elad // Step (5)
88 1.2.4.2 elad // q1 = q0 + e0 * q0 in f10
89 1.2.4.2 elad (p6) fma.s1 f10=f9,f10,f10
90 1.2.4.2 elad nop.i 0;;
91 1.2.4.2 elad } { .mfi
92 1.2.4.2 elad nop.m 0
93 1.2.4.2 elad // Step (6)
94 1.2.4.2 elad // y1 = y0 + e0 * y0 in f8
95 1.2.4.2 elad (p6) fma.s1 f8=f9,f8,f8
96 1.2.4.2 elad nop.i 0;;
97 1.2.4.2 elad } { .mfi
98 1.2.4.2 elad nop.m 0
99 1.2.4.2 elad // Step (7)
100 1.2.4.2 elad // q2 = q1 + e1 * q1 in f9
101 1.2.4.2 elad (p6) fma.s1 f9=f11,f10,f10
102 1.2.4.2 elad nop.i 0;;
103 1.2.4.2 elad } { .mfi
104 1.2.4.2 elad nop.m 0
105 1.2.4.2 elad // Step (8)
106 1.2.4.2 elad // y2 = y1 + e1 * y1 in f8
107 1.2.4.2 elad (p6) fma.s1 f8=f11,f8,f8
108 1.2.4.2 elad nop.i 0;;
109 1.2.4.2 elad } { .mfi
110 1.2.4.2 elad nop.m 0
111 1.2.4.2 elad // Step (9)
112 1.2.4.2 elad // r2 = a - b * q2 in f10
113 1.2.4.2 elad (p6) fnma.s1 f10=f7,f9,f6
114 1.2.4.2 elad nop.i 0;;
115 1.2.4.2 elad } { .mfi
116 1.2.4.2 elad nop.m 0
117 1.2.4.2 elad // Step (10)
118 1.2.4.2 elad // q3 = q2 + r2 * y2 in f8
119 1.2.4.2 elad (p6) fma.s1 f8=f10,f8,f9
120 1.2.4.2 elad nop.i 0;;
121 1.2.4.2 elad } { .mfb
122 1.2.4.2 elad nop.m 0
123 1.2.4.2 elad // Step (11)
124 1.2.4.2 elad // q = trunc (q3)
125 1.2.4.2 elad fcvt.fx.trunc.s1 f8=f8
126 1.2.4.2 elad nop.b 0;;
127 1.2.4.2 elad } { .mmi
128 1.2.4.2 elad // quotient will be in r8 (if b != 0)
129 1.2.4.2 elad getf.sig r8=f8
130 1.2.4.2 elad nop.m 0
131 1.2.4.2 elad nop.i 0;;
132 1.2.4.2 elad }
133 1.2.4.2 elad
134 1.2.4.2 elad // 64-BIT SIGNED INTEGER DIVIDE ENDS HERE
135 1.2.4.2 elad
136 1.2.4.2 elad { .mmb
137 1.2.4.2 elad nop.m 0
138 1.2.4.2 elad nop.m 0
139 1.2.4.2 elad br.ret.sptk b0;;
140 1.2.4.2 elad }
141 1.2.4.2 elad
142 1.2.4.2 elad .endp __divdi3
143