divsi3.S revision 1.2.14.2
1 1.2.14.2 yamt .file "__divsi3.s" 2 1.2.14.2 yamt 3 1.2.14.2 yamt // $NetBSD: divsi3.S,v 1.2.14.2 2006/06/21 15:10:22 yamt Exp $ 4 1.2.14.2 yamt 5 1.2.14.2 yamt //- 6 1.2.14.2 yamt // Copyright (c) 2000, Intel Corporation 7 1.2.14.2 yamt // All rights reserved. 8 1.2.14.2 yamt // 9 1.2.14.2 yamt // Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache, 10 1.2.14.2 yamt // Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab, 11 1.2.14.2 yamt // Intel Corporation. 12 1.2.14.2 yamt // 13 1.2.14.2 yamt // WARRANTY DISCLAIMER 14 1.2.14.2 yamt // 15 1.2.14.2 yamt // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16 1.2.14.2 yamt // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17 1.2.14.2 yamt // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 18 1.2.14.2 yamt // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS 19 1.2.14.2 yamt // CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 20 1.2.14.2 yamt // EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 21 1.2.14.2 yamt // PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 22 1.2.14.2 yamt // PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 23 1.2.14.2 yamt // OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING 24 1.2.14.2 yamt // NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 25 1.2.14.2 yamt // SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 1.2.14.2 yamt // 27 1.2.14.2 yamt // Intel Corporation is the author of this code, and requests that all 28 1.2.14.2 yamt // problem reports or change requests be submitted to it directly at 29 1.2.14.2 yamt // http://developer.intel.com/opensource. 30 1.2.14.2 yamt // 31 1.2.14.2 yamt 32 1.2.14.2 yamt .section .text 33 1.2.14.2 yamt 34 1.2.14.2 yamt // 32-bit signed integer divide 35 1.2.14.2 yamt 36 1.2.14.2 yamt .proc __divsi3# 37 1.2.14.2 yamt .align 32 38 1.2.14.2 yamt .global __divsi3# 39 1.2.14.2 yamt .align 32 40 1.2.14.2 yamt 41 1.2.14.2 yamt __divsi3: 42 1.2.14.2 yamt 43 1.2.14.2 yamt { .mii 44 1.2.14.2 yamt alloc r31=ar.pfs,2,0,0,0 45 1.2.14.2 yamt nop.i 0 46 1.2.14.2 yamt nop.i 0;; 47 1.2.14.2 yamt } { .mii 48 1.2.14.2 yamt nop.m 0 49 1.2.14.2 yamt 50 1.2.14.2 yamt // 32-BIT SIGNED INTEGER DIVIDE BEGINS HERE 51 1.2.14.2 yamt 52 1.2.14.2 yamt // general register used: 53 1.2.14.2 yamt // r32 - 32-bit signed integer dividend 54 1.2.14.2 yamt // r33 - 32-bit signed integer divisor 55 1.2.14.2 yamt // r8 - 32-bit signed integer result 56 1.2.14.2 yamt // r2 - scratch register 57 1.2.14.2 yamt // floating-point registers used: f6, f7, f8, f9 58 1.2.14.2 yamt // predicate registers used: p6 59 1.2.14.2 yamt 60 1.2.14.2 yamt sxt4 r32=r32 61 1.2.14.2 yamt sxt4 r33=r33;; 62 1.2.14.2 yamt } { .mmb 63 1.2.14.2 yamt setf.sig f6=r32 64 1.2.14.2 yamt setf.sig f7=r33 65 1.2.14.2 yamt nop.b 0;; 66 1.2.14.2 yamt } { .mfi 67 1.2.14.2 yamt nop.m 0 68 1.2.14.2 yamt fcvt.xf f6=f6 69 1.2.14.2 yamt nop.i 0 70 1.2.14.2 yamt } { .mfi 71 1.2.14.2 yamt nop.m 0 72 1.2.14.2 yamt fcvt.xf f7=f7 73 1.2.14.2 yamt mov r2 = 0x0ffdd;; 74 1.2.14.2 yamt } { .mfi 75 1.2.14.2 yamt setf.exp f9 = r2 76 1.2.14.2 yamt // (1) y0 77 1.2.14.2 yamt frcpa.s1 f8,p6=f6,f7 78 1.2.14.2 yamt nop.i 0;; 79 1.2.14.2 yamt } { .mfi 80 1.2.14.2 yamt nop.m 0 81 1.2.14.2 yamt // (2) q0 = a * y0 82 1.2.14.2 yamt (p6) fma.s1 f6=f6,f8,f0 83 1.2.14.2 yamt nop.i 0 84 1.2.14.2 yamt } { .mfi 85 1.2.14.2 yamt nop.m 0 86 1.2.14.2 yamt // (3) e0 = 1 - b * y0 87 1.2.14.2 yamt (p6) fnma.s1 f7=f7,f8,f1 88 1.2.14.2 yamt nop.i 0;; 89 1.2.14.2 yamt } { .mfi 90 1.2.14.2 yamt nop.m 0 91 1.2.14.2 yamt // (4) q1 = q0 + e0 * q0 92 1.2.14.2 yamt (p6) fma.s1 f6=f7,f6,f6 93 1.2.14.2 yamt nop.i 0 94 1.2.14.2 yamt } { .mfi 95 1.2.14.2 yamt nop.m 0 96 1.2.14.2 yamt // (5) e1 = e0 * e0 + 2^-34 97 1.2.14.2 yamt (p6) fma.s1 f7=f7,f7,f9 98 1.2.14.2 yamt nop.i 0;; 99 1.2.14.2 yamt } { .mfi 100 1.2.14.2 yamt nop.m 0 101 1.2.14.2 yamt // (6) q2 = q1 + e1 * q1 102 1.2.14.2 yamt (p6) fma.s1 f8=f7,f6,f6 103 1.2.14.2 yamt nop.i 0;; 104 1.2.14.2 yamt } { .mfi 105 1.2.14.2 yamt nop.m 0 106 1.2.14.2 yamt // (7) q = trunc(q2) 107 1.2.14.2 yamt fcvt.fx.trunc.s1 f8=f8 108 1.2.14.2 yamt nop.i 0;; 109 1.2.14.2 yamt } { .mmi 110 1.2.14.2 yamt // quotient will be in the least significant 32 bits of r8 (if b != 0) 111 1.2.14.2 yamt getf.sig r8=f8 112 1.2.14.2 yamt nop.m 0 113 1.2.14.2 yamt nop.i 0;; 114 1.2.14.2 yamt } 115 1.2.14.2 yamt 116 1.2.14.2 yamt // 32-BIT SIGNED INTEGER DIVIDE ENDS HERE 117 1.2.14.2 yamt 118 1.2.14.2 yamt { .mmb 119 1.2.14.2 yamt nop.m 0 120 1.2.14.2 yamt nop.m 0 121 1.2.14.2 yamt br.ret.sptk b0;; 122 1.2.14.2 yamt } 123 1.2.14.2 yamt 124 1.2.14.2 yamt .endp __divsi3 125
Indexes created Mon Sep 29 21:09:56 GMT 2025