umoddi3.S revision 1.2.6.2
1 1.2.6.2 simonb .file "__umoddi3.s" 2 1.2.6.2 simonb 3 1.2.6.2 simonb // $NetBSD: umoddi3.S,v 1.2.6.2 2006/04/22 11:40:05 simonb Exp $ 4 1.2.6.2 simonb 5 1.2.6.2 simonb //- 6 1.2.6.2 simonb // Copyright (c) 2000, Intel Corporation 7 1.2.6.2 simonb // All rights reserved. 8 1.2.6.2 simonb // 9 1.2.6.2 simonb // Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache, 10 1.2.6.2 simonb // Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab, 11 1.2.6.2 simonb // Intel Corporation. 12 1.2.6.2 simonb // 13 1.2.6.2 simonb // WARRANTY DISCLAIMER 14 1.2.6.2 simonb // 15 1.2.6.2 simonb // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16 1.2.6.2 simonb // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17 1.2.6.2 simonb // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 18 1.2.6.2 simonb // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS 19 1.2.6.2 simonb // CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 20 1.2.6.2 simonb // EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 21 1.2.6.2 simonb // PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 22 1.2.6.2 simonb // PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 23 1.2.6.2 simonb // OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING 24 1.2.6.2 simonb // NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 25 1.2.6.2 simonb // SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 1.2.6.2 simonb // 27 1.2.6.2 simonb // Intel Corporation is the author of this code, and requests that all 28 1.2.6.2 simonb // problem reports or change requests be submitted to it directly at 29 1.2.6.2 simonb // http://developer.intel.com/opensource. 30 1.2.6.2 simonb // 31 1.2.6.2 simonb 32 1.2.6.2 simonb .section .text 33 1.2.6.2 simonb 34 1.2.6.2 simonb // 64-bit unsigned integer remainder 35 1.2.6.2 simonb 36 1.2.6.2 simonb .proc __umoddi3# 37 1.2.6.2 simonb .align 32 38 1.2.6.2 simonb .global __umoddi3# 39 1.2.6.2 simonb .align 32 40 1.2.6.2 simonb 41 1.2.6.2 simonb __umoddi3: 42 1.2.6.2 simonb 43 1.2.6.2 simonb { .mii 44 1.2.6.2 simonb alloc r31=ar.pfs,3,0,0,0 45 1.2.6.2 simonb nop.i 0 46 1.2.6.2 simonb nop.i 0 47 1.2.6.2 simonb } { .mmb 48 1.2.6.2 simonb 49 1.2.6.2 simonb // 64-BIT UNSIGNED INTEGER REMAINDER BEGINS HERE 50 1.2.6.2 simonb 51 1.2.6.2 simonb // general register used: 52 1.2.6.2 simonb // r32 - 64-bit unsigned integer dividend, called a below 53 1.2.6.2 simonb // r33 - 64-bit unsigned integer divisor, called b below 54 1.2.6.2 simonb // r8 - 64-bit unsigned integer result 55 1.2.6.2 simonb // floating-point registers used: f6, f7, f8, f9, f10, f11, f12 56 1.2.6.2 simonb // predicate registers used: p6 57 1.2.6.2 simonb 58 1.2.6.2 simonb setf.sig f12=r32 // holds a in integer form 59 1.2.6.2 simonb setf.sig f7=r33 60 1.2.6.2 simonb nop.b 0;; 61 1.2.6.2 simonb } { .mfi 62 1.2.6.2 simonb // get 2's complement of b 63 1.2.6.2 simonb sub r33=r0,r33 64 1.2.6.2 simonb fcvt.xuf.s1 f6=f12 65 1.2.6.2 simonb nop.i 0 66 1.2.6.2 simonb } { .mfi 67 1.2.6.2 simonb nop.m 0 68 1.2.6.2 simonb fcvt.xuf.s1 f7=f7 69 1.2.6.2 simonb nop.i 0;; 70 1.2.6.2 simonb } { .mfi 71 1.2.6.2 simonb nop.m 0 72 1.2.6.2 simonb // Step (1) 73 1.2.6.2 simonb // y0 = 1 / b in f8 74 1.2.6.2 simonb frcpa.s1 f8,p6=f6,f7 75 1.2.6.2 simonb nop.i 0;; 76 1.2.6.2 simonb } { .mfi 77 1.2.6.2 simonb nop.m 0 78 1.2.6.2 simonb // Step (2) 79 1.2.6.2 simonb // q0 = a * y0 in f10 80 1.2.6.2 simonb (p6) fma.s1 f10=f6,f8,f0 81 1.2.6.2 simonb nop.i 0 82 1.2.6.2 simonb } { .mfi 83 1.2.6.2 simonb nop.m 0 84 1.2.6.2 simonb // Step (3) 85 1.2.6.2 simonb // e0 = 1 - b * y0 in f9 86 1.2.6.2 simonb (p6) fnma.s1 f9=f7,f8,f1 87 1.2.6.2 simonb nop.i 0;; 88 1.2.6.2 simonb } { .mfi 89 1.2.6.2 simonb nop.m 0 90 1.2.6.2 simonb // Step (4) 91 1.2.6.2 simonb // q1 = q0 + e0 * q0 in f10 92 1.2.6.2 simonb (p6) fma.s1 f10=f9,f10,f10 93 1.2.6.2 simonb nop.i 0 94 1.2.6.2 simonb } { .mfi 95 1.2.6.2 simonb nop.m 0 96 1.2.6.2 simonb // Step (5) 97 1.2.6.2 simonb // e1 = e0 * e0 in f11 98 1.2.6.2 simonb (p6) fma.s1 f11=f9,f9,f0 99 1.2.6.2 simonb nop.i 0;; 100 1.2.6.2 simonb } { .mfi 101 1.2.6.2 simonb nop.m 0 102 1.2.6.2 simonb // Step (6) 103 1.2.6.2 simonb // y1 = y0 + e0 * y0 in f8 104 1.2.6.2 simonb (p6) fma.s1 f8=f9,f8,f8 105 1.2.6.2 simonb nop.i 0;; 106 1.2.6.2 simonb } { .mfi 107 1.2.6.2 simonb nop.m 0 108 1.2.6.2 simonb // Step (7) 109 1.2.6.2 simonb // q2 = q1 + e1 * q1 in f9 110 1.2.6.2 simonb (p6) fma.s1 f9=f11,f10,f10 111 1.2.6.2 simonb nop.i 0;; 112 1.2.6.2 simonb } { .mfi 113 1.2.6.2 simonb nop.m 0 114 1.2.6.2 simonb // Step (8) 115 1.2.6.2 simonb // y2 = y1 + e1 * y1 in f8 116 1.2.6.2 simonb (p6) fma.s1 f8=f11,f8,f8 117 1.2.6.2 simonb nop.i 0;; 118 1.2.6.2 simonb } { .mfi 119 1.2.6.2 simonb nop.m 0 120 1.2.6.2 simonb // Step (9) 121 1.2.6.2 simonb // r2 = a - b * q2 in f10 122 1.2.6.2 simonb (p6) fnma.s1 f10=f7,f9,f6 123 1.2.6.2 simonb nop.i 0;; 124 1.2.6.2 simonb } { .mfi 125 1.2.6.2 simonb // f7=-b 126 1.2.6.2 simonb setf.sig f7=r33 127 1.2.6.2 simonb // Step (10) 128 1.2.6.2 simonb // q3 = q2 + r2 * y2 in f8 129 1.2.6.2 simonb (p6) fma.s1 f8=f10,f8,f9 130 1.2.6.2 simonb nop.i 0;; 131 1.2.6.2 simonb } { .mfi 132 1.2.6.2 simonb nop.m 0 133 1.2.6.2 simonb // (11) q = trunc(q3) 134 1.2.6.2 simonb fcvt.fxu.trunc.s1 f8=f8 135 1.2.6.2 simonb nop.i 0;; 136 1.2.6.2 simonb } { .mfi 137 1.2.6.2 simonb nop.m 0 138 1.2.6.2 simonb // (12) r = a + (-b) * q 139 1.2.6.2 simonb xma.l f8=f8,f7,f12 140 1.2.6.2 simonb nop.i 0;; 141 1.2.6.2 simonb } { .mib 142 1.2.6.2 simonb getf.sig r8=f8 143 1.2.6.2 simonb nop.i 0 144 1.2.6.2 simonb nop.b 0 145 1.2.6.2 simonb } 146 1.2.6.2 simonb 147 1.2.6.2 simonb // 64-BIT UNSIGNED INTEGER REMAINDER ENDS HERE 148 1.2.6.2 simonb 149 1.2.6.2 simonb { .mib 150 1.2.6.2 simonb nop.m 0 151 1.2.6.2 simonb nop.i 0 152 1.2.6.2 simonb br.ret.sptk b0;; 153 1.2.6.2 simonb } 154 1.2.6.2 simonb 155 1.2.6.2 simonb .endp __umoddi3 156
Indexes created Mon Sep 29 21:09:56 GMT 2025