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syncicache.c revision 1.1
      1  1.1  ws /*	$NetBSD: syncicache.c,v 1.1 1999/04/17 21:16:47 ws Exp $	*/
      2  1.1  ws 
      3  1.1  ws /*
      4  1.1  ws  * Copyright (C) 1995-1997, 1999 Wolfgang Solfrank.
      5  1.1  ws  * Copyright (C) 1995-1997, 1999 TooLs GmbH.
      6  1.1  ws  * All rights reserved.
      7  1.1  ws  *
      8  1.1  ws  * Redistribution and use in source and binary forms, with or without
      9  1.1  ws  * modification, are permitted provided that the following conditions
     10  1.1  ws  * are met:
     11  1.1  ws  * 1. Redistributions of source code must retain the above copyright
     12  1.1  ws  *    notice, this list of conditions and the following disclaimer.
     13  1.1  ws  * 2. Redistributions in binary form must reproduce the above copyright
     14  1.1  ws  *    notice, this list of conditions and the following disclaimer in the
     15  1.1  ws  *    documentation and/or other materials provided with the distribution.
     16  1.1  ws  * 3. All advertising materials mentioning features or use of this software
     17  1.1  ws  *    must display the following acknowledgement:
     18  1.1  ws  *	This product includes software developed by TooLs GmbH.
     19  1.1  ws  * 4. The name of TooLs GmbH may not be used to endorse or promote products
     20  1.1  ws  *    derived from this software without specific prior written permission.
     21  1.1  ws  *
     22  1.1  ws  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
     23  1.1  ws  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     24  1.1  ws  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     25  1.1  ws  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     26  1.1  ws  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     27  1.1  ws  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
     28  1.1  ws  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     29  1.1  ws  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     30  1.1  ws  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
     31  1.1  ws  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     32  1.1  ws  */
     33  1.1  ws #include <sys/param.h>
     34  1.1  ws #if	defined(_KERNEL) || defined(_STANDALONE)
     35  1.1  ws #include <sys/proc.h>
     36  1.1  ws #include <vm/vm.h>
     37  1.1  ws #endif
     38  1.1  ws #include <sys/sysctl.h>
     39  1.1  ws 
     40  1.1  ws #include <machine/cpu.h>
     41  1.1  ws 
     42  1.1  ws #if	defined(_KERNEL) || defined(_STANDALONE)
     43  1.1  ws #ifndef	CACHELINESIZE
     44  1.1  ws #error "Must know the size of a cache line"
     45  1.1  ws #endif
     46  1.1  ws #else
     47  1.1  ws static int _cachelinesize;
     48  1.1  ws #define	CACHELINESIZE	_cachelinesize
     49  1.1  ws 
     50  1.1  ws static void
     51  1.1  ws getcachelinesize()
     52  1.1  ws {
     53  1.1  ws 	static int cachemib[] = { CTL_MACHDEP, CPU_CACHELINE };
     54  1.1  ws 	int clen = sizeof(_cachelinesize);
     55  1.1  ws 
     56  1.1  ws 	if (sysctl(cachemib, sizeof(cachemib) / sizeof(cachemib[0]),
     57  1.1  ws 		   &_cachelinesize, &clen, NULL, 0) < 0
     58  1.1  ws 	    || !_cachelinesize)
     59  1.1  ws 		abort();
     60  1.1  ws }
     61  1.1  ws #endif
     62  1.1  ws 
     63  1.1  ws void
     64  1.1  ws __syncicache(from, len)
     65  1.1  ws 	void *from;
     66  1.1  ws 	int len;
     67  1.1  ws {
     68  1.1  ws 	int l, off;
     69  1.1  ws 	char *p;
     70  1.1  ws 
     71  1.1  ws #if	!defined(_KERNEL) && !defined(_STANDALONE)
     72  1.1  ws 	if (!_cachelinesize)
     73  1.1  ws 		getcachelinesize();
     74  1.1  ws #endif
     75  1.1  ws 	off = (u_int)from & (CACHELINESIZE - 1);
     76  1.1  ws 	l = len += off;
     77  1.1  ws 	p = (char *)from - off;
     78  1.1  ws 	do {
     79  1.1  ws 		__asm__ __volatile ("dcbst 0,%0" :: "r"(p));
     80  1.1  ws 		p += CACHELINESIZE;
     81  1.1  ws 	} while ((l -= CACHELINESIZE) > 0);
     82  1.1  ws 	__asm__ __volatile ("sync");
     83  1.1  ws 	p = (char *)from - off;
     84  1.1  ws 	do {
     85  1.1  ws 		__asm__ __volatile ("icbi 0,%0" :: "r"(p));
     86  1.1  ws 		p += CACHELINESIZE;
     87  1.1  ws 	} while ((len -= CACHELINESIZE) > 0);
     88  1.1  ws 	__asm__ __volatile ("isync");
     89  1.1  ws }
     90