Home | History | Annotate | Line # | Download | only in sh3
sdivsi3.S revision 1.2 
      1 /*	$NetBSD: sdivsi3.S,v 1.2 2000/01/03 02:40:04 msaitoh Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1990 The Regents of the University of California.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to Berkeley by
      8  * William Jolitz.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *	This product includes software developed by the University of
     21  *	California, Berkeley and its contributors.
     22  * 4. Neither the name of the University nor the names of its contributors
     23  *    may be used to endorse or promote products derived from this software
     24  *    without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     27  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     28  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     29  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     30  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     31  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     32  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     33  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     34  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     35  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     36  * SUCH DAMAGE.
     37  *
     38  *	from: @(#)udivsi3.s	5.1 (Berkeley) 5/15/90
     39  */
     40 
     41 #include <machine/asm.h>
     42 #if defined(LIBC_SCCS)
     43 	RCSID("$NetBSD: sdivsi3.S,v 1.2 2000/01/03 02:40:04 msaitoh Exp $")
     44 #endif
     45 
     46 /* r0 <= r4 / r5 */
     47 ENTRY(__sdivsi3)
     48 	mov	r4, r0
     49 	mov	r5, r1
     50 
     51 	tst	r1, r1
     52 	bt	div_by_zero
     53 
     54 	mov	#0, r2
     55 	div0s	r2, r0
     56 	subc	r3, r3
     57 	subc	r2, r0
     58 	div0s	r1, r3
     59 #define DIVSTEP	rotcl r0; div1 r1, r3
     60 	/* repeat 32 times */
     61 	DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP;
     62 	DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP;
     63 	DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP;
     64 	DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP;
     65 #undef DIVSTEP
     66 	rotcl	r0
     67 
     68 	rts
     69 	addc	r2, r0		/* delay slot */
     70 
     71 div_by_zero:
     72 #ifdef _KERNEL
     73 	rts
     74 	mov	#0, r0		/* delay slot */
     75 #else
     76 	mov.l	r14, @-r15
     77 	sts.l	pr, @-r15
     78 	mov	r15, r14
     79 
     80 	mov.l	L_raise, r1
     81 	jsr	@r1
     82 	mov	#8, r4		/* delay slot */
     83 	mov	#0, r0
     84 
     85 	lds.l	@r15+, pr
     86 	rts
     87 	mov.l	@r15+, r14	/* delay slot */
     88 
     89 	.align 2
     90 L_raise:
     91 	.long	_raise
     92 #endif
     93