sdivsi3.S revision 1.8 1 /* $NetBSD: sdivsi3.S,v 1.8 2006/05/22 20:56:44 uwe Exp $ */
2
3 /*-
4 * Copyright (c) 1990 The Regents of the University of California.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * William Jolitz.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. Neither the name of the University nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 *
34 * from: @(#)udivsi3.s 5.1 (Berkeley) 5/15/90
35 */
36
37 #include <machine/asm.h>
38 #if defined(LIBC_SCCS)
39 RCSID("$NetBSD: sdivsi3.S,v 1.8 2006/05/22 20:56:44 uwe Exp $")
40 #endif
41
42
43 /* r0 <= r4 / r5 */
44 NENTRY(__sdivsi3)
45 mov r4, r0
46 mov r5, r1
47
48 tst r1, r1
49 bt div_by_zero
50
51 mov #0, r2
52 div0s r2, r0
53 subc r3, r3
54 subc r2, r0
55 div0s r1, r3
56 #define DIVSTEP rotcl r0; div1 r1, r3
57 /* repeat 32 times */
58 DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP;
59 DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP;
60 DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP;
61 DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP; DIVSTEP;
62 #undef DIVSTEP
63 rotcl r0
64
65 rts
66 addc r2, r0
67
68 div_by_zero:
69 #ifdef _KERNEL
70 rts
71 mov #0, r0
72 #else
73 mov.l r14, @-r15
74 sts.l pr, @-r15
75 mov r15, r14
76
77 mov.l L_raise, r1
78 #ifdef PIC
79 1: bsrf r1
80 #else
81 jsr @r1
82 #endif
83 mov #8, r4 /* delay slot. 8 <- SIGFPE. */
84 mov #0, r0
85
86 lds.l @r15+, pr
87 rts
88 mov.l @r15+, r14
89
90 .align 2
91 L_raise:
92 #ifdef PIC
93 .long _C_LABEL(raise)-(1b+4)
94 #else
95 .long _C_LABEL(raise)
96 #endif
97 #endif
98