smbios.h revision 1.1 1 /* $NetBSD: smbios.h,v 1.1 2019/11/30 13:02:18 jmcneill Exp $ */
2 /*
3 * Copyright (c) 2006 Gordon Willem Klok <gklok (at) cogeco.ca>
4 * Copyright (c) 2005 Jordan Hargrave
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE FOR
20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #define SMBIOS_UUID_NPRESENT 0x1
30 #define SMBIOS_UUID_NSET 0x2
31
32 /*
33 * Section 3.5 of "UUIDs and GUIDs" found at
34 * http://www.opengroup.org/dce/info/draft-leach-uuids-guids-01.txt
35 * specifies the string repersentation of a UUID.
36 */
37 #define SMBIOS_UUID_REP "%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x"
38 #define SMBIOS_UUID_REPLEN 37 /* 16 zero padded values, 4 hyphens, 1 null */
39
40 struct smbios_entry {
41 uint8_t rev;
42 uint8_t mjr;
43 uint8_t min;
44 uint8_t doc;
45 uint8_t *addr;
46 uint32_t len;
47 uint16_t count;
48 };
49
50 struct smbhdr {
51 uint32_t sig; /* "_SM_" */
52 uint8_t checksum; /* Entry point checksum */
53 uint8_t len; /* Entry point structure length */
54 uint8_t majrev; /* Specification major revision */
55 uint8_t minrev; /* Specification minor revision */
56 uint16_t mss; /* Maximum Structure Size */
57 uint8_t epr; /* Entry Point Revision */
58 uint8_t fa[5]; /* value determined by EPR */
59 uint8_t sasig[5]; /* Secondary Anchor "_DMI_" */
60 uint8_t sachecksum; /* Secondary Checksum */
61 uint16_t size; /* Length of structure table in bytes */
62 uint32_t addr; /* Structure table address */
63 uint16_t count; /* Number of SMBIOS structures */
64 uint8_t rev; /* BCD revision */
65 } __packed;
66
67 struct smb3hdr {
68 uint8_t sig[5]; /* "_SM3_" */
69 uint8_t checksum; /* Entry point structure checksum */
70 uint8_t len; /* Entry point structure length */
71 uint8_t majrev; /* Specification major revision */
72 uint8_t minrev; /* Specification minor revision */
73 uint8_t docrev; /* docrec of Specification */
74 uint8_t eprev; /* Entry point structure revision */
75 #define SMBIOS3_EPREV_RESERVED 0
76 #define SMBIOS3_EPREV_3_0 1 /* SMBIOS 3.0 */
77 uint8_t reverved;
78 uint32_t size; /* Length of structure table in bytes */
79 uint64_t addr; /* Structure table address */
80 } __packed;
81
82 struct smbtblhdr {
83 uint8_t type;
84 uint8_t size;
85 uint16_t handle;
86 } __packed;
87
88 struct smbtable {
89 struct smbtblhdr *hdr;
90 void *tblhdr;
91 uint32_t cookie;
92 };
93
94 #define SMBIOS_TYPE_BIOS 0
95 #define SMBIOS_TYPE_SYSTEM 1
96 #define SMBIOS_TYPE_BASEBOARD 2
97 #define SMBIOS_TYPE_ENCLOSURE 3
98 #define SMBIOS_TYPE_PROCESSOR 4
99 #define SMBIOS_TYPE_MEMCTRL 5
100 #define SMBIOS_TYPE_MEMMOD 6
101 #define SMBIOS_TYPE_CACHE 7
102 #define SMBIOS_TYPE_PORT 8
103 #define SMBIOS_TYPE_SLOTS 9
104 #define SMBIOS_TYPE_OBD 10
105 #define SMBIOS_TYPE_OEM 11
106 #define SMBIOS_TYPE_SYSCONFOPT 12
107 #define SMBIOS_TYPE_BIOSLANG 13
108 #define SMBIOS_TYPE_GROUPASSOC 14
109 #define SMBIOS_TYPE_SYSEVENTLOG 15
110 #define SMBIOS_TYPE_PHYMEM 16
111 #define SMBIOS_TYPE_MEMDEV 17
112 #define SMBIOS_TYPE_ECCINFO32 18
113 #define SMBIOS_TYPE_MEMMAPARRAYADDR 19
114 #define SMBIOS_TYPE_MEMMAPDEVADDR 20
115 #define SMBIOS_TYPE_INBUILTPOINT 21
116 #define SMBIOS_TYPE_PORTBATT 22
117 #define SMBIOS_TYPE_SYSRESET 23
118 #define SMBIOS_TYPE_HWSECUIRTY 24
119 #define SMBIOS_TYPE_PWRCTRL 25
120 #define SMBIOS_TYPE_VOLTPROBE 26
121 #define SMBIOS_TYPE_COOLING 27
122 #define SMBIOS_TYPE_TEMPPROBE 28
123 #define SMBIOS_TYPE_CURRENTPROBE 29
124 #define SMBIOS_TYPE_OOB_REMOTEACCESS 30
125 #define SMBIOS_TYPE_BIS 31
126 #define SMBIOS_TYPE_SBI 32
127 #define SMBIOS_TYPE_ECCINFO64 33
128 #define SMBIOS_TYPE_MGMTDEV 34
129 #define SMBIOS_TYPE_MGTDEVCOMP 35
130 #define SMBIOS_TYPE_MGTDEVTHRESH 36
131 #define SMBIOS_TYPE_MEMCHANNEL 37
132 #define SMBIOS_TYPE_IPMIDEV 38
133 #define SMBIOS_TYPE_SPS 39
134 #define SMBIOS_TYPE_INACTIVE 126
135 #define SMBIOS_TYPE_EOT 127
136
137 /*
138 * SMBIOS Structure Type 0 "BIOS Information"
139 * DMTF Specification DSP0134 Section: 3.3.1 p.g. 34
140 */
141 struct smbios_struct_bios {
142 uint8_t vendor; /* string */
143 uint8_t version; /* string */
144 uint16_t startaddr;
145 uint8_t release; /* string */
146 uint8_t romsize;
147 uint64_t characteristics;
148 uint32_t charext;
149 uint8_t major_rel;
150 uint8_t minor_rel;
151 uint8_t ecf_mjr_rel; /* embedded controller firmware */
152 uint8_t ecf_min_rel; /* embedded controller firmware */
153 } __packed;
154
155 /*
156 * SMBIOS Structure Type 1 "System Information"
157 * DMTF Specification DSP0134 Section 3.3.2 p.g. 35
158 */
159
160 struct smbios_sys {
161 /* SMBIOS spec 2.0+ */
162 uint8_t vendor; /* string */
163 uint8_t product; /* string */
164 uint8_t version; /* string */
165 uint8_t serial; /* string */
166 /* SMBIOS spec 2.1+ */
167 uint8_t uuid[16];
168 uint8_t wakeup;
169 /* SMBIOS spec 2.4+ */
170 uint8_t sku; /* string */
171 uint8_t family; /* string */
172 } __packed;
173
174 /*
175 * SMBIOS Structure Type 2 "Base Board (Module) Information"
176 * DMTF Specification DSP0134 Section 3.3.3 p.g. 37
177 */
178 struct smbios_board {
179 uint8_t vendor; /* string */
180 uint8_t product; /* string */
181 uint8_t version; /* string */
182 uint8_t serial; /* string */
183 uint8_t asset; /* string */
184 uint8_t feature; /* feature flags */
185 uint8_t location; /* location in chassis */
186 uint16_t handle; /* chassis handle */
187 uint8_t type; /* board type */
188 uint8_t noc; /* number of contained objects */
189 } __packed;
190
191 /*
192 * SMBIOS Structure Type 3 "System Enclosure or Chassis"
193 * DMTF Specification DSP0134 Section 3.1.1 p.g. 37
194 */
195 struct smbios_chassis {
196 uint8_t vendor; /* string */
197 uint8_t shape;
198 uint8_t version; /* string */
199 uint8_t serial; /* string */
200 uint8_t asset; /* string */
201 uint8_t bustate;
202 uint8_t psstate;
203 uint8_t thstate;
204 uint8_t security;
205 uint32_t oemdata;
206 uint8_t height;
207 uint8_t powercords;
208 uint8_t noc; /* number of contained objects */
209 } __packed;
210
211 /*
212 * SMBIOS Structure Type 4 "Processor Information"
213 * DMTF Specification DSP0134 Section 3.1.1 p.g. 42
214 */
215 struct smbios_processor {
216 uint8_t socket; /* string */
217 uint8_t type;
218 uint8_t family;
219 uint8_t vendor; /* string */
220 uint64_t cpuid;
221 uint8_t version; /* string */
222 uint8_t voltage;
223 uint16_t clkspeed;
224 uint16_t maxspeed;
225 uint16_t curspeed;
226 uint8_t status;
227 uint8_t upgrade;
228 uint8_t l1cache;
229 uint8_t l2cache;
230 uint8_t l3cache;
231 uint8_t serial; /* string */
232 uint8_t asset; /* string */
233 uint8_t part; /* string */
234 uint8_t cores; /* cores per socket */
235 uint8_t enabled; /* enabled cores per socket */
236 uint8_t threads; /* threads per socket */
237 uint16_t characteristics;
238 uint16_t family2; /* for values >= 255 */
239 uint16_t cores2; /* for values >= 255 */
240 uint16_t enabled2; /* for values >= 255 */
241 uint16_t threads2; /* for values >= 255 */
242 } __packed;
243
244 /*
245 * SMBIOS Structure Type 9 "Expansion slot"
246 */
247 struct smbios_slot {
248 uint8_t designation;
249 uint8_t type;
250 uint8_t width;
251 uint8_t usage;
252 uint8_t length;
253 uint8_t slotid[2];
254 uint8_t characteristics[2];
255 } __packed;
256
257 #define SMBIOS_SLOT_ISA 0x03
258 #define SMBIOS_SLOT_EISA 0x05
259
260 /*
261 * SMBIOS Structure Type 38 "IPMI Information"
262 * DMTF Specification DSP0134 Section 3.3.39 p.g. 91
263 */
264 struct smbios_ipmi {
265 uint8_t smipmi_if_type; /* IPMI Interface Type */
266 uint8_t smipmi_if_rev; /* BCD IPMI Revision */
267 uint8_t smipmi_i2c_address; /* I2C address of BMC */
268 uint8_t smipmi_nvram_address; /* I2C address of NVRAM
269 * storage */
270 uint64_t smipmi_base_address; /* Base address of BMC (BAR
271 * format */
272 uint8_t smipmi_base_flags; /* Flags field:
273 * bit 7:6 : register spacing
274 * 00 = byte
275 * 01 = dword
276 * 02 = word
277 * bit 4 : Lower bit BAR
278 * bit 3 : IRQ valid
279 * bit 2 : N/A
280 * bit 1 : Interrupt polarity
281 * bit 0 : Interrupt trigger */
282 uint8_t smipmi_irq; /* IRQ if applicable */
283 } __packed;
284
285 void smbios_init(uint8_t *);
286 int smbios_find_table(uint8_t, struct smbtable *);
287 char *smbios_get_string(struct smbtable *, uint8_t, char *, size_t);
288