t___sync_and.c revision 1.1 1 1.1 isaki /* $NetBSD: t___sync_and.c,v 1.1 2019/02/26 10:01:41 isaki Exp $ */
2 1.1 isaki
3 1.1 isaki /*
4 1.1 isaki * Copyright (C) 2019 Tetsuya Isaki. All rights reserved.
5 1.1 isaki *
6 1.1 isaki * Redistribution and use in source and binary forms, with or without
7 1.1 isaki * modification, are permitted provided that the following conditions
8 1.1 isaki * are met:
9 1.1 isaki * 1. Redistributions of source code must retain the above copyright
10 1.1 isaki * notice, this list of conditions and the following disclaimer.
11 1.1 isaki * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 isaki * notice, this list of conditions and the following disclaimer in the
13 1.1 isaki * documentation and/or other materials provided with the distribution.
14 1.1 isaki *
15 1.1 isaki * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 1.1 isaki * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 1.1 isaki * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 1.1 isaki * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 1.1 isaki * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
20 1.1 isaki * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
21 1.1 isaki * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
22 1.1 isaki * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
23 1.1 isaki * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 1.1 isaki * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 1.1 isaki * SUCH DAMAGE.
26 1.1 isaki */
27 1.1 isaki
28 1.1 isaki #include <sys/cdefs.h>
29 1.1 isaki __RCSID("$NetBSD: t___sync_and.c,v 1.1 2019/02/26 10:01:41 isaki Exp $");
30 1.1 isaki
31 1.1 isaki #include <atf-c.h>
32 1.1 isaki #include <inttypes.h>
33 1.1 isaki #include <machine/types.h> // for __HAVE_ATOMIC64_OPS
34 1.1 isaki
35 1.1 isaki /*
36 1.1 isaki * These tests don't examine the atomicity.
37 1.1 isaki */
38 1.1 isaki
39 1.1 isaki /* XXX
40 1.1 isaki * Depending on a combination of arch and compiler, __sync_* is
41 1.1 isaki * implemented as compiler's builtin function. In that case, even
42 1.1 isaki * if libc exports the function symbol, it is not used. As a result
43 1.1 isaki * this tests will examine compiler's builtin functions.
44 1.1 isaki * It's better to run only when target is actually in libc.
45 1.1 isaki */
46 1.1 isaki
47 1.1 isaki #define DST (0x1122334455667788UL)
48 1.1 isaki #define SRC (0xf0f0f0f0f0f0f0f0UL)
49 1.1 isaki #define EXPECT (0x1020304050607080UL)
50 1.1 isaki
51 1.1 isaki #define atf_sync_prefetch(NAME, TYPE, FMT) \
52 1.1 isaki ATF_TC(NAME); \
53 1.1 isaki ATF_TC_HEAD(NAME, tc) \
54 1.1 isaki { \
55 1.1 isaki atf_tc_set_md_var(tc, "descr", #NAME); \
56 1.1 isaki } \
57 1.1 isaki ATF_TC_BODY(NAME, tc) \
58 1.1 isaki { \
59 1.1 isaki volatile TYPE val; \
60 1.1 isaki TYPE src; \
61 1.1 isaki TYPE res; \
62 1.1 isaki TYPE expval; \
63 1.1 isaki TYPE expres; \
64 1.1 isaki val = (TYPE)DST; \
65 1.1 isaki src = (TYPE)SRC; \
66 1.1 isaki expval = (TYPE)EXPECT; \
67 1.1 isaki expres = (TYPE)DST; \
68 1.1 isaki res = NAME(&val, src); \
69 1.1 isaki ATF_REQUIRE_MSG(val == expval, \
70 1.1 isaki "val expects 0x%" FMT " but 0x%" FMT, expval, val); \
71 1.1 isaki ATF_REQUIRE_MSG(res == expres, \
72 1.1 isaki "res expects 0x%" FMT " but 0x%" FMT, expres, res); \
73 1.1 isaki }
74 1.1 isaki
75 1.1 isaki atf_sync_prefetch(__sync_fetch_and_and_1, uint8_t, PRIx8);
76 1.1 isaki atf_sync_prefetch(__sync_fetch_and_and_2, uint16_t, PRIx16);
77 1.1 isaki atf_sync_prefetch(__sync_fetch_and_and_4, uint32_t, PRIx32);
78 1.1 isaki #if defined(__HAVE_ATOMIC64_OPS)
79 1.1 isaki atf_sync_prefetch(__sync_fetch_and_and_8, uint64_t, PRIx64);
80 1.1 isaki #endif
81 1.1 isaki
82 1.1 isaki #define atf_sync_postfetch(NAME, TYPE, FMT) \
83 1.1 isaki ATF_TC(NAME); \
84 1.1 isaki ATF_TC_HEAD(NAME, tc) \
85 1.1 isaki { \
86 1.1 isaki atf_tc_set_md_var(tc, "descr", #NAME); \
87 1.1 isaki } \
88 1.1 isaki ATF_TC_BODY(NAME, tc) \
89 1.1 isaki { \
90 1.1 isaki volatile TYPE val; \
91 1.1 isaki TYPE src; \
92 1.1 isaki TYPE res; \
93 1.1 isaki TYPE exp; \
94 1.1 isaki val = (TYPE)DST; \
95 1.1 isaki src = (TYPE)SRC; \
96 1.1 isaki exp = (TYPE)EXPECT; \
97 1.1 isaki res = NAME(&val, src); \
98 1.1 isaki ATF_REQUIRE_MSG(val == exp, \
99 1.1 isaki "val expects 0x%" FMT " but 0x%" FMT, exp, val); \
100 1.1 isaki ATF_REQUIRE_MSG(res == exp, \
101 1.1 isaki "res expects 0x%" FMT " but 0x%" FMT, exp, res); \
102 1.1 isaki }
103 1.1 isaki
104 1.1 isaki atf_sync_postfetch(__sync_and_and_fetch_1, uint8_t, PRIx8);
105 1.1 isaki atf_sync_postfetch(__sync_and_and_fetch_2, uint16_t, PRIx16);
106 1.1 isaki atf_sync_postfetch(__sync_and_and_fetch_4, uint32_t, PRIx32);
107 1.1 isaki #ifdef __HAVE_ATOMIC64_OPS
108 1.1 isaki atf_sync_postfetch(__sync_and_and_fetch_8, uint64_t, PRIx64);
109 1.1 isaki #endif
110 1.1 isaki
111 1.1 isaki ATF_TP_ADD_TCS(tp)
112 1.1 isaki {
113 1.1 isaki ATF_TP_ADD_TC(tp, __sync_fetch_and_and_1);
114 1.1 isaki ATF_TP_ADD_TC(tp, __sync_fetch_and_and_2);
115 1.1 isaki ATF_TP_ADD_TC(tp, __sync_fetch_and_and_4);
116 1.1 isaki #ifdef __HAVE_ATOMIC64_OPS
117 1.1 isaki ATF_TP_ADD_TC(tp, __sync_fetch_and_and_8);
118 1.1 isaki #endif
119 1.1 isaki
120 1.1 isaki ATF_TP_ADD_TC(tp, __sync_and_and_fetch_1);
121 1.1 isaki ATF_TP_ADD_TC(tp, __sync_and_and_fetch_2);
122 1.1 isaki ATF_TP_ADD_TC(tp, __sync_and_and_fetch_4);
123 1.1 isaki #ifdef __HAVE_ATOMIC64_OPS
124 1.1 isaki ATF_TP_ADD_TC(tp, __sync_and_and_fetch_8);
125 1.1 isaki #endif
126 1.1 isaki
127 1.1 isaki return atf_no_error();
128 1.1 isaki }
129