h_mem_assist_asm.S revision 1.9
1 /* $NetBSD: h_mem_assist_asm.S,v 1.9 2020/09/05 07:22:26 maxv Exp $ */ 2 3 /* 4 * Copyright (c) 2018-2020 Maxime Villard, m00nbsd.net 5 * All rights reserved. 6 * 7 * This code is part of the NVMM hypervisor. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 23 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 25 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 .globl test1_begin, test1_end 32 .globl test2_begin, test2_end 33 .globl test3_begin, test3_end 34 .globl test4_begin, test4_end 35 .globl test5_begin, test5_end 36 .globl test6_begin, test6_end 37 .globl test7_begin, test7_end 38 .globl test8_begin, test8_end 39 .globl test9_begin, test9_end 40 .globl test10_begin, test10_end 41 .globl test11_begin, test11_end 42 .globl test12_begin, test12_end 43 .globl test13_begin, test13_end 44 .globl test14_begin, test14_end 45 .globl test_64bit_15_begin, test_64bit_15_end 46 .globl test_64bit_16_begin, test_64bit_16_end 47 .text 48 .code64 49 50 #define TEST_END \ 51 movq $0xFFFFFFFFFFFFFFFF,%rcx; \ 52 rdmsr ; 53 54 .align 64 55 test1_begin: 56 movq $0x1000,%rax 57 movq $0x1000,%rbp 58 59 movq $0x1000,(%rax) 60 61 movq $1,%r11 62 movq $0x2000,(%rax,%r11,8) 63 64 movq (%rbp),%r8 65 movq 8(%rbp),%rbx 66 addq %rbx,%r8 67 movq %r8,(%rbp) 68 movb $4,(%rbp) 69 70 TEST_END 71 test1_end: 72 73 .align 64 74 test2_begin: 75 movq $0x1000,%rax 76 77 movq $0x1000,(%rax) 78 movq $0x00FF,%rbx 79 orb %bl,(%rax) 80 movq $0x0400,%rcx 81 orw %cx,(%rax) 82 83 movq $0x0200,%rcx 84 orq (%rax),%rcx 85 movq %rcx,(%rax) 86 87 TEST_END 88 test2_end: 89 90 .align 64 91 test3_begin: 92 movq $0x1000,%rax 93 94 movq $0x1FFF,(%rax) 95 movq $0x1FF0,%rbx 96 andq %rbx,(%rax) 97 movq $0x10C1,%rcx 98 andb %cl,(%rax) 99 100 TEST_END 101 test3_end: 102 103 .align 64 104 test4_begin: 105 movq $0x1000,%rax 106 107 movq $0x1FFF,(%rax) 108 movq $0x1FF0,%rbx 109 xorq %rbx,(%rax) 110 movq $0x10C0,%rcx 111 xorw %cx,(%rax) 112 113 TEST_END 114 test4_end: 115 116 .align 64 117 test5_begin: 118 movq $0xFFFFFFFF00001000,%rax 119 120 movq $0x1FFF,(%eax) 121 movb $0,(%eax,%ebx,1) 122 123 TEST_END 124 test5_end: 125 126 .align 64 127 test6_begin: 128 movq $0xFFA0,%rax 129 movabs %rax,0x1000 130 131 movabs 0x1000,%al 132 orb $0x0B,%al 133 movabs %al,0x1000 134 135 TEST_END 136 test6_end: 137 138 .align 64 139 test7_begin: 140 movq $0x56,%rax 141 142 movq $1,%rcx 143 movq $0x1000,%rdi 144 rep stosb 145 146 movq $0x1234,%rax 147 stosw 148 149 TEST_END 150 test7_end: 151 152 .align 64 153 test8_begin: 154 movq $0x1008,%rsi 155 movq $0x12345678,(%rsi) 156 157 movq $0x1000,%rdi 158 159 lodsw 160 movw %ax,(%rdi) 161 addq $2,%rdi 162 163 lodsb 164 movb %al,(%rdi) 165 addq $1,%rdi 166 167 lodsb 168 movb %al,(%rdi) 169 addq $2,%rdi 170 171 TEST_END 172 test8_end: 173 174 .align 64 175 test9_begin: 176 movq $0x1000,%rax 177 178 movq $0x12345678,8(%rax) 179 180 movq $0x1008,%rsi 181 movq $0x1000,%rdi 182 183 movq $4,%rcx 184 rep movsb 185 186 movq $2,%rcx 187 rep movsw 188 189 TEST_END 190 test9_end: 191 192 .align 64 193 test10_begin: 194 movq $0x1000,%rax 195 movq $0x12345678,(%rax) 196 197 movq $0xFFFFFFFFFFFFFFFF,%rbx 198 movzbl (%rax),%ebx 199 movq %rbx,(%rax) 200 201 TEST_END 202 test10_end: 203 204 .align 64 205 test11_begin: 206 movq $0x1000,%rax 207 movq $0x12345678,(%rax) 208 209 movq $0xFFFFFFFFFFFFFFFF,%rbx 210 movzwq (%rax),%rbx 211 movq %rbx,(%rax) 212 213 TEST_END 214 test11_end: 215 216 .align 64 217 test12_begin: 218 movq $0x1000,%rax 219 movq $0xFFFFFFFFF2345678,(%rax) 220 221 cmpb $0x78,(%rax) 222 jne .L12_failure 223 cmpb $0x77,(%rax) 224 jl .L12_failure 225 cmpb $0x79,(%rax) 226 jg .L12_failure 227 228 cmpw $0x5678,(%rax) 229 jne .L12_failure 230 cmpw $0x5677,(%rax) 231 jl .L12_failure 232 cmpw $0x5679,(%rax) 233 jg .L12_failure 234 235 cmpl $0xF2345678,(%rax) 236 jne .L12_failure 237 cmpl $0xF2345677,(%rax) 238 jl .L12_failure 239 cmpl $0xF2345679,(%rax) 240 jg .L12_failure 241 242 cmpq $0xFFFFFFFFF2345678,(%rax) 243 jne .L12_failure 244 cmpq $0xFFFFFFFFF2345677,(%rax) 245 jl .L12_failure 246 cmpq $0xFFFFFFFFF2345679,(%rax) 247 jg .L12_failure 248 249 .L12_success: 250 movq $1,(%rax) 251 TEST_END 252 .L12_failure: 253 movq $0,(%rax) 254 TEST_END 255 test12_end: 256 257 .align 64 258 test13_begin: 259 movq $0x1000,%rax 260 movq $0x000000001000A0FF,(%rax) 261 262 movq $0xFFFF,%rcx 263 subb %cl,(%rax) 264 265 movq $0xA000,%rcx 266 subw %cx,(%rax) 267 268 movq $0x0000000F1000A0FF,%rcx 269 subq (%rax),%rcx 270 271 movq %rcx,(%rax) 272 273 TEST_END 274 test13_end: 275 276 .align 64 277 test14_begin: 278 movq $0x1000,%rax 279 movq $0xA0FF,(%rax) 280 281 testb $0x0F,(%rax) 282 jz .L14_failure 283 284 testw $0x0F00,(%rax) 285 jnz .L14_failure 286 287 testl $0xA000,(%rax) 288 jz .L14_failure 289 290 .L14_success: 291 movq $1,(%rax) 292 TEST_END 293 .L14_failure: 294 movq $0,(%rax) 295 TEST_END 296 test14_end: 297 298 .align 64 299 test_64bit_15_begin: 300 movq $0x1000,%rax 301 movq $0x120000,%rbx 302 movq $0x003400,%rcx 303 movq $0x000056,%rdx 304 305 xchgq %rbx,(%rax) 306 xchgw (%rax),%cx 307 xchgb %dl,(%rax) 308 309 TEST_END 310 test_64bit_15_end: 311 312 .align 64 313 test_64bit_16_begin: 314 movq $0x1000,%rax 315 movq $0x000000,%rbx 316 movq $0x000000,%rcx 317 movq $0x000000,%rdx 318 319 movq $0x123456,(%rax) 320 xchgq %rbx,(%eax) 321 movq $0,(%rax) 322 xchgq %rbx,(%eax) 323 324 TEST_END 325 test_64bit_16_end: 326 327 /* -------------------------------------------------------------------------- */ 328 329 .globl test_16bit_1_begin, test_16bit_1_end 330 .globl test_16bit_2_begin, test_16bit_2_end 331 .globl test_16bit_3_begin, test_16bit_3_end 332 .globl test_16bit_4_begin, test_16bit_4_end 333 .globl test_16bit_5_begin, test_16bit_5_end 334 .globl test_16bit_6_begin, test_16bit_6_end 335 336 #define TEST16_END \ 337 rdmsr 338 339 .code16 340 341 .align 64 342 test_16bit_1_begin: 343 movw $0x10f1,%bx 344 movw $0x123,%dx 345 346 movb %dl,(%bx) 347 348 TEST16_END 349 test_16bit_1_end: 350 351 .align 64 352 test_16bit_2_begin: 353 movw $0x10f1,%bx 354 movw $2,%di 355 movw $0x123,%dx 356 357 movw %dx,(%bx,%di) 358 359 TEST16_END 360 test_16bit_2_end: 361 362 .align 64 363 test_16bit_3_begin: 364 movw $0x10f1,%bp 365 movw $2,%si 366 movw $0x678,%dx 367 368 movw %dx,-2(%bp,%si) 369 370 TEST16_END 371 test_16bit_3_end: 372 373 .align 64 374 test_16bit_4_begin: 375 movw $0x10f0,%bp 376 movw $2,%si 377 movw $2+4+4,%di 378 movw $0xFFFF,%dx 379 movl $0x0001,%eax 380 movl $0x0010,%ebx 381 movl $0x1000,%ecx 382 383 movw %dx,4(%bp,%si) /* 16bit opr 16bit adr */ 384 andl %eax,4(%bp,%si) /* 32bit opr 16bit adr */ 385 orw %bx,4(%ebp,%esi) /* 16bit opr 32bit adr */ 386 orl %ecx,-4(%bp,%di) /* 32bit opr 16bit adr, negative */ 387 388 TEST16_END 389 test_16bit_4_end: 390 391 .align 64 392 test_16bit_5_begin: 393 movb $0x12,0x1234 394 395 TEST16_END 396 test_16bit_5_end: 397 398 .align 64 399 test_16bit_6_begin: 400 movw $0x1234,%bp 401 movw $4,%di 402 movw $0x1200,%bx 403 movw $0x0034,%cx 404 405 xchgw %bx,(%bp) 406 xchgb -4(%bp,%di),%cl 407 408 TEST16_END 409 test_16bit_6_end: 410
Indexes created Tue Oct 21 16:10:11 GMT 2025