emcfanctlconst.h revision 1.1 1 /* $NetBSD: emcfanctlconst.h,v 1.1 2025/03/11 13:56:48 brad Exp $ */
2
3 /*
4 * Copyright (c) 2025 Brad Spencer <brad (at) anduin.eldar.org>
5 *
6 * Permission to use, copy, modify, and distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 */
18
19 #ifndef _EMCFANCTLCONST_H_
20 #define _EMCFANCTLCONST_H_
21
22 /* These structures describe the command line command structure */
23
24 static const struct emcfanctlcmd emcfanctlcmds[] = {
25 {
26 .cmd = "info",
27 .id = EMCFANCTL_INFO,
28 .helpargs = ""
29
30 },
31 {
32 .cmd = "register",
33 .id = EMCFANCTL_REGISTER,
34 .helpargs = "list|read|write"
35
36 },
37 {
38 .cmd = "fan",
39 .id = EMCFANCTL_FAN,
40 .helpargs = "<n> drive|divider|min_expected_rpm|edges|polarity read|write|inverted|non-inverted <write value>"
41 },
42 {
43 .cmd = "apd",
44 .id = EMCFANCTL_APD,
45 .helpargs = "read|on|off"
46 },
47 {
48 .cmd = "smbus_timeout",
49 .id = EMCFANCTL_SMBUSTO,
50 .helpargs = "read|on|off"
51 }
52 };
53
54 static const struct emcfanctlcmd emcfanctlregistercmds[] = {
55 {
56 .cmd = "list",
57 .id = EMCFANCTL_REGISTER_LIST,
58 .helpargs = "list"
59
60 },
61 {
62 .cmd = "read",
63 .id = EMCFANCTL_REGISTER_READ,
64 .helpargs = "read start_register [end_register]"
65
66 },
67 {
68 .cmd = "write",
69 .id = EMCFANCTL_REGISTER_WRITE,
70 .helpargs = "write register value"
71
72 }
73 };
74
75 static const struct emcfanctlcmd emcfanctlfancmds[] = {
76 {
77 .cmd = "status",
78 .id = EMCFANCTL_FAN_STATUS,
79 .helpargs = "<n> status"
80 },
81 {
82 .cmd = "drive",
83 .id = EMCFANCTL_FAN_DRIVE,
84 .helpargs = "drive"
85 },
86 {
87 .cmd = "divider",
88 .id = EMCFANCTL_FAN_DIVIDER,
89 .helpargs = "divider"
90 },
91 {
92 .cmd = "min_expected_rpm",
93 .id = EMCFANCTL_FAN_MINEXPECTED_RPM,
94 .helpargs = "min_expected_rpm"
95 },
96 {
97 .cmd = "edges",
98 .id = EMCFANCTL_FAN_EDGES,
99 .helpargs = "edges"
100 },
101 {
102 .cmd = "polarity",
103 .id = EMCFANCTL_FAN_POLARITY,
104 .helpargs = "polarity read|inverted|non-inverted"
105 },
106 {
107 .cmd = "pwm_base_frequency",
108 .id = EMCFANCTL_FAN_PWM_BASEFREQ,
109 .helpargs = "pwm_base_frequency read|write"
110 },
111 {
112 .cmd = "pwm_output_type",
113 .id = EMCFANCTL_FAN_PWM_OUTPUTTYPE,
114 .helpargs = "pwm_output_type read|push-pull|open-drain"
115 }
116 };
117
118 static const struct emcfanctlcmd emcfanctlddcmds[] = {
119 {
120 .cmd = "read",
121 .id = EMCFANCTL_FAN_DD_READ,
122 .helpargs = "read"
123 },
124 {
125 .cmd = "write",
126 .id = EMCFANCTL_FAN_DD_WRITE,
127 .helpargs = "write"
128 }
129 };
130
131 static const struct emcfanctlcmd emcfanctlpcmds[] = {
132 {
133 .cmd = "read",
134 .id = EMCFANCTL_FAN_P_READ,
135 .helpargs = "read"
136 },
137 {
138 .cmd = "inverted",
139 .id = EMCFANCTL_FAN_P_INVERTED,
140 .helpargs = "inverted"
141 },
142 {
143 .cmd = "non-inverted",
144 .id = EMCFANCTL_FAN_P_NONINVERTED,
145 .helpargs = "non-inverted"
146 }
147 };
148
149 static const struct emcfanctlcmd emcfanctlotcmds[] = {
150 {
151 .cmd = "read",
152 .id = EMCFANCTL_FAN_OT_READ,
153 .helpargs = "read"
154 },
155 {
156 .cmd = "push-pull",
157 .id = EMCFANCTL_FAN_OT_PUSHPULL,
158 .helpargs = "push-pull"
159 },
160 {
161 .cmd = "open-drain",
162 .id = EMCFANCTL_FAN_OT_OPENDRAIN,
163 .helpargs = "open-drain"
164 }
165 };
166
167 static const struct emcfanctlcmd emcfanctlapdsmtocmds[] = {
168 {
169 .cmd = "read",
170 .id = EMCFANCTL_APD_READ,
171 .helpargs = "read"
172 },
173 {
174 .cmd = "on",
175 .id = EMCFANCTL_APD_ON,
176 .helpargs = "on"
177 },
178 {
179 .cmd = "off",
180 .id = EMCFANCTL_APD_OFF,
181 .helpargs = "off"
182 }
183 };
184
185 /* Name the registers for each of the chip types */
186
187 static const struct emcfan_registers emcfanctl_2101_registers[] = {
188 {
189 .name = "internal_temperature",
190 .reg = 0x00
191 },
192 {
193 .name = "external_diode_temperature_high_byte",
194 .reg = 0x01
195 },
196 {
197 .name = "status",
198 .reg = 0x02
199 },
200 {
201 .name = "configuration",
202 .reg = 0x03
203 },
204 {
205 .name = "conversion_rate",
206 .reg = 0x04
207 },
208 {
209 .name = "internal_temp_limit",
210 .reg = 0x05
211 },
212 {
213 .name = "external_temp_high_limit_high_byte",
214 .reg = 0x07
215 },
216 {
217 .name = "external_temp_low_limit_high_byte",
218 .reg = 0x08
219 },
220 {
221 .name = "configuration_alt",
222 .reg = 0x09
223 },
224 {
225 .name = "conversion_rate_alt",
226 .reg = 0x0A
227 },
228 {
229 .name = "internal_temp_limit_alt",
230 .reg = 0x0B
231 },
232 {
233 .name = "external_temp_high_limit_high_byte_alt",
234 .reg = 0x0D
235 },
236 {
237 .name = "external_temp_low_limit_high_byte_alt",
238 .reg = 0x0E
239 },
240 {
241 .name = "external_temperature_force",
242 .reg = 0x0C
243 },
244 {
245 .name = "one_shot",
246 .reg = 0x0F
247 },
248 {
249 .name = "external_diode_temperature_low_byte",
250 .reg = 0x10
251 },
252 {
253 .name = "scratchpad1",
254 .reg = 0x11
255 },
256 {
257 .name = "scratchpad2",
258 .reg = 0x12
259 },
260 {
261 .name = "external_diode_high_limit_low_byte",
262 .reg = 0x13
263 },
264 {
265 .name = "external_diode_low_limit_low_byte",
266 .reg = 0x14
267 },
268 {
269 .name = "alert_mask",
270 .reg = 0x16
271 },
272 {
273 .name = "external_diode_ideality_factor",
274 .reg = 0x17
275 },
276 {
277 .name = "beta_compensation_factor",
278 .reg = 0x18
279 },
280 {
281 .name = "tcrit_temp_limit",
282 .reg = 0x19
283 },
284 {
285 .name = "tcrit_hysteresis",
286 .reg = 0x21
287 },
288 {
289 .name = "tach_reading_low_byte",
290 .reg = 0x46
291 },
292 {
293 .name = "tach_reading_high_byte",
294 .reg = 0x47
295 },
296 {
297 .name = "tach_limit_low_byte",
298 .reg = 0x48
299 },
300 {
301 .name = "tach_limit_high_byte",
302 .reg = 0x49
303 },
304 {
305 .name = "fan_configuration",
306 .reg = 0x4A
307 },
308 {
309 .name = "fan_spin-up",
310 .reg = 0x4B
311 },
312 {
313 .name = "fan_setting",
314 .reg = 0x4C
315 },
316 {
317 .name = "pwm_frequency",
318 .reg = 0x4D
319 },
320 {
321 .name = "pwm_frequency_divide",
322 .reg = 0x4E
323 },
324 {
325 .name = "lookup_table_hysteresis",
326 .reg = 0x4F
327 },
328 {
329 .name = "lookup_table_temp_setting_1",
330 .reg = 0x50
331 },
332 {
333 .name = "lookup_table_fan_setting_1",
334 .reg = 0x51
335 },
336 {
337 .name = "lookup_table_temp_setting_2",
338 .reg = 0x52
339 },
340 {
341 .name = "lookup_table_fan_setting_2",
342 .reg = 0x53
343 },
344 {
345 .name = "lookup_table_temp_setting_3",
346 .reg = 0x54
347 },
348 {
349 .name = "lookup_table_fan_setting_3",
350 .reg = 0x55
351 },
352 {
353 .name = "lookup_table_temp_setting_4",
354 .reg = 0x56
355 },
356 {
357 .name = "lookup_table_fan_setting_4",
358 .reg = 0x57
359 },
360 {
361 .name = "lookup_table_temp_setting_5",
362 .reg = 0x58
363 },
364 {
365 .name = "lookup_table_fan_setting_5",
366 .reg = 0x59
367 },
368 {
369 .name = "lookup_table_temp_setting_6",
370 .reg = 0x5A
371 },
372 {
373 .name = "lookup_table_fan_setting_6",
374 .reg = 0x5B
375 },
376 {
377 .name = "lookup_table_temp_setting_7",
378 .reg = 0x5C
379 },
380 {
381 .name = "lookup_table_fan_setting_7",
382 .reg = 0x5D
383 },
384 {
385 .name = "lookup_table_temp_setting_8",
386 .reg = 0x5E
387 },
388 {
389 .name = "lookup_table_fan_setting_8",
390 .reg = 0x5F
391 },
392 {
393 .name = "averaging_filter",
394 .reg = 0xBF
395 },
396 {
397 .name = "product_id",
398 .reg = 0xFD
399 },
400 {
401 .name = "manufacturer_id",
402 .reg = 0xFE
403 },
404 {
405 .name = "revision_register",
406 .reg = 0xFF
407 }
408 };
409
410 static const struct emcfan_registers emcfanctl_2103_1_registers[] = {
411 {
412 .name = "internal_temp_reading_high_byte",
413 .reg = 0x00
414 },
415 {
416 .name = "internal_temp_reading_low_byte",
417 .reg = 0x01
418 },
419 {
420 .name = "external_diode_1_temp_reading_high_byte",
421 .reg = 0x02
422 },
423 {
424 .name = "external_diode_1_temp_reading_low_byte",
425 .reg = 0x03
426 },
427 {
428 .name = "critical/thermal_shutdown_temperature",
429 .reg = 0x0A
430 },
431 {
432 .name = "pushed_temperature_1",
433 .reg = 0x0C
434 },
435 {
436 .name = "pushed_temperature_2",
437 .reg = 0x0D
438 },
439 {
440 .name = "trip_set_voltage",
441 .reg = 0x10
442 },
443 {
444 .name = "external_diode_1_ideality_register",
445 .reg = 0x11
446 },
447 {
448 .name = "external_diode_1_beta_configuration",
449 .reg = 0x14
450 },
451 {
452 .name = "external_diode_rec_configuration",
453 .reg = 0x17
454 },
455 {
456 .name = "external_diode_1_tcrit_limit",
457 .reg = 0x19
458 },
459 {
460 .name = "internal_diode_tcrit_limit",
461 .reg = 0x1D
462 },
463 {
464 .name = "tcrit_status",
465 .reg = 0x1F
466 },
467 {
468 .name = "configuration",
469 .reg = 0x20
470 },
471 {
472 .name = "configuration_2",
473 .reg = 0x21
474 },
475 {
476 .name = "interrupt_status",
477 .reg = 0x23
478 },
479 {
480 .name = "high_limit_status",
481 .reg = 0x24
482 },
483 {
484 .name = "low_limit_status",
485 .reg = 0x25
486 },
487 {
488 .name = "diode_fault",
489 .reg = 0x26
490 },
491 {
492 .name = "fan_status",
493 .reg = 0x27
494 },
495 {
496 .name = "interrupt_enable_register",
497 .reg = 0x28
498 },
499 {
500 .name = "fan_interrupt_enable_register",
501 .reg = 0x29
502 },
503 {
504 .name = "pwm_config",
505 .reg = 0x2A
506 },
507 {
508 .name = "pwm_base_frequency",
509 .reg = 0x2B
510 },
511 {
512 .name = "external_diode_1_temp_high_limit",
513 .reg = 0x30
514 },
515 {
516 .name = "internal_diode_high_limit",
517 .reg = 0x34
518 },
519 {
520 .name = "external_diode_1_temp_low_limit",
521 .reg = 0x38
522 },
523 {
524 .name = "internal_diode_low_limit",
525 .reg = 0x3C
526 },
527 {
528 .name = "fan_setting",
529 .reg = 0x40
530 },
531 {
532 .name = "pwm_divide",
533 .reg = 0x41
534 },
535 {
536 .name = "fan_configuration_1",
537 .reg = 0x42
538 },
539 {
540 .name = "fan_configuration_2",
541 .reg = 0x43
542 },
543 {
544 .name = "gain",
545 .reg = 0x45
546 },
547 {
548 .name = "fan_spin_up_configuration",
549 .reg = 0x46
550 },
551 {
552 .name = "fan_step",
553 .reg = 0x47
554 },
555 {
556 .name = "fan_minimum_drive",
557 .reg = 0x48
558 },
559 {
560 .name = "fan_valid_tach_count",
561 .reg = 0x49
562 },
563 {
564 .name = "fan_drive_fail_band_low_byte",
565 .reg = 0x4A
566 },
567 {
568 .name = "fan_drive_fail_band_high_byte",
569 .reg = 0x4B
570 },
571 {
572 .name = "tach_target_low_byte",
573 .reg = 0x4C
574 },
575 {
576 .name = "tach_target_high_byte",
577 .reg = 0x4D
578 },
579 {
580 .name = "tach_reading_high_byte",
581 .reg = 0x4E
582 },
583 {
584 .name = "tach_reading_low_byte",
585 .reg = 0x4F
586 },
587 {
588 .name = "lut_configuration",
589 .reg = 0x50
590 },
591 {
592 .name = "lut_drive_1",
593 .reg = 0x51
594 },
595 {
596 .name = "lut_temp_1_setting_1",
597 .reg = 0x52
598 },
599 {
600 .name = "lut_temp_2_setting_1",
601 .reg = 0x53
602 },
603 {
604 .name = "lut_temp_3_setting_1",
605 .reg = 0x54
606 },
607 {
608 .name = "lut_temp_4_setting_1",
609 .reg = 0x55
610 },
611 {
612 .name = "lut_drive_2",
613 .reg = 0x56
614 },
615 {
616 .name = "lut_temp_1_setting_2",
617 .reg = 0x57
618 },
619 {
620 .name = "lut_temp_2_setting_2",
621 .reg = 0x58
622 },
623 {
624 .name = "lut_temp_3_setting_2",
625 .reg = 0x59
626 },
627 {
628 .name = "lut_temp_4_setting_2",
629 .reg = 0x5A
630 },
631 {
632 .name = "lut_drive_3",
633 .reg = 0x5B
634 },
635 {
636 .name = "lut_temp_1_setting_3",
637 .reg = 0x5C
638 },
639 {
640 .name = "lut_temp_2_setting_3",
641 .reg = 0x5D
642 },
643 {
644 .name = "lut_temp_3_setting_3",
645 .reg = 0x5E
646 },
647 {
648 .name = "lut_temp_4_setting_3",
649 .reg = 0x5F
650 },
651 {
652 .name = "lut_drive_4",
653 .reg = 0x60
654 },
655 {
656 .name = "lut_temp_1_setting_4",
657 .reg = 0x61
658 },
659 {
660 .name = "lut_temp_2_setting_4",
661 .reg = 0x62
662 },
663 {
664 .name = "lut_temp_3_setting_4",
665 .reg = 0x63
666 },
667 {
668 .name = "lut_temp_4_setting_4",
669 .reg = 0x64
670 },
671 {
672 .name = "lut_drive_5",
673 .reg = 0x65
674 },
675 {
676 .name = "lut_temp_1_setting_5",
677 .reg = 0x66
678 },
679 {
680 .name = "lut_temp_2_setting_5",
681 .reg = 0x67
682 },
683 {
684 .name = "lut_temp_3_setting_5",
685 .reg = 0x68
686 },
687 {
688 .name = "lut_temp_4_setting_5",
689 .reg = 0x69
690 },
691 {
692 .name = "lut_drive_6",
693 .reg = 0x6A
694 },
695 {
696 .name = "lut_temp_1_setting_6",
697 .reg = 0x6B
698 },
699 {
700 .name = "lut_temp_2_setting_6",
701 .reg = 0x6C
702 },
703 {
704 .name = "lut_temp_3_setting_6",
705 .reg = 0x6D
706 },
707 {
708 .name = "lut_temp_4_setting_6",
709 .reg = 0x6E
710 },
711 {
712 .name = "lut_drive_7",
713 .reg = 0x6F
714 },
715 {
716 .name = "lut_temp_1_setting_7",
717 .reg = 0x70
718 },
719 {
720 .name = "lut_temp_2_setting_7",
721 .reg = 0x71
722 },
723 {
724 .name = "lut_temp_3_setting_7",
725 .reg = 0x72
726 },
727 {
728 .name = "lut_temp_4_setting_7",
729 .reg = 0x73
730 },
731 {
732 .name = "lut_drive_8",
733 .reg = 0x74
734 },
735 {
736 .name = "lut_temp_1_setting_8",
737 .reg = 0x75
738 },
739 {
740 .name = "lut_temp_2_setting_8",
741 .reg = 0x76
742 },
743 {
744 .name = "lut_temp_3_setting_8",
745 .reg = 0x77
746 },
747 {
748 .name = "lut_temp_4_setting_8",
749 .reg = 0x78
750 },
751 {
752 .name = "lut_temp_hysteresis",
753 .reg = 0x79
754 },
755 {
756 .name = "software_lock",
757 .reg = 0xEF
758 },
759 {
760 .name = "product_features",
761 .reg = 0xFC
762 },
763 {
764 .name = "product_id",
765 .reg = 0xFD
766 },
767 {
768 .name = "manufacturer_id",
769 .reg = 0xFE
770 },
771 {
772 .name = "revision",
773 .reg = 0xFF
774 }
775 };
776
777 static const struct emcfan_registers emcfanctl_2103_24_registers[] = {
778 {
779 .name = "internal_temp_reading_high_byte",
780 .reg = 0x00
781 },
782 {
783 .name = "internal_temp_reading_low_byte",
784 .reg = 0x01
785 },
786 {
787 .name = "external_diode_1_temp_reading_high_byte",
788 .reg = 0x02
789 },
790 {
791 .name = "external_diode_1_temp_reading_low_byte",
792 .reg = 0x03
793 },
794 {
795 .name = "external_diode_2_temp_reading_high_byte",
796 .reg = 0x04
797 },
798 {
799 .name = "external_diode_2_temp_reading_low_byte",
800 .reg = 0x05
801 },
802 {
803 .name = "external_diode_3_temp_reading_high_byte",
804 .reg = 0x06
805 },
806 {
807 .name = "external_diode_3_temp_reading_low_byte",
808 .reg = 0x07
809 },
810 {
811 .name = "critical/thermal_shutdown_temperature",
812 .reg = 0x0A
813 },
814 {
815 .name = "pushed_temperature_1",
816 .reg = 0x0C
817 },
818 {
819 .name = "pushed_temperature_2",
820 .reg = 0x0D
821 },
822 {
823 .name = "trip_set_voltage",
824 .reg = 0x10
825 },
826 {
827 .name = "external_diode_1_ideality_register",
828 .reg = 0x11
829 },
830 {
831 .name = "external_diode_2_ideality_register",
832 .reg = 0x12
833 },
834 {
835 .name = "external_diode_1_beta_configuration",
836 .reg = 0x14
837 },
838 {
839 .name = "external_diode_2_beta_configuration",
840 .reg = 0x15
841 },
842 {
843 .name = "external_diode_rec_configuration",
844 .reg = 0x17
845 },
846 {
847 .name = "external_diode_1_tcrit_limit",
848 .reg = 0x19
849 },
850 {
851 .name = "external_diode_2_tcrit_limit",
852 .reg = 0x1A
853 },
854 {
855 .name = "external_diode_3_tcrit_limit",
856 .reg = 0x1B
857 },
858 {
859 .name = "internal_diode_tcrit_limit",
860 .reg = 0x1D
861 },
862 {
863 .name = "tcrit_status",
864 .reg = 0x1F
865 },
866 {
867 .name = "configuration",
868 .reg = 0x20
869 },
870 {
871 .name = "configuration_2",
872 .reg = 0x21
873 },
874 {
875 .name = "interrupt_status",
876 .reg = 0x23
877 },
878 {
879 .name = "high_limit_status",
880 .reg = 0x24
881 },
882 {
883 .name = "low_limit_status",
884 .reg = 0x25
885 },
886 {
887 .name = "diode_fault",
888 .reg = 0x26
889 },
890 {
891 .name = "fan_status",
892 .reg = 0x27
893 },
894 {
895 .name = "interrupt_enable_register",
896 .reg = 0x28
897 },
898 {
899 .name = "fan_interrupt_enable_register",
900 .reg = 0x29
901 },
902 {
903 .name = "pwm_config",
904 .reg = 0x2A
905 },
906 {
907 .name = "pwm_base_frequency",
908 .reg = 0x2B
909 },
910 {
911 .name = "external_diode_1_temp_high_limit",
912 .reg = 0x30
913 },
914 {
915 .name = "external_diode_2_temp_high_limit",
916 .reg = 0x31
917 },
918 {
919 .name = "external_diode_3_temp_high_limit",
920 .reg = 0x32
921 },
922 {
923 .name = "internal_diode_high_limit",
924 .reg = 0x34
925 },
926 {
927 .name = "external_diode_1_temp_low_limit",
928 .reg = 0x38
929 },
930 {
931 .name = "external_diode_2_temp_low_limit",
932 .reg = 0x39
933 },
934 {
935 .name = "external_diode_3_temp_low_limit",
936 .reg = 0x3A
937 },
938 {
939 .name = "internal_diode_low_limit",
940 .reg = 0x3C
941 },
942 {
943 .name = "fan_setting",
944 .reg = 0x40
945 },
946 {
947 .name = "pwm_divide",
948 .reg = 0x41
949 },
950 {
951 .name = "fan_configuration_1",
952 .reg = 0x42
953 },
954 {
955 .name = "fan_configuration_2",
956 .reg = 0x43
957 },
958 {
959 .name = "gain",
960 .reg = 0x45
961 },
962 {
963 .name = "fan_spin_up_configuration",
964 .reg = 0x46
965 },
966 {
967 .name = "fan_step",
968 .reg = 0x47
969 },
970 {
971 .name = "fan_minimum_drive",
972 .reg = 0x48
973 },
974 {
975 .name = "fan_valid_tach_count",
976 .reg = 0x49
977 },
978 {
979 .name = "fan_drive_fail_band_low_byte",
980 .reg = 0x4A
981 },
982 {
983 .name = "fan_drive_fail_band_high_byte",
984 .reg = 0x4B
985 },
986 {
987 .name = "tach_target_low_byte",
988 .reg = 0x4C
989 },
990 {
991 .name = "tach_target_high_byte",
992 .reg = 0x4D
993 },
994 {
995 .name = "tach_reading_high_byte",
996 .reg = 0x4E
997 },
998 {
999 .name = "tach_reading_low_byte",
1000 .reg = 0x4F
1001 },
1002 {
1003 .name = "lut_configuration",
1004 .reg = 0x50
1005 },
1006 {
1007 .name = "lut_drive_1",
1008 .reg = 0x51
1009 },
1010 {
1011 .name = "lut_temp_1_setting_1",
1012 .reg = 0x52
1013 },
1014 {
1015 .name = "lut_temp_2_setting_1",
1016 .reg = 0x53
1017 },
1018 {
1019 .name = "lut_temp_3_setting_1",
1020 .reg = 0x54
1021 },
1022 {
1023 .name = "lut_temp_4_setting_1",
1024 .reg = 0x55
1025 },
1026 {
1027 .name = "lut_drive_2",
1028 .reg = 0x56
1029 },
1030 {
1031 .name = "lut_temp_1_setting_2",
1032 .reg = 0x57
1033 },
1034 {
1035 .name = "lut_temp_2_setting_2",
1036 .reg = 0x58
1037 },
1038 {
1039 .name = "lut_temp_3_setting_2",
1040 .reg = 0x59
1041 },
1042 {
1043 .name = "lut_temp_4_setting_2",
1044 .reg = 0x5A
1045 },
1046 {
1047 .name = "lut_drive_3",
1048 .reg = 0x5B
1049 },
1050 {
1051 .name = "lut_temp_1_setting_3",
1052 .reg = 0x5C
1053 },
1054 {
1055 .name = "lut_temp_2_setting_3",
1056 .reg = 0x5D
1057 },
1058 {
1059 .name = "lut_temp_3_setting_3",
1060 .reg = 0x5E
1061 },
1062 {
1063 .name = "lut_temp_4_setting_3",
1064 .reg = 0x5F
1065 },
1066 {
1067 .name = "lut_drive_4",
1068 .reg = 0x60
1069 },
1070 {
1071 .name = "lut_temp_1_setting_4",
1072 .reg = 0x61
1073 },
1074 {
1075 .name = "lut_temp_2_setting_4",
1076 .reg = 0x62
1077 },
1078 {
1079 .name = "lut_temp_3_setting_4",
1080 .reg = 0x63
1081 },
1082 {
1083 .name = "lut_temp_4_setting_4",
1084 .reg = 0x64
1085 },
1086 {
1087 .name = "lut_drive_5",
1088 .reg = 0x65
1089 },
1090 {
1091 .name = "lut_temp_1_setting_5",
1092 .reg = 0x66
1093 },
1094 {
1095 .name = "lut_temp_2_setting_5",
1096 .reg = 0x67
1097 },
1098 {
1099 .name = "lut_temp_3_setting_5",
1100 .reg = 0x68
1101 },
1102 {
1103 .name = "lut_temp_4_setting_5",
1104 .reg = 0x69
1105 },
1106 {
1107 .name = "lut_drive_6",
1108 .reg = 0x6A
1109 },
1110 {
1111 .name = "lut_temp_1_setting_6",
1112 .reg = 0x6B
1113 },
1114 {
1115 .name = "lut_temp_2_setting_6",
1116 .reg = 0x6C
1117 },
1118 {
1119 .name = "lut_temp_3_setting_6",
1120 .reg = 0x6D
1121 },
1122 {
1123 .name = "lut_temp_4_setting_6",
1124 .reg = 0x6E
1125 },
1126 {
1127 .name = "lut_drive_7",
1128 .reg = 0x6F
1129 },
1130 {
1131 .name = "lut_temp_1_setting_7",
1132 .reg = 0x70
1133 },
1134 {
1135 .name = "lut_temp_2_setting_7",
1136 .reg = 0x71
1137 },
1138 {
1139 .name = "lut_temp_3_setting_7",
1140 .reg = 0x72
1141 },
1142 {
1143 .name = "lut_temp_4_setting_7",
1144 .reg = 0x73
1145 },
1146 {
1147 .name = "lut_drive_8",
1148 .reg = 0x74
1149 },
1150 {
1151 .name = "lut_temp_1_setting_8",
1152 .reg = 0x75
1153 },
1154 {
1155 .name = "lut_temp_2_setting_8",
1156 .reg = 0x76
1157 },
1158 {
1159 .name = "lut_temp_3_setting_8",
1160 .reg = 0x77
1161 },
1162 {
1163 .name = "lut_temp_4_setting_8",
1164 .reg = 0x78
1165 },
1166 {
1167 .name = "lut_temp_hysteresis",
1168 .reg = 0x79
1169 },
1170 {
1171 .name = "gpio_direction_register",
1172 .reg = 0xE1
1173 },
1174 {
1175 .name = "gpio_output_configuration_register",
1176 .reg = 0xE2
1177 },
1178 {
1179 .name = "gpio_input_register",
1180 .reg = 0xE3
1181 },
1182 {
1183 .name = "gpio_output_register",
1184 .reg = 0xE4
1185 },
1186 {
1187 .name = "gpio_interrupt_enable_register",
1188 .reg = 0xE5
1189 },
1190 {
1191 .name = "gpio_status",
1192 .reg = 0xE6
1193 },
1194 {
1195 .name = "software_lock",
1196 .reg = 0xEF
1197 },
1198 {
1199 .name = "product_features",
1200 .reg = 0xFC
1201 },
1202 {
1203 .name = "product_id",
1204 .reg = 0xFD
1205 },
1206 {
1207 .name = "manufacturer_id",
1208 .reg = 0xFE
1209 },
1210 {
1211 .name = "revision",
1212 .reg = 0xFF
1213 }
1214 };
1215
1216 static const struct emcfan_registers emcfanctl_2104_registers[] = {
1217 {
1218 .name = "internal_temp_reading_high_byte",
1219 .reg = 0x00
1220 },
1221 {
1222 .name = "internal_temp_reading_low_byte",
1223 .reg = 0x01
1224 },
1225 {
1226 .name = "external_diode_1_temp_reading_high_byte",
1227 .reg = 0x02
1228 },
1229 {
1230 .name = "external_diode_1_temp_reading_low_byte",
1231 .reg = 0x03
1232 },
1233 {
1234 .name = "external_diode_2_temp_reading_high_byte",
1235 .reg = 0x04
1236 },
1237 {
1238 .name = "external_diode_2_temp_reading_low_byte",
1239 .reg = 0x05
1240 },
1241 {
1242 .name = "external_diode_3_temp_reading_high_byte",
1243 .reg = 0x06
1244 },
1245 {
1246 .name = "external_diode_3_temp_reading_low_byte",
1247 .reg = 0x07
1248 },
1249 {
1250 .name = "external_diode_4_temp_reading_high_byte",
1251 .reg = 0x08
1252 },
1253 {
1254 .name = "external_diode_4_temp_reading_low_byte",
1255 .reg = 0x09
1256 },
1257 {
1258 .name = "critical/thermal_shutdown_temperature",
1259 .reg = 0x0A
1260 },
1261 {
1262 .name = "pushed_temperature_1",
1263 .reg = 0x0C
1264 },
1265 {
1266 .name = "pushed_temperature_2",
1267 .reg = 0x0D
1268 },
1269 {
1270 .name = "pushed_temperature_3",
1271 .reg = 0x0E
1272 },
1273 {
1274 .name = "pushed_temperature_4",
1275 .reg = 0x0F
1276 },
1277 {
1278 .name = "trip_set_voltage",
1279 .reg = 0x10
1280 },
1281 {
1282 .name = "external_diode_1_beta_configuration",
1283 .reg = 0x14
1284 },
1285 {
1286 .name = "external_diode_2_beta_configuration",
1287 .reg = 0x15
1288 },
1289 {
1290 .name = "external_diode_3_beta_configuration",
1291 .reg = 0x16
1292 },
1293 {
1294 .name = "external_diode_rec_configuration",
1295 .reg = 0x17
1296 },
1297 {
1298 .name = "external_diode_1_tcrit_limit",
1299 .reg = 0x19
1300 },
1301 {
1302 .name = "external_diode_2_tcrit_limit",
1303 .reg = 0x1A
1304 },
1305 {
1306 .name = "external_diode_3_tcrit_limit",
1307 .reg = 0x1B
1308 },
1309 {
1310 .name = "external_diode_4_tcrit_limit",
1311 .reg = 0x1C
1312 },
1313 {
1314 .name = "internal_diode_tcrit_limit",
1315 .reg = 0x1D
1316 },
1317 {
1318 .name = "tcrit_limit_status",
1319 .reg = 0x1F
1320 },
1321 {
1322 .name = "configuration",
1323 .reg = 0x20
1324 },
1325 {
1326 .name = "configuration_2",
1327 .reg = 0x21
1328 },
1329 {
1330 .name = "configuration_3",
1331 .reg = 0x22
1332 },
1333 {
1334 .name = "interrupt_status",
1335 .reg = 0x23
1336 },
1337 {
1338 .name = "high_limit_status",
1339 .reg = 0x24
1340 },
1341 {
1342 .name = "low_limit_status",
1343 .reg = 0x25
1344 },
1345 {
1346 .name = "diode_fault",
1347 .reg = 0x26
1348 },
1349 {
1350 .name = "fan_status",
1351 .reg = 0x27
1352 },
1353 {
1354 .name = "interrupt_enable_register",
1355 .reg = 0x28
1356 },
1357 {
1358 .name = "fan_interrupt_enable_register",
1359 .reg = 0x29
1360 },
1361 {
1362 .name = "pwm_config",
1363 .reg = 0x2A
1364 },
1365 {
1366 .name = "pwm_base_frequency",
1367 .reg = 0x2B
1368 },
1369 {
1370 .name = "external_diode_1_temp_high_limit",
1371 .reg = 0x30
1372 },
1373 {
1374 .name = "external_diode_2_temp_high_limit",
1375 .reg = 0x31
1376 },
1377 {
1378 .name = "external_diode_3_temp_high_limit",
1379 .reg = 0x32
1380 },
1381 {
1382 .name = "external_diode_4_temp_high_limit",
1383 .reg = 0x33
1384 },
1385 {
1386 .name = "internal_diode_high_limit",
1387 .reg = 0x34
1388 },
1389 {
1390 .name = "voltage_4_high_limit",
1391 .reg = 0x35
1392 },
1393 {
1394 .name = "external_diode_1_temp_low_limit",
1395 .reg = 0x38
1396 },
1397 {
1398 .name = "external_diode_2_temp_low_limit",
1399 .reg = 0x39
1400 },
1401 {
1402 .name = "external_diode_3_temp_low_limit",
1403 .reg = 0x3A
1404 },
1405 {
1406 .name = "external_diode_4_temp_low_limit",
1407 .reg = 0x3B
1408 },
1409 {
1410 .name = "internal_diode_low_limit",
1411 .reg = 0x3C
1412 },
1413 {
1414 .name = "voltage_4_low_limit",
1415 .reg = 0x3D
1416 },
1417 {
1418 .name = "fan_1_setting",
1419 .reg = 0x40
1420 },
1421 {
1422 .name = "pwm_1_divide",
1423 .reg = 0x41
1424 },
1425 {
1426 .name = "fan_1_configuration_1",
1427 .reg = 0x42
1428 },
1429 {
1430 .name = "fan_1_configuration_2",
1431 .reg = 0x43
1432 },
1433 {
1434 .name = "gain_1",
1435 .reg = 0x45
1436 },
1437 {
1438 .name = "fan_1_spin_up_configuration",
1439 .reg = 0x46
1440 },
1441 {
1442 .name = "fan_1_step",
1443 .reg = 0x47
1444 },
1445 {
1446 .name = "fan_1_minimum_drive",
1447 .reg = 0x48
1448 },
1449 {
1450 .name = "fan_1_valid_tach_count",
1451 .reg = 0x49
1452 },
1453 {
1454 .name = "fan_1_drive_fail_band_low_byte",
1455 .reg = 0x4A
1456 },
1457 {
1458 .name = "fan_1_drive_fail_band_high_byte",
1459 .reg = 0x4B
1460 },
1461 {
1462 .name = "tach_1_target_low_byte",
1463 .reg = 0x4C
1464 },
1465 {
1466 .name = "tach_1_target_high_byte",
1467 .reg = 0x4D
1468 },
1469 {
1470 .name = "tach_1_readinghigh_byte",
1471 .reg = 0x4E
1472 },
1473 {
1474 .name = "tach_1_reading_low_byte",
1475 .reg = 0x4F
1476 },
1477 {
1478 .name = "lut_1_configuration",
1479 .reg = 0x50
1480 },
1481 {
1482 .name = "lut_1_drive_1",
1483 .reg = 0x51
1484 },
1485 {
1486 .name = "lut_1_temp_1_setting_1",
1487 .reg = 0x52
1488 },
1489 {
1490 .name = "lut_1_temp_2_setting_1",
1491 .reg = 0x53
1492 },
1493 {
1494 .name = "lut_1_temp_3_setting_1",
1495 .reg = 0x54
1496 },
1497 {
1498 .name = "lut_1_temp_4_setting_1",
1499 .reg = 0x55
1500 },
1501 {
1502 .name = "lut_1_drive_2",
1503 .reg = 0x56
1504 },
1505 {
1506 .name = "lut_1_temp_1_setting_2",
1507 .reg = 0x57
1508 },
1509 {
1510 .name = "lut_1_temp_2_setting_2",
1511 .reg = 0x58
1512 },
1513 {
1514 .name = "lut_1_temp_3_setting_2",
1515 .reg = 0x59
1516 },
1517 {
1518 .name = "lut_1_temp_4_setting_2",
1519 .reg = 0x5A
1520 },
1521 {
1522 .name = "lut_1_drive_3",
1523 .reg = 0x5B
1524 },
1525 {
1526 .name = "lut_1_temp_1_setting_3",
1527 .reg = 0x5C
1528 },
1529 {
1530 .name = "lut_1_temp_2_setting_3",
1531 .reg = 0x5D
1532 },
1533 {
1534 .name = "lut_1_temp_3_setting_3",
1535 .reg = 0x5E
1536 },
1537 {
1538 .name = "lut_1_temp_4_setting_3",
1539 .reg = 0x5F
1540 },
1541 {
1542 .name = "lut_1_drive_4",
1543 .reg = 0x60
1544 },
1545 {
1546 .name = "lut_1_temp_1_setting_4",
1547 .reg = 0x61
1548 },
1549 {
1550 .name = "lut_1_temp_2_setting_4",
1551 .reg = 0x62
1552 },
1553 {
1554 .name = "lut_1_temp_3_setting_4",
1555 .reg = 0x63
1556 },
1557 {
1558 .name = "lut_1_temp_4_setting_4",
1559 .reg = 0x64
1560 },
1561 {
1562 .name = "lut_1_drive_5",
1563 .reg = 0x65
1564 },
1565 {
1566 .name = "lut_1_temp_1_setting_5",
1567 .reg = 0x66
1568 },
1569 {
1570 .name = "lut_1_temp_2_setting_5",
1571 .reg = 0x67
1572 },
1573 {
1574 .name = "lut_1_temp_3_setting_5",
1575 .reg = 0x68
1576 },
1577 {
1578 .name = "lut_1_temp_4_setting_5",
1579 .reg = 0x69
1580 },
1581 {
1582 .name = "lut_1_drive_6",
1583 .reg = 0x6A
1584 },
1585 {
1586 .name = "lut_1_temp_1_setting_6",
1587 .reg = 0x6B
1588 },
1589 {
1590 .name = "lut_1_temp_2_setting_6",
1591 .reg = 0x6C
1592 },
1593 {
1594 .name = "lut_1_temp_3_setting_6",
1595 .reg = 0x6D
1596 },
1597 {
1598 .name = "lut_1_temp_4_setting_6",
1599 .reg = 0x6E
1600 },
1601 {
1602 .name = "lut_1_drive_7",
1603 .reg = 0x6F
1604 },
1605 {
1606 .name = "lut_1_temp_1_setting_7",
1607 .reg = 0x70
1608 },
1609 {
1610 .name = "lut_1_temp_2_setting_7",
1611 .reg = 0x71
1612 },
1613 {
1614 .name = "lut_1_temp_3_setting_7",
1615 .reg = 0x72
1616 },
1617 {
1618 .name = "lut_1_temp_4_setting_7",
1619 .reg = 0x73
1620 },
1621 {
1622 .name = "lut_1_drive_8",
1623 .reg = 0x74
1624 },
1625 {
1626 .name = "lut_1_temp_1_setting_8",
1627 .reg = 0x75
1628 },
1629 {
1630 .name = "lut_1_temp_2_setting_8",
1631 .reg = 0x76
1632 },
1633 {
1634 .name = "lut_1_temp_3_setting_8",
1635 .reg = 0x77
1636 },
1637 {
1638 .name = "lut_1_temp_4_setting_8",
1639 .reg = 0x78
1640 },
1641 {
1642 .name = "lut_1_temp_hysteresis",
1643 .reg = 0x79
1644 },
1645 {
1646 .name = "fan_2_setting",
1647 .reg = 0x80
1648 },
1649 {
1650 .name = "pwm2_divide",
1651 .reg = 0x81
1652 },
1653 {
1654 .name = "fan_2_configuration_1",
1655 .reg = 0x82
1656 },
1657 {
1658 .name = "fan_2_configuration_2",
1659 .reg = 0x83
1660 },
1661 {
1662 .name = "gain_2",
1663 .reg = 0x85
1664 },
1665 {
1666 .name = "fan_2_spin_up_configuration",
1667 .reg = 0x86
1668 },
1669 {
1670 .name = "fan_2_step",
1671 .reg = 0x87
1672 },
1673 {
1674 .name = "fan_2_minimum_drive",
1675 .reg = 0x88
1676 },
1677 {
1678 .name = "fan_2_valid_tach_count",
1679 .reg = 0x89
1680 },
1681 {
1682 .name = "fan_2_drive_fail_band_low_byte",
1683 .reg = 0x8A
1684 },
1685 {
1686 .name = "fan_2_drive_fail_band_high_byte",
1687 .reg = 0x8B
1688 },
1689 {
1690 .name = "tach_2_target_low_byte",
1691 .reg = 0x8C
1692 },
1693 {
1694 .name = "tach_2_target_high_byte",
1695 .reg = 0x8D
1696 },
1697 {
1698 .name = "tach_2_reading_high_byte",
1699 .reg = 0x8E
1700 },
1701 {
1702 .name = "tach_2_reading_low_byte",
1703 .reg = 0x8F
1704 },
1705 {
1706 .name = "lut_2_configuration",
1707 .reg = 0x90
1708 },
1709 {
1710 .name = "lut_2_drive_1",
1711 .reg = 0x91
1712 },
1713 {
1714 .name = "lut_2_temp_1_setting_1",
1715 .reg = 0x92
1716 },
1717 {
1718 .name = "lut_2_temp_2_setting_1",
1719 .reg = 0x93
1720 },
1721 {
1722 .name = "lut_2_temp_3_setting_1",
1723 .reg = 0x94
1724 },
1725 {
1726 .name = "lut_2_temp_4_setting_1",
1727 .reg = 0x95
1728 },
1729 {
1730 .name = "lut_2_drive_2",
1731 .reg = 0x96
1732 },
1733 {
1734 .name = "lut_2_temp_1_setting_2",
1735 .reg = 0x97
1736 },
1737 {
1738 .name = "lut_2_temp_2_setting_2",
1739 .reg = 0x98
1740 },
1741 {
1742 .name = "lut_2_temp_3_setting_2",
1743 .reg = 0x99
1744 },
1745 {
1746 .name = "lut_2_temp_4_setting_2",
1747 .reg = 0x9A
1748 },
1749 {
1750 .name = "lut_2_drive_3",
1751 .reg = 0x9B
1752 },
1753 {
1754 .name = "lut_2_temp_1_setting_3",
1755 .reg = 0x9C
1756 },
1757 {
1758 .name = "lut_2_temp_2_setting_3",
1759 .reg = 0x9D
1760 },
1761 {
1762 .name = "lut_2_temp_3_setting_3",
1763 .reg = 0x9E
1764 },
1765 {
1766 .name = "lut_2_temp_4_setting_3",
1767 .reg = 0x9F
1768 },
1769 {
1770 .name = "lut_2_drive_4",
1771 .reg = 0xA0
1772 },
1773 {
1774 .name = "lut_2_temp_1_setting_4",
1775 .reg = 0xA1
1776 },
1777 {
1778 .name = "lut_2_temp_2_setting_4",
1779 .reg = 0xA2
1780 },
1781 {
1782 .name = "lut_2_temp_3_setting_4",
1783 .reg = 0xA3
1784 },
1785 {
1786 .name = "lut_2_temp_4_setting_4",
1787 .reg = 0xA4
1788 },
1789 {
1790 .name = "lut_2_drive_5",
1791 .reg = 0xA5
1792 },
1793 {
1794 .name = "lut_2_temp_1_setting_5",
1795 .reg = 0xA6
1796 },
1797 {
1798 .name = "lut_2_temp_2_setting_5",
1799 .reg = 0xA7
1800 },
1801 {
1802 .name = "lut_2_temp_3_setting_5",
1803 .reg = 0xA8
1804 },
1805 {
1806 .name = "lut_2_temp_4_setting_5",
1807 .reg = 0xA9
1808 },
1809 {
1810 .name = "lut_2_drive_6",
1811 .reg = 0xAA
1812 },
1813 {
1814 .name = "lut_2_temp_1_setting_6",
1815 .reg = 0xAB
1816 },
1817 {
1818 .name = "lut_2_temp_2_setting_6",
1819 .reg = 0xAC
1820 },
1821 {
1822 .name = "lut_2_temp_3_setting_6",
1823 .reg = 0xAD
1824 },
1825 {
1826 .name = "lut_2_temp_4_setting_6",
1827 .reg = 0xAE
1828 },
1829 {
1830 .name = "lut_2_drive_7",
1831 .reg = 0xAF
1832 },
1833 {
1834 .name = "lut_2_temp_1_setting_6",
1835 .reg = 0xB0
1836 },
1837 {
1838 .name = "lut_2_temp_2_setting_6",
1839 .reg = 0xB1
1840 },
1841 {
1842 .name = "lut_2_temp_3_setting_6",
1843 .reg = 0xB2
1844 },
1845 {
1846 .name = "lut_2_temp_4_setting_6",
1847 .reg = 0xB3
1848 },
1849 {
1850 .name = "lut_2_drive_8",
1851 .reg = 0xB4
1852 },
1853 {
1854 .name = "lut_2_temp_1_setting_8",
1855 .reg = 0xB5
1856 },
1857 {
1858 .name = "lut_2_temp_2_setting_8",
1859 .reg = 0xB6
1860 },
1861 {
1862 .name = "lut_2_temp_3_setting_8",
1863 .reg = 0xB7
1864 },
1865 {
1866 .name = "lut_2_temp_4_setting_8",
1867 .reg = 0xB8
1868 },
1869 {
1870 .name = "lut_2_temp_hysteresis",
1871 .reg = 0xB9
1872 },
1873 {
1874 .name = "muxed_pin_configuration_register",
1875 .reg = 0xE0
1876 },
1877 {
1878 .name = "gpio_direction_register",
1879 .reg = 0xE1
1880 },
1881 {
1882 .name = "gpio_output_configuration_register",
1883 .reg = 0xE2
1884 },
1885 {
1886 .name = "gpio_input_register",
1887 .reg = 0xE3
1888 },
1889 {
1890 .name = "gpio_output_register",
1891 .reg = 0xE4
1892 },
1893 {
1894 .name = "gpio_interrupt_enable_register",
1895 .reg = 0xE5
1896 },
1897 {
1898 .name = "gpio_status",
1899 .reg = 0xE6
1900 },
1901 {
1902 .name = "software_lock",
1903 .reg = 0xEF
1904 },
1905 {
1906 .name = "product_features",
1907 .reg = 0xFC
1908 },
1909 {
1910 .name = "product_id",
1911 .reg = 0xFD
1912 },
1913 {
1914 .name = "manufacturer_id",
1915 .reg = 0xFE
1916 },
1917 {
1918 .name = "revision",
1919 .reg = 0xFF
1920 }
1921 };
1922
1923 static const struct emcfan_registers emcfanctl_2106_registers[] = {
1924 {
1925 .name = "internal_temp_reading_high_byte",
1926 .reg = 0x00
1927 },
1928 {
1929 .name = "internal_temp_reading_low_byte",
1930 .reg = 0x01
1931 },
1932 {
1933 .name = "external_diode_1_temp_reading_high_byte",
1934 .reg = 0x02
1935 },
1936 {
1937 .name = "external_diode_1_temp_reading_low_byte",
1938 .reg = 0x03
1939 },
1940 {
1941 .name = "external_diode_2_temp_reading_high_byte",
1942 .reg = 0x04
1943 },
1944 {
1945 .name = "external_diode_2_temp_reading_low_byte",
1946 .reg = 0x05
1947 },
1948 {
1949 .name = "external_diode_3_temp_reading_high_byte",
1950 .reg = 0x06
1951 },
1952 {
1953 .name = "external_diode_3_temp_reading_low_byte",
1954 .reg = 0x07
1955 },
1956 {
1957 .name = "external_diode_4_temp_reading_high_byte",
1958 .reg = 0x08
1959 },
1960 {
1961 .name = "external_diode_4_temp_reading_low_byte",
1962 .reg = 0x09
1963 },
1964 {
1965 .name = "critical/thermal_shutdown_temperature",
1966 .reg = 0x0A
1967 },
1968 {
1969 .name = "pushed_temperature_1",
1970 .reg = 0x0C
1971 },
1972 {
1973 .name = "pushed_temperature_2",
1974 .reg = 0x0D
1975 },
1976 {
1977 .name = "pushed_temperature_3",
1978 .reg = 0x0E
1979 },
1980 {
1981 .name = "pushed_temperature_4",
1982 .reg = 0x0F
1983 },
1984 {
1985 .name = "trip_set_voltage",
1986 .reg = 0x10
1987 },
1988 {
1989 .name = "external_diode_1_beta_configuration",
1990 .reg = 0x14
1991 },
1992 {
1993 .name = "external_diode_2_beta_configuration",
1994 .reg = 0x15
1995 },
1996 {
1997 .name = "external_diode_3_beta_configuration",
1998 .reg = 0x16
1999 },
2000 {
2001 .name = "external_diode_rec_configuration",
2002 .reg = 0x17
2003 },
2004 {
2005 .name = "external_diode_1_tcrit_limit",
2006 .reg = 0x19
2007 },
2008 {
2009 .name = "external_diode_2_tcrit_limit",
2010 .reg = 0x1A
2011 },
2012 {
2013 .name = "external_diode_3_tcrit_limit",
2014 .reg = 0x1B
2015 },
2016 {
2017 .name = "external_diode_4_tcrit_limit",
2018 .reg = 0x1C
2019 },
2020 {
2021 .name = "internal_diode_tcrit_limit",
2022 .reg = 0x1D
2023 },
2024 {
2025 .name = "tcrit_limit_status",
2026 .reg = 0x1F
2027 },
2028 {
2029 .name = "configuration",
2030 .reg = 0x20
2031 },
2032 {
2033 .name = "configuration_2",
2034 .reg = 0x21
2035 },
2036 {
2037 .name = "configuration_3",
2038 .reg = 0x22
2039 },
2040 {
2041 .name = "interrupt_status",
2042 .reg = 0x23
2043 },
2044 {
2045 .name = "high_limit_status",
2046 .reg = 0x24
2047 },
2048 {
2049 .name = "low_limit_status",
2050 .reg = 0x25
2051 },
2052 {
2053 .name = "diode_fault",
2054 .reg = 0x26
2055 },
2056 {
2057 .name = "fan_status",
2058 .reg = 0x27
2059 },
2060 {
2061 .name = "interrupt_enable_register",
2062 .reg = 0x28
2063 },
2064 {
2065 .name = "fan_interruptenable_register",
2066 .reg = 0x29
2067 },
2068 {
2069 .name = "pwm_config",
2070 .reg = 0x2A
2071 },
2072 {
2073 .name = "pwm_base_frequency",
2074 .reg = 0x2B
2075 },
2076 {
2077 .name = "pwm_3_frequency_divide",
2078 .reg = 0x2C
2079 },
2080 {
2081 .name = "pwm3_setting",
2082 .reg = 0x2D
2083 },
2084 {
2085 .name = "pwm4_setting",
2086 .reg = 0x2E
2087 },
2088 {
2089 .name = "pwm4_frequency_divide",
2090 .reg = 0x2F
2091 },
2092 {
2093 .name = "external_diode_1_temp_high_limit",
2094 .reg = 0x30
2095 },
2096 {
2097 .name = "external_diode_2_temp_high_limit",
2098 .reg = 0x31
2099 },
2100 {
2101 .name = "external_diode_3_temp_high_limit",
2102 .reg = 0x32
2103 },
2104 {
2105 .name = "external_diode_4_temp_high_limit",
2106 .reg = 0x33
2107 },
2108 {
2109 .name = "internal_diode_high_limit",
2110 .reg = 0x34
2111 },
2112 {
2113 .name = "voltage_4_high_limit",
2114 .reg = 0x35
2115 },
2116 {
2117 .name = "external_diode_1_temp_low_limit",
2118 .reg = 0x38
2119 },
2120 {
2121 .name = "external_diode_2_temp_low_limit",
2122 .reg = 0x39
2123 },
2124 {
2125 .name = "external_diode_3_temp_low_limit",
2126 .reg = 0x3A
2127 },
2128 {
2129 .name = "external_diode_4_temp_low_limit",
2130 .reg = 0x3B
2131 },
2132 {
2133 .name = "internal_diode_low_limit",
2134 .reg = 0x3C
2135 },
2136 {
2137 .name = "voltage_4_low_limit",
2138 .reg = 0x3D
2139 },
2140 {
2141 .name = "fan_1_setting",
2142 .reg = 0x40
2143 },
2144 {
2145 .name = "pwm_1_divide",
2146 .reg = 0x41
2147 },
2148 {
2149 .name = "fan_1_configuration_1",
2150 .reg = 0x42
2151 },
2152 {
2153 .name = "fan_1_configuration_2",
2154 .reg = 0x43
2155 },
2156 {
2157 .name = "gain_1",
2158 .reg = 0x45
2159 },
2160 {
2161 .name = "fan_1_spin_up_configuration",
2162 .reg = 0x46
2163 },
2164 {
2165 .name = "fan_1_step",
2166 .reg = 0x47
2167 },
2168 {
2169 .name = "fan_1_minimum_drive",
2170 .reg = 0x48
2171 },
2172 {
2173 .name = "fan_1_valid_tach_count",
2174 .reg = 0x49
2175 },
2176 {
2177 .name = "fan_1_drive_fail_band_low_byte",
2178 .reg = 0x4A
2179 },
2180 {
2181 .name = "fan_1_drive_fail_band_high_byte",
2182 .reg = 0x4B
2183 },
2184 {
2185 .name = "tach_1_target_low_byte",
2186 .reg = 0x4C
2187 },
2188 {
2189 .name = "tach_1_target_high_byte",
2190 .reg = 0x4D
2191 },
2192 {
2193 .name = "tach_1_readinghigh_byte",
2194 .reg = 0x4E
2195 },
2196 {
2197 .name = "tach_1_reading_low_byte",
2198 .reg = 0x4F
2199 },
2200 {
2201 .name = "lut_1_configuration",
2202 .reg = 0x50
2203 },
2204 {
2205 .name = "lut_1_drive_1",
2206 .reg = 0x51
2207 },
2208 {
2209 .name = "lut_1_temp_1_setting_1",
2210 .reg = 0x52
2211 },
2212 {
2213 .name = "lut_1_temp_2_setting_1",
2214 .reg = 0x53
2215 },
2216 {
2217 .name = "lut_1_temp_3_setting_1",
2218 .reg = 0x54
2219 },
2220 {
2221 .name = "lut_1_temp_4_setting_1",
2222 .reg = 0x55
2223 },
2224 {
2225 .name = "lut_1_drive_2",
2226 .reg = 0x56
2227 },
2228 {
2229 .name = "lut_1_temp_1_setting_2",
2230 .reg = 0x57
2231 },
2232 {
2233 .name = "lut_1_temp_2_setting_2",
2234 .reg = 0x58
2235 },
2236 {
2237 .name = "lut_1_temp_3_setting_2",
2238 .reg = 0x59
2239 },
2240 {
2241 .name = "lut_1_temp_4_setting_2",
2242 .reg = 0x5A
2243 },
2244 {
2245 .name = "lut_1_drive_3",
2246 .reg = 0x5B
2247 },
2248 {
2249 .name = "lut_1_temp_1_setting_3",
2250 .reg = 0x5C
2251 },
2252 {
2253 .name = "lut_1_temp_2_setting_3",
2254 .reg = 0x5D
2255 },
2256 {
2257 .name = "lut_1_temp_3_setting_3",
2258 .reg = 0x5E
2259 },
2260 {
2261 .name = "lut_1_temp_4_setting_3",
2262 .reg = 0x5F
2263 },
2264 {
2265 .name = "lut_1_drive_4",
2266 .reg = 0x60
2267 },
2268 {
2269 .name = "lut_1_temp_1_setting_4",
2270 .reg = 0x61
2271 },
2272 {
2273 .name = "lut_1_temp_2_setting_4",
2274 .reg = 0x62
2275 },
2276 {
2277 .name = "lut_1_temp_3_setting_4",
2278 .reg = 0x63
2279 },
2280 {
2281 .name = "lut_1_temp_4_setting_4",
2282 .reg = 0x64
2283 },
2284 {
2285 .name = "lut_1_drive_5",
2286 .reg = 0x65
2287 },
2288 {
2289 .name = "lut_1_temp_1_setting_5",
2290 .reg = 0x66
2291 },
2292 {
2293 .name = "lut_1_temp_2_setting_5",
2294 .reg = 0x67
2295 },
2296 {
2297 .name = "lut_1_temp_3_setting_5",
2298 .reg = 0x68
2299 },
2300 {
2301 .name = "lut_1_temp_4_setting_5",
2302 .reg = 0x69
2303 },
2304 {
2305 .name = "lut_1_drive_6",
2306 .reg = 0x6A
2307 },
2308 {
2309 .name = "lut_1_temp_1_setting_6",
2310 .reg = 0x6B
2311 },
2312 {
2313 .name = "lut_1_temp_2_setting_6",
2314 .reg = 0x6C
2315 },
2316 {
2317 .name = "lut_1_temp_3_setting_6",
2318 .reg = 0x6D
2319 },
2320 {
2321 .name = "lut_1_temp_4_setting_6",
2322 .reg = 0x6E
2323 },
2324 {
2325 .name = "lut_1_drive_7",
2326 .reg = 0x6F
2327 },
2328 {
2329 .name = "lut_1_temp_1_setting_7",
2330 .reg = 0x70
2331 },
2332 {
2333 .name = "lut_1_temp_2_setting_7",
2334 .reg = 0x71
2335 },
2336 {
2337 .name = "lut_1_temp_3_setting_7",
2338 .reg = 0x72
2339 },
2340 {
2341 .name = "lut_1_temp_4_setting_7",
2342 .reg = 0x73
2343 },
2344 {
2345 .name = "lut_1_drive_8",
2346 .reg = 0x74
2347 },
2348 {
2349 .name = "lut_1_temp_1_setting_8",
2350 .reg = 0x75
2351 },
2352 {
2353 .name = "lut_1_temp_2_setting_8",
2354 .reg = 0x76
2355 },
2356 {
2357 .name = "lut_1_temp_3_setting_8",
2358 .reg = 0x77
2359 },
2360 {
2361 .name = "lut_1_temp_4_setting_8",
2362 .reg = 0x78
2363 },
2364 {
2365 .name = "lut_1_temp_hysteresis",
2366 .reg = 0x79
2367 },
2368 {
2369 .name = "fan_2_setting",
2370 .reg = 0x80
2371 },
2372 {
2373 .name = "pwm2_divide",
2374 .reg = 0x81
2375 },
2376 {
2377 .name = "fan_2_configuration_1",
2378 .reg = 0x82
2379 },
2380 {
2381 .name = "fan_2_configuration_2",
2382 .reg = 0x83
2383 },
2384 {
2385 .name = "gain_2",
2386 .reg = 0x85
2387 },
2388 {
2389 .name = "fan_2_spin_up_configuration",
2390 .reg = 0x86
2391 },
2392 {
2393 .name = "fan_2_step",
2394 .reg = 0x87
2395 },
2396 {
2397 .name = "fan_2_minimum_drive",
2398 .reg = 0x88
2399 },
2400 {
2401 .name = "fan_2_valid_tach_count",
2402 .reg = 0x89
2403 },
2404 {
2405 .name = "fan_2_drive_fail_band_low_byte",
2406 .reg = 0x8A
2407 },
2408 {
2409 .name = "fan_2_drive_fail_band_high_byte",
2410 .reg = 0x8B
2411 },
2412 {
2413 .name = "tach_2_targetlow_byte",
2414 .reg = 0x8C
2415 },
2416 {
2417 .name = "tach_2_target_high_byte",
2418 .reg = 0x8D
2419 },
2420 {
2421 .name = "tach_2_reading_high_byte",
2422 .reg = 0x8E
2423 },
2424 {
2425 .name = "tach_2_reading_low_byte",
2426 .reg = 0x8F
2427 },
2428 {
2429 .name = "lut_2_configuration",
2430 .reg = 0x90
2431 },
2432 {
2433 .name = "lut_2_drive_1",
2434 .reg = 0x91
2435 },
2436 {
2437 .name = "lut_2_temp_1_setting_1",
2438 .reg = 0x92
2439 },
2440 {
2441 .name = "lut_2_temp_2_setting_1",
2442 .reg = 0x93
2443 },
2444 {
2445 .name = "lut_2_temp_3_setting_1",
2446 .reg = 0x94
2447 },
2448 {
2449 .name = "lut_2_temp_4_setting_1",
2450 .reg = 0x95
2451 },
2452 {
2453 .name = "lut_2_drive_2",
2454 .reg = 0x96
2455 },
2456 {
2457 .name = "lut_2_temp_1_setting_2",
2458 .reg = 0x97
2459 },
2460 {
2461 .name = "lut_2_temp_2_setting_2",
2462 .reg = 0x98
2463 },
2464 {
2465 .name = "lut_2_temp_3_setting_2",
2466 .reg = 0x99
2467 },
2468 {
2469 .name = "lut_2_temp_4_setting_2",
2470 .reg = 0x9A
2471 },
2472 {
2473 .name = "lut_2_drive_3",
2474 .reg = 0x9B
2475 },
2476 {
2477 .name = "lut_2_temp_1_setting_3",
2478 .reg = 0x9C
2479 },
2480 {
2481 .name = "lut_2_temp_2_setting_3",
2482 .reg = 0x9D
2483 },
2484 {
2485 .name = "lut_2_temp_3_setting_3",
2486 .reg = 0x9E
2487 },
2488 {
2489 .name = "lut_2_temp_4_setting_3",
2490 .reg = 0x9F
2491 },
2492 {
2493 .name = "lut_2_drive_4",
2494 .reg = 0xA0
2495 },
2496 {
2497 .name = "lut_2_temp_1_setting_4",
2498 .reg = 0xA1
2499 },
2500 {
2501 .name = "lut_2_temp_2_setting_4",
2502 .reg = 0xA2
2503 },
2504 {
2505 .name = "lut_2_temp_3_setting_4",
2506 .reg = 0xA3
2507 },
2508 {
2509 .name = "lut_2_temp_4_setting_4",
2510 .reg = 0xA4
2511 },
2512 {
2513 .name = "lut_2_drive_5",
2514 .reg = 0xA5
2515 },
2516 {
2517 .name = "lut_2_temp_1_setting_5",
2518 .reg = 0xA6
2519 },
2520 {
2521 .name = "lut_2_temp_2_setting_5",
2522 .reg = 0xA7
2523 },
2524 {
2525 .name = "lut_2_temp_3_setting_5",
2526 .reg = 0xA8
2527 },
2528 {
2529 .name = "lut_2_temp_4_setting_5",
2530 .reg = 0xA9
2531 },
2532 {
2533 .name = "lut_2_drive_6",
2534 .reg = 0xAA
2535 },
2536 {
2537 .name = "lut_2_temp_1_setting_6",
2538 .reg = 0xAB
2539 },
2540 {
2541 .name = "lut_2_temp_2_setting_6",
2542 .reg = 0xAC
2543 },
2544 {
2545 .name = "lut_2_temp_3_setting_6",
2546 .reg = 0xAD
2547 },
2548 {
2549 .name = "lut_2_temp_4_setting_6",
2550 .reg = 0xAE
2551 },
2552 {
2553 .name = "lut_2_drive_7",
2554 .reg = 0xAF
2555 },
2556 {
2557 .name = "lut_2_temp_1_setting_6",
2558 .reg = 0xB0
2559 },
2560 {
2561 .name = "lut_2_temp_2_setting_6",
2562 .reg = 0xB1
2563 },
2564 {
2565 .name = "lut_2_temp_3setting_6",
2566 .reg = 0xB2
2567 },
2568 {
2569 .name = "lut_2_temp_4_setting_6",
2570 .reg = 0xB3
2571 },
2572 {
2573 .name = "lut_2_drive_8",
2574 .reg = 0xB4
2575 },
2576 {
2577 .name = "lut_2_temp_1_setting_8",
2578 .reg = 0xB5
2579 },
2580 {
2581 .name = "lut_2_temp_2_setting_8",
2582 .reg = 0xB6
2583 },
2584 {
2585 .name = "lut_2_temp_3_setting_8",
2586 .reg = 0xB7
2587 },
2588 {
2589 .name = "lut_2_temp_4_setting_8",
2590 .reg = 0xB8
2591 },
2592 {
2593 .name = "lut_2_temp_hysteresis",
2594 .reg = 0xB9
2595 },
2596 {
2597 .name = "muxed_pin_configuration_register",
2598 .reg = 0xE0
2599 },
2600 {
2601 .name = "gpio_direction_register",
2602 .reg = 0xE1
2603 },
2604 {
2605 .name = "gpio_output_configuration_register",
2606 .reg = 0xE2
2607 },
2608 {
2609 .name = "gpio_input_register",
2610 .reg = 0xE3
2611 },
2612 {
2613 .name = "gpio_output_register",
2614 .reg = 0xE4
2615 },
2616 {
2617 .name = "gpio_interrupt_enable_register",
2618 .reg = 0xE5
2619 },
2620 {
2621 .name = "gpio_status",
2622 .reg = 0xE6
2623 },
2624 {
2625 .name = "software_lock",
2626 .reg = 0xEF
2627 },
2628 {
2629 .name = "product_features",
2630 .reg = 0xFC
2631 },
2632 {
2633 .name = "product_id",
2634 .reg = 0xFD
2635 },
2636 {
2637 .name = "manufacturer_id",
2638 .reg = 0xFE
2639 },
2640 {
2641 .name = "revision",
2642 .reg = 0xFF
2643 }
2644 };
2645
2646 static const struct emcfan_registers emcfanctl_230x_registers[] = {
2647 {
2648 .name = "configuration",
2649 .reg = 0x20
2650 },
2651 {
2652 .name = "fan_status",
2653 .reg = 0x24
2654 },
2655 {
2656 .name = "fan_stall_status",
2657 .reg = 0x25
2658 },
2659 {
2660 .name = "fan_spin_status",
2661 .reg = 0x26
2662 },
2663 {
2664 .name = "drive_fail_status",
2665 .reg = 0x27
2666 },
2667 {
2668 .name = "fan_interrupt_enable_register",
2669 .reg = 0x29
2670 },
2671 {
2672 .name = "pwm_polarity_config",
2673 .reg = 0x2A
2674 },
2675 {
2676 .name = "pwm_output_config",
2677 .reg = 0x2B
2678 },
2679 {
2680 .name = "pwm_basef45",
2681 .reg = 0x2C
2682 },
2683 {
2684 .name = "pwm_basef123",
2685 .reg = 0x2D
2686 },
2687 {
2688 .name = "fan_1_setting",
2689 .reg = 0x30
2690 },
2691 {
2692 .name = "pwm_1_divide",
2693 .reg = 0x31
2694 },
2695 {
2696 .name = "fan_1_configuration_1",
2697 .reg = 0x32
2698 },
2699 {
2700 .name = "fan_1_configuration_2",
2701 .reg = 0x33
2702 },
2703 {
2704 .name = "gain_1",
2705 .reg = 0x35
2706 },
2707 {
2708 .name = "fan_1_spin_up_configuration",
2709 .reg = 0x36
2710 },
2711 {
2712 .name = "fan_1_max_step",
2713 .reg = 0x37
2714 },
2715 {
2716 .name = "fan_1_minimum_drive",
2717 .reg = 0x38
2718 },
2719 {
2720 .name = "fan_1_valid_tach_count",
2721 .reg = 0x39
2722 },
2723 {
2724 .name = "fan_1_drive_fail_band_low_byte",
2725 .reg = 0x3A
2726 },
2727 {
2728 .name = "fan_1_drive_fail_band_high_byte",
2729 .reg = 0x3B
2730 },
2731 {
2732 .name = "tach_1_target_low_byte",
2733 .reg = 0x3C
2734 },
2735 {
2736 .name = "tach_1_target_high_byte",
2737 .reg = 0x3D
2738 },
2739 {
2740 .name = "tach_1_reading_high_byte",
2741 .reg = 0x3E
2742 },
2743 {
2744 .name = "tach_1_reading_low_byte",
2745 .reg = 0x3F
2746 },
2747 {
2748 .name = "fan_2_setting",
2749 .reg = 0x40
2750 },
2751 {
2752 .name = "pwm_2_divide",
2753 .reg = 0x41
2754 },
2755 {
2756 .name = "fan_2_configuration_1",
2757 .reg = 0x42
2758 },
2759 {
2760 .name = "fan_2_configuration_2",
2761 .reg = 0x43
2762 },
2763 {
2764 .name = "gain_2",
2765 .reg = 0x45
2766 },
2767 {
2768 .name = "fan_2_spin_up_configuration",
2769 .reg = 0x46
2770 },
2771 {
2772 .name = "fan_2_max_step",
2773 .reg = 0x47
2774 },
2775 {
2776 .name = "fan_2_minimum_drive",
2777 .reg = 0x48
2778 },
2779 {
2780 .name = "fan_2_valid_tach_count",
2781 .reg = 0x49
2782 },
2783 {
2784 .name = "fan_2_drive_fail_band_low_byte",
2785 .reg = 0x4A
2786 },
2787 {
2788 .name = "fan_2_drive_fail_band_high_byte",
2789 .reg = 0x4B
2790 },
2791 {
2792 .name = "tach_2_target_low_byte",
2793 .reg = 0x4C
2794 },
2795 {
2796 .name = "tach_2_target_high_byte",
2797 .reg = 0x4D
2798 },
2799 {
2800 .name = "tach_2_reading_high_byte",
2801 .reg = 0x4E
2802 },
2803 {
2804 .name = "tach_2_reading_low_byte",
2805 .reg = 0x4F
2806 },
2807 {
2808 .name = "fan_3_setting",
2809 .reg = 0x50
2810 },
2811 {
2812 .name = "pwm_3_divide",
2813 .reg = 0x51
2814 },
2815 {
2816 .name = "fan_3_configuration_1",
2817 .reg = 0x52
2818 },
2819 {
2820 .name = "fan_3_configuration_2",
2821 .reg = 0x53
2822 },
2823 {
2824 .name = "gain_3",
2825 .reg = 0x55
2826 },
2827 {
2828 .name = "fan_3_spin_up_configuration",
2829 .reg = 0x56
2830 },
2831 {
2832 .name = "fan_3_max_step",
2833 .reg = 0x57
2834 },
2835 {
2836 .name = "fan_3_minimum_drive",
2837 .reg = 0x58
2838 },
2839 {
2840 .name = "fan_3_valid_tach_count",
2841 .reg = 0x59
2842 },
2843 {
2844 .name = "fan_3_drive_fail_band_low_byte",
2845 .reg = 0x5A
2846 },
2847 {
2848 .name = "fan_3_drive_fail_band_high_byte",
2849 .reg = 0x5B
2850 },
2851 {
2852 .name = "tach_3_target_low_byte",
2853 .reg = 0x5C
2854 },
2855 {
2856 .name = "tach_3_target_high_byte",
2857 .reg = 0x5D
2858 },
2859 {
2860 .name = "tach_3_reading_high_byte",
2861 .reg = 0x5E
2862 },
2863 {
2864 .name = "tach_3_reading_low_byte",
2865 .reg = 0x5F
2866 },
2867 {
2868 .name = "fan_4_setting",
2869 .reg = 0x60
2870 },
2871 {
2872 .name = "pwm_4_divide",
2873 .reg = 0x61
2874 },
2875 {
2876 .name = "fan_4_configuration_1",
2877 .reg = 0x62
2878 },
2879 {
2880 .name = "fan_4_configuration_2",
2881 .reg = 0x63
2882 },
2883 {
2884 .name = "gain_4",
2885 .reg = 0x65
2886 },
2887 {
2888 .name = "fan_4_spin_up_configuration",
2889 .reg = 0x66
2890 },
2891 {
2892 .name = "fan_4_max_step",
2893 .reg = 0x67
2894 },
2895 {
2896 .name = "fan_4_minimum_drive",
2897 .reg = 0x68
2898 },
2899 {
2900 .name = "fan_4_valid_tach_count",
2901 .reg = 0x69
2902 },
2903 {
2904 .name = "fan_4_drive_fail_band_low_byte",
2905 .reg = 0x6A
2906 },
2907 {
2908 .name = "fan_4_drive_fail_band_high_byte",
2909 .reg = 0x6B
2910 },
2911 {
2912 .name = "tach_4_target_low_byte",
2913 .reg = 0x6C
2914 },
2915 {
2916 .name = "tach_4_target_high_byte",
2917 .reg = 0x6D
2918 },
2919 {
2920 .name = "tach_4_reading_high_byte",
2921 .reg = 0x6E
2922 },
2923 {
2924 .name = "tach_4_reading_low_byte",
2925 .reg = 0x6F
2926 },
2927 {
2928 .name = "fan_5_setting",
2929 .reg = 0x70
2930 },
2931 {
2932 .name = "pwm_5_divide",
2933 .reg = 0x71
2934 },
2935 {
2936 .name = "fan_5_configuration_1",
2937 .reg = 0x72
2938 },
2939 {
2940 .name = "fan_5_configuration_2",
2941 .reg = 0x73
2942 },
2943 {
2944 .name = "gain_5",
2945 .reg = 0x75
2946 },
2947 {
2948 .name = "fan_5_spin_up_configuration",
2949 .reg = 0x76
2950 },
2951 {
2952 .name = "fan_5_max_step",
2953 .reg = 0x77
2954 },
2955 {
2956 .name = "fan_5_minimum_drive",
2957 .reg = 0x78
2958 },
2959 {
2960 .name = "fan_5_valid_tach_count",
2961 .reg = 0x79
2962 },
2963 {
2964 .name = "fan_5_drive_fail_band_low_byte",
2965 .reg = 0x7A
2966 },
2967 {
2968 .name = "fan_5_drive_fail_band_high_byte",
2969 .reg = 0x7B
2970 },
2971 {
2972 .name = "tach_5_target_low_byte",
2973 .reg = 0x7C
2974 },
2975 {
2976 .name = "tach_5_target_high_byte",
2977 .reg = 0x7D
2978 },
2979 {
2980 .name = "tach_5_reading_high_byte",
2981 .reg = 0x7E
2982 },
2983 {
2984 .name = "tach_5_reading_low_byte",
2985 .reg = 0x7F
2986 },
2987 {
2988 .name = "software_lock",
2989 .reg = 0xEF
2990 },
2991 {
2992 .name = "product_features",
2993 .reg = 0xFC
2994 },
2995 {
2996 .name = "product_id",
2997 .reg = 0xFD
2998 },
2999 {
3000 .name = "manufacturer_id",
3001 .reg = 0xFE
3002 },
3003 {
3004 .name = "revision",
3005 .reg = 0xFF
3006 }
3007 };
3008
3009 static const struct emcfan_bits_translate fan_polarity[] = {
3010 {
3011 .type = EMCFAN_TRANSLATE_STR,
3012 .clear_mask = 0b00000001,
3013 .bit_mask = 0b00000001,
3014 .human_str = "inverted",
3015 .instance = 0
3016 },
3017 {
3018 .type = EMCFAN_TRANSLATE_STR,
3019 .clear_mask = 0b00000001,
3020 .bit_mask = 0b00000000,
3021 .human_str = "non-inverted",
3022 .instance = 0
3023 },
3024 {
3025 .type = EMCFAN_TRANSLATE_STR,
3026 .clear_mask = 0b00000010,
3027 .bit_mask = 0b00000010,
3028 .human_str = "inverted",
3029 .instance = 1
3030 },
3031 {
3032 .type = EMCFAN_TRANSLATE_STR,
3033 .clear_mask = 0b00000010,
3034 .bit_mask = 0b00000000,
3035 .human_str = "non-inverted",
3036 .instance = 1
3037 },
3038 {
3039 .type = EMCFAN_TRANSLATE_STR,
3040 .clear_mask = 0b00000100,
3041 .bit_mask = 0b00000100,
3042 .human_str = "inverted",
3043 .instance = 2
3044 },
3045 {
3046 .type = EMCFAN_TRANSLATE_STR,
3047 .clear_mask = 0b00000100,
3048 .bit_mask = 0b00000000,
3049 .human_str = "non-inverted",
3050 .instance = 2
3051 },
3052 {
3053 .type = EMCFAN_TRANSLATE_STR,
3054 .clear_mask = 0b00001000,
3055 .bit_mask = 0b00001000,
3056 .human_str = "inverted",
3057 .instance = 3
3058 },
3059 {
3060 .type = EMCFAN_TRANSLATE_STR,
3061 .clear_mask = 0b00001000,
3062 .bit_mask = 0b00000000,
3063 .human_str = "non-inverted",
3064 .instance = 3
3065 },
3066 {
3067 .type = EMCFAN_TRANSLATE_STR,
3068 .clear_mask = 0b00010000,
3069 .bit_mask = 0b00010000,
3070 .human_str = "inverted",
3071 .instance = 4
3072 },
3073 {
3074 .type = EMCFAN_TRANSLATE_STR,
3075 .clear_mask = 0b00010000,
3076 .bit_mask = 0b00000000,
3077 .human_str = "non-inverted",
3078 .instance = 4
3079 },
3080 {
3081 .type = EMCFAN_TRANSLATE_STR,
3082 .clear_mask = 0b00010000,
3083 .bit_mask = 0b00010000,
3084 .human_str = "inverted",
3085 .instance = 2101
3086 },
3087 {
3088 .type = EMCFAN_TRANSLATE_STR,
3089 .clear_mask = 0b00010000,
3090 .bit_mask = 0b00000000,
3091 .human_str = "non-inverted",
3092 .instance = 2101
3093 }
3094 };
3095
3096 static const struct emcfan_bits_translate fan_minexpectedrpm[] = {
3097 {
3098 .type = EMCFAN_TRANSLATE_INT,
3099 .clear_mask = 0b01100000,
3100 .bit_mask = 0b00000000,
3101 .human_int = 500
3102 },
3103 {
3104 .type = EMCFAN_TRANSLATE_INT,
3105 .clear_mask = 0b01100000,
3106 .bit_mask = 0b00100000,
3107 .human_int = 1000
3108 },
3109 {
3110 .type = EMCFAN_TRANSLATE_INT,
3111 .clear_mask = 0b01100000,
3112 .bit_mask = 0b01000000,
3113 .human_int = 2000
3114 },
3115 {
3116 .type = EMCFAN_TRANSLATE_INT,
3117 .clear_mask = 0b01100000,
3118 .bit_mask = 0b01100000,
3119 .human_int = 4000
3120 }
3121 };
3122
3123 static const struct emcfan_bits_translate fan_numedges[] = {
3124 {
3125 .type = EMCFAN_TRANSLATE_INT,
3126 .clear_mask = 0b00011000,
3127 .bit_mask = 0b00000000,
3128 .human_int = 3
3129 },
3130 {
3131 .type = EMCFAN_TRANSLATE_INT,
3132 .clear_mask = 0b00011000,
3133 .bit_mask = 0b00001000,
3134 .human_int = 5
3135 },
3136 {
3137 .type = EMCFAN_TRANSLATE_INT,
3138 .clear_mask = 0b00011000,
3139 .bit_mask = 0b00010000,
3140 .human_int = 7
3141 },
3142 {
3143 .type = EMCFAN_TRANSLATE_INT,
3144 .clear_mask = 0b00011000,
3145 .bit_mask = 0b00011000,
3146 .human_int = 9
3147 }
3148 };
3149
3150 static const struct emcfan_bits_translate fan_pwm_basefreq[] = {
3151 {
3152 .type = EMCFAN_TRANSLATE_INT,
3153 .clear_mask = 0b00000011,
3154 .bit_mask = 0b00000000,
3155 .human_int = 26000,
3156 .instance = 0
3157 },
3158 {
3159 .type = EMCFAN_TRANSLATE_INT,
3160 .clear_mask = 0b00000011,
3161 .bit_mask = 0b00000001,
3162 .human_int = 19531,
3163 .instance = 0
3164 },
3165 {
3166 .type = EMCFAN_TRANSLATE_INT,
3167 .clear_mask = 0b00000011,
3168 .bit_mask = 0b00000010,
3169 .human_int = 4882,
3170 .instance = 0
3171 },
3172 {
3173 .type = EMCFAN_TRANSLATE_INT,
3174 .clear_mask = 0b00000011,
3175 .bit_mask = 0b00000011,
3176 .human_int = 2441,
3177 .instance = 0
3178 },
3179 {
3180 .type = EMCFAN_TRANSLATE_INT,
3181 .clear_mask = 0b00001100,
3182 .bit_mask = 0b00000000,
3183 .human_int = 26000,
3184 .instance = 1
3185 },
3186 {
3187 .type = EMCFAN_TRANSLATE_INT,
3188 .clear_mask = 0b00001100,
3189 .bit_mask = 0b00000100,
3190 .human_int = 19531,
3191 .instance = 1
3192 },
3193 {
3194 .type = EMCFAN_TRANSLATE_INT,
3195 .clear_mask = 0b00001100,
3196 .bit_mask = 0b00001000,
3197 .human_int = 4882,
3198 .instance = 1
3199 },
3200 {
3201 .type = EMCFAN_TRANSLATE_INT,
3202 .clear_mask = 0b00001100,
3203 .bit_mask = 0b00001100,
3204 .human_int = 2441,
3205 .instance = 1
3206 },
3207 {
3208 .type = EMCFAN_TRANSLATE_INT,
3209 .clear_mask = 0b00110000,
3210 .bit_mask = 0b00000000,
3211 .human_int = 26000,
3212 .instance = 2
3213 },
3214 {
3215 .type = EMCFAN_TRANSLATE_INT,
3216 .clear_mask = 0b00110000,
3217 .bit_mask = 0b00010000,
3218 .human_int = 19531,
3219 .instance = 2
3220 },
3221 {
3222 .type = EMCFAN_TRANSLATE_INT,
3223 .clear_mask = 0b00110000,
3224 .bit_mask = 0b00100000,
3225 .human_int = 4882,
3226 .instance = 2
3227 },
3228 {
3229 .type = EMCFAN_TRANSLATE_INT,
3230 .clear_mask = 0b00110000,
3231 .bit_mask = 0b00110000,
3232 .human_int = 2441,
3233 .instance = 2
3234 },
3235
3236 {
3237 .type = EMCFAN_TRANSLATE_INT,
3238 .clear_mask = 0b11000000,
3239 .bit_mask = 0b00000000,
3240 .human_int = 26000,
3241 .instance = 3
3242 },
3243 {
3244 .type = EMCFAN_TRANSLATE_INT,
3245 .clear_mask = 0b11000000,
3246 .bit_mask = 0b01000000,
3247 .human_int = 19531,
3248 .instance = 3
3249 },
3250 {
3251 .type = EMCFAN_TRANSLATE_INT,
3252 .clear_mask = 0b11000000,
3253 .bit_mask = 0b10000000,
3254 .human_int = 4882,
3255 .instance = 3
3256 },
3257 {
3258 .type = EMCFAN_TRANSLATE_INT,
3259 .clear_mask = 0b11000000,
3260 .bit_mask = 0b11000000,
3261 .human_int = 2441,
3262 .instance = 3
3263 },
3264
3265 {
3266 .type = EMCFAN_TRANSLATE_INT,
3267 .clear_mask = 0b00000011,
3268 .bit_mask = 0b00000000,
3269 .human_int = 26000,
3270 .instance = 23053
3271 },
3272 {
3273 .type = EMCFAN_TRANSLATE_INT,
3274 .clear_mask = 0b00000011,
3275 .bit_mask = 0b00000001,
3276 .human_int = 19531,
3277 .instance = 23053
3278 },
3279 {
3280 .type = EMCFAN_TRANSLATE_INT,
3281 .clear_mask = 0b00000011,
3282 .bit_mask = 0b00000010,
3283 .human_int = 4882,
3284 .instance = 23053
3285 },
3286 {
3287 .type = EMCFAN_TRANSLATE_INT,
3288 .clear_mask = 0b00000011,
3289 .bit_mask = 0b00000011,
3290 .human_int = 2441,
3291 .instance = 23053
3292 },
3293
3294 {
3295 .type = EMCFAN_TRANSLATE_INT,
3296 .clear_mask = 0b00001100,
3297 .bit_mask = 0b00000000,
3298 .human_int = 26000,
3299 .instance = 23054
3300 },
3301 {
3302 .type = EMCFAN_TRANSLATE_INT,
3303 .clear_mask = 0b00001100,
3304 .bit_mask = 0b00000100,
3305 .human_int = 19531,
3306 .instance = 23054
3307 },
3308 {
3309 .type = EMCFAN_TRANSLATE_INT,
3310 .clear_mask = 0b00001100,
3311 .bit_mask = 0b00001000,
3312 .human_int = 4882,
3313 .instance = 23054
3314 },
3315 {
3316 .type = EMCFAN_TRANSLATE_INT,
3317 .clear_mask = 0b00001100,
3318 .bit_mask = 0b00001100,
3319 .human_int = 2441,
3320 .instance = 23054
3321 }
3322 };
3323
3324 static const struct emcfan_bits_translate fan_pwm_output_type[] = {
3325 {
3326 .type = EMCFAN_TRANSLATE_STR,
3327 .clear_mask = 0b00000001,
3328 .bit_mask = 0b00000001,
3329 .human_str = "push-pull",
3330 .instance = 0
3331 },
3332 {
3333 .type = EMCFAN_TRANSLATE_STR,
3334 .clear_mask = 0b00000001,
3335 .bit_mask = 0b00000000,
3336 .human_str = "open-drain",
3337 .instance = 0
3338 },
3339 {
3340 .type = EMCFAN_TRANSLATE_STR,
3341 .clear_mask = 0b00000010,
3342 .bit_mask = 0b00000010,
3343 .human_str = "push-pull",
3344 .instance = 1
3345 },
3346 {
3347 .type = EMCFAN_TRANSLATE_STR,
3348 .clear_mask = 0b00000010,
3349 .bit_mask = 0b00000000,
3350 .human_str = "open-drain",
3351 .instance = 1
3352 },
3353 {
3354 .type = EMCFAN_TRANSLATE_STR,
3355 .clear_mask = 0b00000100,
3356 .bit_mask = 0b00000100,
3357 .human_str = "push-pull",
3358 .instance = 2
3359 },
3360 {
3361 .type = EMCFAN_TRANSLATE_STR,
3362 .clear_mask = 0b00000100,
3363 .bit_mask = 0b00000000,
3364 .human_str = "open-drain",
3365 .instance = 2
3366 },
3367 {
3368 .type = EMCFAN_TRANSLATE_STR,
3369 .clear_mask = 0b00001000,
3370 .bit_mask = 0b00001000,
3371 .human_str = "push-pull",
3372 .instance = 3
3373 },
3374 {
3375 .type = EMCFAN_TRANSLATE_STR,
3376 .clear_mask = 0b00001000,
3377 .bit_mask = 0b00000000,
3378 .human_str = "open-drain",
3379 .instance = 3
3380 },
3381 {
3382 .type = EMCFAN_TRANSLATE_STR,
3383 .clear_mask = 0b00010000,
3384 .bit_mask = 0b00010000,
3385 .human_str = "push-pull",
3386 .instance = 4
3387 },
3388 {
3389 .type = EMCFAN_TRANSLATE_STR,
3390 .clear_mask = 0b00010000,
3391 .bit_mask = 0b00000000,
3392 .human_str = "open-drain",
3393 .instance = 4
3394 }
3395 };
3396
3397 static const struct emcfan_bits_translate smbus_timeout[] = {
3398 {
3399 .type = EMCFAN_TRANSLATE_STR,
3400 .clear_mask = 0b00001000,
3401 .bit_mask = 0b00000000,
3402 .human_str = "on",
3403 .instance = 2101
3404 },
3405 {
3406 .type = EMCFAN_TRANSLATE_STR,
3407 .clear_mask = 0b00001000,
3408 .bit_mask = 0b00001000,
3409 .human_str = "off",
3410 .instance = 2101
3411 },
3412 {
3413 .type = EMCFAN_TRANSLATE_STR,
3414 .clear_mask = 0b00100000,
3415 .bit_mask = 0b00000000,
3416 .human_str = "on",
3417 .instance = 2103
3418 },
3419 {
3420 .type = EMCFAN_TRANSLATE_STR,
3421 .clear_mask = 0b00100000,
3422 .bit_mask = 0b00100000,
3423 .human_str = "off",
3424 .instance = 2103
3425 },
3426 {
3427 .type = EMCFAN_TRANSLATE_STR,
3428 .clear_mask = 0b01000000,
3429 .bit_mask = 0b00000000,
3430 .human_str = "on",
3431 .instance = 2301
3432 },
3433 {
3434 .type = EMCFAN_TRANSLATE_STR,
3435 .clear_mask = 0b01000000,
3436 .bit_mask = 0b01000000,
3437 .human_str = "off",
3438 .instance = 2301
3439 }
3440 };
3441
3442 static const struct emcfan_bits_translate apd[] = {
3443 {
3444 .type = EMCFAN_TRANSLATE_STR,
3445 .clear_mask = 0b00000001,
3446 .bit_mask = 0b00000001,
3447 .human_str = "on"
3448 },
3449 {
3450 .type = EMCFAN_TRANSLATE_STR,
3451 .clear_mask = 0b00000001,
3452 .bit_mask = 0b00000000,
3453 .human_str = "off"
3454 }
3455 };
3456
3457 #endif
3458