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5b8e80941Smrg  <title>Mesa Release Notes</title>
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10b8e80941Smrg<div class="header">
11b8e80941Smrg  <h1>The Mesa 3D Graphics Library</h1>
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17b8e80941Smrg<h1>Mesa 17.3.3 Release Notes / January 18, 2018</h1>
18b8e80941Smrg
19b8e80941Smrg<p>
20b8e80941SmrgMesa 17.3.3 is a bug fix release which fixes bugs found since the 17.3.2 release.
21b8e80941Smrg</p>
22b8e80941Smrg<p>
23b8e80941SmrgMesa 17.3.3 implements the OpenGL 4.5 API, but the version reported by
24b8e80941SmrgglGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
25b8e80941SmrgglGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
26b8e80941SmrgSome drivers don't support all the features required in OpenGL 4.5.  OpenGL
27b8e80941Smrg4.5 is <strong>only</strong> available if requested at context creation
28b8e80941Smrgbecause compatibility contexts are not supported.
29b8e80941Smrg</p>
30b8e80941Smrg
31b8e80941Smrg
32b8e80941Smrg<h2>SHA256 checksums</h2>
33b8e80941Smrg<pre>
34b8e80941Smrgc733d37a161501cd81dc9b309ccb613753b98eafc6d35e0847548a6642749772  mesa-17.3.3.tar.gz
35b8e80941Smrg41bac5de0ef6adc1f41a1ec0f80c19e361298ce02fa81b5f9ba4fdca33a9379b  mesa-17.3.3.tar.xz
36b8e80941Smrg</pre>
37b8e80941Smrg
38b8e80941Smrg
39b8e80941Smrg<h2>New features</h2>
40b8e80941Smrg<p>None</p>
41b8e80941Smrg
42b8e80941Smrg
43b8e80941Smrg<h2>Bug fixes</h2>
44b8e80941Smrg
45b8e80941Smrg<ul>
46b8e80941Smrg
47b8e80941Smrg<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104214">Bug 104214</a> - Dota crashes when switching from game to desktop</li>
48b8e80941Smrg
49b8e80941Smrg<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104492">Bug 104492</a> - Compute Shader: Wrong alignment when assigning struct value to structured SSBO</li>
50b8e80941Smrg
51b8e80941Smrg<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104551">Bug 104551</a> - Check if Mako templates for Python are installed</li>
52b8e80941Smrg
53b8e80941Smrg</ul>
54b8e80941Smrg
55b8e80941Smrg
56b8e80941Smrg<h2>Changes</h2>
57b8e80941Smrg
58b8e80941Smrg<p>Alex Smith (3):</p>
59b8e80941Smrg<ul>
60b8e80941Smrg  <li>anv: Add missing unlock in anv_scratch_pool_alloc</li>
61b8e80941Smrg  <li>anv: Take write mask into account in has_color_buffer_write_enabled</li>
62b8e80941Smrg  <li>anv: Make sure state on primary is correct after CmdExecuteCommands</li>
63b8e80941Smrg</ul>
64b8e80941Smrg
65b8e80941Smrg<p>Andres Gomez (1):</p>
66b8e80941Smrg<ul>
67b8e80941Smrg  <li>anv: Import mako templates only during execution of anv_extensions</li>
68b8e80941Smrg</ul>
69b8e80941Smrg
70b8e80941Smrg<p>Bas Nieuwenhuizen (11):</p>
71b8e80941Smrg<ul>
72b8e80941Smrg  <li>radv: Invert condition for all samples identical during resolve.</li>
73b8e80941Smrg  <li>radv: Flush caches before subpass resolve.</li>
74b8e80941Smrg  <li>radv: Fix fragment resolve destination offset.</li>
75b8e80941Smrg  <li>radv: Use correct framebuffer size for partial FS resolves.</li>
76b8e80941Smrg  <li>radv: Always use fragment resolve if dest uses DCC.</li>
77b8e80941Smrg  <li>Revert "radv/gfx9: fix block compression texture views."</li>
78b8e80941Smrg  <li>radv: Use correct HTILE expanded words.</li>
79b8e80941Smrg  <li>radv: Allow writing 0 scissors.</li>
80b8e80941Smrg  <li>ac/nir: Handle loading data from compact arrays.</li>
81b8e80941Smrg  <li>radv: Invalidate L1 for VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT.</li>
82b8e80941Smrg  <li>ac/nir: Sanitize location_frac for local variables.</li>
83b8e80941Smrg</ul>
84b8e80941Smrg
85b8e80941Smrg<p>Dave Airlie (8):</p>
86b8e80941Smrg<ul>
87b8e80941Smrg  <li>radv: fix events on compute queues.</li>
88b8e80941Smrg  <li>radv: fix pipeline statistics end query on compute queue</li>
89b8e80941Smrg  <li>radv/gfx9: fix 3d image to image transfers on compute queues.</li>
90b8e80941Smrg  <li>radv/gfx9: fix 3d image clears on compute queues</li>
91b8e80941Smrg  <li>radv/gfx9: fix buffer to image for 3d images on compute queues</li>
92b8e80941Smrg  <li>radv/gfx9: fix block compression texture views.</li>
93b8e80941Smrg  <li>radv/gfx9: use a bigger hammer to flush cb/db caches.</li>
94b8e80941Smrg  <li>radv/gfx9: use correct swizzle parameter to work out border swizzle.</li>
95b8e80941Smrg</ul>
96b8e80941Smrg
97b8e80941Smrg<p>Emil Velikov (1):</p>
98b8e80941Smrg<ul>
99b8e80941Smrg  <li>docs: add sha256 checksums for 17.3.2</li>
100b8e80941Smrg</ul>
101b8e80941Smrg
102b8e80941Smrg<p>Florian Will (1):</p>
103b8e80941Smrg<ul>
104b8e80941Smrg  <li>glsl: Respect std430 layout in lower_buffer_access</li>
105b8e80941Smrg</ul>
106b8e80941Smrg
107b8e80941Smrg<p>Juan A. Suarez Romero (6):</p>
108b8e80941Smrg<ul>
109b8e80941Smrg  <li>cherry-ignore: intel/fs: Use the original destination region for int MUL lowering</li>
110b8e80941Smrg  <li>cherry-ignore: i965/fs: Use UW types when using V immediates</li>
111b8e80941Smrg  <li>cherry-ignore: main: Clear shader program data whenever ProgramBinary is called</li>
112b8e80941Smrg  <li>cherry-ignore: egl: pass the dri2_dpy to the $plat_teardown functions</li>
113b8e80941Smrg  <li>cherry-ignore: vulkan/wsi: free cmd pools</li>
114b8e80941Smrg  <li>Update version to 17.3.3</li>
115b8e80941Smrg</ul>
116b8e80941Smrg
117b8e80941Smrg<p>Józef Kucia (1):</p>
118b8e80941Smrg<ul>
119b8e80941Smrg  <li>radeonsi: fix alpha-to-coverage if color writes are disabled</li>
120b8e80941Smrg</ul>
121b8e80941Smrg
122b8e80941Smrg<p>Kenneth Graunke (2):</p>
123b8e80941Smrg<ul>
124b8e80941Smrg  <li>i965: Require space for MI_BATCHBUFFER_END.</li>
125b8e80941Smrg  <li>i965: Torch public intel_batchbuffer_emit_dword/float helpers.</li>
126b8e80941Smrg</ul>
127b8e80941Smrg
128b8e80941Smrg<p>Lucas Stach (1):</p>
129b8e80941Smrg<ul>
130b8e80941Smrg  <li>etnaviv: disable in-place resolve for non-supertiled surfaces</li>
131b8e80941Smrg</ul>
132b8e80941Smrg
133b8e80941Smrg<p>Samuel Iglesias Gonsálvez (1):</p>
134b8e80941Smrg<ul>
135b8e80941Smrg  <li>anv: VkDescriptorSetLayoutBinding can have descriptorCount == 0</li>
136b8e80941Smrg</ul>
137b8e80941Smrg
138b8e80941Smrg<p>Thomas Hellstrom (1):</p>
139b8e80941Smrg<ul>
140b8e80941Smrg  <li>loader/dri3: Avoid freeing renderbuffers in use</li>
141b8e80941Smrg</ul>
142b8e80941Smrg
143b8e80941Smrg<p>Tim Rowley (1):</p>
144b8e80941Smrg<ul>
145b8e80941Smrg  <li>swr/rast: fix invalid sign masks in avx512 simdlib code</li>
146b8e80941Smrg</ul>
147b8e80941Smrg
148b8e80941Smrg
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