sid.h revision b8e80941
1/* 2 * Southern Islands Register documentation 3 * 4 * Copyright (C) 2011 Advanced Micro Devices, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included 14 * in all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 20 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24#ifndef SID_H 25#define SID_H 26 27/* si values */ 28#define SI_CONFIG_REG_OFFSET 0x00008000 29#define SI_CONFIG_REG_END 0x0000B000 30#define SI_SH_REG_OFFSET 0x0000B000 31#define SI_SH_REG_END 0x0000C000 32#define SI_CONTEXT_REG_OFFSET 0x00028000 33#define SI_CONTEXT_REG_END 0x00029000 34#define CIK_UCONFIG_REG_OFFSET 0x00030000 35#define CIK_UCONFIG_REG_END 0x00038000 36 37#define EVENT_TYPE_CACHE_FLUSH 0x6 38#define EVENT_TYPE_PS_PARTIAL_FLUSH 0x10 39#define EVENT_TYPE_CACHE_FLUSH_AND_INV_TS_EVENT 0x14 40#define EVENT_TYPE_ZPASS_DONE 0x15 41#define EVENT_TYPE_CACHE_FLUSH_AND_INV_EVENT 0x16 42#define EVENT_TYPE_SO_VGTSTREAMOUT_FLUSH 0x1f 43#define EVENT_TYPE_SAMPLE_STREAMOUTSTATS 0x20 44#define EVENT_TYPE(x) ((x) << 0) 45#define EVENT_INDEX(x) ((x) << 8) 46 /* 0 - any non-TS event 47 * 1 - ZPASS_DONE 48 * 2 - SAMPLE_PIPELINESTAT 49 * 3 - SAMPLE_STREAMOUTSTAT* 50 * 4 - *S_PARTIAL_FLUSH 51 * 5 - TS events 52 */ 53 54/* EVENT_WRITE_EOP (SI-VI) & RELEASE_MEM (GFX9) */ 55#define EVENT_TCL1_VOL_ACTION_ENA (1 << 12) 56#define EVENT_TC_VOL_ACTION_ENA (1 << 13) 57#define EVENT_TC_WB_ACTION_ENA (1 << 15) 58#define EVENT_TCL1_ACTION_ENA (1 << 16) 59#define EVENT_TC_ACTION_ENA (1 << 17) 60#define EVENT_TC_NC_ACTION_ENA (1 << 19) /* GFX9+ */ 61#define EVENT_TC_WC_ACTION_ENA (1 << 20) /* GFX9+ */ 62#define EVENT_TC_MD_ACTION_ENA (1 << 21) /* GFX9+ */ 63 64 65#define PREDICATION_OP_CLEAR 0x0 66#define PREDICATION_OP_ZPASS 0x1 67#define PREDICATION_OP_PRIMCOUNT 0x2 68#define PREDICATION_OP_BOOL64 0x3 69 70#define PRED_OP(x) ((x) << 16) 71 72#define PREDICATION_CONTINUE (1 << 31) 73 74#define PREDICATION_HINT_WAIT (0 << 12) 75#define PREDICATION_HINT_NOWAIT_DRAW (1 << 12) 76 77#define PREDICATION_DRAW_NOT_VISIBLE (0 << 8) 78#define PREDICATION_DRAW_VISIBLE (1 << 8) 79 80#define R600_TEXEL_PITCH_ALIGNMENT_MASK 0x7 81 82/* All registers defined in this packet section don't exist and the only 83 * purpose of these definitions is to define packet encoding that 84 * the IB parser understands, and also to have an accurate documentation. 85 */ 86#define PKT3_NOP 0x10 87#define PKT3_SET_BASE 0x11 88#define PKT3_CLEAR_STATE 0x12 89#define PKT3_INDEX_BUFFER_SIZE 0x13 90#define PKT3_DISPATCH_DIRECT 0x15 91#define PKT3_DISPATCH_INDIRECT 0x16 92#define PKT3_OCCLUSION_QUERY 0x1F /* new for CIK */ 93#define PKT3_SET_PREDICATION 0x20 94#define PKT3_COND_EXEC 0x22 95#define PKT3_PRED_EXEC 0x23 96#define PKT3_DRAW_INDIRECT 0x24 97#define PKT3_DRAW_INDEX_INDIRECT 0x25 98#define PKT3_INDEX_BASE 0x26 99#define PKT3_DRAW_INDEX_2 0x27 100#define PKT3_CONTEXT_CONTROL 0x28 101#define CONTEXT_CONTROL_LOAD_ENABLE(x) (((unsigned)(x) & 0x1) << 31) 102#define CONTEXT_CONTROL_LOAD_CE_RAM(x) (((unsigned)(x) & 0x1) << 28) 103#define CONTEXT_CONTROL_SHADOW_ENABLE(x) (((unsigned)(x) & 0x1) << 31) 104#define PKT3_INDEX_TYPE 0x2A /* not on GFX9 */ 105#define PKT3_DRAW_INDIRECT_MULTI 0x2C 106#define R_2C3_DRAW_INDEX_LOC 0x2C3 107#define S_2C3_COUNT_INDIRECT_ENABLE(x) (((unsigned)(x) & 0x1) << 30) 108#define S_2C3_DRAW_INDEX_ENABLE(x) (((unsigned)(x) & 0x1) << 31) 109#define PKT3_DRAW_INDEX_AUTO 0x2D 110#define PKT3_DRAW_INDEX_IMMD 0x2E /* not on CIK */ 111#define PKT3_NUM_INSTANCES 0x2F 112#define PKT3_DRAW_INDEX_MULTI_AUTO 0x30 113#define PKT3_INDIRECT_BUFFER_SI 0x32 /* not on CIK */ 114#define PKT3_INDIRECT_BUFFER_CONST 0x33 115#define PKT3_STRMOUT_BUFFER_UPDATE 0x34 116#define STRMOUT_STORE_BUFFER_FILLED_SIZE 1 117#define STRMOUT_OFFSET_SOURCE(x) (((unsigned)(x) & 0x3) << 1) 118#define STRMOUT_OFFSET_FROM_PACKET 0 119#define STRMOUT_OFFSET_FROM_VGT_FILLED_SIZE 1 120#define STRMOUT_OFFSET_FROM_MEM 2 121#define STRMOUT_OFFSET_NONE 3 122#define STRMOUT_DATA_TYPE(x) (((unsigned)(x) & 0x1) << 7) 123#define STRMOUT_SELECT_BUFFER(x) (((unsigned)(x) & 0x3) << 8) 124#define PKT3_DRAW_INDEX_OFFSET_2 0x35 125#define PKT3_WRITE_DATA 0x37 126#define R_370_CONTROL 0x370 /* 0x[packet number][word index] */ 127#define S_370_ENGINE_SEL(x) (((unsigned)(x) & 0x3) << 30) 128#define V_370_ME 0 129#define V_370_PFP 1 130#define V_370_CE 2 131#define V_370_DE 3 132#define S_370_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 20) 133#define S_370_WR_ONE_ADDR(x) (((unsigned)(x) & 0x1) << 16) 134#define S_370_DST_SEL(x) (((unsigned)(x) & 0xf) << 8) 135#define V_370_MEM_MAPPED_REGISTER 0 136#define V_370_MEM_GRBM 1 /* sync across GRBM */ 137#define V_370_TC_L2 2 138#define V_370_GDS 3 139#define V_370_RESERVED 4 140#define V_370_MEM 5 /* not on SI */ 141#define R_371_DST_ADDR_LO 0x371 142#define R_372_DST_ADDR_HI 0x372 143#define PKT3_DRAW_INDEX_INDIRECT_MULTI 0x38 144#define PKT3_MEM_SEMAPHORE 0x39 145#define PKT3_MPEG_INDEX 0x3A /* not on CIK */ 146#define PKT3_WAIT_REG_MEM 0x3C 147#define WAIT_REG_MEM_EQUAL 3 148#define WAIT_REG_MEM_NOT_EQUAL 4 149#define WAIT_REG_MEM_GREATER_OR_EQUAL 5 150#define WAIT_REG_MEM_MEM_SPACE(x) (((unsigned)(x) & 0x3) << 4) 151#define WAIT_REG_MEM_PFP (1 << 8) 152#define PKT3_MEM_WRITE 0x3D /* not on CIK */ 153#define PKT3_INDIRECT_BUFFER_CIK 0x3F /* new on CIK */ 154#define R_3F0_IB_BASE_LO 0x3F0 155#define R_3F1_IB_BASE_HI 0x3F1 156#define R_3F2_CONTROL 0x3F2 157#define S_3F2_IB_SIZE(x) (((unsigned)(x) & 0xfffff) << 0) 158#define G_3F2_IB_SIZE(x) (((unsigned)(x) >> 0) & 0xfffff) 159#define S_3F2_CHAIN(x) (((unsigned)(x) & 0x1) << 20) 160#define G_3F2_CHAIN(x) (((unsigned)(x) >> 20) & 0x1) 161#define S_3F2_VALID(x) (((unsigned)(x) & 0x1) << 23) 162 163#define PKT3_COPY_DATA 0x40 164#define COPY_DATA_SRC_SEL(x) ((x) & 0xf) 165#define COPY_DATA_REG 0 166#define COPY_DATA_SRC_MEM 1 /* only valid as source */ 167#define COPY_DATA_TC_L2 2 168#define COPY_DATA_GDS 3 169#define COPY_DATA_PERF 4 170#define COPY_DATA_IMM 5 171#define COPY_DATA_TIMESTAMP 9 172#define COPY_DATA_DST_SEL(x) (((unsigned)(x) & 0xf) << 8) 173#define COPY_DATA_DST_MEM_GRBM 1 /* sync across GRBM, deprecated */ 174#define COPY_DATA_TC_L2 2 175#define COPY_DATA_GDS 3 176#define COPY_DATA_PERF 4 177#define COPY_DATA_DST_MEM 5 178#define COPY_DATA_COUNT_SEL (1 << 16) 179#define COPY_DATA_WR_CONFIRM (1 << 20) 180#define COPY_DATA_ENGINE_PFP (1 << 30) 181#define PKT3_PFP_SYNC_ME 0x42 182#define PKT3_SURFACE_SYNC 0x43 /* deprecated on CIK, use ACQUIRE_MEM */ 183#define PKT3_ME_INITIALIZE 0x44 /* not on CIK */ 184#define PKT3_COND_WRITE 0x45 185#define PKT3_EVENT_WRITE 0x46 186#define PKT3_EVENT_WRITE_EOP 0x47 /* not on GFX9 */ 187#define EOP_DST_SEL(x) ((x) << 16) 188#define EOP_DST_SEL_MEM 0 189#define EOP_DST_SEL_TC_L2 1 190#define EOP_INT_SEL(x) ((x) << 24) 191#define EOP_INT_SEL_NONE 0 192#define EOP_INT_SEL_SEND_DATA_AFTER_WR_CONFIRM 3 193#define EOP_DATA_SEL(x) ((x) << 29) 194#define EOP_DATA_SEL_DISCARD 0 195#define EOP_DATA_SEL_VALUE_32BIT 1 196#define EOP_DATA_SEL_VALUE_64BIT 2 197#define EOP_DATA_SEL_TIMESTAMP 3 198#define EOP_DATA_SEL_GDS 5 199#define EOP_DATA_GDS(dw_offset, num_dwords) ((dw_offset) | ((unsigned)(num_dwords) << 16)) 200/* CP DMA bug: Any use of CP_DMA.DST_SEL=TC must be avoided when EOS packets 201 * are used. Use DST_SEL=MC instead. For prefetch, use SRC_SEL=TC and 202 * DST_SEL=MC. Only CIK chips are affected. 203 */ 204/* fix CP DMA before uncommenting: */ 205/*#define PKT3_EVENT_WRITE_EOS 0x48*/ /* not on GFX9 */ 206#define PKT3_RELEASE_MEM 0x49 /* GFX9+ [any ring] or GFX8 [compute ring only] */ 207#define PKT3_ONE_REG_WRITE 0x57 /* not on CIK */ 208#define PKT3_ACQUIRE_MEM 0x58 /* new for CIK */ 209#define PKT3_REWIND 0x59 /* VI+ [any ring] or CIK [compute ring only] */ 210#define PKT3_SET_CONFIG_REG 0x68 211#define PKT3_SET_CONTEXT_REG 0x69 212#define PKT3_SET_SH_REG 0x76 213#define PKT3_SET_SH_REG_OFFSET 0x77 214#define PKT3_SET_UCONFIG_REG 0x79 /* new for CIK */ 215#define PKT3_SET_UCONFIG_REG_INDEX 0x7A /* new for GFX9, CP ucode version >= 26 */ 216#define PKT3_LOAD_CONST_RAM 0x80 217#define PKT3_WRITE_CONST_RAM 0x81 218#define PKT3_DUMP_CONST_RAM 0x83 219#define PKT3_INCREMENT_CE_COUNTER 0x84 220#define PKT3_INCREMENT_DE_COUNTER 0x85 221#define PKT3_WAIT_ON_CE_COUNTER 0x86 222#define PKT3_LOAD_CONTEXT_REG 0x9F /* new for VI */ 223 224#define PKT_TYPE_S(x) (((unsigned)(x) & 0x3) << 30) 225#define PKT_TYPE_G(x) (((x) >> 30) & 0x3) 226#define PKT_TYPE_C 0x3FFFFFFF 227#define PKT_COUNT_S(x) (((unsigned)(x) & 0x3FFF) << 16) 228#define PKT_COUNT_G(x) (((x) >> 16) & 0x3FFF) 229#define PKT_COUNT_C 0xC000FFFF 230#define PKT0_BASE_INDEX_S(x) (((unsigned)(x) & 0xFFFF) << 0) 231#define PKT0_BASE_INDEX_G(x) (((x) >> 0) & 0xFFFF) 232#define PKT0_BASE_INDEX_C 0xFFFF0000 233#define PKT3_IT_OPCODE_S(x) (((unsigned)(x) & 0xFF) << 8) 234#define PKT3_IT_OPCODE_G(x) (((x) >> 8) & 0xFF) 235#define PKT3_IT_OPCODE_C 0xFFFF00FF 236#define PKT3_PREDICATE(x) (((x) >> 0) & 0x1) 237#define PKT3_SHADER_TYPE_S(x) (((unsigned)(x) & 0x1) << 1) 238#define PKT0(index, count) (PKT_TYPE_S(0) | PKT0_BASE_INDEX_S(index) | PKT_COUNT_S(count)) 239#define PKT3(op, count, predicate) (PKT_TYPE_S(3) | PKT_COUNT_S(count) | PKT3_IT_OPCODE_S(op) | PKT3_PREDICATE(predicate)) 240 241#define PKT3_CP_DMA 0x41 242/* 1. header 243 * 2. SRC_ADDR_LO [31:0] or DATA [31:0] 244 * 3. CP_SYNC [31] | SRC_SEL [30:29] | ENGINE [27] | DST_SEL [21:20] | SRC_ADDR_HI [15:0] 245 * 4. DST_ADDR_LO [31:0] 246 * 5. DST_ADDR_HI [15:0] 247 * 6. COMMAND [29:22] | BYTE_COUNT [20:0] 248 */ 249#define R_410_CP_DMA_WORD0 0x410 /* 0x[packet number][word index] */ 250#define S_410_SRC_ADDR_LO(x) ((x) & 0xffffffff) 251#define R_411_CP_DMA_WORD1 0x411 252#define S_411_CP_SYNC(x) (((unsigned)(x) & 0x1) << 31) 253#define S_411_SRC_SEL(x) (((unsigned)(x) & 0x3) << 29) 254#define V_411_SRC_ADDR 0 255#define V_411_GDS 1 /* program SAS to 1 as well */ 256#define V_411_DATA 2 257#define V_411_SRC_ADDR_TC_L2 3 /* new for CIK */ 258#define S_411_ENGINE(x) (((unsigned)(x) & 0x1) << 27) 259#define V_411_ME 0 260#define V_411_PFP 1 261#define S_411_DST_SEL(x) (((unsigned)(x) & 0x3) << 20) 262#define V_411_DST_ADDR 0 263#define V_411_GDS 1 /* program DAS to 1 as well */ 264#define V_411_NOWHERE 2 /* new for GFX9 */ 265#define V_411_DST_ADDR_TC_L2 3 /* new for CIK */ 266#define S_411_SRC_ADDR_HI(x) ((x) & 0xffff) 267#define R_412_CP_DMA_WORD2 0x412 /* 0x[packet number][word index] */ 268#define S_412_DST_ADDR_LO(x) ((x) & 0xffffffff) 269#define R_413_CP_DMA_WORD3 0x413 /* 0x[packet number][word index] */ 270#define S_413_DST_ADDR_HI(x) ((x) & 0xffff) 271#define R_414_COMMAND 0x414 272#define S_414_BYTE_COUNT_GFX6(x) ((x) & 0x1fffff) 273#define S_414_BYTE_COUNT_GFX9(x) ((x) & 0x3ffffff) 274#define S_414_DISABLE_WR_CONFIRM_GFX6(x) (((unsigned)(x) & 0x1) << 21) /* not on GFX9 */ 275#define S_414_SRC_SWAP(x) (((unsigned)(x) & 0x3) << 22) /* not on GFX9 */ 276#define V_414_NONE 0 277#define V_414_8_IN_16 1 278#define V_414_8_IN_32 2 279#define V_414_8_IN_64 3 280#define S_414_DST_SWAP(x) (((unsigned)(x) & 0x3) << 24) /* not on GFX9 */ 281#define V_414_NONE 0 282#define V_414_8_IN_16 1 283#define V_414_8_IN_32 2 284#define V_414_8_IN_64 3 285#define S_414_SAS(x) (((unsigned)(x) & 0x1) << 26) 286#define V_414_MEMORY 0 287#define V_414_REGISTER 1 288#define S_414_DAS(x) (((unsigned)(x) & 0x1) << 27) 289#define V_414_MEMORY 0 290#define V_414_REGISTER 1 291#define S_414_SAIC(x) (((unsigned)(x) & 0x1) << 28) 292#define V_414_INCREMENT 0 293#define V_414_NO_INCREMENT 1 294#define S_414_DAIC(x) (((unsigned)(x) & 0x1) << 29) 295#define V_414_INCREMENT 0 296#define V_414_NO_INCREMENT 1 297#define S_414_RAW_WAIT(x) (((unsigned)(x) & 0x1) << 30) 298#define S_414_DISABLE_WR_CONFIRM_GFX9(x) (((unsigned)(x) & 0x1) << 31) 299 300#define PKT3_DMA_DATA 0x50 /* new for CIK */ 301/* 1. header 302 * 2. CP_SYNC [31] | SRC_SEL [30:29] | DST_SEL [21:20] | ENGINE [0] 303 * 2. SRC_ADDR_LO [31:0] or DATA [31:0] 304 * 3. SRC_ADDR_HI [31:0] 305 * 4. DST_ADDR_LO [31:0] 306 * 5. DST_ADDR_HI [31:0] 307 * 6. COMMAND [29:22] | BYTE_COUNT [20:0] 308 */ 309#define R_500_DMA_DATA_WORD0 0x500 /* 0x[packet number][word index] */ 310#define S_500_CP_SYNC(x) (((unsigned)(x) & 0x1) << 31) 311#define S_500_SRC_SEL(x) (((unsigned)(x) & 0x3) << 29) 312#define V_500_SRC_ADDR 0 313#define V_500_GDS 1 /* program SAS to 1 as well */ 314#define V_500_DATA 2 315#define V_500_SRC_ADDR_TC_L2 3 /* new for CIK */ 316#define S_500_DST_CACHE_POLICY(x) (((unsigned)(x) & 0x3) << 25) /* CIK+ */ 317#define S_500_DST_SEL(x) (((unsigned)(x) & 0x3) << 20) 318#define V_500_DST_ADDR 0 319#define V_500_GDS 1 /* program DAS to 1 as well */ 320#define V_500_NOWHERE 2 /* new for GFX9 */ 321#define V_500_DST_ADDR_TC_L2 3 /* new for CIK */ 322#define S_500_SRC_CACHE_POLICY(x) (((unsigned)(x) & 0x3) << 13) /* CIK+ */ 323#define S_500_ENGINE(x) ((x) & 0x1) 324#define V_500_ME 0 325#define V_500_PFP 1 326#define R_501_SRC_ADDR_LO 0x501 327#define R_502_SRC_ADDR_HI 0x502 328#define R_503_DST_ADDR_LO 0x503 329#define R_504_DST_ADDR_HI 0x504 330 331#define R_000E4C_SRBM_STATUS2 0x000E4C 332#define S_000E4C_SDMA_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 0) 333#define G_000E4C_SDMA_RQ_PENDING(x) (((x) >> 0) & 0x1) 334#define C_000E4C_SDMA_RQ_PENDING 0xFFFFFFFE 335#define S_000E4C_TST_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 1) 336#define G_000E4C_TST_RQ_PENDING(x) (((x) >> 1) & 0x1) 337#define C_000E4C_TST_RQ_PENDING 0xFFFFFFFD 338#define S_000E4C_SDMA1_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 2) 339#define G_000E4C_SDMA1_RQ_PENDING(x) (((x) >> 2) & 0x1) 340#define C_000E4C_SDMA1_RQ_PENDING 0xFFFFFFFB 341#define S_000E4C_VCE0_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 3) 342#define G_000E4C_VCE0_RQ_PENDING(x) (((x) >> 3) & 0x1) 343#define C_000E4C_VCE0_RQ_PENDING 0xFFFFFFF7 344#define S_000E4C_VP8_BUSY(x) (((unsigned)(x) & 0x1) << 4) 345#define G_000E4C_VP8_BUSY(x) (((x) >> 4) & 0x1) 346#define C_000E4C_VP8_BUSY 0xFFFFFFEF 347#define S_000E4C_SDMA_BUSY(x) (((unsigned)(x) & 0x1) << 5) 348#define G_000E4C_SDMA_BUSY(x) (((x) >> 5) & 0x1) 349#define C_000E4C_SDMA_BUSY 0xFFFFFFDF 350#define S_000E4C_SDMA1_BUSY(x) (((unsigned)(x) & 0x1) << 6) 351#define G_000E4C_SDMA1_BUSY(x) (((x) >> 6) & 0x1) 352#define C_000E4C_SDMA1_BUSY 0xFFFFFFBF 353#define S_000E4C_VCE0_BUSY(x) (((unsigned)(x) & 0x1) << 7) 354#define G_000E4C_VCE0_BUSY(x) (((x) >> 7) & 0x1) 355#define C_000E4C_VCE0_BUSY 0xFFFFFF7F 356#define S_000E4C_XDMA_BUSY(x) (((unsigned)(x) & 0x1) << 8) 357#define G_000E4C_XDMA_BUSY(x) (((x) >> 8) & 0x1) 358#define C_000E4C_XDMA_BUSY 0xFFFFFEFF 359#define S_000E4C_CHUB_BUSY(x) (((unsigned)(x) & 0x1) << 9) 360#define G_000E4C_CHUB_BUSY(x) (((x) >> 9) & 0x1) 361#define C_000E4C_CHUB_BUSY 0xFFFFFDFF 362#define S_000E4C_SDMA2_BUSY(x) (((unsigned)(x) & 0x1) << 10) 363#define G_000E4C_SDMA2_BUSY(x) (((x) >> 10) & 0x1) 364#define C_000E4C_SDMA2_BUSY 0xFFFFFBFF 365#define S_000E4C_SDMA3_BUSY(x) (((unsigned)(x) & 0x1) << 11) 366#define G_000E4C_SDMA3_BUSY(x) (((x) >> 11) & 0x1) 367#define C_000E4C_SDMA3_BUSY 0xFFFFF7FF 368#define S_000E4C_SAMSCP_BUSY(x) (((unsigned)(x) & 0x1) << 12) 369#define G_000E4C_SAMSCP_BUSY(x) (((x) >> 12) & 0x1) 370#define C_000E4C_SAMSCP_BUSY 0xFFFFEFFF 371#define S_000E4C_ISP_BUSY(x) (((unsigned)(x) & 0x1) << 13) 372#define G_000E4C_ISP_BUSY(x) (((x) >> 13) & 0x1) 373#define C_000E4C_ISP_BUSY 0xFFFFDFFF 374#define S_000E4C_VCE1_BUSY(x) (((unsigned)(x) & 0x1) << 14) 375#define G_000E4C_VCE1_BUSY(x) (((x) >> 14) & 0x1) 376#define C_000E4C_VCE1_BUSY 0xFFFFBFFF 377#define S_000E4C_ODE_BUSY(x) (((unsigned)(x) & 0x1) << 15) 378#define G_000E4C_ODE_BUSY(x) (((x) >> 15) & 0x1) 379#define C_000E4C_ODE_BUSY 0xFFFF7FFF 380#define S_000E4C_SDMA2_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 16) 381#define G_000E4C_SDMA2_RQ_PENDING(x) (((x) >> 16) & 0x1) 382#define C_000E4C_SDMA2_RQ_PENDING 0xFFFEFFFF 383#define S_000E4C_SDMA3_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 17) 384#define G_000E4C_SDMA3_RQ_PENDING(x) (((x) >> 17) & 0x1) 385#define C_000E4C_SDMA3_RQ_PENDING 0xFFFDFFFF 386#define S_000E4C_SAMSCP_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 18) 387#define G_000E4C_SAMSCP_RQ_PENDING(x) (((x) >> 18) & 0x1) 388#define C_000E4C_SAMSCP_RQ_PENDING 0xFFFBFFFF 389#define S_000E4C_ISP_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 19) 390#define G_000E4C_ISP_RQ_PENDING(x) (((x) >> 19) & 0x1) 391#define C_000E4C_ISP_RQ_PENDING 0xFFF7FFFF 392#define S_000E4C_VCE1_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 20) 393#define G_000E4C_VCE1_RQ_PENDING(x) (((x) >> 20) & 0x1) 394#define C_000E4C_VCE1_RQ_PENDING 0xFFEFFFFF 395#define R_000E50_SRBM_STATUS 0x000E50 396#define S_000E50_UVD_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 1) 397#define G_000E50_UVD_RQ_PENDING(x) (((x) >> 1) & 0x1) 398#define C_000E50_UVD_RQ_PENDING 0xFFFFFFFD 399#define S_000E50_SAMMSP_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 2) 400#define G_000E50_SAMMSP_RQ_PENDING(x) (((x) >> 2) & 0x1) 401#define C_000E50_SAMMSP_RQ_PENDING 0xFFFFFFFB 402#define S_000E50_ACP_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 3) 403#define G_000E50_ACP_RQ_PENDING(x) (((x) >> 3) & 0x1) 404#define C_000E50_ACP_RQ_PENDING 0xFFFFFFF7 405#define S_000E50_SMU_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 4) 406#define G_000E50_SMU_RQ_PENDING(x) (((x) >> 4) & 0x1) 407#define C_000E50_SMU_RQ_PENDING 0xFFFFFFEF 408#define S_000E50_GRBM_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 5) 409#define G_000E50_GRBM_RQ_PENDING(x) (((x) >> 5) & 0x1) 410#define C_000E50_GRBM_RQ_PENDING 0xFFFFFFDF 411#define S_000E50_HI_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 6) 412#define G_000E50_HI_RQ_PENDING(x) (((x) >> 6) & 0x1) 413#define C_000E50_HI_RQ_PENDING 0xFFFFFFBF 414#define S_000E50_VMC_BUSY(x) (((unsigned)(x) & 0x1) << 8) 415#define G_000E50_VMC_BUSY(x) (((x) >> 8) & 0x1) 416#define C_000E50_VMC_BUSY 0xFFFFFEFF 417#define S_000E50_MCB_BUSY(x) (((unsigned)(x) & 0x1) << 9) 418#define G_000E50_MCB_BUSY(x) (((x) >> 9) & 0x1) 419#define C_000E50_MCB_BUSY 0xFFFFFDFF 420#define S_000E50_MCB_NON_DISPLAY_BUSY(x) (((unsigned)(x) & 0x1) << 10) 421#define G_000E50_MCB_NON_DISPLAY_BUSY(x) (((x) >> 10) & 0x1) 422#define C_000E50_MCB_NON_DISPLAY_BUSY 0xFFFFFBFF 423#define S_000E50_MCC_BUSY(x) (((unsigned)(x) & 0x1) << 11) 424#define G_000E50_MCC_BUSY(x) (((x) >> 11) & 0x1) 425#define C_000E50_MCC_BUSY 0xFFFFF7FF 426#define S_000E50_MCD_BUSY(x) (((unsigned)(x) & 0x1) << 12) 427#define G_000E50_MCD_BUSY(x) (((x) >> 12) & 0x1) 428#define C_000E50_MCD_BUSY 0xFFFFEFFF 429#define S_000E50_VMC1_BUSY(x) (((unsigned)(x) & 0x1) << 13) 430#define G_000E50_VMC1_BUSY(x) (((x) >> 13) & 0x1) 431#define C_000E50_VMC1_BUSY 0xFFFFDFFF 432#define S_000E50_SEM_BUSY(x) (((unsigned)(x) & 0x1) << 14) 433#define G_000E50_SEM_BUSY(x) (((x) >> 14) & 0x1) 434#define C_000E50_SEM_BUSY 0xFFFFBFFF 435#define S_000E50_ACP_BUSY(x) (((unsigned)(x) & 0x1) << 16) 436#define G_000E50_ACP_BUSY(x) (((x) >> 16) & 0x1) 437#define C_000E50_ACP_BUSY 0xFFFEFFFF 438#define S_000E50_IH_BUSY(x) (((unsigned)(x) & 0x1) << 17) 439#define G_000E50_IH_BUSY(x) (((x) >> 17) & 0x1) 440#define C_000E50_IH_BUSY 0xFFFDFFFF 441#define S_000E50_UVD_BUSY(x) (((unsigned)(x) & 0x1) << 19) 442#define G_000E50_UVD_BUSY(x) (((x) >> 19) & 0x1) 443#define C_000E50_UVD_BUSY 0xFFF7FFFF 444#define S_000E50_SAMMSP_BUSY(x) (((unsigned)(x) & 0x1) << 20) 445#define G_000E50_SAMMSP_BUSY(x) (((x) >> 20) & 0x1) 446#define C_000E50_SAMMSP_BUSY 0xFFEFFFFF 447#define S_000E50_GCATCL2_BUSY(x) (((unsigned)(x) & 0x1) << 21) 448#define G_000E50_GCATCL2_BUSY(x) (((x) >> 21) & 0x1) 449#define C_000E50_GCATCL2_BUSY 0xFFDFFFFF 450#define S_000E50_OSATCL2_BUSY(x) (((unsigned)(x) & 0x1) << 22) 451#define G_000E50_OSATCL2_BUSY(x) (((x) >> 22) & 0x1) 452#define C_000E50_OSATCL2_BUSY 0xFFBFFFFF 453#define S_000E50_BIF_BUSY(x) (((unsigned)(x) & 0x1) << 29) 454#define G_000E50_BIF_BUSY(x) (((x) >> 29) & 0x1) 455#define C_000E50_BIF_BUSY 0xDFFFFFFF 456#define R_000E54_SRBM_STATUS3 0x000E54 457#define S_000E54_MCC0_BUSY(x) (((unsigned)(x) & 0x1) << 0) 458#define G_000E54_MCC0_BUSY(x) (((x) >> 0) & 0x1) 459#define C_000E54_MCC0_BUSY 0xFFFFFFFE 460#define S_000E54_MCC1_BUSY(x) (((unsigned)(x) & 0x1) << 1) 461#define G_000E54_MCC1_BUSY(x) (((x) >> 1) & 0x1) 462#define C_000E54_MCC1_BUSY 0xFFFFFFFD 463#define S_000E54_MCC2_BUSY(x) (((unsigned)(x) & 0x1) << 2) 464#define G_000E54_MCC2_BUSY(x) (((x) >> 2) & 0x1) 465#define C_000E54_MCC2_BUSY 0xFFFFFFFB 466#define S_000E54_MCC3_BUSY(x) (((unsigned)(x) & 0x1) << 3) 467#define G_000E54_MCC3_BUSY(x) (((x) >> 3) & 0x1) 468#define C_000E54_MCC3_BUSY 0xFFFFFFF7 469#define S_000E54_MCC4_BUSY(x) (((unsigned)(x) & 0x1) << 4) 470#define G_000E54_MCC4_BUSY(x) (((x) >> 4) & 0x1) 471#define C_000E54_MCC4_BUSY 0xFFFFFFEF 472#define S_000E54_MCC5_BUSY(x) (((unsigned)(x) & 0x1) << 5) 473#define G_000E54_MCC5_BUSY(x) (((x) >> 5) & 0x1) 474#define C_000E54_MCC5_BUSY 0xFFFFFFDF 475#define S_000E54_MCC6_BUSY(x) (((unsigned)(x) & 0x1) << 6) 476#define G_000E54_MCC6_BUSY(x) (((x) >> 6) & 0x1) 477#define C_000E54_MCC6_BUSY 0xFFFFFFBF 478#define S_000E54_MCC7_BUSY(x) (((unsigned)(x) & 0x1) << 7) 479#define G_000E54_MCC7_BUSY(x) (((x) >> 7) & 0x1) 480#define C_000E54_MCC7_BUSY 0xFFFFFF7F 481#define S_000E54_MCD0_BUSY(x) (((unsigned)(x) & 0x1) << 8) 482#define G_000E54_MCD0_BUSY(x) (((x) >> 8) & 0x1) 483#define C_000E54_MCD0_BUSY 0xFFFFFEFF 484#define S_000E54_MCD1_BUSY(x) (((unsigned)(x) & 0x1) << 9) 485#define G_000E54_MCD1_BUSY(x) (((x) >> 9) & 0x1) 486#define C_000E54_MCD1_BUSY 0xFFFFFDFF 487#define S_000E54_MCD2_BUSY(x) (((unsigned)(x) & 0x1) << 10) 488#define G_000E54_MCD2_BUSY(x) (((x) >> 10) & 0x1) 489#define C_000E54_MCD2_BUSY 0xFFFFFBFF 490#define S_000E54_MCD3_BUSY(x) (((unsigned)(x) & 0x1) << 11) 491#define G_000E54_MCD3_BUSY(x) (((x) >> 11) & 0x1) 492#define C_000E54_MCD3_BUSY 0xFFFFF7FF 493#define S_000E54_MCD4_BUSY(x) (((unsigned)(x) & 0x1) << 12) 494#define G_000E54_MCD4_BUSY(x) (((x) >> 12) & 0x1) 495#define C_000E54_MCD4_BUSY 0xFFFFEFFF 496#define S_000E54_MCD5_BUSY(x) (((unsigned)(x) & 0x1) << 13) 497#define G_000E54_MCD5_BUSY(x) (((x) >> 13) & 0x1) 498#define C_000E54_MCD5_BUSY 0xFFFFDFFF 499#define S_000E54_MCD6_BUSY(x) (((unsigned)(x) & 0x1) << 14) 500#define G_000E54_MCD6_BUSY(x) (((x) >> 14) & 0x1) 501#define C_000E54_MCD6_BUSY 0xFFFFBFFF 502#define S_000E54_MCD7_BUSY(x) (((unsigned)(x) & 0x1) << 15) 503#define G_000E54_MCD7_BUSY(x) (((x) >> 15) & 0x1) 504#define C_000E54_MCD7_BUSY 0xFFFF7FFF 505#define R_00D034_SDMA0_STATUS_REG 0x00D034 506#define S_00D034_IDLE(x) (((unsigned)(x) & 0x1) << 0) 507#define G_00D034_IDLE(x) (((x) >> 0) & 0x1) 508#define C_00D034_IDLE 0xFFFFFFFE 509#define S_00D034_REG_IDLE(x) (((unsigned)(x) & 0x1) << 1) 510#define G_00D034_REG_IDLE(x) (((x) >> 1) & 0x1) 511#define C_00D034_REG_IDLE 0xFFFFFFFD 512#define S_00D034_RB_EMPTY(x) (((unsigned)(x) & 0x1) << 2) 513#define G_00D034_RB_EMPTY(x) (((x) >> 2) & 0x1) 514#define C_00D034_RB_EMPTY 0xFFFFFFFB 515#define S_00D034_RB_FULL(x) (((unsigned)(x) & 0x1) << 3) 516#define G_00D034_RB_FULL(x) (((x) >> 3) & 0x1) 517#define C_00D034_RB_FULL 0xFFFFFFF7 518#define S_00D034_RB_CMD_IDLE(x) (((unsigned)(x) & 0x1) << 4) 519#define G_00D034_RB_CMD_IDLE(x) (((x) >> 4) & 0x1) 520#define C_00D034_RB_CMD_IDLE 0xFFFFFFEF 521#define S_00D034_RB_CMD_FULL(x) (((unsigned)(x) & 0x1) << 5) 522#define G_00D034_RB_CMD_FULL(x) (((x) >> 5) & 0x1) 523#define C_00D034_RB_CMD_FULL 0xFFFFFFDF 524#define S_00D034_IB_CMD_IDLE(x) (((unsigned)(x) & 0x1) << 6) 525#define G_00D034_IB_CMD_IDLE(x) (((x) >> 6) & 0x1) 526#define C_00D034_IB_CMD_IDLE 0xFFFFFFBF 527#define S_00D034_IB_CMD_FULL(x) (((unsigned)(x) & 0x1) << 7) 528#define G_00D034_IB_CMD_FULL(x) (((x) >> 7) & 0x1) 529#define C_00D034_IB_CMD_FULL 0xFFFFFF7F 530#define S_00D034_BLOCK_IDLE(x) (((unsigned)(x) & 0x1) << 8) 531#define G_00D034_BLOCK_IDLE(x) (((x) >> 8) & 0x1) 532#define C_00D034_BLOCK_IDLE 0xFFFFFEFF 533#define S_00D034_INSIDE_IB(x) (((unsigned)(x) & 0x1) << 9) 534#define G_00D034_INSIDE_IB(x) (((x) >> 9) & 0x1) 535#define C_00D034_INSIDE_IB 0xFFFFFDFF 536#define S_00D034_EX_IDLE(x) (((unsigned)(x) & 0x1) << 10) 537#define G_00D034_EX_IDLE(x) (((x) >> 10) & 0x1) 538#define C_00D034_EX_IDLE 0xFFFFFBFF 539#define S_00D034_EX_IDLE_POLL_TIMER_EXPIRE(x) (((unsigned)(x) & 0x1) << 11) 540#define G_00D034_EX_IDLE_POLL_TIMER_EXPIRE(x) (((x) >> 11) & 0x1) 541#define C_00D034_EX_IDLE_POLL_TIMER_EXPIRE 0xFFFFF7FF 542#define S_00D034_PACKET_READY(x) (((unsigned)(x) & 0x1) << 12) 543#define G_00D034_PACKET_READY(x) (((x) >> 12) & 0x1) 544#define C_00D034_PACKET_READY 0xFFFFEFFF 545#define S_00D034_MC_WR_IDLE(x) (((unsigned)(x) & 0x1) << 13) 546#define G_00D034_MC_WR_IDLE(x) (((x) >> 13) & 0x1) 547#define C_00D034_MC_WR_IDLE 0xFFFFDFFF 548#define S_00D034_SRBM_IDLE(x) (((unsigned)(x) & 0x1) << 14) 549#define G_00D034_SRBM_IDLE(x) (((x) >> 14) & 0x1) 550#define C_00D034_SRBM_IDLE 0xFFFFBFFF 551#define S_00D034_CONTEXT_EMPTY(x) (((unsigned)(x) & 0x1) << 15) 552#define G_00D034_CONTEXT_EMPTY(x) (((x) >> 15) & 0x1) 553#define C_00D034_CONTEXT_EMPTY 0xFFFF7FFF 554#define S_00D034_DELTA_RPTR_FULL(x) (((unsigned)(x) & 0x1) << 16) 555#define G_00D034_DELTA_RPTR_FULL(x) (((x) >> 16) & 0x1) 556#define C_00D034_DELTA_RPTR_FULL 0xFFFEFFFF 557#define S_00D034_RB_MC_RREQ_IDLE(x) (((unsigned)(x) & 0x1) << 17) 558#define G_00D034_RB_MC_RREQ_IDLE(x) (((x) >> 17) & 0x1) 559#define C_00D034_RB_MC_RREQ_IDLE 0xFFFDFFFF 560#define S_00D034_IB_MC_RREQ_IDLE(x) (((unsigned)(x) & 0x1) << 18) 561#define G_00D034_IB_MC_RREQ_IDLE(x) (((x) >> 18) & 0x1) 562#define C_00D034_IB_MC_RREQ_IDLE 0xFFFBFFFF 563#define S_00D034_MC_RD_IDLE(x) (((unsigned)(x) & 0x1) << 19) 564#define G_00D034_MC_RD_IDLE(x) (((x) >> 19) & 0x1) 565#define C_00D034_MC_RD_IDLE 0xFFF7FFFF 566#define S_00D034_DELTA_RPTR_EMPTY(x) (((unsigned)(x) & 0x1) << 20) 567#define G_00D034_DELTA_RPTR_EMPTY(x) (((x) >> 20) & 0x1) 568#define C_00D034_DELTA_RPTR_EMPTY 0xFFEFFFFF 569#define S_00D034_MC_RD_RET_STALL(x) (((unsigned)(x) & 0x1) << 21) 570#define G_00D034_MC_RD_RET_STALL(x) (((x) >> 21) & 0x1) 571#define C_00D034_MC_RD_RET_STALL 0xFFDFFFFF 572#define S_00D034_MC_RD_NO_POLL_IDLE(x) (((unsigned)(x) & 0x1) << 22) 573#define G_00D034_MC_RD_NO_POLL_IDLE(x) (((x) >> 22) & 0x1) 574#define C_00D034_MC_RD_NO_POLL_IDLE 0xFFBFFFFF 575#define S_00D034_PREV_CMD_IDLE(x) (((unsigned)(x) & 0x1) << 25) 576#define G_00D034_PREV_CMD_IDLE(x) (((x) >> 25) & 0x1) 577#define C_00D034_PREV_CMD_IDLE 0xFDFFFFFF 578#define S_00D034_SEM_IDLE(x) (((unsigned)(x) & 0x1) << 26) 579#define G_00D034_SEM_IDLE(x) (((x) >> 26) & 0x1) 580#define C_00D034_SEM_IDLE 0xFBFFFFFF 581#define S_00D034_SEM_REQ_STALL(x) (((unsigned)(x) & 0x1) << 27) 582#define G_00D034_SEM_REQ_STALL(x) (((x) >> 27) & 0x1) 583#define C_00D034_SEM_REQ_STALL 0xF7FFFFFF 584#define S_00D034_SEM_RESP_STATE(x) (((unsigned)(x) & 0x03) << 28) 585#define G_00D034_SEM_RESP_STATE(x) (((x) >> 28) & 0x03) 586#define C_00D034_SEM_RESP_STATE 0xCFFFFFFF 587#define S_00D034_INT_IDLE(x) (((unsigned)(x) & 0x1) << 30) 588#define G_00D034_INT_IDLE(x) (((x) >> 30) & 0x1) 589#define C_00D034_INT_IDLE 0xBFFFFFFF 590#define S_00D034_INT_REQ_STALL(x) (((unsigned)(x) & 0x1) << 31) 591#define G_00D034_INT_REQ_STALL(x) (((x) >> 31) & 0x1) 592#define C_00D034_INT_REQ_STALL 0x7FFFFFFF 593#define R_00D834_SDMA1_STATUS_REG 0x00D834 594#define R_008008_GRBM_STATUS2 0x008008 595#define S_008008_ME0PIPE1_CMDFIFO_AVAIL(x) (((unsigned)(x) & 0x0F) << 0) 596#define G_008008_ME0PIPE1_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x0F) 597#define C_008008_ME0PIPE1_CMDFIFO_AVAIL 0xFFFFFFF0 598#define S_008008_ME0PIPE1_CF_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 4) 599#define G_008008_ME0PIPE1_CF_RQ_PENDING(x) (((x) >> 4) & 0x1) 600#define C_008008_ME0PIPE1_CF_RQ_PENDING 0xFFFFFFEF 601#define S_008008_ME0PIPE1_PF_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 5) 602#define G_008008_ME0PIPE1_PF_RQ_PENDING(x) (((x) >> 5) & 0x1) 603#define C_008008_ME0PIPE1_PF_RQ_PENDING 0xFFFFFFDF 604#define S_008008_ME1PIPE0_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 6) 605#define G_008008_ME1PIPE0_RQ_PENDING(x) (((x) >> 6) & 0x1) 606#define C_008008_ME1PIPE0_RQ_PENDING 0xFFFFFFBF 607#define S_008008_ME1PIPE1_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 7) 608#define G_008008_ME1PIPE1_RQ_PENDING(x) (((x) >> 7) & 0x1) 609#define C_008008_ME1PIPE1_RQ_PENDING 0xFFFFFF7F 610#define S_008008_ME1PIPE2_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 8) 611#define G_008008_ME1PIPE2_RQ_PENDING(x) (((x) >> 8) & 0x1) 612#define C_008008_ME1PIPE2_RQ_PENDING 0xFFFFFEFF 613#define S_008008_ME1PIPE3_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 9) 614#define G_008008_ME1PIPE3_RQ_PENDING(x) (((x) >> 9) & 0x1) 615#define C_008008_ME1PIPE3_RQ_PENDING 0xFFFFFDFF 616#define S_008008_ME2PIPE0_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 10) 617#define G_008008_ME2PIPE0_RQ_PENDING(x) (((x) >> 10) & 0x1) 618#define C_008008_ME2PIPE0_RQ_PENDING 0xFFFFFBFF 619#define S_008008_ME2PIPE1_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 11) 620#define G_008008_ME2PIPE1_RQ_PENDING(x) (((x) >> 11) & 0x1) 621#define C_008008_ME2PIPE1_RQ_PENDING 0xFFFFF7FF 622#define S_008008_ME2PIPE2_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 12) 623#define G_008008_ME2PIPE2_RQ_PENDING(x) (((x) >> 12) & 0x1) 624#define C_008008_ME2PIPE2_RQ_PENDING 0xFFFFEFFF 625#define S_008008_ME2PIPE3_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 13) 626#define G_008008_ME2PIPE3_RQ_PENDING(x) (((x) >> 13) & 0x1) 627#define C_008008_ME2PIPE3_RQ_PENDING 0xFFFFDFFF 628#define S_008008_RLC_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 14) 629#define G_008008_RLC_RQ_PENDING(x) (((x) >> 14) & 0x1) 630#define C_008008_RLC_RQ_PENDING 0xFFFFBFFF 631#define S_008008_RLC_BUSY(x) (((unsigned)(x) & 0x1) << 24) 632#define G_008008_RLC_BUSY(x) (((x) >> 24) & 0x1) 633#define C_008008_RLC_BUSY 0xFEFFFFFF 634#define S_008008_TC_BUSY(x) (((unsigned)(x) & 0x1) << 25) 635#define G_008008_TC_BUSY(x) (((x) >> 25) & 0x1) 636#define C_008008_TC_BUSY 0xFDFFFFFF 637#define S_008008_TCC_CC_RESIDENT(x) (((unsigned)(x) & 0x1) << 26) 638#define G_008008_TCC_CC_RESIDENT(x) (((x) >> 26) & 0x1) 639#define C_008008_TCC_CC_RESIDENT 0xFBFFFFFF 640#define S_008008_CPF_BUSY(x) (((unsigned)(x) & 0x1) << 28) 641#define G_008008_CPF_BUSY(x) (((x) >> 28) & 0x1) 642#define C_008008_CPF_BUSY 0xEFFFFFFF 643#define S_008008_CPC_BUSY(x) (((unsigned)(x) & 0x1) << 29) 644#define G_008008_CPC_BUSY(x) (((x) >> 29) & 0x1) 645#define C_008008_CPC_BUSY 0xDFFFFFFF 646#define S_008008_CPG_BUSY(x) (((unsigned)(x) & 0x1) << 30) 647#define G_008008_CPG_BUSY(x) (((x) >> 30) & 0x1) 648#define C_008008_CPG_BUSY 0xBFFFFFFF 649#define R_008010_GRBM_STATUS 0x008010 650#define S_008010_ME0PIPE0_CMDFIFO_AVAIL(x) (((unsigned)(x) & 0x0F) << 0) 651#define G_008010_ME0PIPE0_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x0F) 652#define C_008010_ME0PIPE0_CMDFIFO_AVAIL 0xFFFFFFF0 653#define S_008010_SRBM_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 5) 654#define G_008010_SRBM_RQ_PENDING(x) (((x) >> 5) & 0x1) 655#define C_008010_SRBM_RQ_PENDING 0xFFFFFFDF 656#define S_008010_ME0PIPE0_CF_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 7) 657#define G_008010_ME0PIPE0_CF_RQ_PENDING(x) (((x) >> 7) & 0x1) 658#define C_008010_ME0PIPE0_CF_RQ_PENDING 0xFFFFFF7F 659#define S_008010_ME0PIPE0_PF_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 8) 660#define G_008010_ME0PIPE0_PF_RQ_PENDING(x) (((x) >> 8) & 0x1) 661#define C_008010_ME0PIPE0_PF_RQ_PENDING 0xFFFFFEFF 662#define S_008010_GDS_DMA_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 9) 663#define G_008010_GDS_DMA_RQ_PENDING(x) (((x) >> 9) & 0x1) 664#define C_008010_GDS_DMA_RQ_PENDING 0xFFFFFDFF 665#define S_008010_DB_CLEAN(x) (((unsigned)(x) & 0x1) << 12) 666#define G_008010_DB_CLEAN(x) (((x) >> 12) & 0x1) 667#define C_008010_DB_CLEAN 0xFFFFEFFF 668#define S_008010_CB_CLEAN(x) (((unsigned)(x) & 0x1) << 13) 669#define G_008010_CB_CLEAN(x) (((x) >> 13) & 0x1) 670#define C_008010_CB_CLEAN 0xFFFFDFFF 671#define S_008010_TA_BUSY(x) (((unsigned)(x) & 0x1) << 14) 672#define G_008010_TA_BUSY(x) (((x) >> 14) & 0x1) 673#define C_008010_TA_BUSY 0xFFFFBFFF 674#define S_008010_GDS_BUSY(x) (((unsigned)(x) & 0x1) << 15) 675#define G_008010_GDS_BUSY(x) (((x) >> 15) & 0x1) 676#define C_008010_GDS_BUSY 0xFFFF7FFF 677#define S_008010_WD_BUSY_NO_DMA(x) (((unsigned)(x) & 0x1) << 16) 678#define G_008010_WD_BUSY_NO_DMA(x) (((x) >> 16) & 0x1) 679#define C_008010_WD_BUSY_NO_DMA 0xFFFEFFFF 680#define S_008010_VGT_BUSY(x) (((unsigned)(x) & 0x1) << 17) 681#define G_008010_VGT_BUSY(x) (((x) >> 17) & 0x1) 682#define C_008010_VGT_BUSY 0xFFFDFFFF 683#define S_008010_IA_BUSY_NO_DMA(x) (((unsigned)(x) & 0x1) << 18) 684#define G_008010_IA_BUSY_NO_DMA(x) (((x) >> 18) & 0x1) 685#define C_008010_IA_BUSY_NO_DMA 0xFFFBFFFF 686#define S_008010_IA_BUSY(x) (((unsigned)(x) & 0x1) << 19) 687#define G_008010_IA_BUSY(x) (((x) >> 19) & 0x1) 688#define C_008010_IA_BUSY 0xFFF7FFFF 689#define S_008010_SX_BUSY(x) (((unsigned)(x) & 0x1) << 20) 690#define G_008010_SX_BUSY(x) (((x) >> 20) & 0x1) 691#define C_008010_SX_BUSY 0xFFEFFFFF 692#define S_008010_WD_BUSY(x) (((unsigned)(x) & 0x1) << 21) 693#define G_008010_WD_BUSY(x) (((x) >> 21) & 0x1) 694#define C_008010_WD_BUSY 0xFFDFFFFF 695#define S_008010_SPI_BUSY(x) (((unsigned)(x) & 0x1) << 22) 696#define G_008010_SPI_BUSY(x) (((x) >> 22) & 0x1) 697#define C_008010_SPI_BUSY 0xFFBFFFFF 698#define S_008010_BCI_BUSY(x) (((unsigned)(x) & 0x1) << 23) 699#define G_008010_BCI_BUSY(x) (((x) >> 23) & 0x1) 700#define C_008010_BCI_BUSY 0xFF7FFFFF 701#define S_008010_SC_BUSY(x) (((unsigned)(x) & 0x1) << 24) 702#define G_008010_SC_BUSY(x) (((x) >> 24) & 0x1) 703#define C_008010_SC_BUSY 0xFEFFFFFF 704#define S_008010_PA_BUSY(x) (((unsigned)(x) & 0x1) << 25) 705#define G_008010_PA_BUSY(x) (((x) >> 25) & 0x1) 706#define C_008010_PA_BUSY 0xFDFFFFFF 707#define S_008010_DB_BUSY(x) (((unsigned)(x) & 0x1) << 26) 708#define G_008010_DB_BUSY(x) (((x) >> 26) & 0x1) 709#define C_008010_DB_BUSY 0xFBFFFFFF 710#define S_008010_CP_COHERENCY_BUSY(x) (((unsigned)(x) & 0x1) << 28) 711#define G_008010_CP_COHERENCY_BUSY(x) (((x) >> 28) & 0x1) 712#define C_008010_CP_COHERENCY_BUSY 0xEFFFFFFF 713#define S_008010_CP_BUSY(x) (((unsigned)(x) & 0x1) << 29) 714#define G_008010_CP_BUSY(x) (((x) >> 29) & 0x1) 715#define C_008010_CP_BUSY 0xDFFFFFFF 716#define S_008010_CB_BUSY(x) (((unsigned)(x) & 0x1) << 30) 717#define G_008010_CB_BUSY(x) (((x) >> 30) & 0x1) 718#define C_008010_CB_BUSY 0xBFFFFFFF 719#define S_008010_GUI_ACTIVE(x) (((unsigned)(x) & 0x1) << 31) 720#define G_008010_GUI_ACTIVE(x) (((x) >> 31) & 0x1) 721#define C_008010_GUI_ACTIVE 0x7FFFFFFF 722/* not on CIK -- moved to uconfig space */ 723#define R_00802C_GRBM_GFX_INDEX 0x802C 724#define S_00802C_INSTANCE_INDEX(x) (((unsigned)(x) & 0xFF) << 0) 725#define S_00802C_SH_INDEX(x) (((unsigned)(x) & 0xFF) << 8) 726#define S_00802C_SE_INDEX(x) (((unsigned)(x) & 0xFF) << 16) 727#define S_00802C_SH_BROADCAST_WRITES(x) (((unsigned)(x) & 0x1) << 29) 728#define S_00802C_INSTANCE_BROADCAST_WRITES(x) (((unsigned)(x) & 0x1) << 30) 729#define S_00802C_SE_BROADCAST_WRITES(x) (((unsigned)(x) & 0x1) << 31) 730#define R_0084FC_CP_STRMOUT_CNTL 0x0084FC 731#define S_0084FC_OFFSET_UPDATE_DONE(x) (((unsigned)(x) & 0x1) << 0) 732#define R_0085F0_CP_COHER_CNTL 0x0085F0 733#define S_0085F0_DEST_BASE_0_ENA(x) (((unsigned)(x) & 0x1) << 0) 734#define G_0085F0_DEST_BASE_0_ENA(x) (((x) >> 0) & 0x1) 735#define C_0085F0_DEST_BASE_0_ENA 0xFFFFFFFE 736#define S_0085F0_DEST_BASE_1_ENA(x) (((unsigned)(x) & 0x1) << 1) 737#define G_0085F0_DEST_BASE_1_ENA(x) (((x) >> 1) & 0x1) 738#define C_0085F0_DEST_BASE_1_ENA 0xFFFFFFFD 739#define S_0085F0_CB0_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 6) 740#define G_0085F0_CB0_DEST_BASE_ENA(x) (((x) >> 6) & 0x1) 741#define C_0085F0_CB0_DEST_BASE_ENA 0xFFFFFFBF 742#define S_0085F0_CB1_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 7) 743#define G_0085F0_CB1_DEST_BASE_ENA(x) (((x) >> 7) & 0x1) 744#define C_0085F0_CB1_DEST_BASE_ENA 0xFFFFFF7F 745#define S_0085F0_CB2_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 8) 746#define G_0085F0_CB2_DEST_BASE_ENA(x) (((x) >> 8) & 0x1) 747#define C_0085F0_CB2_DEST_BASE_ENA 0xFFFFFEFF 748#define S_0085F0_CB3_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 9) 749#define G_0085F0_CB3_DEST_BASE_ENA(x) (((x) >> 9) & 0x1) 750#define C_0085F0_CB3_DEST_BASE_ENA 0xFFFFFDFF 751#define S_0085F0_CB4_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 10) 752#define G_0085F0_CB4_DEST_BASE_ENA(x) (((x) >> 10) & 0x1) 753#define C_0085F0_CB4_DEST_BASE_ENA 0xFFFFFBFF 754#define S_0085F0_CB5_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 11) 755#define G_0085F0_CB5_DEST_BASE_ENA(x) (((x) >> 11) & 0x1) 756#define C_0085F0_CB5_DEST_BASE_ENA 0xFFFFF7FF 757#define S_0085F0_CB6_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 12) 758#define G_0085F0_CB6_DEST_BASE_ENA(x) (((x) >> 12) & 0x1) 759#define C_0085F0_CB6_DEST_BASE_ENA 0xFFFFEFFF 760#define S_0085F0_CB7_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 13) 761#define G_0085F0_CB7_DEST_BASE_ENA(x) (((x) >> 13) & 0x1) 762#define C_0085F0_CB7_DEST_BASE_ENA 0xFFFFDFFF 763#define S_0085F0_DB_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 14) 764#define G_0085F0_DB_DEST_BASE_ENA(x) (((x) >> 14) & 0x1) 765#define C_0085F0_DB_DEST_BASE_ENA 0xFFFFBFFF 766#define S_0085F0_DEST_BASE_2_ENA(x) (((unsigned)(x) & 0x1) << 19) 767#define G_0085F0_DEST_BASE_2_ENA(x) (((x) >> 19) & 0x1) 768#define C_0085F0_DEST_BASE_2_ENA 0xFFF7FFFF 769#define S_0085F0_DEST_BASE_3_ENA(x) (((unsigned)(x) & 0x1) << 21) 770#define G_0085F0_DEST_BASE_3_ENA(x) (((x) >> 21) & 0x1) 771#define C_0085F0_DEST_BASE_3_ENA 0xFFDFFFFF 772#define S_0085F0_TCL1_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 22) 773#define G_0085F0_TCL1_ACTION_ENA(x) (((x) >> 22) & 0x1) 774#define C_0085F0_TCL1_ACTION_ENA 0xFFBFFFFF 775#define S_0085F0_TC_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 23) 776#define G_0085F0_TC_ACTION_ENA(x) (((x) >> 23) & 0x1) 777#define C_0085F0_TC_ACTION_ENA 0xFF7FFFFF 778#define S_0085F0_CB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 25) 779#define G_0085F0_CB_ACTION_ENA(x) (((x) >> 25) & 0x1) 780#define C_0085F0_CB_ACTION_ENA 0xFDFFFFFF 781#define S_0085F0_DB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 26) 782#define G_0085F0_DB_ACTION_ENA(x) (((x) >> 26) & 0x1) 783#define C_0085F0_DB_ACTION_ENA 0xFBFFFFFF 784#define S_0085F0_SH_KCACHE_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 27) 785#define G_0085F0_SH_KCACHE_ACTION_ENA(x) (((x) >> 27) & 0x1) 786#define C_0085F0_SH_KCACHE_ACTION_ENA 0xF7FFFFFF 787#define S_0085F0_SH_ICACHE_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 29) 788#define G_0085F0_SH_ICACHE_ACTION_ENA(x) (((x) >> 29) & 0x1) 789#define C_0085F0_SH_ICACHE_ACTION_ENA 0xDFFFFFFF 790#define R_0085F4_CP_COHER_SIZE 0x0085F4 791#define R_0085F8_CP_COHER_BASE 0x0085F8 792/* */ 793#define R_008014_GRBM_STATUS_SE0 0x008014 794#define S_008014_DB_CLEAN(x) (((unsigned)(x) & 0x1) << 1) 795#define G_008014_DB_CLEAN(x) (((x) >> 1) & 0x1) 796#define C_008014_DB_CLEAN 0xFFFFFFFD 797#define S_008014_CB_CLEAN(x) (((unsigned)(x) & 0x1) << 2) 798#define G_008014_CB_CLEAN(x) (((x) >> 2) & 0x1) 799#define C_008014_CB_CLEAN 0xFFFFFFFB 800#define S_008014_BCI_BUSY(x) (((unsigned)(x) & 0x1) << 22) 801#define G_008014_BCI_BUSY(x) (((x) >> 22) & 0x1) 802#define C_008014_BCI_BUSY 0xFFBFFFFF 803#define S_008014_VGT_BUSY(x) (((unsigned)(x) & 0x1) << 23) 804#define G_008014_VGT_BUSY(x) (((x) >> 23) & 0x1) 805#define C_008014_VGT_BUSY 0xFF7FFFFF 806#define S_008014_PA_BUSY(x) (((unsigned)(x) & 0x1) << 24) 807#define G_008014_PA_BUSY(x) (((x) >> 24) & 0x1) 808#define C_008014_PA_BUSY 0xFEFFFFFF 809#define S_008014_TA_BUSY(x) (((unsigned)(x) & 0x1) << 25) 810#define G_008014_TA_BUSY(x) (((x) >> 25) & 0x1) 811#define C_008014_TA_BUSY 0xFDFFFFFF 812#define S_008014_SX_BUSY(x) (((unsigned)(x) & 0x1) << 26) 813#define G_008014_SX_BUSY(x) (((x) >> 26) & 0x1) 814#define C_008014_SX_BUSY 0xFBFFFFFF 815#define S_008014_SPI_BUSY(x) (((unsigned)(x) & 0x1) << 27) 816#define G_008014_SPI_BUSY(x) (((x) >> 27) & 0x1) 817#define C_008014_SPI_BUSY 0xF7FFFFFF 818#define S_008014_SC_BUSY(x) (((unsigned)(x) & 0x1) << 29) 819#define G_008014_SC_BUSY(x) (((x) >> 29) & 0x1) 820#define C_008014_SC_BUSY 0xDFFFFFFF 821#define S_008014_DB_BUSY(x) (((unsigned)(x) & 0x1) << 30) 822#define G_008014_DB_BUSY(x) (((x) >> 30) & 0x1) 823#define C_008014_DB_BUSY 0xBFFFFFFF 824#define S_008014_CB_BUSY(x) (((unsigned)(x) & 0x1) << 31) 825#define G_008014_CB_BUSY(x) (((x) >> 31) & 0x1) 826#define C_008014_CB_BUSY 0x7FFFFFFF 827#define R_008018_GRBM_STATUS_SE1 0x008018 828#define S_008018_DB_CLEAN(x) (((unsigned)(x) & 0x1) << 1) 829#define G_008018_DB_CLEAN(x) (((x) >> 1) & 0x1) 830#define C_008018_DB_CLEAN 0xFFFFFFFD 831#define S_008018_CB_CLEAN(x) (((unsigned)(x) & 0x1) << 2) 832#define G_008018_CB_CLEAN(x) (((x) >> 2) & 0x1) 833#define C_008018_CB_CLEAN 0xFFFFFFFB 834#define S_008018_BCI_BUSY(x) (((unsigned)(x) & 0x1) << 22) 835#define G_008018_BCI_BUSY(x) (((x) >> 22) & 0x1) 836#define C_008018_BCI_BUSY 0xFFBFFFFF 837#define S_008018_VGT_BUSY(x) (((unsigned)(x) & 0x1) << 23) 838#define G_008018_VGT_BUSY(x) (((x) >> 23) & 0x1) 839#define C_008018_VGT_BUSY 0xFF7FFFFF 840#define S_008018_PA_BUSY(x) (((unsigned)(x) & 0x1) << 24) 841#define G_008018_PA_BUSY(x) (((x) >> 24) & 0x1) 842#define C_008018_PA_BUSY 0xFEFFFFFF 843#define S_008018_TA_BUSY(x) (((unsigned)(x) & 0x1) << 25) 844#define G_008018_TA_BUSY(x) (((x) >> 25) & 0x1) 845#define C_008018_TA_BUSY 0xFDFFFFFF 846#define S_008018_SX_BUSY(x) (((unsigned)(x) & 0x1) << 26) 847#define G_008018_SX_BUSY(x) (((x) >> 26) & 0x1) 848#define C_008018_SX_BUSY 0xFBFFFFFF 849#define S_008018_SPI_BUSY(x) (((unsigned)(x) & 0x1) << 27) 850#define G_008018_SPI_BUSY(x) (((x) >> 27) & 0x1) 851#define C_008018_SPI_BUSY 0xF7FFFFFF 852#define S_008018_SC_BUSY(x) (((unsigned)(x) & 0x1) << 29) 853#define G_008018_SC_BUSY(x) (((x) >> 29) & 0x1) 854#define C_008018_SC_BUSY 0xDFFFFFFF 855#define S_008018_DB_BUSY(x) (((unsigned)(x) & 0x1) << 30) 856#define G_008018_DB_BUSY(x) (((x) >> 30) & 0x1) 857#define C_008018_DB_BUSY 0xBFFFFFFF 858#define S_008018_CB_BUSY(x) (((unsigned)(x) & 0x1) << 31) 859#define G_008018_CB_BUSY(x) (((x) >> 31) & 0x1) 860#define C_008018_CB_BUSY 0x7FFFFFFF 861#define R_008038_GRBM_STATUS_SE2 0x008038 862#define S_008038_DB_CLEAN(x) (((unsigned)(x) & 0x1) << 1) 863#define G_008038_DB_CLEAN(x) (((x) >> 1) & 0x1) 864#define C_008038_DB_CLEAN 0xFFFFFFFD 865#define S_008038_CB_CLEAN(x) (((unsigned)(x) & 0x1) << 2) 866#define G_008038_CB_CLEAN(x) (((x) >> 2) & 0x1) 867#define C_008038_CB_CLEAN 0xFFFFFFFB 868#define S_008038_BCI_BUSY(x) (((unsigned)(x) & 0x1) << 22) 869#define G_008038_BCI_BUSY(x) (((x) >> 22) & 0x1) 870#define C_008038_BCI_BUSY 0xFFBFFFFF 871#define S_008038_VGT_BUSY(x) (((unsigned)(x) & 0x1) << 23) 872#define G_008038_VGT_BUSY(x) (((x) >> 23) & 0x1) 873#define C_008038_VGT_BUSY 0xFF7FFFFF 874#define S_008038_PA_BUSY(x) (((unsigned)(x) & 0x1) << 24) 875#define G_008038_PA_BUSY(x) (((x) >> 24) & 0x1) 876#define C_008038_PA_BUSY 0xFEFFFFFF 877#define S_008038_TA_BUSY(x) (((unsigned)(x) & 0x1) << 25) 878#define G_008038_TA_BUSY(x) (((x) >> 25) & 0x1) 879#define C_008038_TA_BUSY 0xFDFFFFFF 880#define S_008038_SX_BUSY(x) (((unsigned)(x) & 0x1) << 26) 881#define G_008038_SX_BUSY(x) (((x) >> 26) & 0x1) 882#define C_008038_SX_BUSY 0xFBFFFFFF 883#define S_008038_SPI_BUSY(x) (((unsigned)(x) & 0x1) << 27) 884#define G_008038_SPI_BUSY(x) (((x) >> 27) & 0x1) 885#define C_008038_SPI_BUSY 0xF7FFFFFF 886#define S_008038_SC_BUSY(x) (((unsigned)(x) & 0x1) << 29) 887#define G_008038_SC_BUSY(x) (((x) >> 29) & 0x1) 888#define C_008038_SC_BUSY 0xDFFFFFFF 889#define S_008038_DB_BUSY(x) (((unsigned)(x) & 0x1) << 30) 890#define G_008038_DB_BUSY(x) (((x) >> 30) & 0x1) 891#define C_008038_DB_BUSY 0xBFFFFFFF 892#define S_008038_CB_BUSY(x) (((unsigned)(x) & 0x1) << 31) 893#define G_008038_CB_BUSY(x) (((x) >> 31) & 0x1) 894#define C_008038_CB_BUSY 0x7FFFFFFF 895#define R_00803C_GRBM_STATUS_SE3 0x00803C 896#define S_00803C_DB_CLEAN(x) (((unsigned)(x) & 0x1) << 1) 897#define G_00803C_DB_CLEAN(x) (((x) >> 1) & 0x1) 898#define C_00803C_DB_CLEAN 0xFFFFFFFD 899#define S_00803C_CB_CLEAN(x) (((unsigned)(x) & 0x1) << 2) 900#define G_00803C_CB_CLEAN(x) (((x) >> 2) & 0x1) 901#define C_00803C_CB_CLEAN 0xFFFFFFFB 902#define S_00803C_BCI_BUSY(x) (((unsigned)(x) & 0x1) << 22) 903#define G_00803C_BCI_BUSY(x) (((x) >> 22) & 0x1) 904#define C_00803C_BCI_BUSY 0xFFBFFFFF 905#define S_00803C_VGT_BUSY(x) (((unsigned)(x) & 0x1) << 23) 906#define G_00803C_VGT_BUSY(x) (((x) >> 23) & 0x1) 907#define C_00803C_VGT_BUSY 0xFF7FFFFF 908#define S_00803C_PA_BUSY(x) (((unsigned)(x) & 0x1) << 24) 909#define G_00803C_PA_BUSY(x) (((x) >> 24) & 0x1) 910#define C_00803C_PA_BUSY 0xFEFFFFFF 911#define S_00803C_TA_BUSY(x) (((unsigned)(x) & 0x1) << 25) 912#define G_00803C_TA_BUSY(x) (((x) >> 25) & 0x1) 913#define C_00803C_TA_BUSY 0xFDFFFFFF 914#define S_00803C_SX_BUSY(x) (((unsigned)(x) & 0x1) << 26) 915#define G_00803C_SX_BUSY(x) (((x) >> 26) & 0x1) 916#define C_00803C_SX_BUSY 0xFBFFFFFF 917#define S_00803C_SPI_BUSY(x) (((unsigned)(x) & 0x1) << 27) 918#define G_00803C_SPI_BUSY(x) (((x) >> 27) & 0x1) 919#define C_00803C_SPI_BUSY 0xF7FFFFFF 920#define S_00803C_SC_BUSY(x) (((unsigned)(x) & 0x1) << 29) 921#define G_00803C_SC_BUSY(x) (((x) >> 29) & 0x1) 922#define C_00803C_SC_BUSY 0xDFFFFFFF 923#define S_00803C_DB_BUSY(x) (((unsigned)(x) & 0x1) << 30) 924#define G_00803C_DB_BUSY(x) (((x) >> 30) & 0x1) 925#define C_00803C_DB_BUSY 0xBFFFFFFF 926#define S_00803C_CB_BUSY(x) (((unsigned)(x) & 0x1) << 31) 927#define G_00803C_CB_BUSY(x) (((x) >> 31) & 0x1) 928#define C_00803C_CB_BUSY 0x7FFFFFFF 929/* CIK */ 930#define R_0300FC_CP_STRMOUT_CNTL 0x0300FC 931#define S_0300FC_OFFSET_UPDATE_DONE(x) (((unsigned)(x) & 0x1) << 0) 932#define G_0300FC_OFFSET_UPDATE_DONE(x) (((x) >> 0) & 0x1) 933#define C_0300FC_OFFSET_UPDATE_DONE 0xFFFFFFFE 934#define R_0301E4_CP_COHER_BASE_HI 0x0301E4 935#define S_0301E4_COHER_BASE_HI_256B(x) (((unsigned)(x) & 0xFF) << 0) 936#define G_0301E4_COHER_BASE_HI_256B(x) (((x) >> 0) & 0xFF) 937#define C_0301E4_COHER_BASE_HI_256B 0xFFFFFF00 938#define R_0301EC_CP_COHER_START_DELAY 0x0301EC 939#define S_0301EC_START_DELAY_COUNT(x) (((unsigned)(x) & 0x3F) << 0) 940#define G_0301EC_START_DELAY_COUNT(x) (((x) >> 0) & 0x3F) 941#define C_0301EC_START_DELAY_COUNT 0xFFFFFFC0 942#define R_0301F0_CP_COHER_CNTL 0x0301F0 943#define S_0301F0_DEST_BASE_0_ENA(x) (((unsigned)(x) & 0x1) << 0) 944#define G_0301F0_DEST_BASE_0_ENA(x) (((x) >> 0) & 0x1) 945#define C_0301F0_DEST_BASE_0_ENA 0xFFFFFFFE 946#define S_0301F0_DEST_BASE_1_ENA(x) (((unsigned)(x) & 0x1) << 1) 947#define G_0301F0_DEST_BASE_1_ENA(x) (((x) >> 1) & 0x1) 948#define C_0301F0_DEST_BASE_1_ENA 0xFFFFFFFD 949/* VI */ 950#define S_0301F0_TC_SD_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 2) 951#define G_0301F0_TC_SD_ACTION_ENA(x) (((x) >> 2) & 0x1) 952#define C_0301F0_TC_SD_ACTION_ENA 0xFFFFFFFB 953#define S_0301F0_TC_NC_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 3) 954#define G_0301F0_TC_NC_ACTION_ENA(x) (((x) >> 3) & 0x1) 955#define C_0301F0_TC_NC_ACTION_ENA 0xFFFFFFF7 956/* */ 957#define S_0301F0_CB0_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 6) 958#define G_0301F0_CB0_DEST_BASE_ENA(x) (((x) >> 6) & 0x1) 959#define C_0301F0_CB0_DEST_BASE_ENA 0xFFFFFFBF 960#define S_0301F0_CB1_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 7) 961#define G_0301F0_CB1_DEST_BASE_ENA(x) (((x) >> 7) & 0x1) 962#define C_0301F0_CB1_DEST_BASE_ENA 0xFFFFFF7F 963#define S_0301F0_CB2_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 8) 964#define G_0301F0_CB2_DEST_BASE_ENA(x) (((x) >> 8) & 0x1) 965#define C_0301F0_CB2_DEST_BASE_ENA 0xFFFFFEFF 966#define S_0301F0_CB3_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 9) 967#define G_0301F0_CB3_DEST_BASE_ENA(x) (((x) >> 9) & 0x1) 968#define C_0301F0_CB3_DEST_BASE_ENA 0xFFFFFDFF 969#define S_0301F0_CB4_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 10) 970#define G_0301F0_CB4_DEST_BASE_ENA(x) (((x) >> 10) & 0x1) 971#define C_0301F0_CB4_DEST_BASE_ENA 0xFFFFFBFF 972#define S_0301F0_CB5_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 11) 973#define G_0301F0_CB5_DEST_BASE_ENA(x) (((x) >> 11) & 0x1) 974#define C_0301F0_CB5_DEST_BASE_ENA 0xFFFFF7FF 975#define S_0301F0_CB6_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 12) 976#define G_0301F0_CB6_DEST_BASE_ENA(x) (((x) >> 12) & 0x1) 977#define C_0301F0_CB6_DEST_BASE_ENA 0xFFFFEFFF 978#define S_0301F0_CB7_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 13) 979#define G_0301F0_CB7_DEST_BASE_ENA(x) (((x) >> 13) & 0x1) 980#define C_0301F0_CB7_DEST_BASE_ENA 0xFFFFDFFF 981#define S_0301F0_DB_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 14) 982#define G_0301F0_DB_DEST_BASE_ENA(x) (((x) >> 14) & 0x1) 983#define C_0301F0_DB_DEST_BASE_ENA 0xFFFFBFFF 984#define S_0301F0_TCL1_VOL_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 15) 985#define G_0301F0_TCL1_VOL_ACTION_ENA(x) (((x) >> 15) & 0x1) 986#define C_0301F0_TCL1_VOL_ACTION_ENA 0xFFFF7FFF 987#define S_0301F0_TC_VOL_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 16) /* not on VI */ 988#define G_0301F0_TC_VOL_ACTION_ENA(x) (((x) >> 16) & 0x1) 989#define C_0301F0_TC_VOL_ACTION_ENA 0xFFFEFFFF 990#define S_0301F0_TC_WB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 18) 991#define G_0301F0_TC_WB_ACTION_ENA(x) (((x) >> 18) & 0x1) 992#define C_0301F0_TC_WB_ACTION_ENA 0xFFFBFFFF 993#define S_0301F0_DEST_BASE_2_ENA(x) (((unsigned)(x) & 0x1) << 19) 994#define G_0301F0_DEST_BASE_2_ENA(x) (((x) >> 19) & 0x1) 995#define C_0301F0_DEST_BASE_2_ENA 0xFFF7FFFF 996#define S_0301F0_DEST_BASE_3_ENA(x) (((unsigned)(x) & 0x1) << 21) 997#define G_0301F0_DEST_BASE_3_ENA(x) (((x) >> 21) & 0x1) 998#define C_0301F0_DEST_BASE_3_ENA 0xFFDFFFFF 999#define S_0301F0_TCL1_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 22) 1000#define G_0301F0_TCL1_ACTION_ENA(x) (((x) >> 22) & 0x1) 1001#define C_0301F0_TCL1_ACTION_ENA 0xFFBFFFFF 1002#define S_0301F0_TC_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 23) 1003#define G_0301F0_TC_ACTION_ENA(x) (((x) >> 23) & 0x1) 1004#define C_0301F0_TC_ACTION_ENA 0xFF7FFFFF 1005#define S_0301F0_CB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 25) 1006#define G_0301F0_CB_ACTION_ENA(x) (((x) >> 25) & 0x1) 1007#define C_0301F0_CB_ACTION_ENA 0xFDFFFFFF 1008#define S_0301F0_DB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 26) 1009#define G_0301F0_DB_ACTION_ENA(x) (((x) >> 26) & 0x1) 1010#define C_0301F0_DB_ACTION_ENA 0xFBFFFFFF 1011#define S_0301F0_SH_KCACHE_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 27) 1012#define G_0301F0_SH_KCACHE_ACTION_ENA(x) (((x) >> 27) & 0x1) 1013#define C_0301F0_SH_KCACHE_ACTION_ENA 0xF7FFFFFF 1014#define S_0301F0_SH_KCACHE_VOL_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 28) 1015#define G_0301F0_SH_KCACHE_VOL_ACTION_ENA(x) (((x) >> 28) & 0x1) 1016#define C_0301F0_SH_KCACHE_VOL_ACTION_ENA 0xEFFFFFFF 1017#define S_0301F0_SH_ICACHE_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 29) 1018#define G_0301F0_SH_ICACHE_ACTION_ENA(x) (((x) >> 29) & 0x1) 1019#define C_0301F0_SH_ICACHE_ACTION_ENA 0xDFFFFFFF 1020/* VI */ 1021#define S_0301F0_SH_KCACHE_WB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 30) 1022#define G_0301F0_SH_KCACHE_WB_ACTION_ENA(x) (((x) >> 30) & 0x1) 1023#define C_0301F0_SH_KCACHE_WB_ACTION_ENA 0xBFFFFFFF 1024#define S_0301F0_SH_SD_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 31) 1025#define G_0301F0_SH_SD_ACTION_ENA(x) (((x) >> 31) & 0x1) 1026#define C_0301F0_SH_SD_ACTION_ENA 0x7FFFFFFF 1027/* CIK */ 1028#define R_0301F4_CP_COHER_SIZE 0x0301F4 1029#define R_0301F8_CP_COHER_BASE 0x0301F8 1030#define R_0301FC_CP_COHER_STATUS 0x0301FC 1031#define S_0301FC_MATCHING_GFX_CNTX(x) (((unsigned)(x) & 0xFF) << 0) 1032#define G_0301FC_MATCHING_GFX_CNTX(x) (((x) >> 0) & 0xFF) 1033#define C_0301FC_MATCHING_GFX_CNTX 0xFFFFFF00 1034#define S_0301FC_MEID(x) (((unsigned)(x) & 0x03) << 24) 1035#define G_0301FC_MEID(x) (((x) >> 24) & 0x03) 1036#define C_0301FC_MEID 0xFCFFFFFF 1037#define S_0301FC_PHASE1_STATUS(x) (((unsigned)(x) & 0x1) << 30) 1038#define G_0301FC_PHASE1_STATUS(x) (((x) >> 30) & 0x1) 1039#define C_0301FC_PHASE1_STATUS 0xBFFFFFFF 1040#define S_0301FC_STATUS(x) (((unsigned)(x) & 0x1) << 31) 1041#define G_0301FC_STATUS(x) (((x) >> 31) & 0x1) 1042#define C_0301FC_STATUS 0x7FFFFFFF 1043/* */ 1044#define R_008210_CP_CPC_STATUS 0x008210 1045#define S_008210_MEC1_BUSY(x) (((unsigned)(x) & 0x1) << 0) 1046#define G_008210_MEC1_BUSY(x) (((x) >> 0) & 0x1) 1047#define C_008210_MEC1_BUSY 0xFFFFFFFE 1048#define S_008210_MEC2_BUSY(x) (((unsigned)(x) & 0x1) << 1) 1049#define G_008210_MEC2_BUSY(x) (((x) >> 1) & 0x1) 1050#define C_008210_MEC2_BUSY 0xFFFFFFFD 1051#define S_008210_DC0_BUSY(x) (((unsigned)(x) & 0x1) << 2) 1052#define G_008210_DC0_BUSY(x) (((x) >> 2) & 0x1) 1053#define C_008210_DC0_BUSY 0xFFFFFFFB 1054#define S_008210_DC1_BUSY(x) (((unsigned)(x) & 0x1) << 3) 1055#define G_008210_DC1_BUSY(x) (((x) >> 3) & 0x1) 1056#define C_008210_DC1_BUSY 0xFFFFFFF7 1057#define S_008210_RCIU1_BUSY(x) (((unsigned)(x) & 0x1) << 4) 1058#define G_008210_RCIU1_BUSY(x) (((x) >> 4) & 0x1) 1059#define C_008210_RCIU1_BUSY 0xFFFFFFEF 1060#define S_008210_RCIU2_BUSY(x) (((unsigned)(x) & 0x1) << 5) 1061#define G_008210_RCIU2_BUSY(x) (((x) >> 5) & 0x1) 1062#define C_008210_RCIU2_BUSY 0xFFFFFFDF 1063#define S_008210_ROQ1_BUSY(x) (((unsigned)(x) & 0x1) << 6) 1064#define G_008210_ROQ1_BUSY(x) (((x) >> 6) & 0x1) 1065#define C_008210_ROQ1_BUSY 0xFFFFFFBF 1066#define S_008210_ROQ2_BUSY(x) (((unsigned)(x) & 0x1) << 7) 1067#define G_008210_ROQ2_BUSY(x) (((x) >> 7) & 0x1) 1068#define C_008210_ROQ2_BUSY 0xFFFFFF7F 1069#define S_008210_TCIU_BUSY(x) (((unsigned)(x) & 0x1) << 10) 1070#define G_008210_TCIU_BUSY(x) (((x) >> 10) & 0x1) 1071#define C_008210_TCIU_BUSY 0xFFFFFBFF 1072#define S_008210_SCRATCH_RAM_BUSY(x) (((unsigned)(x) & 0x1) << 11) 1073#define G_008210_SCRATCH_RAM_BUSY(x) (((x) >> 11) & 0x1) 1074#define C_008210_SCRATCH_RAM_BUSY 0xFFFFF7FF 1075#define S_008210_QU_BUSY(x) (((unsigned)(x) & 0x1) << 12) 1076#define G_008210_QU_BUSY(x) (((x) >> 12) & 0x1) 1077#define C_008210_QU_BUSY 0xFFFFEFFF 1078#define S_008210_ATCL2IU_BUSY(x) (((unsigned)(x) & 0x1) << 13) 1079#define G_008210_ATCL2IU_BUSY(x) (((x) >> 13) & 0x1) 1080#define C_008210_ATCL2IU_BUSY 0xFFFFDFFF 1081#define S_008210_CPG_CPC_BUSY(x) (((unsigned)(x) & 0x1) << 29) 1082#define G_008210_CPG_CPC_BUSY(x) (((x) >> 29) & 0x1) 1083#define C_008210_CPG_CPC_BUSY 0xDFFFFFFF 1084#define S_008210_CPF_CPC_BUSY(x) (((unsigned)(x) & 0x1) << 30) 1085#define G_008210_CPF_CPC_BUSY(x) (((x) >> 30) & 0x1) 1086#define C_008210_CPF_CPC_BUSY 0xBFFFFFFF 1087#define S_008210_CPC_BUSY(x) (((unsigned)(x) & 0x1) << 31) 1088#define G_008210_CPC_BUSY(x) (((x) >> 31) & 0x1) 1089#define C_008210_CPC_BUSY 0x7FFFFFFF 1090#define R_008214_CP_CPC_BUSY_STAT 0x008214 1091#define S_008214_MEC1_LOAD_BUSY(x) (((unsigned)(x) & 0x1) << 0) 1092#define G_008214_MEC1_LOAD_BUSY(x) (((x) >> 0) & 0x1) 1093#define C_008214_MEC1_LOAD_BUSY 0xFFFFFFFE 1094#define S_008214_MEC1_SEMAPOHRE_BUSY(x) (((unsigned)(x) & 0x1) << 1) 1095#define G_008214_MEC1_SEMAPOHRE_BUSY(x) (((x) >> 1) & 0x1) 1096#define C_008214_MEC1_SEMAPOHRE_BUSY 0xFFFFFFFD 1097#define S_008214_MEC1_MUTEX_BUSY(x) (((unsigned)(x) & 0x1) << 2) 1098#define G_008214_MEC1_MUTEX_BUSY(x) (((x) >> 2) & 0x1) 1099#define C_008214_MEC1_MUTEX_BUSY 0xFFFFFFFB 1100#define S_008214_MEC1_MESSAGE_BUSY(x) (((unsigned)(x) & 0x1) << 3) 1101#define G_008214_MEC1_MESSAGE_BUSY(x) (((x) >> 3) & 0x1) 1102#define C_008214_MEC1_MESSAGE_BUSY 0xFFFFFFF7 1103#define S_008214_MEC1_EOP_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 4) 1104#define G_008214_MEC1_EOP_QUEUE_BUSY(x) (((x) >> 4) & 0x1) 1105#define C_008214_MEC1_EOP_QUEUE_BUSY 0xFFFFFFEF 1106#define S_008214_MEC1_IQ_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 5) 1107#define G_008214_MEC1_IQ_QUEUE_BUSY(x) (((x) >> 5) & 0x1) 1108#define C_008214_MEC1_IQ_QUEUE_BUSY 0xFFFFFFDF 1109#define S_008214_MEC1_IB_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 6) 1110#define G_008214_MEC1_IB_QUEUE_BUSY(x) (((x) >> 6) & 0x1) 1111#define C_008214_MEC1_IB_QUEUE_BUSY 0xFFFFFFBF 1112#define S_008214_MEC1_TC_BUSY(x) (((unsigned)(x) & 0x1) << 7) 1113#define G_008214_MEC1_TC_BUSY(x) (((x) >> 7) & 0x1) 1114#define C_008214_MEC1_TC_BUSY 0xFFFFFF7F 1115#define S_008214_MEC1_DMA_BUSY(x) (((unsigned)(x) & 0x1) << 8) 1116#define G_008214_MEC1_DMA_BUSY(x) (((x) >> 8) & 0x1) 1117#define C_008214_MEC1_DMA_BUSY 0xFFFFFEFF 1118#define S_008214_MEC1_PARTIAL_FLUSH_BUSY(x) (((unsigned)(x) & 0x1) << 9) 1119#define G_008214_MEC1_PARTIAL_FLUSH_BUSY(x) (((x) >> 9) & 0x1) 1120#define C_008214_MEC1_PARTIAL_FLUSH_BUSY 0xFFFFFDFF 1121#define S_008214_MEC1_PIPE0_BUSY(x) (((unsigned)(x) & 0x1) << 10) 1122#define G_008214_MEC1_PIPE0_BUSY(x) (((x) >> 10) & 0x1) 1123#define C_008214_MEC1_PIPE0_BUSY 0xFFFFFBFF 1124#define S_008214_MEC1_PIPE1_BUSY(x) (((unsigned)(x) & 0x1) << 11) 1125#define G_008214_MEC1_PIPE1_BUSY(x) (((x) >> 11) & 0x1) 1126#define C_008214_MEC1_PIPE1_BUSY 0xFFFFF7FF 1127#define S_008214_MEC1_PIPE2_BUSY(x) (((unsigned)(x) & 0x1) << 12) 1128#define G_008214_MEC1_PIPE2_BUSY(x) (((x) >> 12) & 0x1) 1129#define C_008214_MEC1_PIPE2_BUSY 0xFFFFEFFF 1130#define S_008214_MEC1_PIPE3_BUSY(x) (((unsigned)(x) & 0x1) << 13) 1131#define G_008214_MEC1_PIPE3_BUSY(x) (((x) >> 13) & 0x1) 1132#define C_008214_MEC1_PIPE3_BUSY 0xFFFFDFFF 1133#define S_008214_MEC2_LOAD_BUSY(x) (((unsigned)(x) & 0x1) << 16) 1134#define G_008214_MEC2_LOAD_BUSY(x) (((x) >> 16) & 0x1) 1135#define C_008214_MEC2_LOAD_BUSY 0xFFFEFFFF 1136#define S_008214_MEC2_SEMAPOHRE_BUSY(x) (((unsigned)(x) & 0x1) << 17) 1137#define G_008214_MEC2_SEMAPOHRE_BUSY(x) (((x) >> 17) & 0x1) 1138#define C_008214_MEC2_SEMAPOHRE_BUSY 0xFFFDFFFF 1139#define S_008214_MEC2_MUTEX_BUSY(x) (((unsigned)(x) & 0x1) << 18) 1140#define G_008214_MEC2_MUTEX_BUSY(x) (((x) >> 18) & 0x1) 1141#define C_008214_MEC2_MUTEX_BUSY 0xFFFBFFFF 1142#define S_008214_MEC2_MESSAGE_BUSY(x) (((unsigned)(x) & 0x1) << 19) 1143#define G_008214_MEC2_MESSAGE_BUSY(x) (((x) >> 19) & 0x1) 1144#define C_008214_MEC2_MESSAGE_BUSY 0xFFF7FFFF 1145#define S_008214_MEC2_EOP_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 20) 1146#define G_008214_MEC2_EOP_QUEUE_BUSY(x) (((x) >> 20) & 0x1) 1147#define C_008214_MEC2_EOP_QUEUE_BUSY 0xFFEFFFFF 1148#define S_008214_MEC2_IQ_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 21) 1149#define G_008214_MEC2_IQ_QUEUE_BUSY(x) (((x) >> 21) & 0x1) 1150#define C_008214_MEC2_IQ_QUEUE_BUSY 0xFFDFFFFF 1151#define S_008214_MEC2_IB_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 22) 1152#define G_008214_MEC2_IB_QUEUE_BUSY(x) (((x) >> 22) & 0x1) 1153#define C_008214_MEC2_IB_QUEUE_BUSY 0xFFBFFFFF 1154#define S_008214_MEC2_TC_BUSY(x) (((unsigned)(x) & 0x1) << 23) 1155#define G_008214_MEC2_TC_BUSY(x) (((x) >> 23) & 0x1) 1156#define C_008214_MEC2_TC_BUSY 0xFF7FFFFF 1157#define S_008214_MEC2_DMA_BUSY(x) (((unsigned)(x) & 0x1) << 24) 1158#define G_008214_MEC2_DMA_BUSY(x) (((x) >> 24) & 0x1) 1159#define C_008214_MEC2_DMA_BUSY 0xFEFFFFFF 1160#define S_008214_MEC2_PARTIAL_FLUSH_BUSY(x) (((unsigned)(x) & 0x1) << 25) 1161#define G_008214_MEC2_PARTIAL_FLUSH_BUSY(x) (((x) >> 25) & 0x1) 1162#define C_008214_MEC2_PARTIAL_FLUSH_BUSY 0xFDFFFFFF 1163#define S_008214_MEC2_PIPE0_BUSY(x) (((unsigned)(x) & 0x1) << 26) 1164#define G_008214_MEC2_PIPE0_BUSY(x) (((x) >> 26) & 0x1) 1165#define C_008214_MEC2_PIPE0_BUSY 0xFBFFFFFF 1166#define S_008214_MEC2_PIPE1_BUSY(x) (((unsigned)(x) & 0x1) << 27) 1167#define G_008214_MEC2_PIPE1_BUSY(x) (((x) >> 27) & 0x1) 1168#define C_008214_MEC2_PIPE1_BUSY 0xF7FFFFFF 1169#define S_008214_MEC2_PIPE2_BUSY(x) (((unsigned)(x) & 0x1) << 28) 1170#define G_008214_MEC2_PIPE2_BUSY(x) (((x) >> 28) & 0x1) 1171#define C_008214_MEC2_PIPE2_BUSY 0xEFFFFFFF 1172#define S_008214_MEC2_PIPE3_BUSY(x) (((unsigned)(x) & 0x1) << 29) 1173#define G_008214_MEC2_PIPE3_BUSY(x) (((x) >> 29) & 0x1) 1174#define C_008214_MEC2_PIPE3_BUSY 0xDFFFFFFF 1175#define R_008218_CP_CPC_STALLED_STAT1 0x008218 1176#define S_008218_RCIU_TX_FREE_STALL(x) (((unsigned)(x) & 0x1) << 3) 1177#define G_008218_RCIU_TX_FREE_STALL(x) (((x) >> 3) & 0x1) 1178#define C_008218_RCIU_TX_FREE_STALL 0xFFFFFFF7 1179#define S_008218_RCIU_PRIV_VIOLATION(x) (((unsigned)(x) & 0x1) << 4) 1180#define G_008218_RCIU_PRIV_VIOLATION(x) (((x) >> 4) & 0x1) 1181#define C_008218_RCIU_PRIV_VIOLATION 0xFFFFFFEF 1182#define S_008218_TCIU_TX_FREE_STALL(x) (((unsigned)(x) & 0x1) << 6) 1183#define G_008218_TCIU_TX_FREE_STALL(x) (((x) >> 6) & 0x1) 1184#define C_008218_TCIU_TX_FREE_STALL 0xFFFFFFBF 1185#define S_008218_MEC1_DECODING_PACKET(x) (((unsigned)(x) & 0x1) << 8) 1186#define G_008218_MEC1_DECODING_PACKET(x) (((x) >> 8) & 0x1) 1187#define C_008218_MEC1_DECODING_PACKET 0xFFFFFEFF 1188#define S_008218_MEC1_WAIT_ON_RCIU(x) (((unsigned)(x) & 0x1) << 9) 1189#define G_008218_MEC1_WAIT_ON_RCIU(x) (((x) >> 9) & 0x1) 1190#define C_008218_MEC1_WAIT_ON_RCIU 0xFFFFFDFF 1191#define S_008218_MEC1_WAIT_ON_RCIU_READ(x) (((unsigned)(x) & 0x1) << 10) 1192#define G_008218_MEC1_WAIT_ON_RCIU_READ(x) (((x) >> 10) & 0x1) 1193#define C_008218_MEC1_WAIT_ON_RCIU_READ 0xFFFFFBFF 1194#define S_008218_MEC1_WAIT_ON_ROQ_DATA(x) (((unsigned)(x) & 0x1) << 13) 1195#define G_008218_MEC1_WAIT_ON_ROQ_DATA(x) (((x) >> 13) & 0x1) 1196#define C_008218_MEC1_WAIT_ON_ROQ_DATA 0xFFFFDFFF 1197#define S_008218_MEC2_DECODING_PACKET(x) (((unsigned)(x) & 0x1) << 16) 1198#define G_008218_MEC2_DECODING_PACKET(x) (((x) >> 16) & 0x1) 1199#define C_008218_MEC2_DECODING_PACKET 0xFFFEFFFF 1200#define S_008218_MEC2_WAIT_ON_RCIU(x) (((unsigned)(x) & 0x1) << 17) 1201#define G_008218_MEC2_WAIT_ON_RCIU(x) (((x) >> 17) & 0x1) 1202#define C_008218_MEC2_WAIT_ON_RCIU 0xFFFDFFFF 1203#define S_008218_MEC2_WAIT_ON_RCIU_READ(x) (((unsigned)(x) & 0x1) << 18) 1204#define G_008218_MEC2_WAIT_ON_RCIU_READ(x) (((x) >> 18) & 0x1) 1205#define C_008218_MEC2_WAIT_ON_RCIU_READ 0xFFFBFFFF 1206#define S_008218_MEC2_WAIT_ON_ROQ_DATA(x) (((unsigned)(x) & 0x1) << 21) 1207#define G_008218_MEC2_WAIT_ON_ROQ_DATA(x) (((x) >> 21) & 0x1) 1208#define C_008218_MEC2_WAIT_ON_ROQ_DATA 0xFFDFFFFF 1209#define S_008218_ATCL2IU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 22) 1210#define G_008218_ATCL2IU_WAITING_ON_FREE(x) (((x) >> 22) & 0x1) 1211#define C_008218_ATCL2IU_WAITING_ON_FREE 0xFFBFFFFF 1212#define S_008218_ATCL2IU_WAITING_ON_TAGS(x) (((unsigned)(x) & 0x1) << 23) 1213#define G_008218_ATCL2IU_WAITING_ON_TAGS(x) (((x) >> 23) & 0x1) 1214#define C_008218_ATCL2IU_WAITING_ON_TAGS 0xFF7FFFFF 1215#define S_008218_ATCL1_WAITING_ON_TRANS(x) (((unsigned)(x) & 0x1) << 24) 1216#define G_008218_ATCL1_WAITING_ON_TRANS(x) (((x) >> 24) & 0x1) 1217#define C_008218_ATCL1_WAITING_ON_TRANS 0xFEFFFFFF 1218#define R_00821C_CP_CPF_STATUS 0x00821C 1219#define S_00821C_POST_WPTR_GFX_BUSY(x) (((unsigned)(x) & 0x1) << 0) 1220#define G_00821C_POST_WPTR_GFX_BUSY(x) (((x) >> 0) & 0x1) 1221#define C_00821C_POST_WPTR_GFX_BUSY 0xFFFFFFFE 1222#define S_00821C_CSF_BUSY(x) (((unsigned)(x) & 0x1) << 1) 1223#define G_00821C_CSF_BUSY(x) (((x) >> 1) & 0x1) 1224#define C_00821C_CSF_BUSY 0xFFFFFFFD 1225#define S_00821C_ROQ_ALIGN_BUSY(x) (((unsigned)(x) & 0x1) << 4) 1226#define G_00821C_ROQ_ALIGN_BUSY(x) (((x) >> 4) & 0x1) 1227#define C_00821C_ROQ_ALIGN_BUSY 0xFFFFFFEF 1228#define S_00821C_ROQ_RING_BUSY(x) (((unsigned)(x) & 0x1) << 5) 1229#define G_00821C_ROQ_RING_BUSY(x) (((x) >> 5) & 0x1) 1230#define C_00821C_ROQ_RING_BUSY 0xFFFFFFDF 1231#define S_00821C_ROQ_INDIRECT1_BUSY(x) (((unsigned)(x) & 0x1) << 6) 1232#define G_00821C_ROQ_INDIRECT1_BUSY(x) (((x) >> 6) & 0x1) 1233#define C_00821C_ROQ_INDIRECT1_BUSY 0xFFFFFFBF 1234#define S_00821C_ROQ_INDIRECT2_BUSY(x) (((unsigned)(x) & 0x1) << 7) 1235#define G_00821C_ROQ_INDIRECT2_BUSY(x) (((x) >> 7) & 0x1) 1236#define C_00821C_ROQ_INDIRECT2_BUSY 0xFFFFFF7F 1237#define S_00821C_ROQ_STATE_BUSY(x) (((unsigned)(x) & 0x1) << 8) 1238#define G_00821C_ROQ_STATE_BUSY(x) (((x) >> 8) & 0x1) 1239#define C_00821C_ROQ_STATE_BUSY 0xFFFFFEFF 1240#define S_00821C_ROQ_CE_RING_BUSY(x) (((unsigned)(x) & 0x1) << 9) 1241#define G_00821C_ROQ_CE_RING_BUSY(x) (((x) >> 9) & 0x1) 1242#define C_00821C_ROQ_CE_RING_BUSY 0xFFFFFDFF 1243#define S_00821C_ROQ_CE_INDIRECT1_BUSY(x) (((unsigned)(x) & 0x1) << 10) 1244#define G_00821C_ROQ_CE_INDIRECT1_BUSY(x) (((x) >> 10) & 0x1) 1245#define C_00821C_ROQ_CE_INDIRECT1_BUSY 0xFFFFFBFF 1246#define S_00821C_ROQ_CE_INDIRECT2_BUSY(x) (((unsigned)(x) & 0x1) << 11) 1247#define G_00821C_ROQ_CE_INDIRECT2_BUSY(x) (((x) >> 11) & 0x1) 1248#define C_00821C_ROQ_CE_INDIRECT2_BUSY 0xFFFFF7FF 1249#define S_00821C_SEMAPHORE_BUSY(x) (((unsigned)(x) & 0x1) << 12) 1250#define G_00821C_SEMAPHORE_BUSY(x) (((x) >> 12) & 0x1) 1251#define C_00821C_SEMAPHORE_BUSY 0xFFFFEFFF 1252#define S_00821C_INTERRUPT_BUSY(x) (((unsigned)(x) & 0x1) << 13) 1253#define G_00821C_INTERRUPT_BUSY(x) (((x) >> 13) & 0x1) 1254#define C_00821C_INTERRUPT_BUSY 0xFFFFDFFF 1255#define S_00821C_TCIU_BUSY(x) (((unsigned)(x) & 0x1) << 14) 1256#define G_00821C_TCIU_BUSY(x) (((x) >> 14) & 0x1) 1257#define C_00821C_TCIU_BUSY 0xFFFFBFFF 1258#define S_00821C_HQD_BUSY(x) (((unsigned)(x) & 0x1) << 15) 1259#define G_00821C_HQD_BUSY(x) (((x) >> 15) & 0x1) 1260#define C_00821C_HQD_BUSY 0xFFFF7FFF 1261#define S_00821C_PRT_BUSY(x) (((unsigned)(x) & 0x1) << 16) 1262#define G_00821C_PRT_BUSY(x) (((x) >> 16) & 0x1) 1263#define C_00821C_PRT_BUSY 0xFFFEFFFF 1264#define S_00821C_ATCL2IU_BUSY(x) (((unsigned)(x) & 0x1) << 17) 1265#define G_00821C_ATCL2IU_BUSY(x) (((x) >> 17) & 0x1) 1266#define C_00821C_ATCL2IU_BUSY 0xFFFDFFFF 1267#define S_00821C_CPF_GFX_BUSY(x) (((unsigned)(x) & 0x1) << 26) 1268#define G_00821C_CPF_GFX_BUSY(x) (((x) >> 26) & 0x1) 1269#define C_00821C_CPF_GFX_BUSY 0xFBFFFFFF 1270#define S_00821C_CPF_CMP_BUSY(x) (((unsigned)(x) & 0x1) << 27) 1271#define G_00821C_CPF_CMP_BUSY(x) (((x) >> 27) & 0x1) 1272#define C_00821C_CPF_CMP_BUSY 0xF7FFFFFF 1273#define S_00821C_GRBM_CPF_STAT_BUSY(x) (((unsigned)(x) & 0x03) << 28) 1274#define G_00821C_GRBM_CPF_STAT_BUSY(x) (((x) >> 28) & 0x03) 1275#define C_00821C_GRBM_CPF_STAT_BUSY 0xCFFFFFFF 1276#define S_00821C_CPC_CPF_BUSY(x) (((unsigned)(x) & 0x1) << 30) 1277#define G_00821C_CPC_CPF_BUSY(x) (((x) >> 30) & 0x1) 1278#define C_00821C_CPC_CPF_BUSY 0xBFFFFFFF 1279#define S_00821C_CPF_BUSY(x) (((unsigned)(x) & 0x1) << 31) 1280#define G_00821C_CPF_BUSY(x) (((x) >> 31) & 0x1) 1281#define C_00821C_CPF_BUSY 0x7FFFFFFF 1282#define R_008220_CP_CPF_BUSY_STAT 0x008220 1283#define S_008220_REG_BUS_FIFO_BUSY(x) (((unsigned)(x) & 0x1) << 0) 1284#define G_008220_REG_BUS_FIFO_BUSY(x) (((x) >> 0) & 0x1) 1285#define C_008220_REG_BUS_FIFO_BUSY 0xFFFFFFFE 1286#define S_008220_CSF_RING_BUSY(x) (((unsigned)(x) & 0x1) << 1) 1287#define G_008220_CSF_RING_BUSY(x) (((x) >> 1) & 0x1) 1288#define C_008220_CSF_RING_BUSY 0xFFFFFFFD 1289#define S_008220_CSF_INDIRECT1_BUSY(x) (((unsigned)(x) & 0x1) << 2) 1290#define G_008220_CSF_INDIRECT1_BUSY(x) (((x) >> 2) & 0x1) 1291#define C_008220_CSF_INDIRECT1_BUSY 0xFFFFFFFB 1292#define S_008220_CSF_INDIRECT2_BUSY(x) (((unsigned)(x) & 0x1) << 3) 1293#define G_008220_CSF_INDIRECT2_BUSY(x) (((x) >> 3) & 0x1) 1294#define C_008220_CSF_INDIRECT2_BUSY 0xFFFFFFF7 1295#define S_008220_CSF_STATE_BUSY(x) (((unsigned)(x) & 0x1) << 4) 1296#define G_008220_CSF_STATE_BUSY(x) (((x) >> 4) & 0x1) 1297#define C_008220_CSF_STATE_BUSY 0xFFFFFFEF 1298#define S_008220_CSF_CE_INDR1_BUSY(x) (((unsigned)(x) & 0x1) << 5) 1299#define G_008220_CSF_CE_INDR1_BUSY(x) (((x) >> 5) & 0x1) 1300#define C_008220_CSF_CE_INDR1_BUSY 0xFFFFFFDF 1301#define S_008220_CSF_CE_INDR2_BUSY(x) (((unsigned)(x) & 0x1) << 6) 1302#define G_008220_CSF_CE_INDR2_BUSY(x) (((x) >> 6) & 0x1) 1303#define C_008220_CSF_CE_INDR2_BUSY 0xFFFFFFBF 1304#define S_008220_CSF_ARBITER_BUSY(x) (((unsigned)(x) & 0x1) << 7) 1305#define G_008220_CSF_ARBITER_BUSY(x) (((x) >> 7) & 0x1) 1306#define C_008220_CSF_ARBITER_BUSY 0xFFFFFF7F 1307#define S_008220_CSF_INPUT_BUSY(x) (((unsigned)(x) & 0x1) << 8) 1308#define G_008220_CSF_INPUT_BUSY(x) (((x) >> 8) & 0x1) 1309#define C_008220_CSF_INPUT_BUSY 0xFFFFFEFF 1310#define S_008220_OUTSTANDING_READ_TAGS(x) (((unsigned)(x) & 0x1) << 9) 1311#define G_008220_OUTSTANDING_READ_TAGS(x) (((x) >> 9) & 0x1) 1312#define C_008220_OUTSTANDING_READ_TAGS 0xFFFFFDFF 1313#define S_008220_HPD_PROCESSING_EOP_BUSY(x) (((unsigned)(x) & 0x1) << 11) 1314#define G_008220_HPD_PROCESSING_EOP_BUSY(x) (((x) >> 11) & 0x1) 1315#define C_008220_HPD_PROCESSING_EOP_BUSY 0xFFFFF7FF 1316#define S_008220_HQD_DISPATCH_BUSY(x) (((unsigned)(x) & 0x1) << 12) 1317#define G_008220_HQD_DISPATCH_BUSY(x) (((x) >> 12) & 0x1) 1318#define C_008220_HQD_DISPATCH_BUSY 0xFFFFEFFF 1319#define S_008220_HQD_IQ_TIMER_BUSY(x) (((unsigned)(x) & 0x1) << 13) 1320#define G_008220_HQD_IQ_TIMER_BUSY(x) (((x) >> 13) & 0x1) 1321#define C_008220_HQD_IQ_TIMER_BUSY 0xFFFFDFFF 1322#define S_008220_HQD_DMA_OFFLOAD_BUSY(x) (((unsigned)(x) & 0x1) << 14) 1323#define G_008220_HQD_DMA_OFFLOAD_BUSY(x) (((x) >> 14) & 0x1) 1324#define C_008220_HQD_DMA_OFFLOAD_BUSY 0xFFFFBFFF 1325#define S_008220_HQD_WAIT_SEMAPHORE_BUSY(x) (((unsigned)(x) & 0x1) << 15) 1326#define G_008220_HQD_WAIT_SEMAPHORE_BUSY(x) (((x) >> 15) & 0x1) 1327#define C_008220_HQD_WAIT_SEMAPHORE_BUSY 0xFFFF7FFF 1328#define S_008220_HQD_SIGNAL_SEMAPHORE_BUSY(x) (((unsigned)(x) & 0x1) << 16) 1329#define G_008220_HQD_SIGNAL_SEMAPHORE_BUSY(x) (((x) >> 16) & 0x1) 1330#define C_008220_HQD_SIGNAL_SEMAPHORE_BUSY 0xFFFEFFFF 1331#define S_008220_HQD_MESSAGE_BUSY(x) (((unsigned)(x) & 0x1) << 17) 1332#define G_008220_HQD_MESSAGE_BUSY(x) (((x) >> 17) & 0x1) 1333#define C_008220_HQD_MESSAGE_BUSY 0xFFFDFFFF 1334#define S_008220_HQD_PQ_FETCHER_BUSY(x) (((unsigned)(x) & 0x1) << 18) 1335#define G_008220_HQD_PQ_FETCHER_BUSY(x) (((x) >> 18) & 0x1) 1336#define C_008220_HQD_PQ_FETCHER_BUSY 0xFFFBFFFF 1337#define S_008220_HQD_IB_FETCHER_BUSY(x) (((unsigned)(x) & 0x1) << 19) 1338#define G_008220_HQD_IB_FETCHER_BUSY(x) (((x) >> 19) & 0x1) 1339#define C_008220_HQD_IB_FETCHER_BUSY 0xFFF7FFFF 1340#define S_008220_HQD_IQ_FETCHER_BUSY(x) (((unsigned)(x) & 0x1) << 20) 1341#define G_008220_HQD_IQ_FETCHER_BUSY(x) (((x) >> 20) & 0x1) 1342#define C_008220_HQD_IQ_FETCHER_BUSY 0xFFEFFFFF 1343#define S_008220_HQD_EOP_FETCHER_BUSY(x) (((unsigned)(x) & 0x1) << 21) 1344#define G_008220_HQD_EOP_FETCHER_BUSY(x) (((x) >> 21) & 0x1) 1345#define C_008220_HQD_EOP_FETCHER_BUSY 0xFFDFFFFF 1346#define S_008220_HQD_CONSUMED_RPTR_BUSY(x) (((unsigned)(x) & 0x1) << 22) 1347#define G_008220_HQD_CONSUMED_RPTR_BUSY(x) (((x) >> 22) & 0x1) 1348#define C_008220_HQD_CONSUMED_RPTR_BUSY 0xFFBFFFFF 1349#define S_008220_HQD_FETCHER_ARB_BUSY(x) (((unsigned)(x) & 0x1) << 23) 1350#define G_008220_HQD_FETCHER_ARB_BUSY(x) (((x) >> 23) & 0x1) 1351#define C_008220_HQD_FETCHER_ARB_BUSY 0xFF7FFFFF 1352#define S_008220_HQD_ROQ_ALIGN_BUSY(x) (((unsigned)(x) & 0x1) << 24) 1353#define G_008220_HQD_ROQ_ALIGN_BUSY(x) (((x) >> 24) & 0x1) 1354#define C_008220_HQD_ROQ_ALIGN_BUSY 0xFEFFFFFF 1355#define S_008220_HQD_ROQ_EOP_BUSY(x) (((unsigned)(x) & 0x1) << 25) 1356#define G_008220_HQD_ROQ_EOP_BUSY(x) (((x) >> 25) & 0x1) 1357#define C_008220_HQD_ROQ_EOP_BUSY 0xFDFFFFFF 1358#define S_008220_HQD_ROQ_IQ_BUSY(x) (((unsigned)(x) & 0x1) << 26) 1359#define G_008220_HQD_ROQ_IQ_BUSY(x) (((x) >> 26) & 0x1) 1360#define C_008220_HQD_ROQ_IQ_BUSY 0xFBFFFFFF 1361#define S_008220_HQD_ROQ_PQ_BUSY(x) (((unsigned)(x) & 0x1) << 27) 1362#define G_008220_HQD_ROQ_PQ_BUSY(x) (((x) >> 27) & 0x1) 1363#define C_008220_HQD_ROQ_PQ_BUSY 0xF7FFFFFF 1364#define S_008220_HQD_ROQ_IB_BUSY(x) (((unsigned)(x) & 0x1) << 28) 1365#define G_008220_HQD_ROQ_IB_BUSY(x) (((x) >> 28) & 0x1) 1366#define C_008220_HQD_ROQ_IB_BUSY 0xEFFFFFFF 1367#define S_008220_HQD_WPTR_POLL_BUSY(x) (((unsigned)(x) & 0x1) << 29) 1368#define G_008220_HQD_WPTR_POLL_BUSY(x) (((x) >> 29) & 0x1) 1369#define C_008220_HQD_WPTR_POLL_BUSY 0xDFFFFFFF 1370#define S_008220_HQD_PQ_BUSY(x) (((unsigned)(x) & 0x1) << 30) 1371#define G_008220_HQD_PQ_BUSY(x) (((x) >> 30) & 0x1) 1372#define C_008220_HQD_PQ_BUSY 0xBFFFFFFF 1373#define S_008220_HQD_IB_BUSY(x) (((unsigned)(x) & 0x1) << 31) 1374#define G_008220_HQD_IB_BUSY(x) (((x) >> 31) & 0x1) 1375#define C_008220_HQD_IB_BUSY 0x7FFFFFFF 1376#define R_008224_CP_CPF_STALLED_STAT1 0x008224 1377#define S_008224_RING_FETCHING_DATA(x) (((unsigned)(x) & 0x1) << 0) 1378#define G_008224_RING_FETCHING_DATA(x) (((x) >> 0) & 0x1) 1379#define C_008224_RING_FETCHING_DATA 0xFFFFFFFE 1380#define S_008224_INDR1_FETCHING_DATA(x) (((unsigned)(x) & 0x1) << 1) 1381#define G_008224_INDR1_FETCHING_DATA(x) (((x) >> 1) & 0x1) 1382#define C_008224_INDR1_FETCHING_DATA 0xFFFFFFFD 1383#define S_008224_INDR2_FETCHING_DATA(x) (((unsigned)(x) & 0x1) << 2) 1384#define G_008224_INDR2_FETCHING_DATA(x) (((x) >> 2) & 0x1) 1385#define C_008224_INDR2_FETCHING_DATA 0xFFFFFFFB 1386#define S_008224_STATE_FETCHING_DATA(x) (((unsigned)(x) & 0x1) << 3) 1387#define G_008224_STATE_FETCHING_DATA(x) (((x) >> 3) & 0x1) 1388#define C_008224_STATE_FETCHING_DATA 0xFFFFFFF7 1389#define S_008224_TCIU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 5) 1390#define G_008224_TCIU_WAITING_ON_FREE(x) (((x) >> 5) & 0x1) 1391#define C_008224_TCIU_WAITING_ON_FREE 0xFFFFFFDF 1392#define S_008224_TCIU_WAITING_ON_TAGS(x) (((unsigned)(x) & 0x1) << 6) 1393#define G_008224_TCIU_WAITING_ON_TAGS(x) (((x) >> 6) & 0x1) 1394#define C_008224_TCIU_WAITING_ON_TAGS 0xFFFFFFBF 1395#define S_008224_ATCL2IU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 7) 1396#define G_008224_ATCL2IU_WAITING_ON_FREE(x) (((x) >> 7) & 0x1) 1397#define C_008224_ATCL2IU_WAITING_ON_FREE 0xFFFFFF7F 1398#define S_008224_ATCL2IU_WAITING_ON_TAGS(x) (((unsigned)(x) & 0x1) << 8) 1399#define G_008224_ATCL2IU_WAITING_ON_TAGS(x) (((x) >> 8) & 0x1) 1400#define C_008224_ATCL2IU_WAITING_ON_TAGS 0xFFFFFEFF 1401#define S_008224_ATCL1_WAITING_ON_TRANS(x) (((unsigned)(x) & 0x1) << 9) 1402#define G_008224_ATCL1_WAITING_ON_TRANS(x) (((x) >> 9) & 0x1) 1403#define C_008224_ATCL1_WAITING_ON_TRANS 0xFFFFFDFF 1404#define R_030230_CP_COHER_SIZE_HI 0x030230 1405#define S_030230_COHER_SIZE_HI_256B(x) (((unsigned)(x) & 0xFF) << 0) 1406#define G_030230_COHER_SIZE_HI_256B(x) (((x) >> 0) & 0xFF) 1407#define C_030230_COHER_SIZE_HI_256B 0xFFFFFF00 1408/* */ 1409#define R_0088B0_VGT_VTX_VECT_EJECT_REG 0x0088B0 1410#define S_0088B0_PRIM_COUNT(x) (((unsigned)(x) & 0x3FF) << 0) 1411#define G_0088B0_PRIM_COUNT(x) (((x) >> 0) & 0x3FF) 1412#define C_0088B0_PRIM_COUNT 0xFFFFFC00 1413#define R_0088C4_VGT_CACHE_INVALIDATION 0x0088C4 1414#define S_0088C4_VS_NO_EXTRA_BUFFER(x) (((unsigned)(x) & 0x1) << 5) 1415#define G_0088C4_VS_NO_EXTRA_BUFFER(x) (((x) >> 5) & 0x1) 1416#define C_0088C4_VS_NO_EXTRA_BUFFER 0xFFFFFFDF 1417#define S_0088C4_STREAMOUT_FULL_FLUSH(x) (((unsigned)(x) & 0x1) << 13) 1418#define G_0088C4_STREAMOUT_FULL_FLUSH(x) (((x) >> 13) & 0x1) 1419#define C_0088C4_STREAMOUT_FULL_FLUSH 0xFFFFDFFF 1420#define S_0088C4_ES_LIMIT(x) (((unsigned)(x) & 0x1F) << 16) 1421#define G_0088C4_ES_LIMIT(x) (((x) >> 16) & 0x1F) 1422#define C_0088C4_ES_LIMIT 0xFFE0FFFF 1423/* not on CIK -- moved to uconfig space */ 1424#define R_0088C8_VGT_ESGS_RING_SIZE 0x0088C8 1425#define R_0088CC_VGT_GSVS_RING_SIZE 0x0088CC 1426/* */ 1427#define R_0088D4_VGT_GS_VERTEX_REUSE 0x0088D4 1428#define S_0088D4_VERT_REUSE(x) (((unsigned)(x) & 0x1F) << 0) 1429#define G_0088D4_VERT_REUSE(x) (((x) >> 0) & 0x1F) 1430#define C_0088D4_VERT_REUSE 0xFFFFFFE0 1431/* not on CIK -- moved to uconfig space */ 1432#define R_008958_VGT_PRIMITIVE_TYPE 0x008958 1433#define S_008958_PRIM_TYPE(x) (((unsigned)(x) & 0x3F) << 0) 1434#define G_008958_PRIM_TYPE(x) (((x) >> 0) & 0x3F) 1435#define C_008958_PRIM_TYPE 0xFFFFFFC0 1436#define V_008958_DI_PT_NONE 0x00 1437#define V_008958_DI_PT_POINTLIST 0x01 1438#define V_008958_DI_PT_LINELIST 0x02 1439#define V_008958_DI_PT_LINESTRIP 0x03 1440#define V_008958_DI_PT_TRILIST 0x04 1441#define V_008958_DI_PT_TRIFAN 0x05 1442#define V_008958_DI_PT_TRISTRIP 0x06 1443#define V_008958_DI_PT_UNUSED_0 0x07 1444#define V_008958_DI_PT_UNUSED_1 0x08 1445#define V_008958_DI_PT_PATCH 0x09 1446#define V_008958_DI_PT_LINELIST_ADJ 0x0A 1447#define V_008958_DI_PT_LINESTRIP_ADJ 0x0B 1448#define V_008958_DI_PT_TRILIST_ADJ 0x0C 1449#define V_008958_DI_PT_TRISTRIP_ADJ 0x0D 1450#define V_008958_DI_PT_UNUSED_3 0x0E 1451#define V_008958_DI_PT_UNUSED_4 0x0F 1452#define V_008958_DI_PT_TRI_WITH_WFLAGS 0x10 1453#define V_008958_DI_PT_RECTLIST 0x11 1454#define V_008958_DI_PT_LINELOOP 0x12 1455#define V_008958_DI_PT_QUADLIST 0x13 1456#define V_008958_DI_PT_QUADSTRIP 0x14 1457#define V_008958_DI_PT_POLYGON 0x15 1458#define V_008958_DI_PT_2D_COPY_RECT_LIST_V0 0x16 1459#define V_008958_DI_PT_2D_COPY_RECT_LIST_V1 0x17 1460#define V_008958_DI_PT_2D_COPY_RECT_LIST_V2 0x18 1461#define V_008958_DI_PT_2D_COPY_RECT_LIST_V3 0x19 1462#define V_008958_DI_PT_2D_FILL_RECT_LIST 0x1A 1463#define V_008958_DI_PT_2D_LINE_STRIP 0x1B 1464#define V_008958_DI_PT_2D_TRI_STRIP 0x1C 1465#define R_00895C_VGT_INDEX_TYPE 0x00895C 1466#define S_00895C_INDEX_TYPE(x) (((unsigned)(x) & 0x03) << 0) 1467#define G_00895C_INDEX_TYPE(x) (((x) >> 0) & 0x03) 1468#define C_00895C_INDEX_TYPE 0xFFFFFFFC 1469#define V_00895C_DI_INDEX_SIZE_16_BIT 0x00 1470#define V_00895C_DI_INDEX_SIZE_32_BIT 0x01 1471#define R_008960_VGT_STRMOUT_BUFFER_FILLED_SIZE_0 0x008960 1472#define R_008964_VGT_STRMOUT_BUFFER_FILLED_SIZE_1 0x008964 1473#define R_008968_VGT_STRMOUT_BUFFER_FILLED_SIZE_2 0x008968 1474#define R_00896C_VGT_STRMOUT_BUFFER_FILLED_SIZE_3 0x00896C 1475#define R_008970_VGT_NUM_INDICES 0x008970 1476#define R_008974_VGT_NUM_INSTANCES 0x008974 1477#define R_008988_VGT_TF_RING_SIZE 0x008988 1478#define S_008988_SIZE(x) (((unsigned)(x) & 0xFFFF) << 0) 1479#define G_008988_SIZE(x) (((x) >> 0) & 0xFFFF) 1480#define C_008988_SIZE 0xFFFF0000 1481#define R_0089B0_VGT_HS_OFFCHIP_PARAM 0x0089B0 1482#define S_0089B0_OFFCHIP_BUFFERING(x) (((unsigned)(x) & 0x7F) << 0) 1483#define G_0089B0_OFFCHIP_BUFFERING(x) (((x) >> 0) & 0x7F) 1484#define C_0089B0_OFFCHIP_BUFFERING 0xFFFFFF80 1485#define R_0089B8_VGT_TF_MEMORY_BASE 0x0089B8 1486/* */ 1487#define R_008A14_PA_CL_ENHANCE 0x008A14 1488#define S_008A14_CLIP_VTX_REORDER_ENA(x) (((unsigned)(x) & 0x1) << 0) 1489#define G_008A14_CLIP_VTX_REORDER_ENA(x) (((x) >> 0) & 0x1) 1490#define C_008A14_CLIP_VTX_REORDER_ENA 0xFFFFFFFE 1491#define S_008A14_NUM_CLIP_SEQ(x) (((unsigned)(x) & 0x03) << 1) 1492#define G_008A14_NUM_CLIP_SEQ(x) (((x) >> 1) & 0x03) 1493#define C_008A14_NUM_CLIP_SEQ 0xFFFFFFF9 1494#define S_008A14_CLIPPED_PRIM_SEQ_STALL(x) (((unsigned)(x) & 0x1) << 3) 1495#define G_008A14_CLIPPED_PRIM_SEQ_STALL(x) (((x) >> 3) & 0x1) 1496#define C_008A14_CLIPPED_PRIM_SEQ_STALL 0xFFFFFFF7 1497#define S_008A14_VE_NAN_PROC_DISABLE(x) (((unsigned)(x) & 0x1) << 4) 1498#define G_008A14_VE_NAN_PROC_DISABLE(x) (((x) >> 4) & 0x1) 1499#define C_008A14_VE_NAN_PROC_DISABLE 0xFFFFFFEF 1500/* not on CIK -- moved to uconfig space */ 1501#define R_008A60_PA_SU_LINE_STIPPLE_VALUE 0x008A60 1502#define S_008A60_LINE_STIPPLE_VALUE(x) (((unsigned)(x) & 0xFFFFFF) << 0) 1503#define G_008A60_LINE_STIPPLE_VALUE(x) (((x) >> 0) & 0xFFFFFF) 1504#define C_008A60_LINE_STIPPLE_VALUE 0xFF000000 1505#define R_008B10_PA_SC_LINE_STIPPLE_STATE 0x008B10 1506#define S_008B10_CURRENT_PTR(x) (((unsigned)(x) & 0x0F) << 0) 1507#define G_008B10_CURRENT_PTR(x) (((x) >> 0) & 0x0F) 1508#define C_008B10_CURRENT_PTR 0xFFFFFFF0 1509#define S_008B10_CURRENT_COUNT(x) (((unsigned)(x) & 0xFF) << 8) 1510#define G_008B10_CURRENT_COUNT(x) (((x) >> 8) & 0xFF) 1511#define C_008B10_CURRENT_COUNT 0xFFFF00FF 1512/* */ 1513#define R_008670_CP_STALLED_STAT3 0x008670 1514#define S_008670_CE_TO_CSF_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 0) 1515#define G_008670_CE_TO_CSF_NOT_RDY_TO_RCV(x) (((x) >> 0) & 0x1) 1516#define C_008670_CE_TO_CSF_NOT_RDY_TO_RCV 0xFFFFFFFE 1517#define S_008670_CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 1) 1518#define G_008670_CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV(x) (((x) >> 1) & 0x1) 1519#define C_008670_CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV 0xFFFFFFFD 1520#define S_008670_CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER(x) (((unsigned)(x) & 0x1) << 2) 1521#define G_008670_CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER(x) (((x) >> 2) & 0x1) 1522#define C_008670_CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER 0xFFFFFFFB 1523#define S_008670_CE_TO_RAM_INIT_NOT_RDY(x) (((unsigned)(x) & 0x1) << 3) 1524#define G_008670_CE_TO_RAM_INIT_NOT_RDY(x) (((x) >> 3) & 0x1) 1525#define C_008670_CE_TO_RAM_INIT_NOT_RDY 0xFFFFFFF7 1526#define S_008670_CE_TO_RAM_DUMP_NOT_RDY(x) (((unsigned)(x) & 0x1) << 4) 1527#define G_008670_CE_TO_RAM_DUMP_NOT_RDY(x) (((x) >> 4) & 0x1) 1528#define C_008670_CE_TO_RAM_DUMP_NOT_RDY 0xFFFFFFEF 1529#define S_008670_CE_TO_RAM_WRITE_NOT_RDY(x) (((unsigned)(x) & 0x1) << 5) 1530#define G_008670_CE_TO_RAM_WRITE_NOT_RDY(x) (((x) >> 5) & 0x1) 1531#define C_008670_CE_TO_RAM_WRITE_NOT_RDY 0xFFFFFFDF 1532#define S_008670_CE_TO_INC_FIFO_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 6) 1533#define G_008670_CE_TO_INC_FIFO_NOT_RDY_TO_RCV(x) (((x) >> 6) & 0x1) 1534#define C_008670_CE_TO_INC_FIFO_NOT_RDY_TO_RCV 0xFFFFFFBF 1535#define S_008670_CE_TO_WR_FIFO_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 7) 1536#define G_008670_CE_TO_WR_FIFO_NOT_RDY_TO_RCV(x) (((x) >> 7) & 0x1) 1537#define C_008670_CE_TO_WR_FIFO_NOT_RDY_TO_RCV 0xFFFFFF7F 1538#define S_008670_CE_WAITING_ON_BUFFER_DATA(x) (((unsigned)(x) & 0x1) << 10) 1539#define G_008670_CE_WAITING_ON_BUFFER_DATA(x) (((x) >> 10) & 0x1) 1540#define C_008670_CE_WAITING_ON_BUFFER_DATA 0xFFFFFBFF 1541#define S_008670_CE_WAITING_ON_CE_BUFFER_FLAG(x) (((unsigned)(x) & 0x1) << 11) 1542#define G_008670_CE_WAITING_ON_CE_BUFFER_FLAG(x) (((x) >> 11) & 0x1) 1543#define C_008670_CE_WAITING_ON_CE_BUFFER_FLAG 0xFFFFF7FF 1544#define S_008670_CE_WAITING_ON_DE_COUNTER(x) (((unsigned)(x) & 0x1) << 12) 1545#define G_008670_CE_WAITING_ON_DE_COUNTER(x) (((x) >> 12) & 0x1) 1546#define C_008670_CE_WAITING_ON_DE_COUNTER 0xFFFFEFFF 1547#define S_008670_CE_WAITING_ON_DE_COUNTER_UNDERFLOW(x) (((unsigned)(x) & 0x1) << 13) 1548#define G_008670_CE_WAITING_ON_DE_COUNTER_UNDERFLOW(x) (((x) >> 13) & 0x1) 1549#define C_008670_CE_WAITING_ON_DE_COUNTER_UNDERFLOW 0xFFFFDFFF 1550#define S_008670_TCIU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 14) 1551#define G_008670_TCIU_WAITING_ON_FREE(x) (((x) >> 14) & 0x1) 1552#define C_008670_TCIU_WAITING_ON_FREE 0xFFFFBFFF 1553#define S_008670_TCIU_WAITING_ON_TAGS(x) (((unsigned)(x) & 0x1) << 15) 1554#define G_008670_TCIU_WAITING_ON_TAGS(x) (((x) >> 15) & 0x1) 1555#define C_008670_TCIU_WAITING_ON_TAGS 0xFFFF7FFF 1556#define S_008670_CE_STALLED_ON_TC_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 16) 1557#define G_008670_CE_STALLED_ON_TC_WR_CONFIRM(x) (((x) >> 16) & 0x1) 1558#define C_008670_CE_STALLED_ON_TC_WR_CONFIRM 0xFFFEFFFF 1559#define S_008670_CE_STALLED_ON_ATOMIC_RTN_DATA(x) (((unsigned)(x) & 0x1) << 17) 1560#define G_008670_CE_STALLED_ON_ATOMIC_RTN_DATA(x) (((x) >> 17) & 0x1) 1561#define C_008670_CE_STALLED_ON_ATOMIC_RTN_DATA 0xFFFDFFFF 1562#define S_008670_ATCL2IU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 18) 1563#define G_008670_ATCL2IU_WAITING_ON_FREE(x) (((x) >> 18) & 0x1) 1564#define C_008670_ATCL2IU_WAITING_ON_FREE 0xFFFBFFFF 1565#define S_008670_ATCL2IU_WAITING_ON_TAGS(x) (((unsigned)(x) & 0x1) << 19) 1566#define G_008670_ATCL2IU_WAITING_ON_TAGS(x) (((x) >> 19) & 0x1) 1567#define C_008670_ATCL2IU_WAITING_ON_TAGS 0xFFF7FFFF 1568#define S_008670_ATCL1_WAITING_ON_TRANS(x) (((unsigned)(x) & 0x1) << 20) 1569#define G_008670_ATCL1_WAITING_ON_TRANS(x) (((x) >> 20) & 0x1) 1570#define C_008670_ATCL1_WAITING_ON_TRANS 0xFFEFFFFF 1571#define R_008674_CP_STALLED_STAT1 0x008674 1572#define S_008674_RBIU_TO_DMA_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 0) 1573#define G_008674_RBIU_TO_DMA_NOT_RDY_TO_RCV(x) (((x) >> 0) & 0x1) 1574#define C_008674_RBIU_TO_DMA_NOT_RDY_TO_RCV 0xFFFFFFFE 1575#define S_008674_RBIU_TO_SEM_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 2) 1576#define G_008674_RBIU_TO_SEM_NOT_RDY_TO_RCV(x) (((x) >> 2) & 0x1) 1577#define C_008674_RBIU_TO_SEM_NOT_RDY_TO_RCV 0xFFFFFFFB 1578#define S_008674_RBIU_TO_MEMWR_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 4) 1579#define G_008674_RBIU_TO_MEMWR_NOT_RDY_TO_RCV(x) (((x) >> 4) & 0x1) 1580#define C_008674_RBIU_TO_MEMWR_NOT_RDY_TO_RCV 0xFFFFFFEF 1581#define S_008674_ME_HAS_ACTIVE_CE_BUFFER_FLAG(x) (((unsigned)(x) & 0x1) << 10) 1582#define G_008674_ME_HAS_ACTIVE_CE_BUFFER_FLAG(x) (((x) >> 10) & 0x1) 1583#define C_008674_ME_HAS_ACTIVE_CE_BUFFER_FLAG 0xFFFFFBFF 1584#define S_008674_ME_HAS_ACTIVE_DE_BUFFER_FLAG(x) (((unsigned)(x) & 0x1) << 11) 1585#define G_008674_ME_HAS_ACTIVE_DE_BUFFER_FLAG(x) (((x) >> 11) & 0x1) 1586#define C_008674_ME_HAS_ACTIVE_DE_BUFFER_FLAG 0xFFFFF7FF 1587#define S_008674_ME_STALLED_ON_TC_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 12) 1588#define G_008674_ME_STALLED_ON_TC_WR_CONFIRM(x) (((x) >> 12) & 0x1) 1589#define C_008674_ME_STALLED_ON_TC_WR_CONFIRM 0xFFFFEFFF 1590#define S_008674_ME_STALLED_ON_ATOMIC_RTN_DATA(x) (((unsigned)(x) & 0x1) << 13) 1591#define G_008674_ME_STALLED_ON_ATOMIC_RTN_DATA(x) (((x) >> 13) & 0x1) 1592#define C_008674_ME_STALLED_ON_ATOMIC_RTN_DATA 0xFFFFDFFF 1593#define S_008674_ME_WAITING_ON_TC_READ_DATA(x) (((unsigned)(x) & 0x1) << 14) 1594#define G_008674_ME_WAITING_ON_TC_READ_DATA(x) (((x) >> 14) & 0x1) 1595#define C_008674_ME_WAITING_ON_TC_READ_DATA 0xFFFFBFFF 1596#define S_008674_ME_WAITING_ON_REG_READ_DATA(x) (((unsigned)(x) & 0x1) << 15) 1597#define G_008674_ME_WAITING_ON_REG_READ_DATA(x) (((x) >> 15) & 0x1) 1598#define C_008674_ME_WAITING_ON_REG_READ_DATA 0xFFFF7FFF 1599#define S_008674_RCIU_WAITING_ON_GDS_FREE(x) (((unsigned)(x) & 0x1) << 23) 1600#define G_008674_RCIU_WAITING_ON_GDS_FREE(x) (((x) >> 23) & 0x1) 1601#define C_008674_RCIU_WAITING_ON_GDS_FREE 0xFF7FFFFF 1602#define S_008674_RCIU_WAITING_ON_GRBM_FREE(x) (((unsigned)(x) & 0x1) << 24) 1603#define G_008674_RCIU_WAITING_ON_GRBM_FREE(x) (((x) >> 24) & 0x1) 1604#define C_008674_RCIU_WAITING_ON_GRBM_FREE 0xFEFFFFFF 1605#define S_008674_RCIU_WAITING_ON_VGT_FREE(x) (((unsigned)(x) & 0x1) << 25) 1606#define G_008674_RCIU_WAITING_ON_VGT_FREE(x) (((x) >> 25) & 0x1) 1607#define C_008674_RCIU_WAITING_ON_VGT_FREE 0xFDFFFFFF 1608#define S_008674_RCIU_STALLED_ON_ME_READ(x) (((unsigned)(x) & 0x1) << 26) 1609#define G_008674_RCIU_STALLED_ON_ME_READ(x) (((x) >> 26) & 0x1) 1610#define C_008674_RCIU_STALLED_ON_ME_READ 0xFBFFFFFF 1611#define S_008674_RCIU_STALLED_ON_DMA_READ(x) (((unsigned)(x) & 0x1) << 27) 1612#define G_008674_RCIU_STALLED_ON_DMA_READ(x) (((x) >> 27) & 0x1) 1613#define C_008674_RCIU_STALLED_ON_DMA_READ 0xF7FFFFFF 1614#define S_008674_RCIU_STALLED_ON_APPEND_READ(x) (((unsigned)(x) & 0x1) << 28) 1615#define G_008674_RCIU_STALLED_ON_APPEND_READ(x) (((x) >> 28) & 0x1) 1616#define C_008674_RCIU_STALLED_ON_APPEND_READ 0xEFFFFFFF 1617#define S_008674_RCIU_HALTED_BY_REG_VIOLATION(x) (((unsigned)(x) & 0x1) << 29) 1618#define G_008674_RCIU_HALTED_BY_REG_VIOLATION(x) (((x) >> 29) & 0x1) 1619#define C_008674_RCIU_HALTED_BY_REG_VIOLATION 0xDFFFFFFF 1620#define R_008678_CP_STALLED_STAT2 0x008678 1621#define S_008678_PFP_TO_CSF_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 0) 1622#define G_008678_PFP_TO_CSF_NOT_RDY_TO_RCV(x) (((x) >> 0) & 0x1) 1623#define C_008678_PFP_TO_CSF_NOT_RDY_TO_RCV 0xFFFFFFFE 1624#define S_008678_PFP_TO_MEQ_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 1) 1625#define G_008678_PFP_TO_MEQ_NOT_RDY_TO_RCV(x) (((x) >> 1) & 0x1) 1626#define C_008678_PFP_TO_MEQ_NOT_RDY_TO_RCV 0xFFFFFFFD 1627#define S_008678_PFP_TO_RCIU_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 2) 1628#define G_008678_PFP_TO_RCIU_NOT_RDY_TO_RCV(x) (((x) >> 2) & 0x1) 1629#define C_008678_PFP_TO_RCIU_NOT_RDY_TO_RCV 0xFFFFFFFB 1630#define S_008678_PFP_TO_VGT_WRITES_PENDING(x) (((unsigned)(x) & 0x1) << 4) 1631#define G_008678_PFP_TO_VGT_WRITES_PENDING(x) (((x) >> 4) & 0x1) 1632#define C_008678_PFP_TO_VGT_WRITES_PENDING 0xFFFFFFEF 1633#define S_008678_PFP_RCIU_READ_PENDING(x) (((unsigned)(x) & 0x1) << 5) 1634#define G_008678_PFP_RCIU_READ_PENDING(x) (((x) >> 5) & 0x1) 1635#define C_008678_PFP_RCIU_READ_PENDING 0xFFFFFFDF 1636#define S_008678_PFP_WAITING_ON_BUFFER_DATA(x) (((unsigned)(x) & 0x1) << 8) 1637#define G_008678_PFP_WAITING_ON_BUFFER_DATA(x) (((x) >> 8) & 0x1) 1638#define C_008678_PFP_WAITING_ON_BUFFER_DATA 0xFFFFFEFF 1639#define S_008678_ME_WAIT_ON_CE_COUNTER(x) (((unsigned)(x) & 0x1) << 9) 1640#define G_008678_ME_WAIT_ON_CE_COUNTER(x) (((x) >> 9) & 0x1) 1641#define C_008678_ME_WAIT_ON_CE_COUNTER 0xFFFFFDFF 1642#define S_008678_ME_WAIT_ON_AVAIL_BUFFER(x) (((unsigned)(x) & 0x1) << 10) 1643#define G_008678_ME_WAIT_ON_AVAIL_BUFFER(x) (((x) >> 10) & 0x1) 1644#define C_008678_ME_WAIT_ON_AVAIL_BUFFER 0xFFFFFBFF 1645#define S_008678_GFX_CNTX_NOT_AVAIL_TO_ME(x) (((unsigned)(x) & 0x1) << 11) 1646#define G_008678_GFX_CNTX_NOT_AVAIL_TO_ME(x) (((x) >> 11) & 0x1) 1647#define C_008678_GFX_CNTX_NOT_AVAIL_TO_ME 0xFFFFF7FF 1648#define S_008678_ME_RCIU_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 12) 1649#define G_008678_ME_RCIU_NOT_RDY_TO_RCV(x) (((x) >> 12) & 0x1) 1650#define C_008678_ME_RCIU_NOT_RDY_TO_RCV 0xFFFFEFFF 1651#define S_008678_ME_TO_CONST_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 13) 1652#define G_008678_ME_TO_CONST_NOT_RDY_TO_RCV(x) (((x) >> 13) & 0x1) 1653#define C_008678_ME_TO_CONST_NOT_RDY_TO_RCV 0xFFFFDFFF 1654#define S_008678_ME_WAITING_DATA_FROM_PFP(x) (((unsigned)(x) & 0x1) << 14) 1655#define G_008678_ME_WAITING_DATA_FROM_PFP(x) (((x) >> 14) & 0x1) 1656#define C_008678_ME_WAITING_DATA_FROM_PFP 0xFFFFBFFF 1657#define S_008678_ME_WAITING_ON_PARTIAL_FLUSH(x) (((unsigned)(x) & 0x1) << 15) 1658#define G_008678_ME_WAITING_ON_PARTIAL_FLUSH(x) (((x) >> 15) & 0x1) 1659#define C_008678_ME_WAITING_ON_PARTIAL_FLUSH 0xFFFF7FFF 1660#define S_008678_MEQ_TO_ME_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 16) 1661#define G_008678_MEQ_TO_ME_NOT_RDY_TO_RCV(x) (((x) >> 16) & 0x1) 1662#define C_008678_MEQ_TO_ME_NOT_RDY_TO_RCV 0xFFFEFFFF 1663#define S_008678_STQ_TO_ME_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 17) 1664#define G_008678_STQ_TO_ME_NOT_RDY_TO_RCV(x) (((x) >> 17) & 0x1) 1665#define C_008678_STQ_TO_ME_NOT_RDY_TO_RCV 0xFFFDFFFF 1666#define S_008678_ME_WAITING_DATA_FROM_STQ(x) (((unsigned)(x) & 0x1) << 18) 1667#define G_008678_ME_WAITING_DATA_FROM_STQ(x) (((x) >> 18) & 0x1) 1668#define C_008678_ME_WAITING_DATA_FROM_STQ 0xFFFBFFFF 1669#define S_008678_PFP_STALLED_ON_TC_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 19) 1670#define G_008678_PFP_STALLED_ON_TC_WR_CONFIRM(x) (((x) >> 19) & 0x1) 1671#define C_008678_PFP_STALLED_ON_TC_WR_CONFIRM 0xFFF7FFFF 1672#define S_008678_PFP_STALLED_ON_ATOMIC_RTN_DATA(x) (((unsigned)(x) & 0x1) << 20) 1673#define G_008678_PFP_STALLED_ON_ATOMIC_RTN_DATA(x) (((x) >> 20) & 0x1) 1674#define C_008678_PFP_STALLED_ON_ATOMIC_RTN_DATA 0xFFEFFFFF 1675#define S_008678_EOPD_FIFO_NEEDS_SC_EOP_DONE(x) (((unsigned)(x) & 0x1) << 21) 1676#define G_008678_EOPD_FIFO_NEEDS_SC_EOP_DONE(x) (((x) >> 21) & 0x1) 1677#define C_008678_EOPD_FIFO_NEEDS_SC_EOP_DONE 0xFFDFFFFF 1678#define S_008678_EOPD_FIFO_NEEDS_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 22) 1679#define G_008678_EOPD_FIFO_NEEDS_WR_CONFIRM(x) (((x) >> 22) & 0x1) 1680#define C_008678_EOPD_FIFO_NEEDS_WR_CONFIRM 0xFFBFFFFF 1681#define S_008678_STRMO_WR_OF_PRIM_DATA_PENDING(x) (((unsigned)(x) & 0x1) << 23) 1682#define G_008678_STRMO_WR_OF_PRIM_DATA_PENDING(x) (((x) >> 23) & 0x1) 1683#define C_008678_STRMO_WR_OF_PRIM_DATA_PENDING 0xFF7FFFFF 1684#define S_008678_PIPE_STATS_WR_DATA_PENDING(x) (((unsigned)(x) & 0x1) << 24) 1685#define G_008678_PIPE_STATS_WR_DATA_PENDING(x) (((x) >> 24) & 0x1) 1686#define C_008678_PIPE_STATS_WR_DATA_PENDING 0xFEFFFFFF 1687#define S_008678_APPEND_RDY_WAIT_ON_CS_DONE(x) (((unsigned)(x) & 0x1) << 25) 1688#define G_008678_APPEND_RDY_WAIT_ON_CS_DONE(x) (((x) >> 25) & 0x1) 1689#define C_008678_APPEND_RDY_WAIT_ON_CS_DONE 0xFDFFFFFF 1690#define S_008678_APPEND_RDY_WAIT_ON_PS_DONE(x) (((unsigned)(x) & 0x1) << 26) 1691#define G_008678_APPEND_RDY_WAIT_ON_PS_DONE(x) (((x) >> 26) & 0x1) 1692#define C_008678_APPEND_RDY_WAIT_ON_PS_DONE 0xFBFFFFFF 1693#define S_008678_APPEND_WAIT_ON_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 27) 1694#define G_008678_APPEND_WAIT_ON_WR_CONFIRM(x) (((x) >> 27) & 0x1) 1695#define C_008678_APPEND_WAIT_ON_WR_CONFIRM 0xF7FFFFFF 1696#define S_008678_APPEND_ACTIVE_PARTITION(x) (((unsigned)(x) & 0x1) << 28) 1697#define G_008678_APPEND_ACTIVE_PARTITION(x) (((x) >> 28) & 0x1) 1698#define C_008678_APPEND_ACTIVE_PARTITION 0xEFFFFFFF 1699#define S_008678_APPEND_WAITING_TO_SEND_MEMWRITE(x) (((unsigned)(x) & 0x1) << 29) 1700#define G_008678_APPEND_WAITING_TO_SEND_MEMWRITE(x) (((x) >> 29) & 0x1) 1701#define C_008678_APPEND_WAITING_TO_SEND_MEMWRITE 0xDFFFFFFF 1702#define S_008678_SURF_SYNC_NEEDS_IDLE_CNTXS(x) (((unsigned)(x) & 0x1) << 30) 1703#define G_008678_SURF_SYNC_NEEDS_IDLE_CNTXS(x) (((x) >> 30) & 0x1) 1704#define C_008678_SURF_SYNC_NEEDS_IDLE_CNTXS 0xBFFFFFFF 1705#define S_008678_SURF_SYNC_NEEDS_ALL_CLEAN(x) (((unsigned)(x) & 0x1) << 31) 1706#define G_008678_SURF_SYNC_NEEDS_ALL_CLEAN(x) (((x) >> 31) & 0x1) 1707#define C_008678_SURF_SYNC_NEEDS_ALL_CLEAN 0x7FFFFFFF 1708#define R_008680_CP_STAT 0x008680 1709#define S_008680_ROQ_RING_BUSY(x) (((unsigned)(x) & 0x1) << 9) 1710#define G_008680_ROQ_RING_BUSY(x) (((x) >> 9) & 0x1) 1711#define C_008680_ROQ_RING_BUSY 0xFFFFFDFF 1712#define S_008680_ROQ_INDIRECT1_BUSY(x) (((unsigned)(x) & 0x1) << 10) 1713#define G_008680_ROQ_INDIRECT1_BUSY(x) (((x) >> 10) & 0x1) 1714#define C_008680_ROQ_INDIRECT1_BUSY 0xFFFFFBFF 1715#define S_008680_ROQ_INDIRECT2_BUSY(x) (((unsigned)(x) & 0x1) << 11) 1716#define G_008680_ROQ_INDIRECT2_BUSY(x) (((x) >> 11) & 0x1) 1717#define C_008680_ROQ_INDIRECT2_BUSY 0xFFFFF7FF 1718#define S_008680_ROQ_STATE_BUSY(x) (((unsigned)(x) & 0x1) << 12) 1719#define G_008680_ROQ_STATE_BUSY(x) (((x) >> 12) & 0x1) 1720#define C_008680_ROQ_STATE_BUSY 0xFFFFEFFF 1721#define S_008680_DC_BUSY(x) (((unsigned)(x) & 0x1) << 13) 1722#define G_008680_DC_BUSY(x) (((x) >> 13) & 0x1) 1723#define C_008680_DC_BUSY 0xFFFFDFFF 1724#define S_008680_ATCL2IU_BUSY(x) (((unsigned)(x) & 0x1) << 14) 1725#define G_008680_ATCL2IU_BUSY(x) (((x) >> 14) & 0x1) 1726#define C_008680_ATCL2IU_BUSY 0xFFFFBFFF 1727#define S_008680_PFP_BUSY(x) (((unsigned)(x) & 0x1) << 15) 1728#define G_008680_PFP_BUSY(x) (((x) >> 15) & 0x1) 1729#define C_008680_PFP_BUSY 0xFFFF7FFF 1730#define S_008680_MEQ_BUSY(x) (((unsigned)(x) & 0x1) << 16) 1731#define G_008680_MEQ_BUSY(x) (((x) >> 16) & 0x1) 1732#define C_008680_MEQ_BUSY 0xFFFEFFFF 1733#define S_008680_ME_BUSY(x) (((unsigned)(x) & 0x1) << 17) 1734#define G_008680_ME_BUSY(x) (((x) >> 17) & 0x1) 1735#define C_008680_ME_BUSY 0xFFFDFFFF 1736#define S_008680_QUERY_BUSY(x) (((unsigned)(x) & 0x1) << 18) 1737#define G_008680_QUERY_BUSY(x) (((x) >> 18) & 0x1) 1738#define C_008680_QUERY_BUSY 0xFFFBFFFF 1739#define S_008680_SEMAPHORE_BUSY(x) (((unsigned)(x) & 0x1) << 19) 1740#define G_008680_SEMAPHORE_BUSY(x) (((x) >> 19) & 0x1) 1741#define C_008680_SEMAPHORE_BUSY 0xFFF7FFFF 1742#define S_008680_INTERRUPT_BUSY(x) (((unsigned)(x) & 0x1) << 20) 1743#define G_008680_INTERRUPT_BUSY(x) (((x) >> 20) & 0x1) 1744#define C_008680_INTERRUPT_BUSY 0xFFEFFFFF 1745#define S_008680_SURFACE_SYNC_BUSY(x) (((unsigned)(x) & 0x1) << 21) 1746#define G_008680_SURFACE_SYNC_BUSY(x) (((x) >> 21) & 0x1) 1747#define C_008680_SURFACE_SYNC_BUSY 0xFFDFFFFF 1748#define S_008680_DMA_BUSY(x) (((unsigned)(x) & 0x1) << 22) 1749#define G_008680_DMA_BUSY(x) (((x) >> 22) & 0x1) 1750#define C_008680_DMA_BUSY 0xFFBFFFFF 1751#define S_008680_RCIU_BUSY(x) (((unsigned)(x) & 0x1) << 23) 1752#define G_008680_RCIU_BUSY(x) (((x) >> 23) & 0x1) 1753#define C_008680_RCIU_BUSY 0xFF7FFFFF 1754#define S_008680_SCRATCH_RAM_BUSY(x) (((unsigned)(x) & 0x1) << 24) 1755#define G_008680_SCRATCH_RAM_BUSY(x) (((x) >> 24) & 0x1) 1756#define C_008680_SCRATCH_RAM_BUSY 0xFEFFFFFF 1757#define S_008680_CPC_CPG_BUSY(x) (((unsigned)(x) & 0x1) << 25) 1758#define G_008680_CPC_CPG_BUSY(x) (((x) >> 25) & 0x1) 1759#define C_008680_CPC_CPG_BUSY 0xFDFFFFFF 1760#define S_008680_CE_BUSY(x) (((unsigned)(x) & 0x1) << 26) 1761#define G_008680_CE_BUSY(x) (((x) >> 26) & 0x1) 1762#define C_008680_CE_BUSY 0xFBFFFFFF 1763#define S_008680_TCIU_BUSY(x) (((unsigned)(x) & 0x1) << 27) 1764#define G_008680_TCIU_BUSY(x) (((x) >> 27) & 0x1) 1765#define C_008680_TCIU_BUSY 0xF7FFFFFF 1766#define S_008680_ROQ_CE_RING_BUSY(x) (((unsigned)(x) & 0x1) << 28) 1767#define G_008680_ROQ_CE_RING_BUSY(x) (((x) >> 28) & 0x1) 1768#define C_008680_ROQ_CE_RING_BUSY 0xEFFFFFFF 1769#define S_008680_ROQ_CE_INDIRECT1_BUSY(x) (((unsigned)(x) & 0x1) << 29) 1770#define G_008680_ROQ_CE_INDIRECT1_BUSY(x) (((x) >> 29) & 0x1) 1771#define C_008680_ROQ_CE_INDIRECT1_BUSY 0xDFFFFFFF 1772#define S_008680_ROQ_CE_INDIRECT2_BUSY(x) (((unsigned)(x) & 0x1) << 30) 1773#define G_008680_ROQ_CE_INDIRECT2_BUSY(x) (((x) >> 30) & 0x1) 1774#define C_008680_ROQ_CE_INDIRECT2_BUSY 0xBFFFFFFF 1775#define S_008680_CP_BUSY(x) (((unsigned)(x) & 0x1) << 31) 1776#define G_008680_CP_BUSY(x) (((x) >> 31) & 0x1) 1777#define C_008680_CP_BUSY 0x7FFFFFFF 1778/* CIK */ 1779#define R_030800_GRBM_GFX_INDEX 0x030800 1780#define S_030800_INSTANCE_INDEX(x) (((unsigned)(x) & 0xFF) << 0) 1781#define G_030800_INSTANCE_INDEX(x) (((x) >> 0) & 0xFF) 1782#define C_030800_INSTANCE_INDEX 0xFFFFFF00 1783#define S_030800_SH_INDEX(x) (((unsigned)(x) & 0xFF) << 8) 1784#define G_030800_SH_INDEX(x) (((x) >> 8) & 0xFF) 1785#define C_030800_SH_INDEX 0xFFFF00FF 1786#define S_030800_SE_INDEX(x) (((unsigned)(x) & 0xFF) << 16) 1787#define G_030800_SE_INDEX(x) (((x) >> 16) & 0xFF) 1788#define C_030800_SE_INDEX 0xFF00FFFF 1789#define S_030800_SH_BROADCAST_WRITES(x) (((unsigned)(x) & 0x1) << 29) 1790#define G_030800_SH_BROADCAST_WRITES(x) (((x) >> 29) & 0x1) 1791#define C_030800_SH_BROADCAST_WRITES 0xDFFFFFFF 1792#define S_030800_INSTANCE_BROADCAST_WRITES(x) (((unsigned)(x) & 0x1) << 30) 1793#define G_030800_INSTANCE_BROADCAST_WRITES(x) (((x) >> 30) & 0x1) 1794#define C_030800_INSTANCE_BROADCAST_WRITES 0xBFFFFFFF 1795#define S_030800_SE_BROADCAST_WRITES(x) (((unsigned)(x) & 0x1) << 31) 1796#define G_030800_SE_BROADCAST_WRITES(x) (((x) >> 31) & 0x1) 1797#define C_030800_SE_BROADCAST_WRITES 0x7FFFFFFF 1798#define R_030900_VGT_ESGS_RING_SIZE 0x030900 1799#define R_030904_VGT_GSVS_RING_SIZE 0x030904 1800#define R_030908_VGT_PRIMITIVE_TYPE 0x030908 1801#define S_030908_PRIM_TYPE(x) (((unsigned)(x) & 0x3F) << 0) 1802#define G_030908_PRIM_TYPE(x) (((x) >> 0) & 0x3F) 1803#define C_030908_PRIM_TYPE 0xFFFFFFC0 1804#define V_030908_DI_PT_NONE 0x00 1805#define V_030908_DI_PT_POINTLIST 0x01 1806#define V_030908_DI_PT_LINELIST 0x02 1807#define V_030908_DI_PT_LINESTRIP 0x03 1808#define V_030908_DI_PT_TRILIST 0x04 1809#define V_030908_DI_PT_TRIFAN 0x05 1810#define V_030908_DI_PT_TRISTRIP 0x06 1811#define V_030908_DI_PT_PATCH 0x09 1812#define V_030908_DI_PT_LINELIST_ADJ 0x0A 1813#define V_030908_DI_PT_LINESTRIP_ADJ 0x0B 1814#define V_030908_DI_PT_TRILIST_ADJ 0x0C 1815#define V_030908_DI_PT_TRISTRIP_ADJ 0x0D 1816#define V_030908_DI_PT_TRI_WITH_WFLAGS 0x10 1817#define V_030908_DI_PT_RECTLIST 0x11 1818#define V_030908_DI_PT_LINELOOP 0x12 1819#define V_030908_DI_PT_QUADLIST 0x13 1820#define V_030908_DI_PT_QUADSTRIP 0x14 1821#define V_030908_DI_PT_POLYGON 0x15 1822#define V_030908_DI_PT_2D_COPY_RECT_LIST_V0 0x16 1823#define V_030908_DI_PT_2D_COPY_RECT_LIST_V1 0x17 1824#define V_030908_DI_PT_2D_COPY_RECT_LIST_V2 0x18 1825#define V_030908_DI_PT_2D_COPY_RECT_LIST_V3 0x19 1826#define V_030908_DI_PT_2D_FILL_RECT_LIST 0x1A 1827#define V_030908_DI_PT_2D_LINE_STRIP 0x1B 1828#define V_030908_DI_PT_2D_TRI_STRIP 0x1C 1829#define R_03090C_VGT_INDEX_TYPE 0x03090C 1830#define S_03090C_INDEX_TYPE(x) (((unsigned)(x) & 0x03) << 0) 1831#define G_03090C_INDEX_TYPE(x) (((x) >> 0) & 0x03) 1832#define C_03090C_INDEX_TYPE 0xFFFFFFFC 1833#define V_03090C_DI_INDEX_SIZE_16_BIT 0x00 1834#define V_03090C_DI_INDEX_SIZE_32_BIT 0x01 1835#define R_030910_VGT_STRMOUT_BUFFER_FILLED_SIZE_0 0x030910 1836#define R_030914_VGT_STRMOUT_BUFFER_FILLED_SIZE_1 0x030914 1837#define R_030918_VGT_STRMOUT_BUFFER_FILLED_SIZE_2 0x030918 1838#define R_03091C_VGT_STRMOUT_BUFFER_FILLED_SIZE_3 0x03091C 1839#define R_030930_VGT_NUM_INDICES 0x030930 1840#define R_030934_VGT_NUM_INSTANCES 0x030934 1841#define R_030938_VGT_TF_RING_SIZE 0x030938 1842#define S_030938_SIZE(x) (((unsigned)(x) & 0xFFFF) << 0) 1843#define G_030938_SIZE(x) (((x) >> 0) & 0xFFFF) 1844#define C_030938_SIZE 0xFFFF0000 1845#define R_03093C_VGT_HS_OFFCHIP_PARAM 0x03093C 1846#define S_03093C_OFFCHIP_BUFFERING(x) (((unsigned)(x) & 0x1FF) << 0) 1847#define G_03093C_OFFCHIP_BUFFERING(x) (((x) >> 0) & 0x1FF) 1848#define C_03093C_OFFCHIP_BUFFERING 0xFFFFFE00 1849#define S_03093C_OFFCHIP_GRANULARITY(x) (((unsigned)(x) & 0x03) << 9) 1850#define G_03093C_OFFCHIP_GRANULARITY(x) (((x) >> 9) & 0x03) 1851#define C_03093C_OFFCHIP_GRANULARITY 0xFFFFF9FF 1852#define V_03093C_X_8K_DWORDS 0x00 1853#define V_03093C_X_4K_DWORDS 0x01 1854#define V_03093C_X_2K_DWORDS 0x02 1855#define V_03093C_X_1K_DWORDS 0x03 1856#define R_030940_VGT_TF_MEMORY_BASE 0x030940 1857#define R_030A00_PA_SU_LINE_STIPPLE_VALUE 0x030A00 1858#define S_030A00_LINE_STIPPLE_VALUE(x) (((unsigned)(x) & 0xFFFFFF) << 0) 1859#define G_030A00_LINE_STIPPLE_VALUE(x) (((x) >> 0) & 0xFFFFFF) 1860#define C_030A00_LINE_STIPPLE_VALUE 0xFF000000 1861#define R_030A04_PA_SC_LINE_STIPPLE_STATE 0x030A04 1862#define S_030A04_CURRENT_PTR(x) (((unsigned)(x) & 0x0F) << 0) 1863#define G_030A04_CURRENT_PTR(x) (((x) >> 0) & 0x0F) 1864#define C_030A04_CURRENT_PTR 0xFFFFFFF0 1865#define S_030A04_CURRENT_COUNT(x) (((unsigned)(x) & 0xFF) << 8) 1866#define G_030A04_CURRENT_COUNT(x) (((x) >> 8) & 0xFF) 1867#define C_030A04_CURRENT_COUNT 0xFFFF00FF 1868#define R_030A10_PA_SC_SCREEN_EXTENT_MIN_0 0x030A10 1869#define S_030A10_X(x) (((unsigned)(x) & 0xFFFF) << 0) 1870#define G_030A10_X(x) (((x) >> 0) & 0xFFFF) 1871#define C_030A10_X 0xFFFF0000 1872#define S_030A10_Y(x) (((unsigned)(x) & 0xFFFF) << 16) 1873#define G_030A10_Y(x) (((x) >> 16) & 0xFFFF) 1874#define C_030A10_Y 0x0000FFFF 1875#define R_030A14_PA_SC_SCREEN_EXTENT_MAX_0 0x030A14 1876#define S_030A14_X(x) (((unsigned)(x) & 0xFFFF) << 0) 1877#define G_030A14_X(x) (((x) >> 0) & 0xFFFF) 1878#define C_030A14_X 0xFFFF0000 1879#define S_030A14_Y(x) (((unsigned)(x) & 0xFFFF) << 16) 1880#define G_030A14_Y(x) (((x) >> 16) & 0xFFFF) 1881#define C_030A14_Y 0x0000FFFF 1882#define R_030A18_PA_SC_SCREEN_EXTENT_MIN_1 0x030A18 1883#define S_030A18_X(x) (((unsigned)(x) & 0xFFFF) << 0) 1884#define G_030A18_X(x) (((x) >> 0) & 0xFFFF) 1885#define C_030A18_X 0xFFFF0000 1886#define S_030A18_Y(x) (((unsigned)(x) & 0xFFFF) << 16) 1887#define G_030A18_Y(x) (((x) >> 16) & 0xFFFF) 1888#define C_030A18_Y 0x0000FFFF 1889#define R_030A2C_PA_SC_SCREEN_EXTENT_MAX_1 0x030A2C 1890#define S_030A2C_X(x) (((unsigned)(x) & 0xFFFF) << 0) 1891#define G_030A2C_X(x) (((x) >> 0) & 0xFFFF) 1892#define C_030A2C_X 0xFFFF0000 1893#define S_030A2C_Y(x) (((unsigned)(x) & 0xFFFF) << 16) 1894#define G_030A2C_Y(x) (((x) >> 16) & 0xFFFF) 1895#define C_030A2C_Y 0x0000FFFF 1896/* */ 1897#define R_008BF0_PA_SC_ENHANCE 0x008BF0 1898#define S_008BF0_ENABLE_PA_SC_OUT_OF_ORDER(x) (((unsigned)(x) & 0x1) << 0) 1899#define G_008BF0_ENABLE_PA_SC_OUT_OF_ORDER(x) (((x) >> 0) & 0x1) 1900#define C_008BF0_ENABLE_PA_SC_OUT_OF_ORDER 0xFFFFFFFE 1901#define S_008BF0_DISABLE_SC_DB_TILE_FIX(x) (((unsigned)(x) & 0x1) << 1) 1902#define G_008BF0_DISABLE_SC_DB_TILE_FIX(x) (((x) >> 1) & 0x1) 1903#define C_008BF0_DISABLE_SC_DB_TILE_FIX 0xFFFFFFFD 1904#define S_008BF0_DISABLE_AA_MASK_FULL_FIX(x) (((unsigned)(x) & 0x1) << 2) 1905#define G_008BF0_DISABLE_AA_MASK_FULL_FIX(x) (((x) >> 2) & 0x1) 1906#define C_008BF0_DISABLE_AA_MASK_FULL_FIX 0xFFFFFFFB 1907#define S_008BF0_ENABLE_1XMSAA_SAMPLE_LOCATIONS(x) (((unsigned)(x) & 0x1) << 3) 1908#define G_008BF0_ENABLE_1XMSAA_SAMPLE_LOCATIONS(x) (((x) >> 3) & 0x1) 1909#define C_008BF0_ENABLE_1XMSAA_SAMPLE_LOCATIONS 0xFFFFFFF7 1910#define S_008BF0_ENABLE_1XMSAA_SAMPLE_LOC_CENTROID(x) (((unsigned)(x) & 0x1) << 4) 1911#define G_008BF0_ENABLE_1XMSAA_SAMPLE_LOC_CENTROID(x) (((x) >> 4) & 0x1) 1912#define C_008BF0_ENABLE_1XMSAA_SAMPLE_LOC_CENTROID 0xFFFFFFEF 1913#define S_008BF0_DISABLE_SCISSOR_FIX(x) (((unsigned)(x) & 0x1) << 5) 1914#define G_008BF0_DISABLE_SCISSOR_FIX(x) (((x) >> 5) & 0x1) 1915#define C_008BF0_DISABLE_SCISSOR_FIX 0xFFFFFFDF 1916#define S_008BF0_DISABLE_PW_BUBBLE_COLLAPSE(x) (((unsigned)(x) & 0x03) << 6) 1917#define G_008BF0_DISABLE_PW_BUBBLE_COLLAPSE(x) (((x) >> 6) & 0x03) 1918#define C_008BF0_DISABLE_PW_BUBBLE_COLLAPSE 0xFFFFFF3F 1919#define S_008BF0_SEND_UNLIT_STILES_TO_PACKER(x) (((unsigned)(x) & 0x1) << 8) 1920#define G_008BF0_SEND_UNLIT_STILES_TO_PACKER(x) (((x) >> 8) & 0x1) 1921#define C_008BF0_SEND_UNLIT_STILES_TO_PACKER 0xFFFFFEFF 1922#define S_008BF0_DISABLE_DUALGRAD_PERF_OPTIMIZATION(x) (((unsigned)(x) & 0x1) << 9) 1923#define G_008BF0_DISABLE_DUALGRAD_PERF_OPTIMIZATION(x) (((x) >> 9) & 0x1) 1924#define C_008BF0_DISABLE_DUALGRAD_PERF_OPTIMIZATION 0xFFFFFDFF 1925/* not on CIK */ 1926#define R_008C08_SQC_CACHES 0x008C08 1927#define S_008C08_INST_INVALIDATE(x) (((unsigned)(x) & 0x1) << 0) 1928#define G_008C08_INST_INVALIDATE(x) (((x) >> 0) & 0x1) 1929#define C_008C08_INST_INVALIDATE 0xFFFFFFFE 1930#define S_008C08_DATA_INVALIDATE(x) (((unsigned)(x) & 0x1) << 1) 1931#define G_008C08_DATA_INVALIDATE(x) (((x) >> 1) & 0x1) 1932#define C_008C08_DATA_INVALIDATE 0xFFFFFFFD 1933/* CIK */ 1934#define R_030D20_SQC_CACHES 0x030D20 1935#define S_030D20_INST_INVALIDATE(x) (((unsigned)(x) & 0x1) << 0) 1936#define G_030D20_INST_INVALIDATE(x) (((x) >> 0) & 0x1) 1937#define C_030D20_INST_INVALIDATE 0xFFFFFFFE 1938#define S_030D20_DATA_INVALIDATE(x) (((unsigned)(x) & 0x1) << 1) 1939#define G_030D20_DATA_INVALIDATE(x) (((x) >> 1) & 0x1) 1940#define C_030D20_DATA_INVALIDATE 0xFFFFFFFD 1941#define S_030D20_INVALIDATE_VOLATILE(x) (((unsigned)(x) & 0x1) << 2) 1942#define G_030D20_INVALIDATE_VOLATILE(x) (((x) >> 2) & 0x1) 1943#define C_030D20_INVALIDATE_VOLATILE 0xFFFFFFFB 1944/* */ 1945#define R_008C0C_SQ_RANDOM_WAVE_PRI 0x008C0C 1946#define S_008C0C_RET(x) (((unsigned)(x) & 0x7F) << 0) 1947#define G_008C0C_RET(x) (((x) >> 0) & 0x7F) 1948#define C_008C0C_RET 0xFFFFFF80 1949#define S_008C0C_RUI(x) (((unsigned)(x) & 0x07) << 7) 1950#define G_008C0C_RUI(x) (((x) >> 7) & 0x07) 1951#define C_008C0C_RUI 0xFFFFFC7F 1952#define S_008C0C_RNG(x) (((unsigned)(x) & 0x7FF) << 10) 1953#define G_008C0C_RNG(x) (((x) >> 10) & 0x7FF) 1954#define C_008C0C_RNG 0xFFE003FF 1955#define R_008DFC_SQ_EXP_0 0x008DFC 1956#define S_008DFC_EN(x) (((unsigned)(x) & 0x0F) << 0) 1957#define G_008DFC_EN(x) (((x) >> 0) & 0x0F) 1958#define C_008DFC_EN 0xFFFFFFF0 1959#define S_008DFC_TGT(x) (((unsigned)(x) & 0x3F) << 4) 1960#define G_008DFC_TGT(x) (((x) >> 4) & 0x3F) 1961#define C_008DFC_TGT 0xFFFFFC0F 1962#define V_008DFC_SQ_EXP_MRT 0x00 1963#define V_008DFC_SQ_EXP_MRTZ 0x08 1964#define V_008DFC_SQ_EXP_NULL 0x09 1965#define V_008DFC_SQ_EXP_POS 0x0C 1966#define V_008DFC_SQ_EXP_PARAM 0x20 1967#define S_008DFC_COMPR(x) (((unsigned)(x) & 0x1) << 10) 1968#define G_008DFC_COMPR(x) (((x) >> 10) & 0x1) 1969#define C_008DFC_COMPR 0xFFFFFBFF 1970#define S_008DFC_DONE(x) (((unsigned)(x) & 0x1) << 11) 1971#define G_008DFC_DONE(x) (((x) >> 11) & 0x1) 1972#define C_008DFC_DONE 0xFFFFF7FF 1973#define S_008DFC_VM(x) (((unsigned)(x) & 0x1) << 12) 1974#define G_008DFC_VM(x) (((x) >> 12) & 0x1) 1975#define C_008DFC_VM 0xFFFFEFFF 1976#define S_008DFC_ENCODING(x) (((unsigned)(x) & 0x3F) << 26) 1977#define G_008DFC_ENCODING(x) (((x) >> 26) & 0x3F) 1978#define C_008DFC_ENCODING 0x03FFFFFF 1979#define V_008DFC_SQ_ENC_EXP_FIELD 0x3E 1980/* CIK */ 1981#define R_030E00_TA_CS_BC_BASE_ADDR 0x030E00 1982#define R_030E04_TA_CS_BC_BASE_ADDR_HI 0x030E04 1983#define S_030E04_ADDRESS(x) (((unsigned)(x) & 0xFF) << 0) 1984#define G_030E04_ADDRESS(x) (((x) >> 0) & 0xFF) 1985#define C_030E04_ADDRESS 0xFFFFFF00 1986#define R_030F00_DB_OCCLUSION_COUNT0_LOW 0x030F00 1987#define R_030F04_DB_OCCLUSION_COUNT0_HI 0x030F04 1988#define S_030F04_COUNT_HI(x) (((unsigned)(x) & 0x7FFFFFFF) << 0) 1989#define G_030F04_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF) 1990#define C_030F04_COUNT_HI 0x80000000 1991/* */ 1992#define R_008F00_SQ_BUF_RSRC_WORD0 0x008F00 1993#define R_008F04_SQ_BUF_RSRC_WORD1 0x008F04 1994#define S_008F04_BASE_ADDRESS_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 1995#define G_008F04_BASE_ADDRESS_HI(x) (((x) >> 0) & 0xFFFF) 1996#define C_008F04_BASE_ADDRESS_HI 0xFFFF0000 1997#define S_008F04_STRIDE(x) (((unsigned)(x) & 0x3FFF) << 16) 1998#define G_008F04_STRIDE(x) (((x) >> 16) & 0x3FFF) 1999#define C_008F04_STRIDE 0xC000FFFF 2000#define S_008F04_CACHE_SWIZZLE(x) (((unsigned)(x) & 0x1) << 30) 2001#define G_008F04_CACHE_SWIZZLE(x) (((x) >> 30) & 0x1) 2002#define C_008F04_CACHE_SWIZZLE 0xBFFFFFFF 2003#define S_008F04_SWIZZLE_ENABLE(x) (((unsigned)(x) & 0x1) << 31) 2004#define G_008F04_SWIZZLE_ENABLE(x) (((x) >> 31) & 0x1) 2005#define C_008F04_SWIZZLE_ENABLE 0x7FFFFFFF 2006#define R_030F08_DB_OCCLUSION_COUNT1_LOW 0x030F08 2007#define R_008F08_SQ_BUF_RSRC_WORD2 0x008F08 2008#define R_030F0C_DB_OCCLUSION_COUNT1_HI 0x030F0C 2009#define S_030F0C_COUNT_HI(x) (((unsigned)(x) & 0x7FFFFFFF) << 0) 2010#define G_030F0C_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF) 2011#define C_030F0C_COUNT_HI 0x80000000 2012#define R_008F0C_SQ_BUF_RSRC_WORD3 0x008F0C 2013#define S_008F0C_DST_SEL_X(x) (((unsigned)(x) & 0x07) << 0) 2014#define G_008F0C_DST_SEL_X(x) (((x) >> 0) & 0x07) 2015#define C_008F0C_DST_SEL_X 0xFFFFFFF8 2016#define V_008F0C_SQ_SEL_0 0x00 2017#define V_008F0C_SQ_SEL_1 0x01 2018#define V_008F0C_SQ_SEL_RESERVED_0 0x02 2019#define V_008F0C_SQ_SEL_RESERVED_1 0x03 2020#define V_008F0C_SQ_SEL_X 0x04 2021#define V_008F0C_SQ_SEL_Y 0x05 2022#define V_008F0C_SQ_SEL_Z 0x06 2023#define V_008F0C_SQ_SEL_W 0x07 2024#define S_008F0C_DST_SEL_Y(x) (((unsigned)(x) & 0x07) << 3) 2025#define G_008F0C_DST_SEL_Y(x) (((x) >> 3) & 0x07) 2026#define C_008F0C_DST_SEL_Y 0xFFFFFFC7 2027#define V_008F0C_SQ_SEL_0 0x00 2028#define V_008F0C_SQ_SEL_1 0x01 2029#define V_008F0C_SQ_SEL_RESERVED_0 0x02 2030#define V_008F0C_SQ_SEL_RESERVED_1 0x03 2031#define V_008F0C_SQ_SEL_X 0x04 2032#define V_008F0C_SQ_SEL_Y 0x05 2033#define V_008F0C_SQ_SEL_Z 0x06 2034#define V_008F0C_SQ_SEL_W 0x07 2035#define S_008F0C_DST_SEL_Z(x) (((unsigned)(x) & 0x07) << 6) 2036#define G_008F0C_DST_SEL_Z(x) (((x) >> 6) & 0x07) 2037#define C_008F0C_DST_SEL_Z 0xFFFFFE3F 2038#define V_008F0C_SQ_SEL_0 0x00 2039#define V_008F0C_SQ_SEL_1 0x01 2040#define V_008F0C_SQ_SEL_RESERVED_0 0x02 2041#define V_008F0C_SQ_SEL_RESERVED_1 0x03 2042#define V_008F0C_SQ_SEL_X 0x04 2043#define V_008F0C_SQ_SEL_Y 0x05 2044#define V_008F0C_SQ_SEL_Z 0x06 2045#define V_008F0C_SQ_SEL_W 0x07 2046#define S_008F0C_DST_SEL_W(x) (((unsigned)(x) & 0x07) << 9) 2047#define G_008F0C_DST_SEL_W(x) (((x) >> 9) & 0x07) 2048#define C_008F0C_DST_SEL_W 0xFFFFF1FF 2049#define V_008F0C_SQ_SEL_0 0x00 2050#define V_008F0C_SQ_SEL_1 0x01 2051#define V_008F0C_SQ_SEL_RESERVED_0 0x02 2052#define V_008F0C_SQ_SEL_RESERVED_1 0x03 2053#define V_008F0C_SQ_SEL_X 0x04 2054#define V_008F0C_SQ_SEL_Y 0x05 2055#define V_008F0C_SQ_SEL_Z 0x06 2056#define V_008F0C_SQ_SEL_W 0x07 2057#define S_008F0C_NUM_FORMAT(x) (((unsigned)(x) & 0x07) << 12) 2058#define G_008F0C_NUM_FORMAT(x) (((x) >> 12) & 0x07) 2059#define C_008F0C_NUM_FORMAT 0xFFFF8FFF 2060#define V_008F0C_BUF_NUM_FORMAT_UNORM 0x00 2061#define V_008F0C_BUF_NUM_FORMAT_SNORM 0x01 2062#define V_008F0C_BUF_NUM_FORMAT_USCALED 0x02 2063#define V_008F0C_BUF_NUM_FORMAT_SSCALED 0x03 2064#define V_008F0C_BUF_NUM_FORMAT_UINT 0x04 2065#define V_008F0C_BUF_NUM_FORMAT_SINT 0x05 2066#define V_008F0C_BUF_NUM_FORMAT_SNORM_OGL 0x06 2067#define V_008F0C_BUF_NUM_FORMAT_FLOAT 0x07 2068#define S_008F0C_DATA_FORMAT(x) (((unsigned)(x) & 0x0F) << 15) 2069#define G_008F0C_DATA_FORMAT(x) (((x) >> 15) & 0x0F) 2070#define C_008F0C_DATA_FORMAT 0xFFF87FFF 2071#define V_008F0C_BUF_DATA_FORMAT_INVALID 0x00 2072#define V_008F0C_BUF_DATA_FORMAT_8 0x01 2073#define V_008F0C_BUF_DATA_FORMAT_16 0x02 2074#define V_008F0C_BUF_DATA_FORMAT_8_8 0x03 2075#define V_008F0C_BUF_DATA_FORMAT_32 0x04 2076#define V_008F0C_BUF_DATA_FORMAT_16_16 0x05 2077#define V_008F0C_BUF_DATA_FORMAT_10_11_11 0x06 2078#define V_008F0C_BUF_DATA_FORMAT_11_11_10 0x07 2079#define V_008F0C_BUF_DATA_FORMAT_10_10_10_2 0x08 2080#define V_008F0C_BUF_DATA_FORMAT_2_10_10_10 0x09 2081#define V_008F0C_BUF_DATA_FORMAT_8_8_8_8 0x0A 2082#define V_008F0C_BUF_DATA_FORMAT_32_32 0x0B 2083#define V_008F0C_BUF_DATA_FORMAT_16_16_16_16 0x0C 2084#define V_008F0C_BUF_DATA_FORMAT_32_32_32 0x0D 2085#define V_008F0C_BUF_DATA_FORMAT_32_32_32_32 0x0E 2086#define V_008F0C_BUF_DATA_FORMAT_RESERVED_15 0x0F 2087#define S_008F0C_ELEMENT_SIZE(x) (((unsigned)(x) & 0x03) << 19) 2088#define G_008F0C_ELEMENT_SIZE(x) (((x) >> 19) & 0x03) 2089#define C_008F0C_ELEMENT_SIZE 0xFFE7FFFF 2090#define S_008F0C_INDEX_STRIDE(x) (((unsigned)(x) & 0x03) << 21) 2091#define G_008F0C_INDEX_STRIDE(x) (((x) >> 21) & 0x03) 2092#define C_008F0C_INDEX_STRIDE 0xFF9FFFFF 2093#define S_008F0C_ADD_TID_ENABLE(x) (((unsigned)(x) & 0x1) << 23) 2094#define G_008F0C_ADD_TID_ENABLE(x) (((x) >> 23) & 0x1) 2095#define C_008F0C_ADD_TID_ENABLE 0xFF7FFFFF 2096/* CIK */ 2097#define S_008F0C_ATC(x) (((unsigned)(x) & 0x1) << 24) 2098#define G_008F0C_ATC(x) (((x) >> 24) & 0x1) 2099#define C_008F0C_ATC 0xFEFFFFFF 2100/* */ 2101#define S_008F0C_HASH_ENABLE(x) (((unsigned)(x) & 0x1) << 25) 2102#define G_008F0C_HASH_ENABLE(x) (((x) >> 25) & 0x1) 2103#define C_008F0C_HASH_ENABLE 0xFDFFFFFF 2104#define S_008F0C_HEAP(x) (((unsigned)(x) & 0x1) << 26) 2105#define G_008F0C_HEAP(x) (((x) >> 26) & 0x1) 2106#define C_008F0C_HEAP 0xFBFFFFFF 2107/* CIK */ 2108#define S_008F0C_MTYPE(x) (((unsigned)(x) & 0x07) << 27) 2109#define G_008F0C_MTYPE(x) (((x) >> 27) & 0x07) 2110#define C_008F0C_MTYPE 0xC7FFFFFF 2111/* */ 2112#define S_008F0C_TYPE(x) (((unsigned)(x) & 0x03) << 30) 2113#define G_008F0C_TYPE(x) (((x) >> 30) & 0x03) 2114#define C_008F0C_TYPE 0x3FFFFFFF 2115#define V_008F0C_SQ_RSRC_BUF 0x00 2116#define V_008F0C_SQ_RSRC_BUF_RSVD_1 0x01 2117#define V_008F0C_SQ_RSRC_BUF_RSVD_2 0x02 2118#define V_008F0C_SQ_RSRC_BUF_RSVD_3 0x03 2119#define R_030F10_DB_OCCLUSION_COUNT2_LOW 0x030F10 2120#define R_008F10_SQ_IMG_RSRC_WORD0 0x008F10 2121#define R_030F14_DB_OCCLUSION_COUNT2_HI 0x030F14 2122#define S_030F14_COUNT_HI(x) (((unsigned)(x) & 0x7FFFFFFF) << 0) 2123#define G_030F14_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF) 2124#define C_030F14_COUNT_HI 0x80000000 2125#define R_008F14_SQ_IMG_RSRC_WORD1 0x008F14 2126#define S_008F14_BASE_ADDRESS_HI(x) (((unsigned)(x) & 0xFF) << 0) 2127#define G_008F14_BASE_ADDRESS_HI(x) (((x) >> 0) & 0xFF) 2128#define C_008F14_BASE_ADDRESS_HI 0xFFFFFF00 2129#define S_008F14_MIN_LOD(x) (((unsigned)(x) & 0xFFF) << 8) 2130#define G_008F14_MIN_LOD(x) (((x) >> 8) & 0xFFF) 2131#define C_008F14_MIN_LOD 0xFFF000FF 2132#define S_008F14_DATA_FORMAT_GFX6(x) (((unsigned)(x) & 0x3F) << 20) 2133#define G_008F14_DATA_FORMAT_GFX6(x) (((x) >> 20) & 0x3F) 2134#define C_008F14_DATA_FORMAT_GFX6 0xFC0FFFFF 2135#define V_008F14_IMG_DATA_FORMAT_INVALID 0x00 2136#define V_008F14_IMG_DATA_FORMAT_8 0x01 2137#define V_008F14_IMG_DATA_FORMAT_16 0x02 2138#define V_008F14_IMG_DATA_FORMAT_8_8 0x03 2139#define V_008F14_IMG_DATA_FORMAT_32 0x04 2140#define V_008F14_IMG_DATA_FORMAT_16_16 0x05 2141#define V_008F14_IMG_DATA_FORMAT_10_11_11 0x06 2142#define V_008F14_IMG_DATA_FORMAT_11_11_10 0x07 2143#define V_008F14_IMG_DATA_FORMAT_10_10_10_2 0x08 2144#define V_008F14_IMG_DATA_FORMAT_2_10_10_10 0x09 2145#define V_008F14_IMG_DATA_FORMAT_8_8_8_8 0x0A 2146#define V_008F14_IMG_DATA_FORMAT_32_32 0x0B 2147#define V_008F14_IMG_DATA_FORMAT_16_16_16_16 0x0C 2148#define V_008F14_IMG_DATA_FORMAT_32_32_32 0x0D 2149#define V_008F14_IMG_DATA_FORMAT_32_32_32_32 0x0E 2150#define V_008F14_IMG_DATA_FORMAT_RESERVED_15 0x0F 2151#define V_008F14_IMG_DATA_FORMAT_5_6_5 0x10 2152#define V_008F14_IMG_DATA_FORMAT_1_5_5_5 0x11 2153#define V_008F14_IMG_DATA_FORMAT_5_5_5_1 0x12 2154#define V_008F14_IMG_DATA_FORMAT_4_4_4_4 0x13 2155#define V_008F14_IMG_DATA_FORMAT_8_24 0x14 2156#define V_008F14_IMG_DATA_FORMAT_24_8 0x15 2157#define V_008F14_IMG_DATA_FORMAT_X24_8_32 0x16 2158#define V_008F14_IMG_DATA_FORMAT_8_AS_8_8_8_8 0x17 /* stoney+ */ 2159#define V_008F14_IMG_DATA_FORMAT_ETC2_RGB 0x18 /* stoney+ */ 2160#define V_008F14_IMG_DATA_FORMAT_ETC2_RGBA 0x19 /* stoney+ */ 2161#define V_008F14_IMG_DATA_FORMAT_ETC2_R 0x1A /* stoney+ */ 2162#define V_008F14_IMG_DATA_FORMAT_ETC2_RG 0x1B /* stoney+ */ 2163#define V_008F14_IMG_DATA_FORMAT_ETC2_RGBA1 0x1C /* stoney+ */ 2164#define V_008F14_IMG_DATA_FORMAT_RESERVED_29 0x1D 2165#define V_008F14_IMG_DATA_FORMAT_RESERVED_30 0x1E 2166#define V_008F14_IMG_DATA_FORMAT_RESERVED_31 0x1F 2167#define V_008F14_IMG_DATA_FORMAT_GB_GR 0x20 2168#define V_008F14_IMG_DATA_FORMAT_BG_RG 0x21 2169#define V_008F14_IMG_DATA_FORMAT_5_9_9_9 0x22 2170#define V_008F14_IMG_DATA_FORMAT_BC1 0x23 2171#define V_008F14_IMG_DATA_FORMAT_BC2 0x24 2172#define V_008F14_IMG_DATA_FORMAT_BC3 0x25 2173#define V_008F14_IMG_DATA_FORMAT_BC4 0x26 2174#define V_008F14_IMG_DATA_FORMAT_BC5 0x27 2175#define V_008F14_IMG_DATA_FORMAT_BC6 0x28 2176#define V_008F14_IMG_DATA_FORMAT_BC7 0x29 2177#define V_008F14_IMG_DATA_FORMAT_16_AS_16_16_16_16_GFX6 0x2A /* stoney+ */ 2178#define V_008F14_IMG_DATA_FORMAT_16_AS_32_32_32_32_GFX6 0x2B /* stoney+ */ 2179#define V_008F14_IMG_DATA_FORMAT_FMASK8_S2_F1 0x2C 2180#define V_008F14_IMG_DATA_FORMAT_FMASK8_S4_F1 0x2D 2181#define V_008F14_IMG_DATA_FORMAT_FMASK8_S8_F1 0x2E 2182#define V_008F14_IMG_DATA_FORMAT_FMASK8_S2_F2 0x2F 2183#define V_008F14_IMG_DATA_FORMAT_FMASK8_S4_F2 0x30 2184#define V_008F14_IMG_DATA_FORMAT_FMASK8_S4_F4 0x31 2185#define V_008F14_IMG_DATA_FORMAT_FMASK16_S16_F1 0x32 2186#define V_008F14_IMG_DATA_FORMAT_FMASK16_S8_F2 0x33 2187#define V_008F14_IMG_DATA_FORMAT_FMASK32_S16_F2 0x34 2188#define V_008F14_IMG_DATA_FORMAT_FMASK32_S8_F4 0x35 2189#define V_008F14_IMG_DATA_FORMAT_FMASK32_S8_F8 0x36 2190#define V_008F14_IMG_DATA_FORMAT_FMASK64_S16_F4 0x37 2191#define V_008F14_IMG_DATA_FORMAT_FMASK64_S16_F8 0x38 2192#define V_008F14_IMG_DATA_FORMAT_4_4 0x39 2193#define V_008F14_IMG_DATA_FORMAT_6_5_5 0x3A 2194#define V_008F14_IMG_DATA_FORMAT_1 0x3B 2195#define V_008F14_IMG_DATA_FORMAT_1_REVERSED 0x3C 2196#define V_008F14_IMG_DATA_FORMAT_32_AS_8 0x3D /* not on stoney */ 2197#define V_008F14_IMG_DATA_FORMAT_32_AS_8_8 0x3E /* not on stoney */ 2198#define V_008F14_IMG_DATA_FORMAT_32_AS_32_32_32_32 0x3F 2199#define S_008F14_NUM_FORMAT_GFX6(x) (((unsigned)(x) & 0x0F) << 26) 2200#define G_008F14_NUM_FORMAT_GFX6(x) (((x) >> 26) & 0x0F) 2201#define C_008F14_NUM_FORMAT_GFX6 0xC3FFFFFF 2202#define V_008F14_IMG_NUM_FORMAT_UNORM 0x00 2203#define V_008F14_IMG_NUM_FORMAT_SNORM 0x01 2204#define V_008F14_IMG_NUM_FORMAT_USCALED 0x02 2205#define V_008F14_IMG_NUM_FORMAT_SSCALED 0x03 2206#define V_008F14_IMG_NUM_FORMAT_UINT 0x04 2207#define V_008F14_IMG_NUM_FORMAT_SINT 0x05 2208#define V_008F14_IMG_NUM_FORMAT_SNORM_OGL 0x06 2209#define V_008F14_IMG_NUM_FORMAT_FLOAT 0x07 2210#define V_008F14_IMG_NUM_FORMAT_RESERVED_8 0x08 2211#define V_008F14_IMG_NUM_FORMAT_SRGB 0x09 2212#define V_008F14_IMG_NUM_FORMAT_UBNORM 0x0A /* not on VI+ */ 2213#define V_008F14_IMG_NUM_FORMAT_UBNORM_OGL 0x0B /* not on VI+ */ 2214#define V_008F14_IMG_NUM_FORMAT_UBINT 0x0C /* not on VI+ */ 2215#define V_008F14_IMG_NUM_FORMAT_UBSCALED 0x0D /* not on VI+ */ 2216#define V_008F14_IMG_NUM_FORMAT_RESERVED_14 0x0E 2217#define V_008F14_IMG_NUM_FORMAT_RESERVED_15 0x0F 2218/* CIK */ 2219#define S_008F14_MTYPE(x) (((unsigned)(x) & 0x03) << 30) 2220#define G_008F14_MTYPE(x) (((x) >> 30) & 0x03) 2221#define C_008F14_MTYPE 0x3FFFFFFF 2222/* */ 2223#define R_030F18_DB_OCCLUSION_COUNT3_LOW 0x030F18 2224#define R_008F18_SQ_IMG_RSRC_WORD2 0x008F18 2225#define S_008F18_WIDTH(x) (((unsigned)(x) & 0x3FFF) << 0) 2226#define G_008F18_WIDTH(x) (((x) >> 0) & 0x3FFF) 2227#define C_008F18_WIDTH 0xFFFFC000 2228#define S_008F18_HEIGHT(x) (((unsigned)(x) & 0x3FFF) << 14) 2229#define G_008F18_HEIGHT(x) (((x) >> 14) & 0x3FFF) 2230#define C_008F18_HEIGHT 0xF0003FFF 2231#define S_008F18_PERF_MOD(x) (((unsigned)(x) & 0x07) << 28) 2232#define G_008F18_PERF_MOD(x) (((x) >> 28) & 0x07) 2233#define C_008F18_PERF_MOD 0x8FFFFFFF 2234#define S_008F18_INTERLACED(x) (((unsigned)(x) & 0x1) << 31) 2235#define G_008F18_INTERLACED(x) (((x) >> 31) & 0x1) 2236#define C_008F18_INTERLACED 0x7FFFFFFF 2237#define R_030F1C_DB_OCCLUSION_COUNT3_HI 0x030F1C 2238#define S_030F1C_COUNT_HI(x) (((unsigned)(x) & 0x7FFFFFFF) << 0) 2239#define G_030F1C_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF) 2240#define C_030F1C_COUNT_HI 0x80000000 2241#define R_008F1C_SQ_IMG_RSRC_WORD3 0x008F1C 2242#define S_008F1C_DST_SEL_X(x) (((unsigned)(x) & 0x07) << 0) 2243#define G_008F1C_DST_SEL_X(x) (((x) >> 0) & 0x07) 2244#define C_008F1C_DST_SEL_X 0xFFFFFFF8 2245#define V_008F1C_SQ_SEL_0 0x00 2246#define V_008F1C_SQ_SEL_1 0x01 2247#define V_008F1C_SQ_SEL_RESERVED_0 0x02 2248#define V_008F1C_SQ_SEL_RESERVED_1 0x03 2249#define V_008F1C_SQ_SEL_X 0x04 2250#define V_008F1C_SQ_SEL_Y 0x05 2251#define V_008F1C_SQ_SEL_Z 0x06 2252#define V_008F1C_SQ_SEL_W 0x07 2253#define S_008F1C_DST_SEL_Y(x) (((unsigned)(x) & 0x07) << 3) 2254#define G_008F1C_DST_SEL_Y(x) (((x) >> 3) & 0x07) 2255#define C_008F1C_DST_SEL_Y 0xFFFFFFC7 2256#define V_008F1C_SQ_SEL_0 0x00 2257#define V_008F1C_SQ_SEL_1 0x01 2258#define V_008F1C_SQ_SEL_RESERVED_0 0x02 2259#define V_008F1C_SQ_SEL_RESERVED_1 0x03 2260#define V_008F1C_SQ_SEL_X 0x04 2261#define V_008F1C_SQ_SEL_Y 0x05 2262#define V_008F1C_SQ_SEL_Z 0x06 2263#define V_008F1C_SQ_SEL_W 0x07 2264#define S_008F1C_DST_SEL_Z(x) (((unsigned)(x) & 0x07) << 6) 2265#define G_008F1C_DST_SEL_Z(x) (((x) >> 6) & 0x07) 2266#define C_008F1C_DST_SEL_Z 0xFFFFFE3F 2267#define V_008F1C_SQ_SEL_0 0x00 2268#define V_008F1C_SQ_SEL_1 0x01 2269#define V_008F1C_SQ_SEL_RESERVED_0 0x02 2270#define V_008F1C_SQ_SEL_RESERVED_1 0x03 2271#define V_008F1C_SQ_SEL_X 0x04 2272#define V_008F1C_SQ_SEL_Y 0x05 2273#define V_008F1C_SQ_SEL_Z 0x06 2274#define V_008F1C_SQ_SEL_W 0x07 2275#define S_008F1C_DST_SEL_W(x) (((unsigned)(x) & 0x07) << 9) 2276#define G_008F1C_DST_SEL_W(x) (((x) >> 9) & 0x07) 2277#define C_008F1C_DST_SEL_W 0xFFFFF1FF 2278#define V_008F1C_SQ_SEL_0 0x00 2279#define V_008F1C_SQ_SEL_1 0x01 2280#define V_008F1C_SQ_SEL_RESERVED_0 0x02 2281#define V_008F1C_SQ_SEL_RESERVED_1 0x03 2282#define V_008F1C_SQ_SEL_X 0x04 2283#define V_008F1C_SQ_SEL_Y 0x05 2284#define V_008F1C_SQ_SEL_Z 0x06 2285#define V_008F1C_SQ_SEL_W 0x07 2286#define S_008F1C_BASE_LEVEL(x) (((unsigned)(x) & 0x0F) << 12) 2287#define G_008F1C_BASE_LEVEL(x) (((x) >> 12) & 0x0F) 2288#define C_008F1C_BASE_LEVEL 0xFFFF0FFF 2289#define S_008F1C_LAST_LEVEL(x) (((unsigned)(x) & 0x0F) << 16) 2290#define G_008F1C_LAST_LEVEL(x) (((x) >> 16) & 0x0F) 2291#define C_008F1C_LAST_LEVEL 0xFFF0FFFF 2292#define S_008F1C_TILING_INDEX(x) (((unsigned)(x) & 0x1F) << 20) 2293#define G_008F1C_TILING_INDEX(x) (((x) >> 20) & 0x1F) 2294#define C_008F1C_TILING_INDEX 0xFE0FFFFF 2295#define S_008F1C_POW2_PAD(x) (((unsigned)(x) & 0x1) << 25) 2296#define G_008F1C_POW2_PAD(x) (((x) >> 25) & 0x1) 2297#define C_008F1C_POW2_PAD 0xFDFFFFFF 2298/* CIK */ 2299#define S_008F1C_MTYPE(x) (((unsigned)(x) & 0x1) << 26) 2300#define G_008F1C_MTYPE(x) (((x) >> 26) & 0x1) 2301#define C_008F1C_MTYPE 0xFBFFFFFF 2302#define S_008F1C_ATC(x) (((unsigned)(x) & 0x1) << 27) 2303#define G_008F1C_ATC(x) (((x) >> 27) & 0x1) 2304#define C_008F1C_ATC 0xF7FFFFFF 2305/* */ 2306#define S_008F1C_TYPE(x) (((unsigned)(x) & 0x0F) << 28) 2307#define G_008F1C_TYPE(x) (((x) >> 28) & 0x0F) 2308#define C_008F1C_TYPE 0x0FFFFFFF 2309#define V_008F1C_SQ_RSRC_IMG_RSVD_0 0x00 2310#define V_008F1C_SQ_RSRC_IMG_RSVD_1 0x01 2311#define V_008F1C_SQ_RSRC_IMG_RSVD_2 0x02 2312#define V_008F1C_SQ_RSRC_IMG_RSVD_3 0x03 2313#define V_008F1C_SQ_RSRC_IMG_RSVD_4 0x04 2314#define V_008F1C_SQ_RSRC_IMG_RSVD_5 0x05 2315#define V_008F1C_SQ_RSRC_IMG_RSVD_6 0x06 2316#define V_008F1C_SQ_RSRC_IMG_RSVD_7 0x07 2317#define V_008F1C_SQ_RSRC_IMG_1D 0x08 2318#define V_008F1C_SQ_RSRC_IMG_2D 0x09 2319#define V_008F1C_SQ_RSRC_IMG_3D 0x0A 2320#define V_008F1C_SQ_RSRC_IMG_CUBE 0x0B 2321#define V_008F1C_SQ_RSRC_IMG_1D_ARRAY 0x0C 2322#define V_008F1C_SQ_RSRC_IMG_2D_ARRAY 0x0D 2323#define V_008F1C_SQ_RSRC_IMG_2D_MSAA 0x0E 2324#define V_008F1C_SQ_RSRC_IMG_2D_MSAA_ARRAY 0x0F 2325#define R_008F20_SQ_IMG_RSRC_WORD4 0x008F20 2326#define S_008F20_DEPTH(x) (((unsigned)(x) & 0x1FFF) << 0) 2327#define G_008F20_DEPTH(x) (((x) >> 0) & 0x1FFF) 2328#define C_008F20_DEPTH 0xFFFFE000 2329#define S_008F20_PITCH_GFX6(x) (((unsigned)(x) & 0x3FFF) << 13) 2330#define G_008F20_PITCH_GFX6(x) (((x) >> 13) & 0x3FFF) 2331#define C_008F20_PITCH_GFX6 0xF8001FFF 2332#define R_008F24_SQ_IMG_RSRC_WORD5 0x008F24 2333#define S_008F24_BASE_ARRAY(x) (((unsigned)(x) & 0x1FFF) << 0) 2334#define G_008F24_BASE_ARRAY(x) (((x) >> 0) & 0x1FFF) 2335#define C_008F24_BASE_ARRAY 0xFFFFE000 2336#define S_008F24_LAST_ARRAY(x) (((unsigned)(x) & 0x1FFF) << 13) 2337#define G_008F24_LAST_ARRAY(x) (((x) >> 13) & 0x1FFF) 2338#define C_008F24_LAST_ARRAY 0xFC001FFF 2339#define R_008F28_SQ_IMG_RSRC_WORD6 0x008F28 2340#define S_008F28_MIN_LOD_WARN(x) (((unsigned)(x) & 0xFFF) << 0) 2341#define G_008F28_MIN_LOD_WARN(x) (((x) >> 0) & 0xFFF) 2342#define C_008F28_MIN_LOD_WARN 0xFFFFF000 2343/* CIK */ 2344#define S_008F28_COUNTER_BANK_ID(x) (((unsigned)(x) & 0xFF) << 12) 2345#define G_008F28_COUNTER_BANK_ID(x) (((x) >> 12) & 0xFF) 2346#define C_008F28_COUNTER_BANK_ID 0xFFF00FFF 2347#define S_008F28_LOD_HDW_CNT_EN(x) (((unsigned)(x) & 0x1) << 20) 2348#define G_008F28_LOD_HDW_CNT_EN(x) (((x) >> 20) & 0x1) 2349#define C_008F28_LOD_HDW_CNT_EN 0xFFEFFFFF 2350/* */ 2351/* VI */ 2352#define S_008F28_COMPRESSION_EN(x) (((unsigned)(x) & 0x1) << 21) 2353#define G_008F28_COMPRESSION_EN(x) (((x) >> 21) & 0x1) 2354#define C_008F28_COMPRESSION_EN 0xFFDFFFFF 2355#define S_008F28_ALPHA_IS_ON_MSB(x) (((unsigned)(x) & 0x1) << 22) 2356#define G_008F28_ALPHA_IS_ON_MSB(x) (((x) >> 22) & 0x1) 2357#define C_008F28_ALPHA_IS_ON_MSB 0xFFBFFFFF 2358#define S_008F28_COLOR_TRANSFORM(x) (((unsigned)(x) & 0x1) << 23) 2359#define G_008F28_COLOR_TRANSFORM(x) (((x) >> 23) & 0x1) 2360#define C_008F28_COLOR_TRANSFORM 0xFF7FFFFF 2361#define S_008F28_LOST_ALPHA_BITS(x) (((unsigned)(x) & 0x0F) << 24) 2362#define G_008F28_LOST_ALPHA_BITS(x) (((x) >> 24) & 0x0F) 2363#define C_008F28_LOST_ALPHA_BITS 0xF0FFFFFF 2364#define S_008F28_LOST_COLOR_BITS(x) (((unsigned)(x) & 0x0F) << 28) 2365#define G_008F28_LOST_COLOR_BITS(x) (((x) >> 28) & 0x0F) 2366#define C_008F28_LOST_COLOR_BITS 0x0FFFFFFF 2367/* */ 2368#define R_008F2C_SQ_IMG_RSRC_WORD7 0x008F2C 2369#define R_008F30_SQ_IMG_SAMP_WORD0 0x008F30 2370#define S_008F30_CLAMP_X(x) (((unsigned)(x) & 0x07) << 0) 2371#define G_008F30_CLAMP_X(x) (((x) >> 0) & 0x07) 2372#define C_008F30_CLAMP_X 0xFFFFFFF8 2373#define V_008F30_SQ_TEX_WRAP 0x00 2374#define V_008F30_SQ_TEX_MIRROR 0x01 2375#define V_008F30_SQ_TEX_CLAMP_LAST_TEXEL 0x02 2376#define V_008F30_SQ_TEX_MIRROR_ONCE_LAST_TEXEL 0x03 2377#define V_008F30_SQ_TEX_CLAMP_HALF_BORDER 0x04 2378#define V_008F30_SQ_TEX_MIRROR_ONCE_HALF_BORDER 0x05 2379#define V_008F30_SQ_TEX_CLAMP_BORDER 0x06 2380#define V_008F30_SQ_TEX_MIRROR_ONCE_BORDER 0x07 2381#define S_008F30_CLAMP_Y(x) (((unsigned)(x) & 0x07) << 3) 2382#define G_008F30_CLAMP_Y(x) (((x) >> 3) & 0x07) 2383#define C_008F30_CLAMP_Y 0xFFFFFFC7 2384#define V_008F30_SQ_TEX_WRAP 0x00 2385#define V_008F30_SQ_TEX_MIRROR 0x01 2386#define V_008F30_SQ_TEX_CLAMP_LAST_TEXEL 0x02 2387#define V_008F30_SQ_TEX_MIRROR_ONCE_LAST_TEXEL 0x03 2388#define V_008F30_SQ_TEX_CLAMP_HALF_BORDER 0x04 2389#define V_008F30_SQ_TEX_MIRROR_ONCE_HALF_BORDER 0x05 2390#define V_008F30_SQ_TEX_CLAMP_BORDER 0x06 2391#define V_008F30_SQ_TEX_MIRROR_ONCE_BORDER 0x07 2392#define S_008F30_CLAMP_Z(x) (((unsigned)(x) & 0x07) << 6) 2393#define G_008F30_CLAMP_Z(x) (((x) >> 6) & 0x07) 2394#define C_008F30_CLAMP_Z 0xFFFFFE3F 2395#define V_008F30_SQ_TEX_WRAP 0x00 2396#define V_008F30_SQ_TEX_MIRROR 0x01 2397#define V_008F30_SQ_TEX_CLAMP_LAST_TEXEL 0x02 2398#define V_008F30_SQ_TEX_MIRROR_ONCE_LAST_TEXEL 0x03 2399#define V_008F30_SQ_TEX_CLAMP_HALF_BORDER 0x04 2400#define V_008F30_SQ_TEX_MIRROR_ONCE_HALF_BORDER 0x05 2401#define V_008F30_SQ_TEX_CLAMP_BORDER 0x06 2402#define V_008F30_SQ_TEX_MIRROR_ONCE_BORDER 0x07 2403#define S_008F30_MAX_ANISO_RATIO(x) (((unsigned)(x) & 0x07) << 9) 2404#define G_008F30_MAX_ANISO_RATIO(x) (((x) >> 9) & 0x07) 2405#define C_008F30_MAX_ANISO_RATIO 0xFFFFF1FF 2406#define S_008F30_DEPTH_COMPARE_FUNC(x) (((unsigned)(x) & 0x07) << 12) 2407#define G_008F30_DEPTH_COMPARE_FUNC(x) (((x) >> 12) & 0x07) 2408#define C_008F30_DEPTH_COMPARE_FUNC 0xFFFF8FFF 2409#define V_008F30_SQ_TEX_DEPTH_COMPARE_NEVER 0x00 2410#define V_008F30_SQ_TEX_DEPTH_COMPARE_LESS 0x01 2411#define V_008F30_SQ_TEX_DEPTH_COMPARE_EQUAL 0x02 2412#define V_008F30_SQ_TEX_DEPTH_COMPARE_LESSEQUAL 0x03 2413#define V_008F30_SQ_TEX_DEPTH_COMPARE_GREATER 0x04 2414#define V_008F30_SQ_TEX_DEPTH_COMPARE_NOTEQUAL 0x05 2415#define V_008F30_SQ_TEX_DEPTH_COMPARE_GREATEREQUAL 0x06 2416#define V_008F30_SQ_TEX_DEPTH_COMPARE_ALWAYS 0x07 2417#define S_008F30_FORCE_UNNORMALIZED(x) (((unsigned)(x) & 0x1) << 15) 2418#define G_008F30_FORCE_UNNORMALIZED(x) (((x) >> 15) & 0x1) 2419#define C_008F30_FORCE_UNNORMALIZED 0xFFFF7FFF 2420#define S_008F30_ANISO_THRESHOLD(x) (((unsigned)(x) & 0x07) << 16) 2421#define G_008F30_ANISO_THRESHOLD(x) (((x) >> 16) & 0x07) 2422#define C_008F30_ANISO_THRESHOLD 0xFFF8FFFF 2423#define S_008F30_MC_COORD_TRUNC(x) (((unsigned)(x) & 0x1) << 19) 2424#define G_008F30_MC_COORD_TRUNC(x) (((x) >> 19) & 0x1) 2425#define C_008F30_MC_COORD_TRUNC 0xFFF7FFFF 2426#define S_008F30_FORCE_DEGAMMA(x) (((unsigned)(x) & 0x1) << 20) 2427#define G_008F30_FORCE_DEGAMMA(x) (((x) >> 20) & 0x1) 2428#define C_008F30_FORCE_DEGAMMA 0xFFEFFFFF 2429#define S_008F30_ANISO_BIAS(x) (((unsigned)(x) & 0x3F) << 21) 2430#define G_008F30_ANISO_BIAS(x) (((x) >> 21) & 0x3F) 2431#define C_008F30_ANISO_BIAS 0xF81FFFFF 2432#define S_008F30_TRUNC_COORD(x) (((unsigned)(x) & 0x1) << 27) 2433#define G_008F30_TRUNC_COORD(x) (((x) >> 27) & 0x1) 2434#define C_008F30_TRUNC_COORD 0xF7FFFFFF 2435#define S_008F30_DISABLE_CUBE_WRAP(x) (((unsigned)(x) & 0x1) << 28) 2436#define G_008F30_DISABLE_CUBE_WRAP(x) (((x) >> 28) & 0x1) 2437#define C_008F30_DISABLE_CUBE_WRAP 0xEFFFFFFF 2438#define S_008F30_FILTER_MODE(x) (((unsigned)(x) & 0x03) << 29) 2439#define G_008F30_FILTER_MODE(x) (((x) >> 29) & 0x03) 2440#define C_008F30_FILTER_MODE 0x9FFFFFFF 2441#define V_008F30_SQ_IMG_FILTER_MODE_BLEND 0x00 2442#define V_008F30_SQ_IMG_FILTER_MODE_MIN 0x01 2443#define V_008F30_SQ_IMG_FILTER_MODE_MAX 0x02 2444/* VI */ 2445#define S_008F30_COMPAT_MODE(x) (((unsigned)(x) & 0x1) << 31) 2446#define G_008F30_COMPAT_MODE(x) (((x) >> 31) & 0x1) 2447#define C_008F30_COMPAT_MODE 0x7FFFFFFF 2448/* */ 2449#define R_008F34_SQ_IMG_SAMP_WORD1 0x008F34 2450#define S_008F34_MIN_LOD(x) (((unsigned)(x) & 0xFFF) << 0) 2451#define G_008F34_MIN_LOD(x) (((x) >> 0) & 0xFFF) 2452#define C_008F34_MIN_LOD 0xFFFFF000 2453#define S_008F34_MAX_LOD(x) (((unsigned)(x) & 0xFFF) << 12) 2454#define G_008F34_MAX_LOD(x) (((x) >> 12) & 0xFFF) 2455#define C_008F34_MAX_LOD 0xFF000FFF 2456#define S_008F34_PERF_MIP(x) (((unsigned)(x) & 0x0F) << 24) 2457#define G_008F34_PERF_MIP(x) (((x) >> 24) & 0x0F) 2458#define C_008F34_PERF_MIP 0xF0FFFFFF 2459#define S_008F34_PERF_Z(x) (((unsigned)(x) & 0x0F) << 28) 2460#define G_008F34_PERF_Z(x) (((x) >> 28) & 0x0F) 2461#define C_008F34_PERF_Z 0x0FFFFFFF 2462#define R_008F38_SQ_IMG_SAMP_WORD2 0x008F38 2463#define S_008F38_LOD_BIAS(x) (((unsigned)(x) & 0x3FFF) << 0) 2464#define G_008F38_LOD_BIAS(x) (((x) >> 0) & 0x3FFF) 2465#define C_008F38_LOD_BIAS 0xFFFFC000 2466#define S_008F38_LOD_BIAS_SEC(x) (((unsigned)(x) & 0x3F) << 14) 2467#define G_008F38_LOD_BIAS_SEC(x) (((x) >> 14) & 0x3F) 2468#define C_008F38_LOD_BIAS_SEC 0xFFF03FFF 2469#define S_008F38_XY_MAG_FILTER(x) (((unsigned)(x) & 0x03) << 20) 2470#define G_008F38_XY_MAG_FILTER(x) (((x) >> 20) & 0x03) 2471#define C_008F38_XY_MAG_FILTER 0xFFCFFFFF 2472#define V_008F38_SQ_TEX_XY_FILTER_POINT 0x00 2473#define V_008F38_SQ_TEX_XY_FILTER_BILINEAR 0x01 2474#define S_008F38_XY_MIN_FILTER(x) (((unsigned)(x) & 0x03) << 22) 2475#define G_008F38_XY_MIN_FILTER(x) (((x) >> 22) & 0x03) 2476#define C_008F38_XY_MIN_FILTER 0xFF3FFFFF 2477#define V_008F38_SQ_TEX_XY_FILTER_POINT 0x00 2478#define V_008F38_SQ_TEX_XY_FILTER_BILINEAR 0x01 2479#define V_008F38_SQ_TEX_XY_FILTER_ANISO_POINT 0x02 2480#define V_008F38_SQ_TEX_XY_FILTER_ANISO_BILINEAR 0x03 2481#define S_008F38_Z_FILTER(x) (((unsigned)(x) & 0x03) << 24) 2482#define G_008F38_Z_FILTER(x) (((x) >> 24) & 0x03) 2483#define C_008F38_Z_FILTER 0xFCFFFFFF 2484#define V_008F38_SQ_TEX_Z_FILTER_NONE 0x00 2485#define V_008F38_SQ_TEX_Z_FILTER_POINT 0x01 2486#define V_008F38_SQ_TEX_Z_FILTER_LINEAR 0x02 2487#define S_008F38_MIP_FILTER(x) (((unsigned)(x) & 0x03) << 26) 2488#define G_008F38_MIP_FILTER(x) (((x) >> 26) & 0x03) 2489#define C_008F38_MIP_FILTER 0xF3FFFFFF 2490#define V_008F38_SQ_TEX_Z_FILTER_NONE 0x00 2491#define V_008F38_SQ_TEX_Z_FILTER_POINT 0x01 2492#define V_008F38_SQ_TEX_Z_FILTER_LINEAR 0x02 2493#define S_008F38_MIP_POINT_PRECLAMP(x) (((unsigned)(x) & 0x1) << 28) 2494#define G_008F38_MIP_POINT_PRECLAMP(x) (((x) >> 28) & 0x1) 2495#define C_008F38_MIP_POINT_PRECLAMP 0xEFFFFFFF 2496#define S_008F38_DISABLE_LSB_CEIL(x) (((unsigned)(x) & 0x1) << 29) 2497#define G_008F38_DISABLE_LSB_CEIL(x) (((x) >> 29) & 0x1) 2498#define C_008F38_DISABLE_LSB_CEIL 0xDFFFFFFF 2499#define S_008F38_FILTER_PREC_FIX(x) (((unsigned)(x) & 0x1) << 30) 2500#define G_008F38_FILTER_PREC_FIX(x) (((x) >> 30) & 0x1) 2501#define C_008F38_FILTER_PREC_FIX 0xBFFFFFFF 2502#define S_008F38_ANISO_OVERRIDE(x) (((unsigned)(x) & 0x1) << 31) 2503#define G_008F38_ANISO_OVERRIDE(x) (((x) >> 31) & 0x1) 2504#define C_008F38_ANISO_OVERRIDE 0x7FFFFFFF 2505#define R_008F3C_SQ_IMG_SAMP_WORD3 0x008F3C 2506#define S_008F3C_BORDER_COLOR_PTR(x) (((unsigned)(x) & 0xFFF) << 0) 2507#define G_008F3C_BORDER_COLOR_PTR(x) (((x) >> 0) & 0xFFF) 2508#define C_008F3C_BORDER_COLOR_PTR 0xFFFFF000 2509/* The UPGRADED_DEPTH field is driver-specific and does not exist in hardware. */ 2510#define S_008F3C_UPGRADED_DEPTH(x) (((unsigned)(x) & 0x1) << 29) 2511#define S_008F3C_BORDER_COLOR_TYPE(x) (((unsigned)(x) & 0x03) << 30) 2512#define G_008F3C_BORDER_COLOR_TYPE(x) (((x) >> 30) & 0x03) 2513#define C_008F3C_BORDER_COLOR_TYPE 0x3FFFFFFF 2514#define V_008F3C_SQ_TEX_BORDER_COLOR_TRANS_BLACK 0x00 2515#define V_008F3C_SQ_TEX_BORDER_COLOR_OPAQUE_BLACK 0x01 2516#define V_008F3C_SQ_TEX_BORDER_COLOR_OPAQUE_WHITE 0x02 2517#define V_008F3C_SQ_TEX_BORDER_COLOR_REGISTER 0x03 2518#define R_0090DC_SPI_DYN_GPR_LOCK_EN 0x0090DC /* not on CIK */ 2519#define S_0090DC_VS_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 0) 2520#define G_0090DC_VS_LOW_THRESHOLD(x) (((x) >> 0) & 0x0F) 2521#define C_0090DC_VS_LOW_THRESHOLD 0xFFFFFFF0 2522#define S_0090DC_GS_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 4) 2523#define G_0090DC_GS_LOW_THRESHOLD(x) (((x) >> 4) & 0x0F) 2524#define C_0090DC_GS_LOW_THRESHOLD 0xFFFFFF0F 2525#define S_0090DC_ES_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 8) 2526#define G_0090DC_ES_LOW_THRESHOLD(x) (((x) >> 8) & 0x0F) 2527#define C_0090DC_ES_LOW_THRESHOLD 0xFFFFF0FF 2528#define S_0090DC_HS_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 12) 2529#define G_0090DC_HS_LOW_THRESHOLD(x) (((x) >> 12) & 0x0F) 2530#define C_0090DC_HS_LOW_THRESHOLD 0xFFFF0FFF 2531#define S_0090DC_LS_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 16) 2532#define G_0090DC_LS_LOW_THRESHOLD(x) (((x) >> 16) & 0x0F) 2533#define C_0090DC_LS_LOW_THRESHOLD 0xFFF0FFFF 2534#define R_0090E0_SPI_STATIC_THREAD_MGMT_1 0x0090E0 /* not on CIK */ 2535#define S_0090E0_PS_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 2536#define G_0090E0_PS_CU_EN(x) (((x) >> 0) & 0xFFFF) 2537#define C_0090E0_PS_CU_EN 0xFFFF0000 2538#define S_0090E0_VS_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 16) 2539#define G_0090E0_VS_CU_EN(x) (((x) >> 16) & 0xFFFF) 2540#define C_0090E0_VS_CU_EN 0x0000FFFF 2541#define R_0090E4_SPI_STATIC_THREAD_MGMT_2 0x0090E4 /* not on CIK */ 2542#define S_0090E4_GS_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 2543#define G_0090E4_GS_CU_EN(x) (((x) >> 0) & 0xFFFF) 2544#define C_0090E4_GS_CU_EN 0xFFFF0000 2545#define S_0090E4_ES_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 16) 2546#define G_0090E4_ES_CU_EN(x) (((x) >> 16) & 0xFFFF) 2547#define C_0090E4_ES_CU_EN 0x0000FFFF 2548#define R_0090E8_SPI_STATIC_THREAD_MGMT_3 0x0090E8 /* not on CIK */ 2549#define S_0090E8_LSHS_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 2550#define G_0090E8_LSHS_CU_EN(x) (((x) >> 0) & 0xFFFF) 2551#define C_0090E8_LSHS_CU_EN 0xFFFF0000 2552/* not on CIK */ 2553#define R_0090EC_SPI_PS_MAX_WAVE_ID 0x0090EC 2554#define S_0090EC_MAX_WAVE_ID(x) (((unsigned)(x) & 0xFFF) << 0) 2555#define G_0090EC_MAX_WAVE_ID(x) (((x) >> 0) & 0xFFF) 2556#define C_0090EC_MAX_WAVE_ID 0xFFFFF000 2557/* CIK */ 2558#define R_0090E8_SPI_PS_MAX_WAVE_ID 0x0090E8 2559#define S_0090E8_MAX_WAVE_ID(x) (((unsigned)(x) & 0xFFF) << 0) 2560#define G_0090E8_MAX_WAVE_ID(x) (((x) >> 0) & 0xFFF) 2561#define C_0090E8_MAX_WAVE_ID 0xFFFFF000 2562/* not on CIK */ 2563#define R_0090F0_SPI_ARB_PRIORITY 0x0090F0 2564#define S_0090F0_RING_ORDER_TS0(x) (((unsigned)(x) & 0x07) << 0) 2565#define G_0090F0_RING_ORDER_TS0(x) (((x) >> 0) & 0x07) 2566#define C_0090F0_RING_ORDER_TS0 0xFFFFFFF8 2567#define V_0090F0_X_R0 0x00 2568#define S_0090F0_RING_ORDER_TS1(x) (((unsigned)(x) & 0x07) << 3) 2569#define G_0090F0_RING_ORDER_TS1(x) (((x) >> 3) & 0x07) 2570#define C_0090F0_RING_ORDER_TS1 0xFFFFFFC7 2571#define S_0090F0_RING_ORDER_TS2(x) (((unsigned)(x) & 0x07) << 6) 2572#define G_0090F0_RING_ORDER_TS2(x) (((x) >> 6) & 0x07) 2573#define C_0090F0_RING_ORDER_TS2 0xFFFFFE3F 2574/* CIK */ 2575#define R_00C700_SPI_ARB_PRIORITY 0x00C700 2576#define S_00C700_PIPE_ORDER_TS0(x) (((unsigned)(x) & 0x07) << 0) 2577#define G_00C700_PIPE_ORDER_TS0(x) (((x) >> 0) & 0x07) 2578#define C_00C700_PIPE_ORDER_TS0 0xFFFFFFF8 2579#define S_00C700_PIPE_ORDER_TS1(x) (((unsigned)(x) & 0x07) << 3) 2580#define G_00C700_PIPE_ORDER_TS1(x) (((x) >> 3) & 0x07) 2581#define C_00C700_PIPE_ORDER_TS1 0xFFFFFFC7 2582#define S_00C700_PIPE_ORDER_TS2(x) (((unsigned)(x) & 0x07) << 6) 2583#define G_00C700_PIPE_ORDER_TS2(x) (((x) >> 6) & 0x07) 2584#define C_00C700_PIPE_ORDER_TS2 0xFFFFFE3F 2585#define S_00C700_PIPE_ORDER_TS3(x) (((unsigned)(x) & 0x07) << 9) 2586#define G_00C700_PIPE_ORDER_TS3(x) (((x) >> 9) & 0x07) 2587#define C_00C700_PIPE_ORDER_TS3 0xFFFFF1FF 2588#define S_00C700_TS0_DUR_MULT(x) (((unsigned)(x) & 0x03) << 12) 2589#define G_00C700_TS0_DUR_MULT(x) (((x) >> 12) & 0x03) 2590#define C_00C700_TS0_DUR_MULT 0xFFFFCFFF 2591#define S_00C700_TS1_DUR_MULT(x) (((unsigned)(x) & 0x03) << 14) 2592#define G_00C700_TS1_DUR_MULT(x) (((x) >> 14) & 0x03) 2593#define C_00C700_TS1_DUR_MULT 0xFFFF3FFF 2594#define S_00C700_TS2_DUR_MULT(x) (((unsigned)(x) & 0x03) << 16) 2595#define G_00C700_TS2_DUR_MULT(x) (((x) >> 16) & 0x03) 2596#define C_00C700_TS2_DUR_MULT 0xFFFCFFFF 2597#define S_00C700_TS3_DUR_MULT(x) (((unsigned)(x) & 0x03) << 18) 2598#define G_00C700_TS3_DUR_MULT(x) (((x) >> 18) & 0x03) 2599#define C_00C700_TS3_DUR_MULT 0xFFF3FFFF 2600/* not on CIK */ 2601#define R_0090F4_SPI_ARB_CYCLES_0 0x0090F4 /* moved to 0xC704 on CIK*/ 2602#define S_0090F4_TS0_DURATION(x) (((unsigned)(x) & 0xFFFF) << 0) 2603#define G_0090F4_TS0_DURATION(x) (((x) >> 0) & 0xFFFF) 2604#define C_0090F4_TS0_DURATION 0xFFFF0000 2605#define S_0090F4_TS1_DURATION(x) (((unsigned)(x) & 0xFFFF) << 16) 2606#define G_0090F4_TS1_DURATION(x) (((x) >> 16) & 0xFFFF) 2607#define C_0090F4_TS1_DURATION 0x0000FFFF 2608#define R_0090F8_SPI_ARB_CYCLES_1 0x0090F8 /* moved to 0xC708 on CIK */ 2609#define S_0090F8_TS2_DURATION(x) (((unsigned)(x) & 0xFFFF) << 0) 2610#define G_0090F8_TS2_DURATION(x) (((x) >> 0) & 0xFFFF) 2611#define C_0090F8_TS2_DURATION 0xFFFF0000 2612/* CIK */ 2613#define R_008F40_SQ_FLAT_SCRATCH_WORD0 0x008F40 2614#define S_008F40_SIZE(x) (((unsigned)(x) & 0x7FFFF) << 0) 2615#define G_008F40_SIZE(x) (((x) >> 0) & 0x7FFFF) 2616#define C_008F40_SIZE 0xFFF80000 2617#define R_008F44_SQ_FLAT_SCRATCH_WORD1 0x008F44 2618#define S_008F44_OFFSET(x) (((unsigned)(x) & 0xFFFFFF) << 0) 2619#define G_008F44_OFFSET(x) (((x) >> 0) & 0xFFFFFF) 2620#define C_008F44_OFFSET 0xFF000000 2621/* */ 2622#define R_030FF8_DB_ZPASS_COUNT_LOW 0x030FF8 2623#define R_030FFC_DB_ZPASS_COUNT_HI 0x030FFC 2624#define S_030FFC_COUNT_HI(x) (((unsigned)(x) & 0x7FFFFFFF) << 0) 2625#define G_030FFC_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF) 2626#define C_030FFC_COUNT_HI 0x80000000 2627#define R_031074_GDS_OA_CNTL 0x031074 2628#define S_031074_INDEX(x) (((unsigned)(x) & 0xF) << 0) 2629#define R_031078_GDS_OA_COUNTER 0x031078 2630#define S_031078_SPACE_AVAILABLE(x) (((unsigned)(x) & 0xFFFFFFFF) << 0) 2631#define R_03107C_GDS_OA_ADDRESS 0x03107C 2632#define S_03107C_DS_ADDRESS(x) (((unsigned)(x) & 0xFFFF) << 0) 2633#define S_03107C_CRAWLER(x) (((unsigned)(x) & 0xF) << 16) 2634#define S_03107C_CRAWLER_TYPE(x) (((unsigned)(x) & 0x3) << 20) 2635#define S_03107C_NO_ALLOC(x) (((unsigned)(x) & 0x1) << 30) 2636#define S_03107C_ENABLE(x) (((unsigned)(x) & 0x1) << 31) 2637#define R_031080_GDS_OA_INCDEC 0x031080 2638#define S_031080_VALUE(x) (((unsigned)(x) & 0x7FFFFFFF) << 0) 2639#define S_031080_INCDEC(x) (((unsigned)(x) & 0x1) << 31) 2640#define R_031084_GDS_OA_RING_SIZE 0x031084 2641#define S_031084_RING_SIZE(x) (((unsigned)(x) & 0xFFFFFFFF) << 0) 2642#define R_009100_SPI_CONFIG_CNTL 0x009100 2643#define S_009100_GPR_WRITE_PRIORITY(x) (((unsigned)(x) & 0x1FFFFF) << 0) 2644#define G_009100_GPR_WRITE_PRIORITY(x) (((x) >> 0) & 0x1FFFFF) 2645#define C_009100_GPR_WRITE_PRIORITY 0xFFE00000 2646#define S_009100_EXP_PRIORITY_ORDER(x) (((unsigned)(x) & 0x07) << 21) 2647#define G_009100_EXP_PRIORITY_ORDER(x) (((x) >> 21) & 0x07) 2648#define C_009100_EXP_PRIORITY_ORDER 0xFF1FFFFF 2649#define S_009100_ENABLE_SQG_TOP_EVENTS(x) (((unsigned)(x) & 0x1) << 24) 2650#define G_009100_ENABLE_SQG_TOP_EVENTS(x) (((x) >> 24) & 0x1) 2651#define C_009100_ENABLE_SQG_TOP_EVENTS 0xFEFFFFFF 2652#define S_009100_ENABLE_SQG_BOP_EVENTS(x) (((unsigned)(x) & 0x1) << 25) 2653#define G_009100_ENABLE_SQG_BOP_EVENTS(x) (((x) >> 25) & 0x1) 2654#define C_009100_ENABLE_SQG_BOP_EVENTS 0xFDFFFFFF 2655#define S_009100_RSRC_MGMT_RESET(x) (((unsigned)(x) & 0x1) << 26) 2656#define G_009100_RSRC_MGMT_RESET(x) (((x) >> 26) & 0x1) 2657#define C_009100_RSRC_MGMT_RESET 0xFBFFFFFF 2658#define R_00913C_SPI_CONFIG_CNTL_1 0x00913C 2659#define S_00913C_VTX_DONE_DELAY(x) (((unsigned)(x) & 0x0F) << 0) 2660#define G_00913C_VTX_DONE_DELAY(x) (((x) >> 0) & 0x0F) 2661#define C_00913C_VTX_DONE_DELAY 0xFFFFFFF0 2662#define V_00913C_X_DELAY_14_CLKS 0x00 2663#define V_00913C_X_DELAY_16_CLKS 0x01 2664#define V_00913C_X_DELAY_18_CLKS 0x02 2665#define V_00913C_X_DELAY_20_CLKS 0x03 2666#define V_00913C_X_DELAY_22_CLKS 0x04 2667#define V_00913C_X_DELAY_24_CLKS 0x05 2668#define V_00913C_X_DELAY_26_CLKS 0x06 2669#define V_00913C_X_DELAY_28_CLKS 0x07 2670#define V_00913C_X_DELAY_30_CLKS 0x08 2671#define V_00913C_X_DELAY_32_CLKS 0x09 2672#define V_00913C_X_DELAY_34_CLKS 0x0A 2673#define V_00913C_X_DELAY_4_CLKS 0x0B 2674#define V_00913C_X_DELAY_6_CLKS 0x0C 2675#define V_00913C_X_DELAY_8_CLKS 0x0D 2676#define V_00913C_X_DELAY_10_CLKS 0x0E 2677#define V_00913C_X_DELAY_12_CLKS 0x0F 2678#define S_00913C_INTERP_ONE_PRIM_PER_ROW(x) (((unsigned)(x) & 0x1) << 4) 2679#define G_00913C_INTERP_ONE_PRIM_PER_ROW(x) (((x) >> 4) & 0x1) 2680#define C_00913C_INTERP_ONE_PRIM_PER_ROW 0xFFFFFFEF 2681#define S_00913C_PC_LIMIT_ENABLE(x) (((unsigned)(x) & 0x1) << 6) 2682#define G_00913C_PC_LIMIT_ENABLE(x) (((x) >> 6) & 0x1) 2683#define C_00913C_PC_LIMIT_ENABLE 0xFFFFFFBF 2684#define S_00913C_PC_LIMIT_STRICT(x) (((unsigned)(x) & 0x1) << 7) 2685#define G_00913C_PC_LIMIT_STRICT(x) (((x) >> 7) & 0x1) 2686#define C_00913C_PC_LIMIT_STRICT 0xFFFFFF7F 2687#define S_00913C_PC_LIMIT_SIZE(x) (((unsigned)(x) & 0xFFFF) << 16) 2688#define G_00913C_PC_LIMIT_SIZE(x) (((x) >> 16) & 0xFFFF) 2689#define C_00913C_PC_LIMIT_SIZE 0x0000FFFF 2690#define R_00936C_SPI_RESOURCE_RESERVE_CU_AB_0 0x00936C 2691#define S_00936C_TYPE_A(x) (((unsigned)(x) & 0x0F) << 0) 2692#define G_00936C_TYPE_A(x) (((x) >> 0) & 0x0F) 2693#define C_00936C_TYPE_A 0xFFFFFFF0 2694#define S_00936C_VGPR_A(x) (((unsigned)(x) & 0x07) << 4) 2695#define G_00936C_VGPR_A(x) (((x) >> 4) & 0x07) 2696#define C_00936C_VGPR_A 0xFFFFFF8F 2697#define S_00936C_SGPR_A(x) (((unsigned)(x) & 0x07) << 7) 2698#define G_00936C_SGPR_A(x) (((x) >> 7) & 0x07) 2699#define C_00936C_SGPR_A 0xFFFFFC7F 2700#define S_00936C_LDS_A(x) (((unsigned)(x) & 0x07) << 10) 2701#define G_00936C_LDS_A(x) (((x) >> 10) & 0x07) 2702#define C_00936C_LDS_A 0xFFFFE3FF 2703#define S_00936C_WAVES_A(x) (((unsigned)(x) & 0x03) << 13) 2704#define G_00936C_WAVES_A(x) (((x) >> 13) & 0x03) 2705#define C_00936C_WAVES_A 0xFFFF9FFF 2706#define S_00936C_EN_A(x) (((unsigned)(x) & 0x1) << 15) 2707#define G_00936C_EN_A(x) (((x) >> 15) & 0x1) 2708#define C_00936C_EN_A 0xFFFF7FFF 2709#define S_00936C_TYPE_B(x) (((unsigned)(x) & 0x0F) << 16) 2710#define G_00936C_TYPE_B(x) (((x) >> 16) & 0x0F) 2711#define C_00936C_TYPE_B 0xFFF0FFFF 2712#define S_00936C_VGPR_B(x) (((unsigned)(x) & 0x07) << 20) 2713#define G_00936C_VGPR_B(x) (((x) >> 20) & 0x07) 2714#define C_00936C_VGPR_B 0xFF8FFFFF 2715#define S_00936C_SGPR_B(x) (((unsigned)(x) & 0x07) << 23) 2716#define G_00936C_SGPR_B(x) (((x) >> 23) & 0x07) 2717#define C_00936C_SGPR_B 0xFC7FFFFF 2718#define S_00936C_LDS_B(x) (((unsigned)(x) & 0x07) << 26) 2719#define G_00936C_LDS_B(x) (((x) >> 26) & 0x07) 2720#define C_00936C_LDS_B 0xE3FFFFFF 2721#define S_00936C_WAVES_B(x) (((unsigned)(x) & 0x03) << 29) 2722#define G_00936C_WAVES_B(x) (((x) >> 29) & 0x03) 2723#define C_00936C_WAVES_B 0x9FFFFFFF 2724#define S_00936C_EN_B(x) (((unsigned)(x) & 0x1) << 31) 2725#define G_00936C_EN_B(x) (((x) >> 31) & 0x1) 2726#define C_00936C_EN_B 0x7FFFFFFF 2727/* not on CIK -- moved to uconfig space */ 2728#define R_00950C_TA_CS_BC_BASE_ADDR 0x00950C 2729/* */ 2730#define R_009858_DB_SUBTILE_CONTROL 0x009858 2731#define S_009858_MSAA1_X(x) (((unsigned)(x) & 0x03) << 0) 2732#define G_009858_MSAA1_X(x) (((x) >> 0) & 0x03) 2733#define C_009858_MSAA1_X 0xFFFFFFFC 2734#define S_009858_MSAA1_Y(x) (((unsigned)(x) & 0x03) << 2) 2735#define G_009858_MSAA1_Y(x) (((x) >> 2) & 0x03) 2736#define C_009858_MSAA1_Y 0xFFFFFFF3 2737#define S_009858_MSAA2_X(x) (((unsigned)(x) & 0x03) << 4) 2738#define G_009858_MSAA2_X(x) (((x) >> 4) & 0x03) 2739#define C_009858_MSAA2_X 0xFFFFFFCF 2740#define S_009858_MSAA2_Y(x) (((unsigned)(x) & 0x03) << 6) 2741#define G_009858_MSAA2_Y(x) (((x) >> 6) & 0x03) 2742#define C_009858_MSAA2_Y 0xFFFFFF3F 2743#define S_009858_MSAA4_X(x) (((unsigned)(x) & 0x03) << 8) 2744#define G_009858_MSAA4_X(x) (((x) >> 8) & 0x03) 2745#define C_009858_MSAA4_X 0xFFFFFCFF 2746#define S_009858_MSAA4_Y(x) (((unsigned)(x) & 0x03) << 10) 2747#define G_009858_MSAA4_Y(x) (((x) >> 10) & 0x03) 2748#define C_009858_MSAA4_Y 0xFFFFF3FF 2749#define S_009858_MSAA8_X(x) (((unsigned)(x) & 0x03) << 12) 2750#define G_009858_MSAA8_X(x) (((x) >> 12) & 0x03) 2751#define C_009858_MSAA8_X 0xFFFFCFFF 2752#define S_009858_MSAA8_Y(x) (((unsigned)(x) & 0x03) << 14) 2753#define G_009858_MSAA8_Y(x) (((x) >> 14) & 0x03) 2754#define C_009858_MSAA8_Y 0xFFFF3FFF 2755#define S_009858_MSAA16_X(x) (((unsigned)(x) & 0x03) << 16) 2756#define G_009858_MSAA16_X(x) (((x) >> 16) & 0x03) 2757#define C_009858_MSAA16_X 0xFFFCFFFF 2758#define S_009858_MSAA16_Y(x) (((unsigned)(x) & 0x03) << 18) 2759#define G_009858_MSAA16_Y(x) (((x) >> 18) & 0x03) 2760#define C_009858_MSAA16_Y 0xFFF3FFFF 2761#define R_0098F8_GB_ADDR_CONFIG 0x0098F8 2762#define S_0098F8_NUM_PIPES(x) (((unsigned)(x) & 0x07) << 0) 2763#define G_0098F8_NUM_PIPES(x) (((x) >> 0) & 0x07) 2764#define C_0098F8_NUM_PIPES 0xFFFFFFF8 2765#define S_0098F8_PIPE_INTERLEAVE_SIZE_GFX6(x) (((unsigned)(x) & 0x07) << 4) 2766#define G_0098F8_PIPE_INTERLEAVE_SIZE_GFX6(x) (((x) >> 4) & 0x07) 2767#define C_0098F8_PIPE_INTERLEAVE_SIZE_GFX6 0xFFFFFF8F 2768#define S_0098F8_BANK_INTERLEAVE_SIZE(x) (((unsigned)(x) & 0x07) << 8) 2769#define G_0098F8_BANK_INTERLEAVE_SIZE(x) (((x) >> 8) & 0x07) 2770#define C_0098F8_BANK_INTERLEAVE_SIZE 0xFFFFF8FF 2771#define S_0098F8_NUM_SHADER_ENGINES_GFX6(x) (((unsigned)(x) & 0x03) << 12) 2772#define G_0098F8_NUM_SHADER_ENGINES_GFX6(x) (((x) >> 12) & 0x03) 2773#define C_0098F8_NUM_SHADER_ENGINES_GFX6 0xFFFFCFFF 2774#define S_0098F8_SHADER_ENGINE_TILE_SIZE(x) (((unsigned)(x) & 0x07) << 16) 2775#define G_0098F8_SHADER_ENGINE_TILE_SIZE(x) (((x) >> 16) & 0x07) 2776#define C_0098F8_SHADER_ENGINE_TILE_SIZE 0xFFF8FFFF 2777#define S_0098F8_NUM_GPUS_GFX6(x) (((unsigned)(x) & 0x07) << 20) 2778#define G_0098F8_NUM_GPUS_GFX6(x) (((x) >> 20) & 0x07) 2779#define C_0098F8_NUM_GPUS_GFX6 0xFF8FFFFF 2780#define S_0098F8_MULTI_GPU_TILE_SIZE(x) (((unsigned)(x) & 0x03) << 24) 2781#define G_0098F8_MULTI_GPU_TILE_SIZE(x) (((x) >> 24) & 0x03) 2782#define C_0098F8_MULTI_GPU_TILE_SIZE 0xFCFFFFFF 2783#define S_0098F8_ROW_SIZE(x) (((unsigned)(x) & 0x03) << 28) 2784#define G_0098F8_ROW_SIZE(x) (((x) >> 28) & 0x03) 2785#define C_0098F8_ROW_SIZE 0xCFFFFFFF 2786#define S_0098F8_NUM_LOWER_PIPES(x) (((unsigned)(x) & 0x1) << 30) 2787#define G_0098F8_NUM_LOWER_PIPES(x) (((x) >> 30) & 0x1) 2788#define C_0098F8_NUM_LOWER_PIPES 0xBFFFFFFF 2789#define R_009910_GB_TILE_MODE0 0x009910 2790#define S_009910_MICRO_TILE_MODE(x) (((unsigned)(x) & 0x03) << 0) 2791#define G_009910_MICRO_TILE_MODE(x) (((x) >> 0) & 0x03) 2792#define C_009910_MICRO_TILE_MODE 0xFFFFFFFC 2793#define V_009910_ADDR_SURF_DISPLAY_MICRO_TILING 0x00 2794#define V_009910_ADDR_SURF_THIN_MICRO_TILING 0x01 2795#define V_009910_ADDR_SURF_DEPTH_MICRO_TILING 0x02 2796#define V_009910_ADDR_SURF_THICK_MICRO_TILING 0x03 2797#define S_009910_ARRAY_MODE(x) (((unsigned)(x) & 0x0F) << 2) 2798#define G_009910_ARRAY_MODE(x) (((x) >> 2) & 0x0F) 2799#define C_009910_ARRAY_MODE 0xFFFFFFC3 2800#define V_009910_ARRAY_LINEAR_GENERAL 0x00 2801#define V_009910_ARRAY_LINEAR_ALIGNED 0x01 2802#define V_009910_ARRAY_1D_TILED_THIN1 0x02 2803#define V_009910_ARRAY_1D_TILED_THICK 0x03 2804#define V_009910_ARRAY_2D_TILED_THIN1 0x04 2805#define V_009910_ARRAY_2D_TILED_THICK 0x07 2806#define V_009910_ARRAY_2D_TILED_XTHICK 0x08 2807#define V_009910_ARRAY_3D_TILED_THIN1 0x0C 2808#define V_009910_ARRAY_3D_TILED_THICK 0x0D 2809#define V_009910_ARRAY_3D_TILED_XTHICK 0x0E 2810#define V_009910_ARRAY_POWER_SAVE 0x0F 2811#define S_009910_PIPE_CONFIG(x) (((unsigned)(x) & 0x1F) << 6) 2812#define G_009910_PIPE_CONFIG(x) (((x) >> 6) & 0x1F) 2813#define C_009910_PIPE_CONFIG 0xFFFFF83F 2814#define V_009910_ADDR_SURF_P2 0x00 2815#define V_009910_ADDR_SURF_P2_RESERVED0 0x01 2816#define V_009910_ADDR_SURF_P2_RESERVED1 0x02 2817#define V_009910_ADDR_SURF_P2_RESERVED2 0x03 2818#define V_009910_X_ADDR_SURF_P4_8X16 0x04 2819#define V_009910_X_ADDR_SURF_P4_16X16 0x05 2820#define V_009910_X_ADDR_SURF_P4_16X32 0x06 2821#define V_009910_X_ADDR_SURF_P4_32X32 0x07 2822#define V_009910_X_ADDR_SURF_P8_16X16_8X16 0x08 2823#define V_009910_X_ADDR_SURF_P8_16X32_8X16 0x09 2824#define V_009910_X_ADDR_SURF_P8_32X32_8X16 0x0A 2825#define V_009910_X_ADDR_SURF_P8_16X32_16X16 0x0B 2826#define V_009910_X_ADDR_SURF_P8_32X32_16X16 0x0C 2827#define V_009910_X_ADDR_SURF_P8_32X32_16X32 0x0D 2828#define V_009910_X_ADDR_SURF_P8_32X64_32X32 0x0E 2829#define S_009910_TILE_SPLIT(x) (((unsigned)(x) & 0x07) << 11) 2830#define G_009910_TILE_SPLIT(x) (((x) >> 11) & 0x07) 2831#define C_009910_TILE_SPLIT 0xFFFFC7FF 2832#define V_009910_ADDR_SURF_TILE_SPLIT_64B 0x00 2833#define V_009910_ADDR_SURF_TILE_SPLIT_128B 0x01 2834#define V_009910_ADDR_SURF_TILE_SPLIT_256B 0x02 2835#define V_009910_ADDR_SURF_TILE_SPLIT_512B 0x03 2836#define V_009910_ADDR_SURF_TILE_SPLIT_1KB 0x04 2837#define V_009910_ADDR_SURF_TILE_SPLIT_2KB 0x05 2838#define V_009910_ADDR_SURF_TILE_SPLIT_4KB 0x06 2839#define S_009910_BANK_WIDTH(x) (((unsigned)(x) & 0x03) << 14) 2840#define G_009910_BANK_WIDTH(x) (((x) >> 14) & 0x03) 2841#define C_009910_BANK_WIDTH 0xFFFF3FFF 2842#define V_009910_ADDR_SURF_BANK_WIDTH_1 0x00 2843#define V_009910_ADDR_SURF_BANK_WIDTH_2 0x01 2844#define V_009910_ADDR_SURF_BANK_WIDTH_4 0x02 2845#define V_009910_ADDR_SURF_BANK_WIDTH_8 0x03 2846#define S_009910_BANK_HEIGHT(x) (((unsigned)(x) & 0x03) << 16) 2847#define G_009910_BANK_HEIGHT(x) (((x) >> 16) & 0x03) 2848#define C_009910_BANK_HEIGHT 0xFFFCFFFF 2849#define V_009910_ADDR_SURF_BANK_HEIGHT_1 0x00 2850#define V_009910_ADDR_SURF_BANK_HEIGHT_2 0x01 2851#define V_009910_ADDR_SURF_BANK_HEIGHT_4 0x02 2852#define V_009910_ADDR_SURF_BANK_HEIGHT_8 0x03 2853#define S_009910_MACRO_TILE_ASPECT(x) (((unsigned)(x) & 0x03) << 18) 2854#define G_009910_MACRO_TILE_ASPECT(x) (((x) >> 18) & 0x03) 2855#define C_009910_MACRO_TILE_ASPECT 0xFFF3FFFF 2856#define V_009910_ADDR_SURF_MACRO_ASPECT_1 0x00 2857#define V_009910_ADDR_SURF_MACRO_ASPECT_2 0x01 2858#define V_009910_ADDR_SURF_MACRO_ASPECT_4 0x02 2859#define V_009910_ADDR_SURF_MACRO_ASPECT_8 0x03 2860#define S_009910_NUM_BANKS(x) (((unsigned)(x) & 0x03) << 20) 2861#define G_009910_NUM_BANKS(x) (((x) >> 20) & 0x03) 2862#define C_009910_NUM_BANKS 0xFFCFFFFF 2863#define V_009910_ADDR_SURF_2_BANK 0x00 2864#define V_009910_ADDR_SURF_4_BANK 0x01 2865#define V_009910_ADDR_SURF_8_BANK 0x02 2866#define V_009910_ADDR_SURF_16_BANK 0x03 2867#define S_009910_MICRO_TILE_MODE_NEW(x) (((unsigned)(x) & 0x07) << 22) 2868#define G_009910_MICRO_TILE_MODE_NEW(x) (((x) >> 22) & 0x07) 2869#define C_009910_MICRO_TILE_MODE_NEW 0xFE3FFFFF 2870#define V_009910_ADDR_SURF_DISPLAY_MICRO_TILING 0x00 2871#define V_009910_ADDR_SURF_THIN_MICRO_TILING 0x01 2872#define V_009910_ADDR_SURF_DEPTH_MICRO_TILING 0x02 2873#define V_009910_ADDR_SURF_ROTATED_MICRO_TILING 0x03 2874#define S_009910_SAMPLE_SPLIT(x) (((unsigned)(x) & 0x03) << 25) 2875#define G_009910_SAMPLE_SPLIT(x) (((x) >> 25) & 0x03) 2876#define C_009910_SAMPLE_SPLIT 0xF9FFFFFF 2877#define R_009914_GB_TILE_MODE1 0x009914 2878#define R_009918_GB_TILE_MODE2 0x009918 2879#define R_00991C_GB_TILE_MODE3 0x00991C 2880#define R_009920_GB_TILE_MODE4 0x009920 2881#define R_009924_GB_TILE_MODE5 0x009924 2882#define R_009928_GB_TILE_MODE6 0x009928 2883#define R_00992C_GB_TILE_MODE7 0x00992C 2884#define R_009930_GB_TILE_MODE8 0x009930 2885#define R_009934_GB_TILE_MODE9 0x009934 2886#define R_009938_GB_TILE_MODE10 0x009938 2887#define R_00993C_GB_TILE_MODE11 0x00993C 2888#define R_009940_GB_TILE_MODE12 0x009940 2889#define R_009944_GB_TILE_MODE13 0x009944 2890#define R_009948_GB_TILE_MODE14 0x009948 2891#define R_00994C_GB_TILE_MODE15 0x00994C 2892#define R_009950_GB_TILE_MODE16 0x009950 2893#define R_009954_GB_TILE_MODE17 0x009954 2894#define R_009958_GB_TILE_MODE18 0x009958 2895#define R_00995C_GB_TILE_MODE19 0x00995C 2896#define R_009960_GB_TILE_MODE20 0x009960 2897#define R_009964_GB_TILE_MODE21 0x009964 2898#define R_009968_GB_TILE_MODE22 0x009968 2899#define R_00996C_GB_TILE_MODE23 0x00996C 2900#define R_009970_GB_TILE_MODE24 0x009970 2901#define R_009974_GB_TILE_MODE25 0x009974 2902#define R_009978_GB_TILE_MODE26 0x009978 2903#define R_00997C_GB_TILE_MODE27 0x00997C 2904#define R_009980_GB_TILE_MODE28 0x009980 2905#define R_009984_GB_TILE_MODE29 0x009984 2906#define R_009988_GB_TILE_MODE30 0x009988 2907#define R_00998C_GB_TILE_MODE31 0x00998C 2908/* CIK */ 2909#define R_009990_GB_MACROTILE_MODE0 0x009990 2910#define S_009990_BANK_WIDTH(x) (((unsigned)(x) & 0x03) << 0) 2911#define G_009990_BANK_WIDTH(x) (((x) >> 0) & 0x03) 2912#define C_009990_BANK_WIDTH 0xFFFFFFFC 2913#define S_009990_BANK_HEIGHT(x) (((unsigned)(x) & 0x03) << 2) 2914#define G_009990_BANK_HEIGHT(x) (((x) >> 2) & 0x03) 2915#define C_009990_BANK_HEIGHT 0xFFFFFFF3 2916#define S_009990_MACRO_TILE_ASPECT(x) (((unsigned)(x) & 0x03) << 4) 2917#define G_009990_MACRO_TILE_ASPECT(x) (((x) >> 4) & 0x03) 2918#define C_009990_MACRO_TILE_ASPECT 0xFFFFFFCF 2919#define S_009990_NUM_BANKS(x) (((unsigned)(x) & 0x03) << 6) 2920#define G_009990_NUM_BANKS(x) (((x) >> 6) & 0x03) 2921#define C_009990_NUM_BANKS 0xFFFFFF3F 2922#define R_009994_GB_MACROTILE_MODE1 0x009994 2923#define R_009998_GB_MACROTILE_MODE2 0x009998 2924#define R_00999C_GB_MACROTILE_MODE3 0x00999C 2925#define R_0099A0_GB_MACROTILE_MODE4 0x0099A0 2926#define R_0099A4_GB_MACROTILE_MODE5 0x0099A4 2927#define R_0099A8_GB_MACROTILE_MODE6 0x0099A8 2928#define R_0099AC_GB_MACROTILE_MODE7 0x0099AC 2929#define R_0099B0_GB_MACROTILE_MODE8 0x0099B0 2930#define R_0099B4_GB_MACROTILE_MODE9 0x0099B4 2931#define R_0099B8_GB_MACROTILE_MODE10 0x0099B8 2932#define R_0099BC_GB_MACROTILE_MODE11 0x0099BC 2933#define R_0099C0_GB_MACROTILE_MODE12 0x0099C0 2934#define R_0099C4_GB_MACROTILE_MODE13 0x0099C4 2935#define R_0099C8_GB_MACROTILE_MODE14 0x0099C8 2936#define R_0099CC_GB_MACROTILE_MODE15 0x0099CC 2937/* */ 2938#define R_00B000_SPI_SHADER_TBA_LO_PS 0x00B000 2939#define R_00B004_SPI_SHADER_TBA_HI_PS 0x00B004 2940#define S_00B004_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 2941#define G_00B004_MEM_BASE(x) (((x) >> 0) & 0xFF) 2942#define C_00B004_MEM_BASE 0xFFFFFF00 2943#define R_00B008_SPI_SHADER_TMA_LO_PS 0x00B008 2944#define R_00B00C_SPI_SHADER_TMA_HI_PS 0x00B00C 2945#define S_00B00C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 2946#define G_00B00C_MEM_BASE(x) (((x) >> 0) & 0xFF) 2947#define C_00B00C_MEM_BASE 0xFFFFFF00 2948/* CIK */ 2949#define R_00B01C_SPI_SHADER_PGM_RSRC3_PS 0x00B01C 2950#define S_00B01C_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 2951#define G_00B01C_CU_EN(x) (((x) >> 0) & 0xFFFF) 2952#define C_00B01C_CU_EN 0xFFFF0000 2953#define S_00B01C_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 16) 2954#define G_00B01C_WAVE_LIMIT(x) (((x) >> 16) & 0x3F) 2955#define C_00B01C_WAVE_LIMIT 0xFFC0FFFF 2956#define S_00B01C_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 22) 2957#define G_00B01C_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0x0F) 2958#define C_00B01C_LOCK_LOW_THRESHOLD 0xFC3FFFFF 2959/* */ 2960#define R_00B020_SPI_SHADER_PGM_LO_PS 0x00B020 2961#define R_00B024_SPI_SHADER_PGM_HI_PS 0x00B024 2962#define S_00B024_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 2963#define G_00B024_MEM_BASE(x) (((x) >> 0) & 0xFF) 2964#define C_00B024_MEM_BASE 0xFFFFFF00 2965#define R_00B028_SPI_SHADER_PGM_RSRC1_PS 0x00B028 2966#define S_00B028_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) 2967#define G_00B028_VGPRS(x) (((x) >> 0) & 0x3F) 2968#define C_00B028_VGPRS 0xFFFFFFC0 2969#define S_00B028_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) 2970#define G_00B028_SGPRS(x) (((x) >> 6) & 0x0F) 2971#define C_00B028_SGPRS 0xFFFFFC3F 2972#define S_00B028_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) 2973#define G_00B028_PRIORITY(x) (((x) >> 10) & 0x03) 2974#define C_00B028_PRIORITY 0xFFFFF3FF 2975#define S_00B028_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) 2976#define G_00B028_FLOAT_MODE(x) (((x) >> 12) & 0xFF) 2977#define C_00B028_FLOAT_MODE 0xFFF00FFF 2978#define V_00B028_FP_32_DENORMS 0x30 2979#define V_00B028_FP_64_DENORMS 0xc0 2980#define V_00B028_FP_ALL_DENORMS 0xf0 2981#define S_00B028_PRIV(x) (((unsigned)(x) & 0x1) << 20) 2982#define G_00B028_PRIV(x) (((x) >> 20) & 0x1) 2983#define C_00B028_PRIV 0xFFEFFFFF 2984#define S_00B028_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 2985#define G_00B028_DX10_CLAMP(x) (((x) >> 21) & 0x1) 2986#define C_00B028_DX10_CLAMP 0xFFDFFFFF 2987#define S_00B028_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) 2988#define G_00B028_DEBUG_MODE(x) (((x) >> 22) & 0x1) 2989#define C_00B028_DEBUG_MODE 0xFFBFFFFF 2990#define S_00B028_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) 2991#define G_00B028_IEEE_MODE(x) (((x) >> 23) & 0x1) 2992#define C_00B028_IEEE_MODE 0xFF7FFFFF 2993#define S_00B028_CU_GROUP_DISABLE(x) (((unsigned)(x) & 0x1) << 24) 2994#define G_00B028_CU_GROUP_DISABLE(x) (((x) >> 24) & 0x1) 2995#define C_00B028_CU_GROUP_DISABLE 0xFEFFFFFF 2996/* CIK */ 2997#define S_00B028_CACHE_CTL(x) (((unsigned)(x) & 0x07) << 25) 2998#define G_00B028_CACHE_CTL(x) (((x) >> 25) & 0x07) 2999#define C_00B028_CACHE_CTL 0xF1FFFFFF 3000#define S_00B028_CDBG_USER(x) (((unsigned)(x) & 0x1) << 28) 3001#define G_00B028_CDBG_USER(x) (((x) >> 28) & 0x1) 3002#define C_00B028_CDBG_USER 0xEFFFFFFF 3003/* */ 3004#define R_00B02C_SPI_SHADER_PGM_RSRC2_PS 0x00B02C 3005#define S_00B02C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 3006#define G_00B02C_SCRATCH_EN(x) (((x) >> 0) & 0x1) 3007#define C_00B02C_SCRATCH_EN 0xFFFFFFFE 3008#define S_00B02C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 3009#define G_00B02C_USER_SGPR(x) (((x) >> 1) & 0x1F) 3010#define C_00B02C_USER_SGPR 0xFFFFFFC1 3011#define S_00B02C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 3012#define G_00B02C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 3013#define C_00B02C_TRAP_PRESENT 0xFFFFFFBF 3014#define S_00B02C_WAVE_CNT_EN(x) (((unsigned)(x) & 0x1) << 7) 3015#define G_00B02C_WAVE_CNT_EN(x) (((x) >> 7) & 0x1) 3016#define C_00B02C_WAVE_CNT_EN 0xFFFFFF7F 3017#define S_00B02C_EXTRA_LDS_SIZE(x) (((unsigned)(x) & 0xFF) << 8) 3018#define G_00B02C_EXTRA_LDS_SIZE(x) (((x) >> 8) & 0xFF) 3019#define C_00B02C_EXTRA_LDS_SIZE 0xFFFF00FF 3020#define S_00B02C_EXCP_EN_SI(x) (((unsigned)(x) & 0x7F) << 16) 3021#define G_00B02C_EXCP_EN_SI(x) (((x) >> 16) & 0x7F) 3022#define C_00B02C_EXCP_EN_SI 0xFF80FFFF 3023#define S_00B02C_EXCP_EN(x) (((unsigned)(x) & 0x1FF) << 16) 3024#define G_00B02C_EXCP_EN(x) (((x) >> 16) & 0x1FF) 3025#define C_00B02C_EXCP_EN 0xFE00FFFF 3026#define R_00B030_SPI_SHADER_USER_DATA_PS_0 0x00B030 3027#define R_00B034_SPI_SHADER_USER_DATA_PS_1 0x00B034 3028#define R_00B038_SPI_SHADER_USER_DATA_PS_2 0x00B038 3029#define R_00B03C_SPI_SHADER_USER_DATA_PS_3 0x00B03C 3030#define R_00B040_SPI_SHADER_USER_DATA_PS_4 0x00B040 3031#define R_00B044_SPI_SHADER_USER_DATA_PS_5 0x00B044 3032#define R_00B048_SPI_SHADER_USER_DATA_PS_6 0x00B048 3033#define R_00B04C_SPI_SHADER_USER_DATA_PS_7 0x00B04C 3034#define R_00B050_SPI_SHADER_USER_DATA_PS_8 0x00B050 3035#define R_00B054_SPI_SHADER_USER_DATA_PS_9 0x00B054 3036#define R_00B058_SPI_SHADER_USER_DATA_PS_10 0x00B058 3037#define R_00B05C_SPI_SHADER_USER_DATA_PS_11 0x00B05C 3038#define R_00B060_SPI_SHADER_USER_DATA_PS_12 0x00B060 3039#define R_00B064_SPI_SHADER_USER_DATA_PS_13 0x00B064 3040#define R_00B068_SPI_SHADER_USER_DATA_PS_14 0x00B068 3041#define R_00B06C_SPI_SHADER_USER_DATA_PS_15 0x00B06C 3042#define R_00B100_SPI_SHADER_TBA_LO_VS 0x00B100 3043#define R_00B104_SPI_SHADER_TBA_HI_VS 0x00B104 3044#define S_00B104_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3045#define G_00B104_MEM_BASE(x) (((x) >> 0) & 0xFF) 3046#define C_00B104_MEM_BASE 0xFFFFFF00 3047#define R_00B108_SPI_SHADER_TMA_LO_VS 0x00B108 3048#define R_00B10C_SPI_SHADER_TMA_HI_VS 0x00B10C 3049#define S_00B10C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3050#define G_00B10C_MEM_BASE(x) (((x) >> 0) & 0xFF) 3051#define C_00B10C_MEM_BASE 0xFFFFFF00 3052/* CIK */ 3053#define R_00B118_SPI_SHADER_PGM_RSRC3_VS 0x00B118 3054#define S_00B118_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 3055#define G_00B118_CU_EN(x) (((x) >> 0) & 0xFFFF) 3056#define C_00B118_CU_EN 0xFFFF0000 3057#define S_00B118_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 16) 3058#define G_00B118_WAVE_LIMIT(x) (((x) >> 16) & 0x3F) 3059#define C_00B118_WAVE_LIMIT 0xFFC0FFFF 3060#define S_00B118_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 22) 3061#define G_00B118_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0x0F) 3062#define C_00B118_LOCK_LOW_THRESHOLD 0xFC3FFFFF 3063#define R_00B11C_SPI_SHADER_LATE_ALLOC_VS 0x00B11C 3064#define S_00B11C_LIMIT(x) (((unsigned)(x) & 0x3F) << 0) 3065#define G_00B11C_LIMIT(x) (((x) >> 0) & 0x3F) 3066#define C_00B11C_LIMIT 0xFFFFFFC0 3067/* */ 3068#define R_00B120_SPI_SHADER_PGM_LO_VS 0x00B120 3069#define R_00B124_SPI_SHADER_PGM_HI_VS 0x00B124 3070#define S_00B124_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3071#define G_00B124_MEM_BASE(x) (((x) >> 0) & 0xFF) 3072#define C_00B124_MEM_BASE 0xFFFFFF00 3073#define R_00B128_SPI_SHADER_PGM_RSRC1_VS 0x00B128 3074#define S_00B128_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) 3075#define G_00B128_VGPRS(x) (((x) >> 0) & 0x3F) 3076#define C_00B128_VGPRS 0xFFFFFFC0 3077#define S_00B128_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) 3078#define G_00B128_SGPRS(x) (((x) >> 6) & 0x0F) 3079#define C_00B128_SGPRS 0xFFFFFC3F 3080#define S_00B128_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) 3081#define G_00B128_PRIORITY(x) (((x) >> 10) & 0x03) 3082#define C_00B128_PRIORITY 0xFFFFF3FF 3083#define S_00B128_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) 3084#define G_00B128_FLOAT_MODE(x) (((x) >> 12) & 0xFF) 3085#define C_00B128_FLOAT_MODE 0xFFF00FFF 3086#define S_00B128_PRIV(x) (((unsigned)(x) & 0x1) << 20) 3087#define G_00B128_PRIV(x) (((x) >> 20) & 0x1) 3088#define C_00B128_PRIV 0xFFEFFFFF 3089#define S_00B128_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 3090#define G_00B128_DX10_CLAMP(x) (((x) >> 21) & 0x1) 3091#define C_00B128_DX10_CLAMP 0xFFDFFFFF 3092#define S_00B128_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) 3093#define G_00B128_DEBUG_MODE(x) (((x) >> 22) & 0x1) 3094#define C_00B128_DEBUG_MODE 0xFFBFFFFF 3095#define S_00B128_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) 3096#define G_00B128_IEEE_MODE(x) (((x) >> 23) & 0x1) 3097#define C_00B128_IEEE_MODE 0xFF7FFFFF 3098#define S_00B128_VGPR_COMP_CNT(x) (((unsigned)(x) & 0x03) << 24) 3099#define G_00B128_VGPR_COMP_CNT(x) (((x) >> 24) & 0x03) 3100#define C_00B128_VGPR_COMP_CNT 0xFCFFFFFF 3101#define S_00B128_CU_GROUP_ENABLE(x) (((unsigned)(x) & 0x1) << 26) 3102#define G_00B128_CU_GROUP_ENABLE(x) (((x) >> 26) & 0x1) 3103#define C_00B128_CU_GROUP_ENABLE 0xFBFFFFFF 3104/* CIK */ 3105#define S_00B128_CACHE_CTL(x) (((unsigned)(x) & 0x07) << 27) 3106#define G_00B128_CACHE_CTL(x) (((x) >> 27) & 0x07) 3107#define C_00B128_CACHE_CTL 0xC7FFFFFF 3108#define S_00B128_CDBG_USER(x) (((unsigned)(x) & 0x1) << 30) 3109#define G_00B128_CDBG_USER(x) (((x) >> 30) & 0x1) 3110#define C_00B128_CDBG_USER 0xBFFFFFFF 3111/* */ 3112#define R_00B12C_SPI_SHADER_PGM_RSRC2_VS 0x00B12C 3113#define S_00B12C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 3114#define G_00B12C_SCRATCH_EN(x) (((x) >> 0) & 0x1) 3115#define C_00B12C_SCRATCH_EN 0xFFFFFFFE 3116#define S_00B12C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 3117#define G_00B12C_USER_SGPR(x) (((x) >> 1) & 0x1F) 3118#define C_00B12C_USER_SGPR 0xFFFFFFC1 3119#define S_00B12C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 3120#define G_00B12C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 3121#define C_00B12C_TRAP_PRESENT 0xFFFFFFBF 3122#define S_00B12C_OC_LDS_EN(x) (((unsigned)(x) & 0x1) << 7) 3123#define G_00B12C_OC_LDS_EN(x) (((x) >> 7) & 0x1) 3124#define C_00B12C_OC_LDS_EN 0xFFFFFF7F 3125#define S_00B12C_SO_BASE0_EN(x) (((unsigned)(x) & 0x1) << 8) 3126#define G_00B12C_SO_BASE0_EN(x) (((x) >> 8) & 0x1) 3127#define C_00B12C_SO_BASE0_EN 0xFFFFFEFF 3128#define S_00B12C_SO_BASE1_EN(x) (((unsigned)(x) & 0x1) << 9) 3129#define G_00B12C_SO_BASE1_EN(x) (((x) >> 9) & 0x1) 3130#define C_00B12C_SO_BASE1_EN 0xFFFFFDFF 3131#define S_00B12C_SO_BASE2_EN(x) (((unsigned)(x) & 0x1) << 10) 3132#define G_00B12C_SO_BASE2_EN(x) (((x) >> 10) & 0x1) 3133#define C_00B12C_SO_BASE2_EN 0xFFFFFBFF 3134#define S_00B12C_SO_BASE3_EN(x) (((unsigned)(x) & 0x1) << 11) 3135#define G_00B12C_SO_BASE3_EN(x) (((x) >> 11) & 0x1) 3136#define C_00B12C_SO_BASE3_EN 0xFFFFF7FF 3137#define S_00B12C_SO_EN(x) (((unsigned)(x) & 0x1) << 12) 3138#define G_00B12C_SO_EN(x) (((x) >> 12) & 0x1) 3139#define C_00B12C_SO_EN 0xFFFFEFFF 3140#define S_00B12C_EXCP_EN_SI(x) (((unsigned)(x) & 0x7F) << 13) 3141#define G_00B12C_EXCP_EN_SI(x) (((x) >> 13) & 0x7F) 3142#define C_00B12C_EXCP_EN_SI 0xFFF01FFF 3143#define S_00B12C_EXCP_EN(x) (((unsigned)(x) & 0x1FF) << 13) 3144#define G_00B12C_EXCP_EN(x) (((x) >> 13) & 0x1FF) 3145#define C_00B12C_EXCP_EN 0xFFC01FFF 3146/* VI */ 3147#define S_00B12C_DISPATCH_DRAW_EN(x) (((unsigned)(x) & 0x1) << 24) 3148#define G_00B12C_DISPATCH_DRAW_EN(x) (((x) >> 24) & 0x1) 3149#define C_00B12C_DISPATCH_DRAW_EN 0xFEFFFFFF 3150/* */ 3151#define R_00B130_SPI_SHADER_USER_DATA_VS_0 0x00B130 3152#define R_00B134_SPI_SHADER_USER_DATA_VS_1 0x00B134 3153#define R_00B138_SPI_SHADER_USER_DATA_VS_2 0x00B138 3154#define R_00B13C_SPI_SHADER_USER_DATA_VS_3 0x00B13C 3155#define R_00B140_SPI_SHADER_USER_DATA_VS_4 0x00B140 3156#define R_00B144_SPI_SHADER_USER_DATA_VS_5 0x00B144 3157#define R_00B148_SPI_SHADER_USER_DATA_VS_6 0x00B148 3158#define R_00B14C_SPI_SHADER_USER_DATA_VS_7 0x00B14C 3159#define R_00B150_SPI_SHADER_USER_DATA_VS_8 0x00B150 3160#define R_00B154_SPI_SHADER_USER_DATA_VS_9 0x00B154 3161#define R_00B158_SPI_SHADER_USER_DATA_VS_10 0x00B158 3162#define R_00B15C_SPI_SHADER_USER_DATA_VS_11 0x00B15C 3163#define R_00B160_SPI_SHADER_USER_DATA_VS_12 0x00B160 3164#define R_00B164_SPI_SHADER_USER_DATA_VS_13 0x00B164 3165#define R_00B168_SPI_SHADER_USER_DATA_VS_14 0x00B168 3166#define R_00B16C_SPI_SHADER_USER_DATA_VS_15 0x00B16C 3167#define R_00B200_SPI_SHADER_TBA_LO_GS 0x00B200 3168#define R_00B204_SPI_SHADER_TBA_HI_GS 0x00B204 3169#define S_00B204_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3170#define G_00B204_MEM_BASE(x) (((x) >> 0) & 0xFF) 3171#define C_00B204_MEM_BASE 0xFFFFFF00 3172#define R_00B208_SPI_SHADER_TMA_LO_GS 0x00B208 3173#define R_00B20C_SPI_SHADER_TMA_HI_GS 0x00B20C 3174#define S_00B20C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3175#define G_00B20C_MEM_BASE(x) (((x) >> 0) & 0xFF) 3176#define C_00B20C_MEM_BASE 0xFFFFFF00 3177/* CIK */ 3178#define R_00B21C_SPI_SHADER_PGM_RSRC3_GS 0x00B21C 3179#define S_00B21C_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 3180#define G_00B21C_CU_EN(x) (((x) >> 0) & 0xFFFF) 3181#define C_00B21C_CU_EN 0xFFFF0000 3182#define S_00B21C_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 16) 3183#define G_00B21C_WAVE_LIMIT(x) (((x) >> 16) & 0x3F) 3184#define C_00B21C_WAVE_LIMIT 0xFFC0FFFF 3185#define S_00B21C_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 22) 3186#define G_00B21C_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0x0F) 3187#define C_00B21C_LOCK_LOW_THRESHOLD 0xFC3FFFFF 3188/* */ 3189/* VI */ 3190#define S_00B21C_GROUP_FIFO_DEPTH(x) (((unsigned)(x) & 0x3F) << 26) 3191#define G_00B21C_GROUP_FIFO_DEPTH(x) (((x) >> 26) & 0x3F) 3192#define C_00B21C_GROUP_FIFO_DEPTH 0x03FFFFFF 3193/* */ 3194#define R_00B220_SPI_SHADER_PGM_LO_GS 0x00B220 3195#define R_00B224_SPI_SHADER_PGM_HI_GS 0x00B224 3196#define S_00B224_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3197#define G_00B224_MEM_BASE(x) (((x) >> 0) & 0xFF) 3198#define C_00B224_MEM_BASE 0xFFFFFF00 3199#define R_00B228_SPI_SHADER_PGM_RSRC1_GS 0x00B228 3200#define S_00B228_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) 3201#define G_00B228_VGPRS(x) (((x) >> 0) & 0x3F) 3202#define C_00B228_VGPRS 0xFFFFFFC0 3203#define S_00B228_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) 3204#define G_00B228_SGPRS(x) (((x) >> 6) & 0x0F) 3205#define C_00B228_SGPRS 0xFFFFFC3F 3206#define S_00B228_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) 3207#define G_00B228_PRIORITY(x) (((x) >> 10) & 0x03) 3208#define C_00B228_PRIORITY 0xFFFFF3FF 3209#define S_00B228_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) 3210#define G_00B228_FLOAT_MODE(x) (((x) >> 12) & 0xFF) 3211#define C_00B228_FLOAT_MODE 0xFFF00FFF 3212#define S_00B228_PRIV(x) (((unsigned)(x) & 0x1) << 20) 3213#define G_00B228_PRIV(x) (((x) >> 20) & 0x1) 3214#define C_00B228_PRIV 0xFFEFFFFF 3215#define S_00B228_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 3216#define G_00B228_DX10_CLAMP(x) (((x) >> 21) & 0x1) 3217#define C_00B228_DX10_CLAMP 0xFFDFFFFF 3218#define S_00B228_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) 3219#define G_00B228_DEBUG_MODE(x) (((x) >> 22) & 0x1) 3220#define C_00B228_DEBUG_MODE 0xFFBFFFFF 3221#define S_00B228_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) 3222#define G_00B228_IEEE_MODE(x) (((x) >> 23) & 0x1) 3223#define C_00B228_IEEE_MODE 0xFF7FFFFF 3224#define S_00B228_CU_GROUP_ENABLE(x) (((unsigned)(x) & 0x1) << 24) 3225#define G_00B228_CU_GROUP_ENABLE(x) (((x) >> 24) & 0x1) 3226#define C_00B228_CU_GROUP_ENABLE 0xFEFFFFFF 3227/* CIK */ 3228#define S_00B228_CACHE_CTL(x) (((unsigned)(x) & 0x07) << 25) 3229#define G_00B228_CACHE_CTL(x) (((x) >> 25) & 0x07) 3230#define C_00B228_CACHE_CTL 0xF1FFFFFF 3231#define S_00B228_CDBG_USER(x) (((unsigned)(x) & 0x1) << 28) 3232#define G_00B228_CDBG_USER(x) (((x) >> 28) & 0x1) 3233#define C_00B228_CDBG_USER 0xEFFFFFFF 3234/* */ 3235#define R_00B22C_SPI_SHADER_PGM_RSRC2_GS 0x00B22C 3236#define S_00B22C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 3237#define G_00B22C_SCRATCH_EN(x) (((x) >> 0) & 0x1) 3238#define C_00B22C_SCRATCH_EN 0xFFFFFFFE 3239#define S_00B22C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 3240#define G_00B22C_USER_SGPR(x) (((x) >> 1) & 0x1F) 3241#define C_00B22C_USER_SGPR 0xFFFFFFC1 3242#define S_00B22C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 3243#define G_00B22C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 3244#define C_00B22C_TRAP_PRESENT 0xFFFFFFBF 3245#define S_00B22C_EXCP_EN_SI(x) (((unsigned)(x) & 0x7F) << 7) 3246#define G_00B22C_EXCP_EN_SI(x) (((x) >> 7) & 0x7F) 3247#define C_00B22C_EXCP_EN_SI 0xFFFFC07F 3248#define S_00B22C_EXCP_EN(x) (((unsigned)(x) & 0x1FF) << 7) 3249#define G_00B22C_EXCP_EN(x) (((x) >> 7) & 0x1FF) 3250#define C_00B22C_EXCP_EN 0xFFFF007F 3251#define R_00B230_SPI_SHADER_USER_DATA_GS_0 0x00B230 3252#define R_00B234_SPI_SHADER_USER_DATA_GS_1 0x00B234 3253#define R_00B238_SPI_SHADER_USER_DATA_GS_2 0x00B238 3254#define R_00B23C_SPI_SHADER_USER_DATA_GS_3 0x00B23C 3255#define R_00B240_SPI_SHADER_USER_DATA_GS_4 0x00B240 3256#define R_00B244_SPI_SHADER_USER_DATA_GS_5 0x00B244 3257#define R_00B248_SPI_SHADER_USER_DATA_GS_6 0x00B248 3258#define R_00B24C_SPI_SHADER_USER_DATA_GS_7 0x00B24C 3259#define R_00B250_SPI_SHADER_USER_DATA_GS_8 0x00B250 3260#define R_00B254_SPI_SHADER_USER_DATA_GS_9 0x00B254 3261#define R_00B258_SPI_SHADER_USER_DATA_GS_10 0x00B258 3262#define R_00B25C_SPI_SHADER_USER_DATA_GS_11 0x00B25C 3263#define R_00B260_SPI_SHADER_USER_DATA_GS_12 0x00B260 3264#define R_00B264_SPI_SHADER_USER_DATA_GS_13 0x00B264 3265#define R_00B268_SPI_SHADER_USER_DATA_GS_14 0x00B268 3266#define R_00B26C_SPI_SHADER_USER_DATA_GS_15 0x00B26C 3267#define R_00B300_SPI_SHADER_TBA_LO_ES 0x00B300 3268#define R_00B304_SPI_SHADER_TBA_HI_ES 0x00B304 3269#define S_00B304_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3270#define G_00B304_MEM_BASE(x) (((x) >> 0) & 0xFF) 3271#define C_00B304_MEM_BASE 0xFFFFFF00 3272#define R_00B308_SPI_SHADER_TMA_LO_ES 0x00B308 3273#define R_00B30C_SPI_SHADER_TMA_HI_ES 0x00B30C 3274#define S_00B30C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3275#define G_00B30C_MEM_BASE(x) (((x) >> 0) & 0xFF) 3276#define C_00B30C_MEM_BASE 0xFFFFFF00 3277/* CIK */ 3278#define R_00B31C_SPI_SHADER_PGM_RSRC3_ES 0x00B31C 3279#define S_00B31C_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 3280#define G_00B31C_CU_EN(x) (((x) >> 0) & 0xFFFF) 3281#define C_00B31C_CU_EN 0xFFFF0000 3282#define S_00B31C_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 16) 3283#define G_00B31C_WAVE_LIMIT(x) (((x) >> 16) & 0x3F) 3284#define C_00B31C_WAVE_LIMIT 0xFFC0FFFF 3285#define S_00B31C_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 22) 3286#define G_00B31C_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0x0F) 3287#define C_00B31C_LOCK_LOW_THRESHOLD 0xFC3FFFFF 3288/* */ 3289/* VI */ 3290#define S_00B31C_GROUP_FIFO_DEPTH(x) (((unsigned)(x) & 0x3F) << 26) 3291#define G_00B31C_GROUP_FIFO_DEPTH(x) (((x) >> 26) & 0x3F) 3292#define C_00B31C_GROUP_FIFO_DEPTH 0x03FFFFFF 3293/* */ 3294#define R_00B320_SPI_SHADER_PGM_LO_ES 0x00B320 3295#define R_00B324_SPI_SHADER_PGM_HI_ES 0x00B324 3296#define S_00B324_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3297#define G_00B324_MEM_BASE(x) (((x) >> 0) & 0xFF) 3298#define C_00B324_MEM_BASE 0xFFFFFF00 3299#define R_00B328_SPI_SHADER_PGM_RSRC1_ES 0x00B328 3300#define S_00B328_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) 3301#define G_00B328_VGPRS(x) (((x) >> 0) & 0x3F) 3302#define C_00B328_VGPRS 0xFFFFFFC0 3303#define S_00B328_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) 3304#define G_00B328_SGPRS(x) (((x) >> 6) & 0x0F) 3305#define C_00B328_SGPRS 0xFFFFFC3F 3306#define S_00B328_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) 3307#define G_00B328_PRIORITY(x) (((x) >> 10) & 0x03) 3308#define C_00B328_PRIORITY 0xFFFFF3FF 3309#define S_00B328_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) 3310#define G_00B328_FLOAT_MODE(x) (((x) >> 12) & 0xFF) 3311#define C_00B328_FLOAT_MODE 0xFFF00FFF 3312#define S_00B328_PRIV(x) (((unsigned)(x) & 0x1) << 20) 3313#define G_00B328_PRIV(x) (((x) >> 20) & 0x1) 3314#define C_00B328_PRIV 0xFFEFFFFF 3315#define S_00B328_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 3316#define G_00B328_DX10_CLAMP(x) (((x) >> 21) & 0x1) 3317#define C_00B328_DX10_CLAMP 0xFFDFFFFF 3318#define S_00B328_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) 3319#define G_00B328_DEBUG_MODE(x) (((x) >> 22) & 0x1) 3320#define C_00B328_DEBUG_MODE 0xFFBFFFFF 3321#define S_00B328_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) 3322#define G_00B328_IEEE_MODE(x) (((x) >> 23) & 0x1) 3323#define C_00B328_IEEE_MODE 0xFF7FFFFF 3324#define S_00B328_VGPR_COMP_CNT(x) (((unsigned)(x) & 0x03) << 24) 3325#define G_00B328_VGPR_COMP_CNT(x) (((x) >> 24) & 0x03) 3326#define C_00B328_VGPR_COMP_CNT 0xFCFFFFFF 3327#define S_00B328_CU_GROUP_ENABLE(x) (((unsigned)(x) & 0x1) << 26) 3328#define G_00B328_CU_GROUP_ENABLE(x) (((x) >> 26) & 0x1) 3329#define C_00B328_CU_GROUP_ENABLE 0xFBFFFFFF 3330/* CIK */ 3331#define S_00B328_CACHE_CTL(x) (((unsigned)(x) & 0x07) << 27) 3332#define G_00B328_CACHE_CTL(x) (((x) >> 27) & 0x07) 3333#define C_00B328_CACHE_CTL 0xC7FFFFFF 3334#define S_00B328_CDBG_USER(x) (((unsigned)(x) & 0x1) << 30) 3335#define G_00B328_CDBG_USER(x) (((x) >> 30) & 0x1) 3336#define C_00B328_CDBG_USER 0xBFFFFFFF 3337/* */ 3338#define R_00B32C_SPI_SHADER_PGM_RSRC2_ES 0x00B32C 3339#define S_00B32C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 3340#define G_00B32C_SCRATCH_EN(x) (((x) >> 0) & 0x1) 3341#define C_00B32C_SCRATCH_EN 0xFFFFFFFE 3342#define S_00B32C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 3343#define G_00B32C_USER_SGPR(x) (((x) >> 1) & 0x1F) 3344#define C_00B32C_USER_SGPR 0xFFFFFFC1 3345#define S_00B32C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 3346#define G_00B32C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 3347#define C_00B32C_TRAP_PRESENT 0xFFFFFFBF 3348#define S_00B32C_OC_LDS_EN(x) (((unsigned)(x) & 0x1) << 7) 3349#define G_00B32C_OC_LDS_EN(x) (((x) >> 7) & 0x1) 3350#define C_00B32C_OC_LDS_EN 0xFFFFFF7F 3351#define S_00B32C_EXCP_EN_SI(x) (((unsigned)(x) & 0x7F) << 8) 3352#define G_00B32C_EXCP_EN_SI(x) (((x) >> 8) & 0x7F) 3353#define C_00B32C_EXCP_EN_SI 0xFFFF80FF 3354#define S_00B32C_EXCP_EN(x) (((unsigned)(x) & 0x1FF) << 8) 3355#define G_00B32C_EXCP_EN(x) (((x) >> 8) & 0x1FF) 3356#define C_00B32C_EXCP_EN 0xFFFE00FF 3357#define S_00B32C_LDS_SIZE(x) (((unsigned)(x) & 0x1FF) << 20) /* CIK, for on-chip GS */ 3358#define G_00B32C_LDS_SIZE(x) (((x) >> 20) & 0x1FF) /* CIK, for on-chip GS */ 3359#define C_00B32C_LDS_SIZE 0xE00FFFFF /* CIK, for on-chip GS */ 3360#define R_00B330_SPI_SHADER_USER_DATA_ES_0 0x00B330 3361#define R_00B334_SPI_SHADER_USER_DATA_ES_1 0x00B334 3362#define R_00B338_SPI_SHADER_USER_DATA_ES_2 0x00B338 3363#define R_00B33C_SPI_SHADER_USER_DATA_ES_3 0x00B33C 3364#define R_00B340_SPI_SHADER_USER_DATA_ES_4 0x00B340 3365#define R_00B344_SPI_SHADER_USER_DATA_ES_5 0x00B344 3366#define R_00B348_SPI_SHADER_USER_DATA_ES_6 0x00B348 3367#define R_00B34C_SPI_SHADER_USER_DATA_ES_7 0x00B34C 3368#define R_00B350_SPI_SHADER_USER_DATA_ES_8 0x00B350 3369#define R_00B354_SPI_SHADER_USER_DATA_ES_9 0x00B354 3370#define R_00B358_SPI_SHADER_USER_DATA_ES_10 0x00B358 3371#define R_00B35C_SPI_SHADER_USER_DATA_ES_11 0x00B35C 3372#define R_00B360_SPI_SHADER_USER_DATA_ES_12 0x00B360 3373#define R_00B364_SPI_SHADER_USER_DATA_ES_13 0x00B364 3374#define R_00B368_SPI_SHADER_USER_DATA_ES_14 0x00B368 3375#define R_00B36C_SPI_SHADER_USER_DATA_ES_15 0x00B36C 3376#define R_00B400_SPI_SHADER_TBA_LO_HS 0x00B400 3377#define R_00B404_SPI_SHADER_TBA_HI_HS 0x00B404 3378#define S_00B404_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3379#define G_00B404_MEM_BASE(x) (((x) >> 0) & 0xFF) 3380#define C_00B404_MEM_BASE 0xFFFFFF00 3381#define R_00B408_SPI_SHADER_TMA_LO_HS 0x00B408 3382#define R_00B40C_SPI_SHADER_TMA_HI_HS 0x00B40C 3383#define S_00B40C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3384#define G_00B40C_MEM_BASE(x) (((x) >> 0) & 0xFF) 3385#define C_00B40C_MEM_BASE 0xFFFFFF00 3386/* CIK */ 3387#define R_00B41C_SPI_SHADER_PGM_RSRC3_HS 0x00B41C 3388#define S_00B41C_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 0) 3389#define G_00B41C_WAVE_LIMIT(x) (((x) >> 0) & 0x3F) 3390#define C_00B41C_WAVE_LIMIT 0xFFFFFFC0 3391#define S_00B41C_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 6) 3392#define G_00B41C_LOCK_LOW_THRESHOLD(x) (((x) >> 6) & 0x0F) 3393#define C_00B41C_LOCK_LOW_THRESHOLD 0xFFFFFC3F 3394/* */ 3395/* VI */ 3396#define S_00B41C_GROUP_FIFO_DEPTH(x) (((unsigned)(x) & 0x3F) << 10) 3397#define G_00B41C_GROUP_FIFO_DEPTH(x) (((x) >> 10) & 0x3F) 3398#define C_00B41C_GROUP_FIFO_DEPTH 0xFFFF03FF 3399/* */ 3400#define R_00B420_SPI_SHADER_PGM_LO_HS 0x00B420 3401#define R_00B424_SPI_SHADER_PGM_HI_HS 0x00B424 3402#define S_00B424_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3403#define G_00B424_MEM_BASE(x) (((x) >> 0) & 0xFF) 3404#define C_00B424_MEM_BASE 0xFFFFFF00 3405#define R_00B428_SPI_SHADER_PGM_RSRC1_HS 0x00B428 3406#define S_00B428_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) 3407#define G_00B428_VGPRS(x) (((x) >> 0) & 0x3F) 3408#define C_00B428_VGPRS 0xFFFFFFC0 3409#define S_00B428_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) 3410#define G_00B428_SGPRS(x) (((x) >> 6) & 0x0F) 3411#define C_00B428_SGPRS 0xFFFFFC3F 3412#define S_00B428_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) 3413#define G_00B428_PRIORITY(x) (((x) >> 10) & 0x03) 3414#define C_00B428_PRIORITY 0xFFFFF3FF 3415#define S_00B428_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) 3416#define G_00B428_FLOAT_MODE(x) (((x) >> 12) & 0xFF) 3417#define C_00B428_FLOAT_MODE 0xFFF00FFF 3418#define S_00B428_PRIV(x) (((unsigned)(x) & 0x1) << 20) 3419#define G_00B428_PRIV(x) (((x) >> 20) & 0x1) 3420#define C_00B428_PRIV 0xFFEFFFFF 3421#define S_00B428_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 3422#define G_00B428_DX10_CLAMP(x) (((x) >> 21) & 0x1) 3423#define C_00B428_DX10_CLAMP 0xFFDFFFFF 3424#define S_00B428_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) 3425#define G_00B428_DEBUG_MODE(x) (((x) >> 22) & 0x1) 3426#define C_00B428_DEBUG_MODE 0xFFBFFFFF 3427#define S_00B428_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) 3428#define G_00B428_IEEE_MODE(x) (((x) >> 23) & 0x1) 3429#define C_00B428_IEEE_MODE 0xFF7FFFFF 3430/* CIK */ 3431#define S_00B428_CACHE_CTL(x) (((unsigned)(x) & 0x07) << 24) 3432#define G_00B428_CACHE_CTL(x) (((x) >> 24) & 0x07) 3433#define C_00B428_CACHE_CTL 0xF8FFFFFF 3434#define S_00B428_CDBG_USER(x) (((unsigned)(x) & 0x1) << 27) 3435#define G_00B428_CDBG_USER(x) (((x) >> 27) & 0x1) 3436#define C_00B428_CDBG_USER 0xF7FFFFFF 3437/* */ 3438#define R_00B42C_SPI_SHADER_PGM_RSRC2_HS 0x00B42C 3439#define S_00B42C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 3440#define G_00B42C_SCRATCH_EN(x) (((x) >> 0) & 0x1) 3441#define C_00B42C_SCRATCH_EN 0xFFFFFFFE 3442#define S_00B42C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 3443#define G_00B42C_USER_SGPR(x) (((x) >> 1) & 0x1F) 3444#define C_00B42C_USER_SGPR 0xFFFFFFC1 3445#define S_00B42C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 3446#define G_00B42C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 3447#define C_00B42C_TRAP_PRESENT 0xFFFFFFBF 3448#define S_00B42C_OC_LDS_EN(x) (((unsigned)(x) & 0x1) << 7) 3449#define G_00B42C_OC_LDS_EN(x) (((x) >> 7) & 0x1) 3450#define C_00B42C_OC_LDS_EN 0xFFFFFF7F 3451#define S_00B42C_TG_SIZE_EN(x) (((unsigned)(x) & 0x1) << 8) 3452#define G_00B42C_TG_SIZE_EN(x) (((x) >> 8) & 0x1) 3453#define C_00B42C_TG_SIZE_EN 0xFFFFFEFF 3454#define S_00B42C_EXCP_EN_SI(x) (((unsigned)(x) & 0x7F) << 9) 3455#define G_00B42C_EXCP_EN_SI(x) (((x) >> 9) & 0x7F) 3456#define C_00B42C_EXCP_EN_SI 0xFFFF01FF 3457#define S_00B42C_EXCP_EN_CIK_VI(x) (((unsigned)(x) & 0x1FF) << 9) 3458#define G_00B42C_EXCP_EN_CIK_VI(x) (((x) >> 9) & 0x1FF) 3459#define C_00B42C_EXCP_EN_CIK_VI 0xFFFC01FF 3460#define R_00B430_SPI_SHADER_USER_DATA_HS_0 0x00B430 3461#define R_00B434_SPI_SHADER_USER_DATA_HS_1 0x00B434 3462#define R_00B438_SPI_SHADER_USER_DATA_HS_2 0x00B438 3463#define R_00B43C_SPI_SHADER_USER_DATA_HS_3 0x00B43C 3464#define R_00B440_SPI_SHADER_USER_DATA_HS_4 0x00B440 3465#define R_00B444_SPI_SHADER_USER_DATA_HS_5 0x00B444 3466#define R_00B448_SPI_SHADER_USER_DATA_HS_6 0x00B448 3467#define R_00B44C_SPI_SHADER_USER_DATA_HS_7 0x00B44C 3468#define R_00B450_SPI_SHADER_USER_DATA_HS_8 0x00B450 3469#define R_00B454_SPI_SHADER_USER_DATA_HS_9 0x00B454 3470#define R_00B458_SPI_SHADER_USER_DATA_HS_10 0x00B458 3471#define R_00B45C_SPI_SHADER_USER_DATA_HS_11 0x00B45C 3472#define R_00B460_SPI_SHADER_USER_DATA_HS_12 0x00B460 3473#define R_00B464_SPI_SHADER_USER_DATA_HS_13 0x00B464 3474#define R_00B468_SPI_SHADER_USER_DATA_HS_14 0x00B468 3475#define R_00B46C_SPI_SHADER_USER_DATA_HS_15 0x00B46C 3476#define R_00B500_SPI_SHADER_TBA_LO_LS 0x00B500 3477#define R_00B504_SPI_SHADER_TBA_HI_LS 0x00B504 3478#define S_00B504_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3479#define G_00B504_MEM_BASE(x) (((x) >> 0) & 0xFF) 3480#define C_00B504_MEM_BASE 0xFFFFFF00 3481#define R_00B508_SPI_SHADER_TMA_LO_LS 0x00B508 3482#define R_00B50C_SPI_SHADER_TMA_HI_LS 0x00B50C 3483#define S_00B50C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3484#define G_00B50C_MEM_BASE(x) (((x) >> 0) & 0xFF) 3485#define C_00B50C_MEM_BASE 0xFFFFFF00 3486/* CIK */ 3487#define R_00B51C_SPI_SHADER_PGM_RSRC3_LS 0x00B51C 3488#define S_00B51C_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 3489#define G_00B51C_CU_EN(x) (((x) >> 0) & 0xFFFF) 3490#define C_00B51C_CU_EN 0xFFFF0000 3491#define S_00B51C_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 16) 3492#define G_00B51C_WAVE_LIMIT(x) (((x) >> 16) & 0x3F) 3493#define C_00B51C_WAVE_LIMIT 0xFFC0FFFF 3494#define S_00B51C_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 22) 3495#define G_00B51C_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0x0F) 3496#define C_00B51C_LOCK_LOW_THRESHOLD 0xFC3FFFFF 3497/* */ 3498/* VI */ 3499#define S_00B51C_GROUP_FIFO_DEPTH(x) (((unsigned)(x) & 0x3F) << 26) 3500#define G_00B51C_GROUP_FIFO_DEPTH(x) (((x) >> 26) & 0x3F) 3501#define C_00B51C_GROUP_FIFO_DEPTH 0x03FFFFFF 3502/* */ 3503#define R_00B520_SPI_SHADER_PGM_LO_LS 0x00B520 3504#define R_00B524_SPI_SHADER_PGM_HI_LS 0x00B524 3505#define S_00B524_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) 3506#define G_00B524_MEM_BASE(x) (((x) >> 0) & 0xFF) 3507#define C_00B524_MEM_BASE 0xFFFFFF00 3508#define R_00B528_SPI_SHADER_PGM_RSRC1_LS 0x00B528 3509#define S_00B528_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) 3510#define G_00B528_VGPRS(x) (((x) >> 0) & 0x3F) 3511#define C_00B528_VGPRS 0xFFFFFFC0 3512#define S_00B528_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) 3513#define G_00B528_SGPRS(x) (((x) >> 6) & 0x0F) 3514#define C_00B528_SGPRS 0xFFFFFC3F 3515#define S_00B528_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) 3516#define G_00B528_PRIORITY(x) (((x) >> 10) & 0x03) 3517#define C_00B528_PRIORITY 0xFFFFF3FF 3518#define S_00B528_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) 3519#define G_00B528_FLOAT_MODE(x) (((x) >> 12) & 0xFF) 3520#define C_00B528_FLOAT_MODE 0xFFF00FFF 3521#define S_00B528_PRIV(x) (((unsigned)(x) & 0x1) << 20) 3522#define G_00B528_PRIV(x) (((x) >> 20) & 0x1) 3523#define C_00B528_PRIV 0xFFEFFFFF 3524#define S_00B528_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 3525#define G_00B528_DX10_CLAMP(x) (((x) >> 21) & 0x1) 3526#define C_00B528_DX10_CLAMP 0xFFDFFFFF 3527#define S_00B528_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) 3528#define G_00B528_DEBUG_MODE(x) (((x) >> 22) & 0x1) 3529#define C_00B528_DEBUG_MODE 0xFFBFFFFF 3530#define S_00B528_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) 3531#define G_00B528_IEEE_MODE(x) (((x) >> 23) & 0x1) 3532#define C_00B528_IEEE_MODE 0xFF7FFFFF 3533#define S_00B528_VGPR_COMP_CNT(x) (((unsigned)(x) & 0x03) << 24) 3534#define G_00B528_VGPR_COMP_CNT(x) (((x) >> 24) & 0x03) 3535#define C_00B528_VGPR_COMP_CNT 0xFCFFFFFF 3536/* CIK */ 3537#define S_00B528_CACHE_CTL(x) (((unsigned)(x) & 0x07) << 26) 3538#define G_00B528_CACHE_CTL(x) (((x) >> 26) & 0x07) 3539#define C_00B528_CACHE_CTL 0xE3FFFFFF 3540#define S_00B528_CDBG_USER(x) (((unsigned)(x) & 0x1) << 29) 3541#define G_00B528_CDBG_USER(x) (((x) >> 29) & 0x1) 3542#define C_00B528_CDBG_USER 0xDFFFFFFF 3543/* */ 3544#define R_00B52C_SPI_SHADER_PGM_RSRC2_LS 0x00B52C 3545#define S_00B52C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 3546#define G_00B52C_SCRATCH_EN(x) (((x) >> 0) & 0x1) 3547#define C_00B52C_SCRATCH_EN 0xFFFFFFFE 3548#define S_00B52C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 3549#define G_00B52C_USER_SGPR(x) (((x) >> 1) & 0x1F) 3550#define C_00B52C_USER_SGPR 0xFFFFFFC1 3551#define S_00B52C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 3552#define G_00B52C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 3553#define C_00B52C_TRAP_PRESENT 0xFFFFFFBF 3554#define S_00B52C_LDS_SIZE(x) (((unsigned)(x) & 0x1FF) << 7) 3555#define G_00B52C_LDS_SIZE(x) (((x) >> 7) & 0x1FF) 3556#define C_00B52C_LDS_SIZE 0xFFFF007F 3557#define S_00B52C_EXCP_EN_SI(x) (((unsigned)(x) & 0x7F) << 16) 3558#define G_00B52C_EXCP_EN_SI(x) (((x) >> 16) & 0x7F) 3559#define C_00B52C_EXCP_EN_SI 0xFF80FFFF 3560#define S_00B52C_EXCP_EN(x) (((unsigned)(x) & 0x1FF) << 16) 3561#define G_00B52C_EXCP_EN(x) (((x) >> 16) & 0x1FF) 3562#define C_00B52C_EXCP_EN 0xFE00FFFF 3563#define R_00B530_SPI_SHADER_USER_DATA_LS_0 0x00B530 3564#define R_00B534_SPI_SHADER_USER_DATA_LS_1 0x00B534 3565#define R_00B538_SPI_SHADER_USER_DATA_LS_2 0x00B538 3566#define R_00B53C_SPI_SHADER_USER_DATA_LS_3 0x00B53C 3567#define R_00B540_SPI_SHADER_USER_DATA_LS_4 0x00B540 3568#define R_00B544_SPI_SHADER_USER_DATA_LS_5 0x00B544 3569#define R_00B548_SPI_SHADER_USER_DATA_LS_6 0x00B548 3570#define R_00B54C_SPI_SHADER_USER_DATA_LS_7 0x00B54C 3571#define R_00B550_SPI_SHADER_USER_DATA_LS_8 0x00B550 3572#define R_00B554_SPI_SHADER_USER_DATA_LS_9 0x00B554 3573#define R_00B558_SPI_SHADER_USER_DATA_LS_10 0x00B558 3574#define R_00B55C_SPI_SHADER_USER_DATA_LS_11 0x00B55C 3575#define R_00B560_SPI_SHADER_USER_DATA_LS_12 0x00B560 3576#define R_00B564_SPI_SHADER_USER_DATA_LS_13 0x00B564 3577#define R_00B568_SPI_SHADER_USER_DATA_LS_14 0x00B568 3578#define R_00B56C_SPI_SHADER_USER_DATA_LS_15 0x00B56C 3579#define R_00B800_COMPUTE_DISPATCH_INITIATOR 0x00B800 3580#define S_00B800_COMPUTE_SHADER_EN(x) (((unsigned)(x) & 0x1) << 0) 3581#define G_00B800_COMPUTE_SHADER_EN(x) (((x) >> 0) & 0x1) 3582#define C_00B800_COMPUTE_SHADER_EN 0xFFFFFFFE 3583#define S_00B800_PARTIAL_TG_EN(x) (((unsigned)(x) & 0x1) << 1) 3584#define G_00B800_PARTIAL_TG_EN(x) (((x) >> 1) & 0x1) 3585#define C_00B800_PARTIAL_TG_EN 0xFFFFFFFD 3586#define S_00B800_FORCE_START_AT_000(x) (((unsigned)(x) & 0x1) << 2) 3587#define G_00B800_FORCE_START_AT_000(x) (((x) >> 2) & 0x1) 3588#define C_00B800_FORCE_START_AT_000 0xFFFFFFFB 3589#define S_00B800_ORDERED_APPEND_ENBL(x) (((unsigned)(x) & 0x1) << 3) 3590#define G_00B800_ORDERED_APPEND_ENBL(x) (((x) >> 3) & 0x1) 3591#define C_00B800_ORDERED_APPEND_ENBL 0xFFFFFFF7 3592/* CIK */ 3593#define S_00B800_ORDERED_APPEND_MODE(x) (((unsigned)(x) & 0x1) << 4) 3594#define G_00B800_ORDERED_APPEND_MODE(x) (((x) >> 4) & 0x1) 3595#define C_00B800_ORDERED_APPEND_MODE 0xFFFFFFEF 3596#define S_00B800_USE_THREAD_DIMENSIONS(x) (((unsigned)(x) & 0x1) << 5) 3597#define G_00B800_USE_THREAD_DIMENSIONS(x) (((x) >> 5) & 0x1) 3598#define C_00B800_USE_THREAD_DIMENSIONS 0xFFFFFFDF 3599#define S_00B800_ORDER_MODE(x) (((unsigned)(x) & 0x1) << 6) 3600#define G_00B800_ORDER_MODE(x) (((x) >> 6) & 0x1) 3601#define C_00B800_ORDER_MODE 0xFFFFFFBF 3602#define S_00B800_DISPATCH_CACHE_CNTL(x) (((unsigned)(x) & 0x07) << 7) 3603#define G_00B800_DISPATCH_CACHE_CNTL(x) (((x) >> 7) & 0x07) 3604#define C_00B800_DISPATCH_CACHE_CNTL 0xFFFFFC7F 3605#define S_00B800_SCALAR_L1_INV_VOL(x) (((unsigned)(x) & 0x1) << 10) 3606#define G_00B800_SCALAR_L1_INV_VOL(x) (((x) >> 10) & 0x1) 3607#define C_00B800_SCALAR_L1_INV_VOL 0xFFFFFBFF 3608#define S_00B800_VECTOR_L1_INV_VOL(x) (((unsigned)(x) & 0x1) << 11) 3609#define G_00B800_VECTOR_L1_INV_VOL(x) (((x) >> 11) & 0x1) 3610#define C_00B800_VECTOR_L1_INV_VOL 0xFFFFF7FF 3611#define S_00B800_DATA_ATC(x) (((unsigned)(x) & 0x1) << 12) 3612#define G_00B800_DATA_ATC(x) (((x) >> 12) & 0x1) 3613#define C_00B800_DATA_ATC 0xFFFFEFFF 3614#define S_00B800_RESTORE(x) (((unsigned)(x) & 0x1) << 14) 3615#define G_00B800_RESTORE(x) (((x) >> 14) & 0x1) 3616#define C_00B800_RESTORE 0xFFFFBFFF 3617/* */ 3618#define R_00B804_COMPUTE_DIM_X 0x00B804 3619#define R_00B808_COMPUTE_DIM_Y 0x00B808 3620#define R_00B80C_COMPUTE_DIM_Z 0x00B80C 3621#define R_00B810_COMPUTE_START_X 0x00B810 3622#define R_00B814_COMPUTE_START_Y 0x00B814 3623#define R_00B818_COMPUTE_START_Z 0x00B818 3624#define R_00B81C_COMPUTE_NUM_THREAD_X 0x00B81C 3625#define S_00B81C_NUM_THREAD_FULL(x) (((unsigned)(x) & 0xFFFF) << 0) 3626#define G_00B81C_NUM_THREAD_FULL(x) (((x) >> 0) & 0xFFFF) 3627#define C_00B81C_NUM_THREAD_FULL 0xFFFF0000 3628#define S_00B81C_NUM_THREAD_PARTIAL(x) (((unsigned)(x) & 0xFFFF) << 16) 3629#define G_00B81C_NUM_THREAD_PARTIAL(x) (((x) >> 16) & 0xFFFF) 3630#define C_00B81C_NUM_THREAD_PARTIAL 0x0000FFFF 3631#define R_00B820_COMPUTE_NUM_THREAD_Y 0x00B820 3632#define S_00B820_NUM_THREAD_FULL(x) (((unsigned)(x) & 0xFFFF) << 0) 3633#define G_00B820_NUM_THREAD_FULL(x) (((x) >> 0) & 0xFFFF) 3634#define C_00B820_NUM_THREAD_FULL 0xFFFF0000 3635#define S_00B820_NUM_THREAD_PARTIAL(x) (((unsigned)(x) & 0xFFFF) << 16) 3636#define G_00B820_NUM_THREAD_PARTIAL(x) (((x) >> 16) & 0xFFFF) 3637#define C_00B820_NUM_THREAD_PARTIAL 0x0000FFFF 3638#define R_00B824_COMPUTE_NUM_THREAD_Z 0x00B824 3639#define S_00B824_NUM_THREAD_FULL(x) (((unsigned)(x) & 0xFFFF) << 0) 3640#define G_00B824_NUM_THREAD_FULL(x) (((x) >> 0) & 0xFFFF) 3641#define C_00B824_NUM_THREAD_FULL 0xFFFF0000 3642#define S_00B824_NUM_THREAD_PARTIAL(x) (((unsigned)(x) & 0xFFFF) << 16) 3643#define G_00B824_NUM_THREAD_PARTIAL(x) (((x) >> 16) & 0xFFFF) 3644#define C_00B824_NUM_THREAD_PARTIAL 0x0000FFFF 3645#define R_00B82C_COMPUTE_MAX_WAVE_ID 0x00B82C /* not on CIK -- moved to 0xCD20 */ 3646#define S_00B82C_MAX_WAVE_ID(x) (((unsigned)(x) & 0xFFF) << 0) 3647#define G_00B82C_MAX_WAVE_ID(x) (((x) >> 0) & 0xFFF) 3648#define C_00B82C_MAX_WAVE_ID 0xFFFFF000 3649/* CIK */ 3650#define R_00B828_COMPUTE_PIPELINESTAT_ENABLE 0x00B828 3651#define S_00B828_PIPELINESTAT_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 3652#define G_00B828_PIPELINESTAT_ENABLE(x) (((x) >> 0) & 0x1) 3653#define C_00B828_PIPELINESTAT_ENABLE 0xFFFFFFFE 3654#define R_00B82C_COMPUTE_PERFCOUNT_ENABLE 0x00B82C 3655#define S_00B82C_PERFCOUNT_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 3656#define G_00B82C_PERFCOUNT_ENABLE(x) (((x) >> 0) & 0x1) 3657#define C_00B82C_PERFCOUNT_ENABLE 0xFFFFFFFE 3658/* */ 3659#define R_00B830_COMPUTE_PGM_LO 0x00B830 3660#define R_00B834_COMPUTE_PGM_HI 0x00B834 3661#define S_00B834_DATA(x) (((unsigned)(x) & 0xFF) << 0) 3662#define G_00B834_DATA(x) (((x) >> 0) & 0xFF) 3663#define C_00B834_DATA 0xFFFFFF00 3664/* CIK */ 3665#define S_00B834_INST_ATC(x) (((unsigned)(x) & 0x1) << 8) 3666#define G_00B834_INST_ATC(x) (((x) >> 8) & 0x1) 3667#define C_00B834_INST_ATC 0xFFFFFEFF 3668/* */ 3669#define R_00B838_COMPUTE_TBA_LO 0x00B838 3670#define R_00B83C_COMPUTE_TBA_HI 0x00B83C 3671#define S_00B83C_DATA(x) (((unsigned)(x) & 0xFF) << 0) 3672#define G_00B83C_DATA(x) (((x) >> 0) & 0xFF) 3673#define C_00B83C_DATA 0xFFFFFF00 3674#define R_00B840_COMPUTE_TMA_LO 0x00B840 3675#define R_00B844_COMPUTE_TMA_HI 0x00B844 3676#define S_00B844_DATA(x) (((unsigned)(x) & 0xFF) << 0) 3677#define G_00B844_DATA(x) (((x) >> 0) & 0xFF) 3678#define C_00B844_DATA 0xFFFFFF00 3679#define R_00B848_COMPUTE_PGM_RSRC1 0x00B848 3680#define S_00B848_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) 3681#define G_00B848_VGPRS(x) (((x) >> 0) & 0x3F) 3682#define C_00B848_VGPRS 0xFFFFFFC0 3683#define S_00B848_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) 3684#define G_00B848_SGPRS(x) (((x) >> 6) & 0x0F) 3685#define C_00B848_SGPRS 0xFFFFFC3F 3686#define S_00B848_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) 3687#define G_00B848_PRIORITY(x) (((x) >> 10) & 0x03) 3688#define C_00B848_PRIORITY 0xFFFFF3FF 3689#define S_00B848_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) 3690#define G_00B848_FLOAT_MODE(x) (((x) >> 12) & 0xFF) 3691#define C_00B848_FLOAT_MODE 0xFFF00FFF 3692#define S_00B848_PRIV(x) (((unsigned)(x) & 0x1) << 20) 3693#define G_00B848_PRIV(x) (((x) >> 20) & 0x1) 3694#define C_00B848_PRIV 0xFFEFFFFF 3695#define S_00B848_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 3696#define G_00B848_DX10_CLAMP(x) (((x) >> 21) & 0x1) 3697#define C_00B848_DX10_CLAMP 0xFFDFFFFF 3698#define S_00B848_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) 3699#define G_00B848_DEBUG_MODE(x) (((x) >> 22) & 0x1) 3700#define C_00B848_DEBUG_MODE 0xFFBFFFFF 3701#define S_00B848_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) 3702#define G_00B848_IEEE_MODE(x) (((x) >> 23) & 0x1) 3703#define C_00B848_IEEE_MODE 0xFF7FFFFF 3704/* CIK */ 3705#define S_00B848_BULKY(x) (((unsigned)(x) & 0x1) << 24) 3706#define G_00B848_BULKY(x) (((x) >> 24) & 0x1) 3707#define C_00B848_BULKY 0xFEFFFFFF 3708#define S_00B848_CDBG_USER(x) (((unsigned)(x) & 0x1) << 25) 3709#define G_00B848_CDBG_USER(x) (((x) >> 25) & 0x1) 3710#define C_00B848_CDBG_USER 0xFDFFFFFF 3711/* */ 3712#define R_00B84C_COMPUTE_PGM_RSRC2 0x00B84C 3713#define S_00B84C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) 3714#define G_00B84C_SCRATCH_EN(x) (((x) >> 0) & 0x1) 3715#define C_00B84C_SCRATCH_EN 0xFFFFFFFE 3716#define S_00B84C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) 3717#define G_00B84C_USER_SGPR(x) (((x) >> 1) & 0x1F) 3718#define C_00B84C_USER_SGPR 0xFFFFFFC1 3719#define S_00B84C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) 3720#define G_00B84C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) 3721#define C_00B84C_TRAP_PRESENT 0xFFFFFFBF 3722#define S_00B84C_TGID_X_EN(x) (((unsigned)(x) & 0x1) << 7) 3723#define G_00B84C_TGID_X_EN(x) (((x) >> 7) & 0x1) 3724#define C_00B84C_TGID_X_EN 0xFFFFFF7F 3725#define S_00B84C_TGID_Y_EN(x) (((unsigned)(x) & 0x1) << 8) 3726#define G_00B84C_TGID_Y_EN(x) (((x) >> 8) & 0x1) 3727#define C_00B84C_TGID_Y_EN 0xFFFFFEFF 3728#define S_00B84C_TGID_Z_EN(x) (((unsigned)(x) & 0x1) << 9) 3729#define G_00B84C_TGID_Z_EN(x) (((x) >> 9) & 0x1) 3730#define C_00B84C_TGID_Z_EN 0xFFFFFDFF 3731#define S_00B84C_TG_SIZE_EN(x) (((unsigned)(x) & 0x1) << 10) 3732#define G_00B84C_TG_SIZE_EN(x) (((x) >> 10) & 0x1) 3733#define C_00B84C_TG_SIZE_EN 0xFFFFFBFF 3734#define S_00B84C_TIDIG_COMP_CNT(x) (((unsigned)(x) & 0x03) << 11) 3735#define G_00B84C_TIDIG_COMP_CNT(x) (((x) >> 11) & 0x03) 3736#define C_00B84C_TIDIG_COMP_CNT 0xFFFFE7FF 3737/* CIK */ 3738#define S_00B84C_EXCP_EN_MSB(x) (((unsigned)(x) & 0x03) << 13) 3739#define G_00B84C_EXCP_EN_MSB(x) (((x) >> 13) & 0x03) 3740#define C_00B84C_EXCP_EN_MSB 0xFFFF9FFF 3741/* */ 3742#define S_00B84C_LDS_SIZE(x) (((unsigned)(x) & 0x1FF) << 15) 3743#define G_00B84C_LDS_SIZE(x) (((x) >> 15) & 0x1FF) 3744#define C_00B84C_LDS_SIZE 0xFF007FFF 3745#define S_00B84C_EXCP_EN(x) (((unsigned)(x) & 0x7F) << 24) 3746#define G_00B84C_EXCP_EN(x) (((x) >> 24) & 0x7F) 3747#define C_00B84C_EXCP_EN 0x80FFFFFF 3748#define R_00B850_COMPUTE_VMID 0x00B850 3749#define S_00B850_DATA(x) (((unsigned)(x) & 0x0F) << 0) 3750#define G_00B850_DATA(x) (((x) >> 0) & 0x0F) 3751#define C_00B850_DATA 0xFFFFFFF0 3752#define R_00B854_COMPUTE_RESOURCE_LIMITS 0x00B854 3753#define S_00B854_WAVES_PER_SH_SI(x) (((unsigned)(x) & 0x3F) << 0) 3754#define G_00B854_WAVES_PER_SH_SI(x) (((x) >> 0) & 0x3F) 3755#define C_00B854_WAVES_PER_SH_SI 0xFFFFFFC0 3756#define S_00B854_WAVES_PER_SH(x) (((unsigned)(x) & 0x3FF) << 0) /* CIK+ */ 3757#define G_00B854_WAVES_PER_SH(x) (((x) >> 0) & 0x3FF) 3758#define C_00B854_WAVES_PER_SH 0xFFFFFC00 3759#define S_00B854_TG_PER_CU(x) (((unsigned)(x) & 0x0F) << 12) 3760#define G_00B854_TG_PER_CU(x) (((x) >> 12) & 0x0F) 3761#define C_00B854_TG_PER_CU 0xFFFF0FFF 3762#define S_00B854_LOCK_THRESHOLD(x) (((unsigned)(x) & 0x3F) << 16) 3763#define G_00B854_LOCK_THRESHOLD(x) (((x) >> 16) & 0x3F) 3764#define C_00B854_LOCK_THRESHOLD 0xFFC0FFFF 3765#define S_00B854_SIMD_DEST_CNTL(x) (((unsigned)(x) & 0x1) << 22) 3766#define G_00B854_SIMD_DEST_CNTL(x) (((x) >> 22) & 0x1) 3767#define C_00B854_SIMD_DEST_CNTL 0xFFBFFFFF 3768/* CIK */ 3769#define S_00B854_FORCE_SIMD_DIST(x) (((unsigned)(x) & 0x1) << 23) 3770#define G_00B854_FORCE_SIMD_DIST(x) (((x) >> 23) & 0x1) 3771#define C_00B854_FORCE_SIMD_DIST 0xFF7FFFFF 3772#define S_00B854_CU_GROUP_COUNT(x) (((unsigned)(x) & 0x07) << 24) 3773#define G_00B854_CU_GROUP_COUNT(x) (((x) >> 24) & 0x07) 3774#define C_00B854_CU_GROUP_COUNT 0xF8FFFFFF 3775/* */ 3776#define R_00B858_COMPUTE_STATIC_THREAD_MGMT_SE0 0x00B858 3777#define S_00B858_SH0_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 3778#define G_00B858_SH0_CU_EN(x) (((x) >> 0) & 0xFFFF) 3779#define C_00B858_SH0_CU_EN 0xFFFF0000 3780#define S_00B858_SH1_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 16) 3781#define G_00B858_SH1_CU_EN(x) (((x) >> 16) & 0xFFFF) 3782#define C_00B858_SH1_CU_EN 0x0000FFFF 3783#define R_00B85C_COMPUTE_STATIC_THREAD_MGMT_SE1 0x00B85C 3784#define S_00B85C_SH0_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 3785#define G_00B85C_SH0_CU_EN(x) (((x) >> 0) & 0xFFFF) 3786#define C_00B85C_SH0_CU_EN 0xFFFF0000 3787#define S_00B85C_SH1_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 16) 3788#define G_00B85C_SH1_CU_EN(x) (((x) >> 16) & 0xFFFF) 3789#define C_00B85C_SH1_CU_EN 0x0000FFFF 3790#define R_00B860_COMPUTE_TMPRING_SIZE 0x00B860 3791#define S_00B860_WAVES(x) (((unsigned)(x) & 0xFFF) << 0) 3792#define G_00B860_WAVES(x) (((x) >> 0) & 0xFFF) 3793#define C_00B860_WAVES 0xFFFFF000 3794#define S_00B860_WAVESIZE(x) (((unsigned)(x) & 0x1FFF) << 12) 3795#define G_00B860_WAVESIZE(x) (((x) >> 12) & 0x1FFF) 3796#define C_00B860_WAVESIZE 0xFE000FFF 3797/* CIK */ 3798#define R_00B864_COMPUTE_STATIC_THREAD_MGMT_SE2 0x00B864 3799#define S_00B864_SH0_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 3800#define G_00B864_SH0_CU_EN(x) (((x) >> 0) & 0xFFFF) 3801#define C_00B864_SH0_CU_EN 0xFFFF0000 3802#define S_00B864_SH1_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 16) 3803#define G_00B864_SH1_CU_EN(x) (((x) >> 16) & 0xFFFF) 3804#define C_00B864_SH1_CU_EN 0x0000FFFF 3805#define R_00B868_COMPUTE_STATIC_THREAD_MGMT_SE3 0x00B868 3806#define S_00B868_SH0_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) 3807#define G_00B868_SH0_CU_EN(x) (((x) >> 0) & 0xFFFF) 3808#define C_00B868_SH0_CU_EN 0xFFFF0000 3809#define S_00B868_SH1_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 16) 3810#define G_00B868_SH1_CU_EN(x) (((x) >> 16) & 0xFFFF) 3811#define C_00B868_SH1_CU_EN 0x0000FFFF 3812#define R_00B86C_COMPUTE_RESTART_X 0x00B86C 3813#define R_00B870_COMPUTE_RESTART_Y 0x00B870 3814#define R_00B874_COMPUTE_RESTART_Z 0x00B874 3815#define R_00B87C_COMPUTE_MISC_RESERVED 0x00B87C 3816#define S_00B87C_SEND_SEID(x) (((unsigned)(x) & 0x03) << 0) 3817#define G_00B87C_SEND_SEID(x) (((x) >> 0) & 0x03) 3818#define C_00B87C_SEND_SEID 0xFFFFFFFC 3819#define S_00B87C_RESERVED2(x) (((unsigned)(x) & 0x1) << 2) 3820#define G_00B87C_RESERVED2(x) (((x) >> 2) & 0x1) 3821#define C_00B87C_RESERVED2 0xFFFFFFFB 3822#define S_00B87C_RESERVED3(x) (((unsigned)(x) & 0x1) << 3) 3823#define G_00B87C_RESERVED3(x) (((x) >> 3) & 0x1) 3824#define C_00B87C_RESERVED3 0xFFFFFFF7 3825#define S_00B87C_RESERVED4(x) (((unsigned)(x) & 0x1) << 4) 3826#define G_00B87C_RESERVED4(x) (((x) >> 4) & 0x1) 3827#define C_00B87C_RESERVED4 0xFFFFFFEF 3828/* VI */ 3829#define S_00B87C_WAVE_ID_BASE(x) (((unsigned)(x) & 0xFFF) << 5) 3830#define G_00B87C_WAVE_ID_BASE(x) (((x) >> 5) & 0xFFF) 3831#define C_00B87C_WAVE_ID_BASE 0xFFFE001F 3832#define R_00B880_COMPUTE_DISPATCH_ID 0x00B880 3833#define R_00B884_COMPUTE_THREADGROUP_ID 0x00B884 3834#define R_00B888_COMPUTE_RELAUNCH 0x00B888 3835#define S_00B888_PAYLOAD(x) (((unsigned)(x) & 0x3FFFFFFF) << 0) 3836#define G_00B888_PAYLOAD(x) (((x) >> 0) & 0x3FFFFFFF) 3837#define C_00B888_PAYLOAD 0xC0000000 3838#define S_00B888_IS_EVENT(x) (((unsigned)(x) & 0x1) << 30) 3839#define G_00B888_IS_EVENT(x) (((x) >> 30) & 0x1) 3840#define C_00B888_IS_EVENT 0xBFFFFFFF 3841#define S_00B888_IS_STATE(x) (((unsigned)(x) & 0x1) << 31) 3842#define G_00B888_IS_STATE(x) (((x) >> 31) & 0x1) 3843#define C_00B888_IS_STATE 0x7FFFFFFF 3844#define R_00B88C_COMPUTE_WAVE_RESTORE_ADDR_LO 0x00B88C 3845#define R_00B890_COMPUTE_WAVE_RESTORE_ADDR_HI 0x00B890 3846#define S_00B890_ADDR(x) (((unsigned)(x) & 0xFFFF) << 0) 3847#define G_00B890_ADDR(x) (((x) >> 0) & 0xFFFF) 3848#define C_00B890_ADDR 0xFFFF0000 3849#define R_00B894_COMPUTE_WAVE_RESTORE_CONTROL 0x00B894 3850#define S_00B894_ATC(x) (((unsigned)(x) & 0x1) << 0) 3851#define G_00B894_ATC(x) (((x) >> 0) & 0x1) 3852#define C_00B894_ATC 0xFFFFFFFE 3853#define S_00B894_MTYPE(x) (((unsigned)(x) & 0x03) << 1) 3854#define G_00B894_MTYPE(x) (((x) >> 1) & 0x03) 3855#define C_00B894_MTYPE 0xFFFFFFF9 3856/* */ 3857/* */ 3858#define R_00B900_COMPUTE_USER_DATA_0 0x00B900 3859#define R_00B904_COMPUTE_USER_DATA_1 0x00B904 3860#define R_00B908_COMPUTE_USER_DATA_2 0x00B908 3861#define R_00B90C_COMPUTE_USER_DATA_3 0x00B90C 3862#define R_00B910_COMPUTE_USER_DATA_4 0x00B910 3863#define R_00B914_COMPUTE_USER_DATA_5 0x00B914 3864#define R_00B918_COMPUTE_USER_DATA_6 0x00B918 3865#define R_00B91C_COMPUTE_USER_DATA_7 0x00B91C 3866#define R_00B920_COMPUTE_USER_DATA_8 0x00B920 3867#define R_00B924_COMPUTE_USER_DATA_9 0x00B924 3868#define R_00B928_COMPUTE_USER_DATA_10 0x00B928 3869#define R_00B92C_COMPUTE_USER_DATA_11 0x00B92C 3870#define R_00B930_COMPUTE_USER_DATA_12 0x00B930 3871#define R_00B934_COMPUTE_USER_DATA_13 0x00B934 3872#define R_00B938_COMPUTE_USER_DATA_14 0x00B938 3873#define R_00B93C_COMPUTE_USER_DATA_15 0x00B93C 3874#define R_00B9FC_COMPUTE_NOWHERE 0x00B9FC 3875#define R_034000_CPG_PERFCOUNTER1_LO 0x034000 3876#define R_034004_CPG_PERFCOUNTER1_HI 0x034004 3877#define R_034008_CPG_PERFCOUNTER0_LO 0x034008 3878#define R_03400C_CPG_PERFCOUNTER0_HI 0x03400C 3879#define R_034010_CPC_PERFCOUNTER1_LO 0x034010 3880#define R_034014_CPC_PERFCOUNTER1_HI 0x034014 3881#define R_034018_CPC_PERFCOUNTER0_LO 0x034018 3882#define R_03401C_CPC_PERFCOUNTER0_HI 0x03401C 3883#define R_034020_CPF_PERFCOUNTER1_LO 0x034020 3884#define R_034024_CPF_PERFCOUNTER1_HI 0x034024 3885#define R_034028_CPF_PERFCOUNTER0_LO 0x034028 3886#define R_03402C_CPF_PERFCOUNTER0_HI 0x03402C 3887#define R_034100_GRBM_PERFCOUNTER0_LO 0x034100 3888#define R_034104_GRBM_PERFCOUNTER0_HI 0x034104 3889#define R_03410C_GRBM_PERFCOUNTER1_LO 0x03410C 3890#define R_034110_GRBM_PERFCOUNTER1_HI 0x034110 3891#define R_034114_GRBM_SE0_PERFCOUNTER_LO 0x034114 3892#define R_034118_GRBM_SE0_PERFCOUNTER_HI 0x034118 3893#define R_03411C_GRBM_SE1_PERFCOUNTER_LO 0x03411C 3894#define R_034120_GRBM_SE1_PERFCOUNTER_HI 0x034120 3895#define R_034124_GRBM_SE2_PERFCOUNTER_LO 0x034124 3896#define R_034128_GRBM_SE2_PERFCOUNTER_HI 0x034128 3897#define R_03412C_GRBM_SE3_PERFCOUNTER_LO 0x03412C 3898#define R_034130_GRBM_SE3_PERFCOUNTER_HI 0x034130 3899#define R_034200_WD_PERFCOUNTER0_LO 0x034200 3900#define R_034204_WD_PERFCOUNTER0_HI 0x034204 3901#define R_034208_WD_PERFCOUNTER1_LO 0x034208 3902#define R_03420C_WD_PERFCOUNTER1_HI 0x03420C 3903#define R_034210_WD_PERFCOUNTER2_LO 0x034210 3904#define R_034214_WD_PERFCOUNTER2_HI 0x034214 3905#define R_034218_WD_PERFCOUNTER3_LO 0x034218 3906#define R_03421C_WD_PERFCOUNTER3_HI 0x03421C 3907#define R_034220_IA_PERFCOUNTER0_LO 0x034220 3908#define R_034224_IA_PERFCOUNTER0_HI 0x034224 3909#define R_034228_IA_PERFCOUNTER1_LO 0x034228 3910#define R_03422C_IA_PERFCOUNTER1_HI 0x03422C 3911#define R_034230_IA_PERFCOUNTER2_LO 0x034230 3912#define R_034234_IA_PERFCOUNTER2_HI 0x034234 3913#define R_034238_IA_PERFCOUNTER3_LO 0x034238 3914#define R_03423C_IA_PERFCOUNTER3_HI 0x03423C 3915#define R_034240_VGT_PERFCOUNTER0_LO 0x034240 3916#define R_034244_VGT_PERFCOUNTER0_HI 0x034244 3917#define R_034248_VGT_PERFCOUNTER1_LO 0x034248 3918#define R_03424C_VGT_PERFCOUNTER1_HI 0x03424C 3919#define R_034250_VGT_PERFCOUNTER2_LO 0x034250 3920#define R_034254_VGT_PERFCOUNTER2_HI 0x034254 3921#define R_034258_VGT_PERFCOUNTER3_LO 0x034258 3922#define R_03425C_VGT_PERFCOUNTER3_HI 0x03425C 3923#define R_034400_PA_SU_PERFCOUNTER0_LO 0x034400 3924#define R_034404_PA_SU_PERFCOUNTER0_HI 0x034404 3925#define S_034404_PERFCOUNTER_HI(x) (((unsigned)(x) & 0xFFFF) << 0) 3926#define G_034404_PERFCOUNTER_HI(x) (((x) >> 0) & 0xFFFF) 3927#define C_034404_PERFCOUNTER_HI 0xFFFF0000 3928#define R_034408_PA_SU_PERFCOUNTER1_LO 0x034408 3929#define R_03440C_PA_SU_PERFCOUNTER1_HI 0x03440C 3930#define R_034410_PA_SU_PERFCOUNTER2_LO 0x034410 3931#define R_034414_PA_SU_PERFCOUNTER2_HI 0x034414 3932#define R_034418_PA_SU_PERFCOUNTER3_LO 0x034418 3933#define R_03441C_PA_SU_PERFCOUNTER3_HI 0x03441C 3934#define R_034500_PA_SC_PERFCOUNTER0_LO 0x034500 3935#define R_034504_PA_SC_PERFCOUNTER0_HI 0x034504 3936#define R_034508_PA_SC_PERFCOUNTER1_LO 0x034508 3937#define R_03450C_PA_SC_PERFCOUNTER1_HI 0x03450C 3938#define R_034510_PA_SC_PERFCOUNTER2_LO 0x034510 3939#define R_034514_PA_SC_PERFCOUNTER2_HI 0x034514 3940#define R_034518_PA_SC_PERFCOUNTER3_LO 0x034518 3941#define R_03451C_PA_SC_PERFCOUNTER3_HI 0x03451C 3942#define R_034520_PA_SC_PERFCOUNTER4_LO 0x034520 3943#define R_034524_PA_SC_PERFCOUNTER4_HI 0x034524 3944#define R_034528_PA_SC_PERFCOUNTER5_LO 0x034528 3945#define R_03452C_PA_SC_PERFCOUNTER5_HI 0x03452C 3946#define R_034530_PA_SC_PERFCOUNTER6_LO 0x034530 3947#define R_034534_PA_SC_PERFCOUNTER6_HI 0x034534 3948#define R_034538_PA_SC_PERFCOUNTER7_LO 0x034538 3949#define R_03453C_PA_SC_PERFCOUNTER7_HI 0x03453C 3950#define R_034600_SPI_PERFCOUNTER0_HI 0x034600 3951#define R_034604_SPI_PERFCOUNTER0_LO 0x034604 3952#define R_034608_SPI_PERFCOUNTER1_HI 0x034608 3953#define R_03460C_SPI_PERFCOUNTER1_LO 0x03460C 3954#define R_034610_SPI_PERFCOUNTER2_HI 0x034610 3955#define R_034614_SPI_PERFCOUNTER2_LO 0x034614 3956#define R_034618_SPI_PERFCOUNTER3_HI 0x034618 3957#define R_03461C_SPI_PERFCOUNTER3_LO 0x03461C 3958#define R_034620_SPI_PERFCOUNTER4_HI 0x034620 3959#define R_034624_SPI_PERFCOUNTER4_LO 0x034624 3960#define R_034628_SPI_PERFCOUNTER5_HI 0x034628 3961#define R_03462C_SPI_PERFCOUNTER5_LO 0x03462C 3962#define R_034700_SQ_PERFCOUNTER0_LO 0x034700 3963#define R_034704_SQ_PERFCOUNTER0_HI 0x034704 3964#define R_034708_SQ_PERFCOUNTER1_LO 0x034708 3965#define R_03470C_SQ_PERFCOUNTER1_HI 0x03470C 3966#define R_034710_SQ_PERFCOUNTER2_LO 0x034710 3967#define R_034714_SQ_PERFCOUNTER2_HI 0x034714 3968#define R_034718_SQ_PERFCOUNTER3_LO 0x034718 3969#define R_03471C_SQ_PERFCOUNTER3_HI 0x03471C 3970#define R_034720_SQ_PERFCOUNTER4_LO 0x034720 3971#define R_034724_SQ_PERFCOUNTER4_HI 0x034724 3972#define R_034728_SQ_PERFCOUNTER5_LO 0x034728 3973#define R_03472C_SQ_PERFCOUNTER5_HI 0x03472C 3974#define R_034730_SQ_PERFCOUNTER6_LO 0x034730 3975#define R_034734_SQ_PERFCOUNTER6_HI 0x034734 3976#define R_034738_SQ_PERFCOUNTER7_LO 0x034738 3977#define R_03473C_SQ_PERFCOUNTER7_HI 0x03473C 3978#define R_034740_SQ_PERFCOUNTER8_LO 0x034740 3979#define R_034744_SQ_PERFCOUNTER8_HI 0x034744 3980#define R_034748_SQ_PERFCOUNTER9_LO 0x034748 3981#define R_03474C_SQ_PERFCOUNTER9_HI 0x03474C 3982#define R_034750_SQ_PERFCOUNTER10_LO 0x034750 3983#define R_034754_SQ_PERFCOUNTER10_HI 0x034754 3984#define R_034758_SQ_PERFCOUNTER11_LO 0x034758 3985#define R_03475C_SQ_PERFCOUNTER11_HI 0x03475C 3986#define R_034760_SQ_PERFCOUNTER12_LO 0x034760 3987#define R_034764_SQ_PERFCOUNTER12_HI 0x034764 3988#define R_034768_SQ_PERFCOUNTER13_LO 0x034768 3989#define R_03476C_SQ_PERFCOUNTER13_HI 0x03476C 3990#define R_034770_SQ_PERFCOUNTER14_LO 0x034770 3991#define R_034774_SQ_PERFCOUNTER14_HI 0x034774 3992#define R_034778_SQ_PERFCOUNTER15_LO 0x034778 3993#define R_03477C_SQ_PERFCOUNTER15_HI 0x03477C 3994#define R_034900_SX_PERFCOUNTER0_LO 0x034900 3995#define R_034904_SX_PERFCOUNTER0_HI 0x034904 3996#define R_034908_SX_PERFCOUNTER1_LO 0x034908 3997#define R_03490C_SX_PERFCOUNTER1_HI 0x03490C 3998#define R_034910_SX_PERFCOUNTER2_LO 0x034910 3999#define R_034914_SX_PERFCOUNTER2_HI 0x034914 4000#define R_034918_SX_PERFCOUNTER3_LO 0x034918 4001#define R_03491C_SX_PERFCOUNTER3_HI 0x03491C 4002#define R_034A00_GDS_PERFCOUNTER0_LO 0x034A00 4003#define R_034A04_GDS_PERFCOUNTER0_HI 0x034A04 4004#define R_034A08_GDS_PERFCOUNTER1_LO 0x034A08 4005#define R_034A0C_GDS_PERFCOUNTER1_HI 0x034A0C 4006#define R_034A10_GDS_PERFCOUNTER2_LO 0x034A10 4007#define R_034A14_GDS_PERFCOUNTER2_HI 0x034A14 4008#define R_034A18_GDS_PERFCOUNTER3_LO 0x034A18 4009#define R_034A1C_GDS_PERFCOUNTER3_HI 0x034A1C 4010#define R_034B00_TA_PERFCOUNTER0_LO 0x034B00 4011#define R_034B04_TA_PERFCOUNTER0_HI 0x034B04 4012#define R_034B08_TA_PERFCOUNTER1_LO 0x034B08 4013#define R_034B0C_TA_PERFCOUNTER1_HI 0x034B0C 4014#define R_034C00_TD_PERFCOUNTER0_LO 0x034C00 4015#define R_034C04_TD_PERFCOUNTER0_HI 0x034C04 4016#define R_034C08_TD_PERFCOUNTER1_LO 0x034C08 4017#define R_034C0C_TD_PERFCOUNTER1_HI 0x034C0C 4018#define R_034D00_TCP_PERFCOUNTER0_LO 0x034D00 4019#define R_034D04_TCP_PERFCOUNTER0_HI 0x034D04 4020#define R_034D08_TCP_PERFCOUNTER1_LO 0x034D08 4021#define R_034D0C_TCP_PERFCOUNTER1_HI 0x034D0C 4022#define R_034D10_TCP_PERFCOUNTER2_LO 0x034D10 4023#define R_034D14_TCP_PERFCOUNTER2_HI 0x034D14 4024#define R_034D18_TCP_PERFCOUNTER3_LO 0x034D18 4025#define R_034D1C_TCP_PERFCOUNTER3_HI 0x034D1C 4026#define R_034E00_TCC_PERFCOUNTER0_LO 0x034E00 4027#define R_034E04_TCC_PERFCOUNTER0_HI 0x034E04 4028#define R_034E08_TCC_PERFCOUNTER1_LO 0x034E08 4029#define R_034E0C_TCC_PERFCOUNTER1_HI 0x034E0C 4030#define R_034E10_TCC_PERFCOUNTER2_LO 0x034E10 4031#define R_034E14_TCC_PERFCOUNTER2_HI 0x034E14 4032#define R_034E18_TCC_PERFCOUNTER3_LO 0x034E18 4033#define R_034E1C_TCC_PERFCOUNTER3_HI 0x034E1C 4034#define R_034E40_TCA_PERFCOUNTER0_LO 0x034E40 4035#define R_034E44_TCA_PERFCOUNTER0_HI 0x034E44 4036#define R_034E48_TCA_PERFCOUNTER1_LO 0x034E48 4037#define R_034E4C_TCA_PERFCOUNTER1_HI 0x034E4C 4038#define R_034E50_TCA_PERFCOUNTER2_LO 0x034E50 4039#define R_034E54_TCA_PERFCOUNTER2_HI 0x034E54 4040#define R_034E58_TCA_PERFCOUNTER3_LO 0x034E58 4041#define R_034E5C_TCA_PERFCOUNTER3_HI 0x034E5C 4042#define R_035018_CB_PERFCOUNTER0_LO 0x035018 4043#define R_03501C_CB_PERFCOUNTER0_HI 0x03501C 4044#define R_035020_CB_PERFCOUNTER1_LO 0x035020 4045#define R_035024_CB_PERFCOUNTER1_HI 0x035024 4046#define R_035028_CB_PERFCOUNTER2_LO 0x035028 4047#define R_03502C_CB_PERFCOUNTER2_HI 0x03502C 4048#define R_035030_CB_PERFCOUNTER3_LO 0x035030 4049#define R_035034_CB_PERFCOUNTER3_HI 0x035034 4050#define R_035100_DB_PERFCOUNTER0_LO 0x035100 4051#define R_035104_DB_PERFCOUNTER0_HI 0x035104 4052#define R_035108_DB_PERFCOUNTER1_LO 0x035108 4053#define R_03510C_DB_PERFCOUNTER1_HI 0x03510C 4054#define R_035110_DB_PERFCOUNTER2_LO 0x035110 4055#define R_035114_DB_PERFCOUNTER2_HI 0x035114 4056#define R_035118_DB_PERFCOUNTER3_LO 0x035118 4057#define R_03511C_DB_PERFCOUNTER3_HI 0x03511C 4058#define R_035200_RLC_PERFCOUNTER0_LO 0x035200 4059#define R_035204_RLC_PERFCOUNTER0_HI 0x035204 4060#define R_035208_RLC_PERFCOUNTER1_LO 0x035208 4061#define R_03520C_RLC_PERFCOUNTER1_HI 0x03520C 4062#define R_036000_CPG_PERFCOUNTER1_SELECT 0x036000 4063#define R_036004_CPG_PERFCOUNTER0_SELECT1 0x036004 4064#define S_036004_PERF_SEL2(x) (((unsigned)(x) & 0x3F) << 0) 4065#define G_036004_PERF_SEL2(x) (((x) >> 0) & 0x3F) 4066#define C_036004_PERF_SEL2 0xFFFFFFC0 4067#define S_036004_PERF_SEL3(x) (((unsigned)(x) & 0x3F) << 10) 4068#define G_036004_PERF_SEL3(x) (((x) >> 10) & 0x3F) 4069#define C_036004_PERF_SEL3 0xFFFF03FF 4070#define R_036008_CPG_PERFCOUNTER0_SELECT 0x036008 4071#define S_036008_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) 4072#define G_036008_PERF_SEL(x) (((x) >> 0) & 0x3F) 4073#define C_036008_PERF_SEL 0xFFFFFFC0 4074#define S_036008_PERF_SEL1(x) (((unsigned)(x) & 0x3F) << 10) 4075#define G_036008_PERF_SEL1(x) (((x) >> 10) & 0x3F) 4076#define C_036008_PERF_SEL1 0xFFFF03FF 4077#define S_036008_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4078#define G_036008_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4079#define C_036008_CNTR_MODE 0xFF0FFFFF 4080#define R_03600C_CPC_PERFCOUNTER1_SELECT 0x03600C 4081#define R_036010_CPC_PERFCOUNTER0_SELECT1 0x036010 4082#define S_036010_PERF_SEL2(x) (((unsigned)(x) & 0x3F) << 0) 4083#define G_036010_PERF_SEL2(x) (((x) >> 0) & 0x3F) 4084#define C_036010_PERF_SEL2 0xFFFFFFC0 4085#define S_036010_PERF_SEL3(x) (((unsigned)(x) & 0x3F) << 10) 4086#define G_036010_PERF_SEL3(x) (((x) >> 10) & 0x3F) 4087#define C_036010_PERF_SEL3 0xFFFF03FF 4088#define R_036014_CPF_PERFCOUNTER1_SELECT 0x036014 4089#define R_036018_CPF_PERFCOUNTER0_SELECT1 0x036018 4090#define S_036018_PERF_SEL2(x) (((unsigned)(x) & 0x3F) << 0) 4091#define G_036018_PERF_SEL2(x) (((x) >> 0) & 0x3F) 4092#define C_036018_PERF_SEL2 0xFFFFFFC0 4093#define S_036018_PERF_SEL3(x) (((unsigned)(x) & 0x3F) << 10) 4094#define G_036018_PERF_SEL3(x) (((x) >> 10) & 0x3F) 4095#define C_036018_PERF_SEL3 0xFFFF03FF 4096#define R_03601C_CPF_PERFCOUNTER0_SELECT 0x03601C 4097#define S_03601C_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) 4098#define G_03601C_PERF_SEL(x) (((x) >> 0) & 0x3F) 4099#define C_03601C_PERF_SEL 0xFFFFFFC0 4100#define S_03601C_PERF_SEL1(x) (((unsigned)(x) & 0x3F) << 10) 4101#define G_03601C_PERF_SEL1(x) (((x) >> 10) & 0x3F) 4102#define C_03601C_PERF_SEL1 0xFFFF03FF 4103#define S_03601C_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4104#define G_03601C_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4105#define C_03601C_CNTR_MODE 0xFF0FFFFF 4106#define R_036020_CP_PERFMON_CNTL 0x036020 4107#define S_036020_PERFMON_STATE(x) (((unsigned)(x) & 0x0F) << 0) 4108#define G_036020_PERFMON_STATE(x) (((x) >> 0) & 0x0F) 4109#define C_036020_PERFMON_STATE 0xFFFFFFF0 4110#define V_036020_DISABLE_AND_RESET 0x00 4111#define V_036020_START_COUNTING 0x01 4112#define V_036020_STOP_COUNTING 0x02 4113#define S_036020_SPM_PERFMON_STATE(x) (((unsigned)(x) & 0x0F) << 4) 4114#define G_036020_SPM_PERFMON_STATE(x) (((x) >> 4) & 0x0F) 4115#define C_036020_SPM_PERFMON_STATE 0xFFFFFF0F 4116#define S_036020_PERFMON_ENABLE_MODE(x) (((unsigned)(x) & 0x03) << 8) 4117#define G_036020_PERFMON_ENABLE_MODE(x) (((x) >> 8) & 0x03) 4118#define C_036020_PERFMON_ENABLE_MODE 0xFFFFFCFF 4119#define S_036020_PERFMON_SAMPLE_ENABLE(x) (((unsigned)(x) & 0x1) << 10) 4120#define G_036020_PERFMON_SAMPLE_ENABLE(x) (((x) >> 10) & 0x1) 4121#define C_036020_PERFMON_SAMPLE_ENABLE 0xFFFFFBFF 4122#define R_036024_CPC_PERFCOUNTER0_SELECT 0x036024 4123#define S_036024_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) 4124#define G_036024_PERF_SEL(x) (((x) >> 0) & 0x3F) 4125#define C_036024_PERF_SEL 0xFFFFFFC0 4126#define S_036024_PERF_SEL1(x) (((unsigned)(x) & 0x3F) << 10) 4127#define G_036024_PERF_SEL1(x) (((x) >> 10) & 0x3F) 4128#define C_036024_PERF_SEL1 0xFFFF03FF 4129#define S_036024_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4130#define G_036024_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4131#define C_036024_CNTR_MODE 0xFF0FFFFF 4132#define R_036100_GRBM_PERFCOUNTER0_SELECT 0x036100 4133#define S_036100_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) 4134#define G_036100_PERF_SEL(x) (((x) >> 0) & 0x3F) 4135#define C_036100_PERF_SEL 0xFFFFFFC0 4136#define S_036100_DB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 10) 4137#define G_036100_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1) 4138#define C_036100_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF 4139#define S_036100_CB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 11) 4140#define G_036100_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1) 4141#define C_036100_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF 4142#define S_036100_VGT_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 12) 4143#define G_036100_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1) 4144#define C_036100_VGT_BUSY_USER_DEFINED_MASK 0xFFFFEFFF 4145#define S_036100_TA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 13) 4146#define G_036100_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1) 4147#define C_036100_TA_BUSY_USER_DEFINED_MASK 0xFFFFDFFF 4148#define S_036100_SX_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 14) 4149#define G_036100_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 14) & 0x1) 4150#define C_036100_SX_BUSY_USER_DEFINED_MASK 0xFFFFBFFF 4151#define S_036100_SPI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 16) 4152#define G_036100_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1) 4153#define C_036100_SPI_BUSY_USER_DEFINED_MASK 0xFFFEFFFF 4154#define S_036100_SC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 17) 4155#define G_036100_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1) 4156#define C_036100_SC_BUSY_USER_DEFINED_MASK 0xFFFDFFFF 4157#define S_036100_PA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 18) 4158#define G_036100_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1) 4159#define C_036100_PA_BUSY_USER_DEFINED_MASK 0xFFFBFFFF 4160#define S_036100_GRBM_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 19) 4161#define G_036100_GRBM_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1) 4162#define C_036100_GRBM_BUSY_USER_DEFINED_MASK 0xFFF7FFFF 4163#define S_036100_DB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 20) 4164#define G_036100_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1) 4165#define C_036100_DB_BUSY_USER_DEFINED_MASK 0xFFEFFFFF 4166#define S_036100_CB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 21) 4167#define G_036100_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1) 4168#define C_036100_CB_BUSY_USER_DEFINED_MASK 0xFFDFFFFF 4169#define S_036100_CP_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 22) 4170#define G_036100_CP_BUSY_USER_DEFINED_MASK(x) (((x) >> 22) & 0x1) 4171#define C_036100_CP_BUSY_USER_DEFINED_MASK 0xFFBFFFFF 4172#define S_036100_IA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 23) 4173#define G_036100_IA_BUSY_USER_DEFINED_MASK(x) (((x) >> 23) & 0x1) 4174#define C_036100_IA_BUSY_USER_DEFINED_MASK 0xFF7FFFFF 4175#define S_036100_GDS_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 24) 4176#define G_036100_GDS_BUSY_USER_DEFINED_MASK(x) (((x) >> 24) & 0x1) 4177#define C_036100_GDS_BUSY_USER_DEFINED_MASK 0xFEFFFFFF 4178#define S_036100_BCI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 25) 4179#define G_036100_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 25) & 0x1) 4180#define C_036100_BCI_BUSY_USER_DEFINED_MASK 0xFDFFFFFF 4181#define S_036100_RLC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 26) 4182#define G_036100_RLC_BUSY_USER_DEFINED_MASK(x) (((x) >> 26) & 0x1) 4183#define C_036100_RLC_BUSY_USER_DEFINED_MASK 0xFBFFFFFF 4184#define S_036100_TC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 27) 4185#define G_036100_TC_BUSY_USER_DEFINED_MASK(x) (((x) >> 27) & 0x1) 4186#define C_036100_TC_BUSY_USER_DEFINED_MASK 0xF7FFFFFF 4187#define S_036100_WD_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 28) 4188#define G_036100_WD_BUSY_USER_DEFINED_MASK(x) (((x) >> 28) & 0x1) 4189#define C_036100_WD_BUSY_USER_DEFINED_MASK 0xEFFFFFFF 4190#define R_036104_GRBM_PERFCOUNTER1_SELECT 0x036104 4191#define R_036108_GRBM_SE0_PERFCOUNTER_SELECT 0x036108 4192#define S_036108_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) 4193#define G_036108_PERF_SEL(x) (((x) >> 0) & 0x3F) 4194#define C_036108_PERF_SEL 0xFFFFFFC0 4195#define S_036108_DB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 10) 4196#define G_036108_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1) 4197#define C_036108_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF 4198#define S_036108_CB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 11) 4199#define G_036108_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1) 4200#define C_036108_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF 4201#define S_036108_TA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 12) 4202#define G_036108_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1) 4203#define C_036108_TA_BUSY_USER_DEFINED_MASK 0xFFFFEFFF 4204#define S_036108_SX_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 13) 4205#define G_036108_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1) 4206#define C_036108_SX_BUSY_USER_DEFINED_MASK 0xFFFFDFFF 4207#define S_036108_SPI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 15) 4208#define G_036108_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 15) & 0x1) 4209#define C_036108_SPI_BUSY_USER_DEFINED_MASK 0xFFFF7FFF 4210#define S_036108_SC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 16) 4211#define G_036108_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1) 4212#define C_036108_SC_BUSY_USER_DEFINED_MASK 0xFFFEFFFF 4213#define S_036108_DB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 17) 4214#define G_036108_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1) 4215#define C_036108_DB_BUSY_USER_DEFINED_MASK 0xFFFDFFFF 4216#define S_036108_CB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 18) 4217#define G_036108_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1) 4218#define C_036108_CB_BUSY_USER_DEFINED_MASK 0xFFFBFFFF 4219#define S_036108_VGT_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 19) 4220#define G_036108_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1) 4221#define C_036108_VGT_BUSY_USER_DEFINED_MASK 0xFFF7FFFF 4222#define S_036108_PA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 20) 4223#define G_036108_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1) 4224#define C_036108_PA_BUSY_USER_DEFINED_MASK 0xFFEFFFFF 4225#define S_036108_BCI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 21) 4226#define G_036108_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1) 4227#define C_036108_BCI_BUSY_USER_DEFINED_MASK 0xFFDFFFFF 4228#define R_03610C_GRBM_SE1_PERFCOUNTER_SELECT 0x03610C 4229#define S_03610C_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) 4230#define G_03610C_PERF_SEL(x) (((x) >> 0) & 0x3F) 4231#define C_03610C_PERF_SEL 0xFFFFFFC0 4232#define S_03610C_DB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 10) 4233#define G_03610C_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1) 4234#define C_03610C_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF 4235#define S_03610C_CB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 11) 4236#define G_03610C_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1) 4237#define C_03610C_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF 4238#define S_03610C_TA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 12) 4239#define G_03610C_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1) 4240#define C_03610C_TA_BUSY_USER_DEFINED_MASK 0xFFFFEFFF 4241#define S_03610C_SX_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 13) 4242#define G_03610C_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1) 4243#define C_03610C_SX_BUSY_USER_DEFINED_MASK 0xFFFFDFFF 4244#define S_03610C_SPI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 15) 4245#define G_03610C_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 15) & 0x1) 4246#define C_03610C_SPI_BUSY_USER_DEFINED_MASK 0xFFFF7FFF 4247#define S_03610C_SC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 16) 4248#define G_03610C_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1) 4249#define C_03610C_SC_BUSY_USER_DEFINED_MASK 0xFFFEFFFF 4250#define S_03610C_DB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 17) 4251#define G_03610C_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1) 4252#define C_03610C_DB_BUSY_USER_DEFINED_MASK 0xFFFDFFFF 4253#define S_03610C_CB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 18) 4254#define G_03610C_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1) 4255#define C_03610C_CB_BUSY_USER_DEFINED_MASK 0xFFFBFFFF 4256#define S_03610C_VGT_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 19) 4257#define G_03610C_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1) 4258#define C_03610C_VGT_BUSY_USER_DEFINED_MASK 0xFFF7FFFF 4259#define S_03610C_PA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 20) 4260#define G_03610C_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1) 4261#define C_03610C_PA_BUSY_USER_DEFINED_MASK 0xFFEFFFFF 4262#define S_03610C_BCI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 21) 4263#define G_03610C_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1) 4264#define C_03610C_BCI_BUSY_USER_DEFINED_MASK 0xFFDFFFFF 4265#define R_036110_GRBM_SE2_PERFCOUNTER_SELECT 0x036110 4266#define S_036110_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) 4267#define G_036110_PERF_SEL(x) (((x) >> 0) & 0x3F) 4268#define C_036110_PERF_SEL 0xFFFFFFC0 4269#define S_036110_DB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 10) 4270#define G_036110_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1) 4271#define C_036110_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF 4272#define S_036110_CB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 11) 4273#define G_036110_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1) 4274#define C_036110_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF 4275#define S_036110_TA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 12) 4276#define G_036110_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1) 4277#define C_036110_TA_BUSY_USER_DEFINED_MASK 0xFFFFEFFF 4278#define S_036110_SX_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 13) 4279#define G_036110_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1) 4280#define C_036110_SX_BUSY_USER_DEFINED_MASK 0xFFFFDFFF 4281#define S_036110_SPI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 15) 4282#define G_036110_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 15) & 0x1) 4283#define C_036110_SPI_BUSY_USER_DEFINED_MASK 0xFFFF7FFF 4284#define S_036110_SC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 16) 4285#define G_036110_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1) 4286#define C_036110_SC_BUSY_USER_DEFINED_MASK 0xFFFEFFFF 4287#define S_036110_DB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 17) 4288#define G_036110_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1) 4289#define C_036110_DB_BUSY_USER_DEFINED_MASK 0xFFFDFFFF 4290#define S_036110_CB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 18) 4291#define G_036110_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1) 4292#define C_036110_CB_BUSY_USER_DEFINED_MASK 0xFFFBFFFF 4293#define S_036110_VGT_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 19) 4294#define G_036110_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1) 4295#define C_036110_VGT_BUSY_USER_DEFINED_MASK 0xFFF7FFFF 4296#define S_036110_PA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 20) 4297#define G_036110_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1) 4298#define C_036110_PA_BUSY_USER_DEFINED_MASK 0xFFEFFFFF 4299#define S_036110_BCI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 21) 4300#define G_036110_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1) 4301#define C_036110_BCI_BUSY_USER_DEFINED_MASK 0xFFDFFFFF 4302#define R_036114_GRBM_SE3_PERFCOUNTER_SELECT 0x036114 4303#define S_036114_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) 4304#define G_036114_PERF_SEL(x) (((x) >> 0) & 0x3F) 4305#define C_036114_PERF_SEL 0xFFFFFFC0 4306#define S_036114_DB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 10) 4307#define G_036114_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1) 4308#define C_036114_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF 4309#define S_036114_CB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 11) 4310#define G_036114_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1) 4311#define C_036114_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF 4312#define S_036114_TA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 12) 4313#define G_036114_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1) 4314#define C_036114_TA_BUSY_USER_DEFINED_MASK 0xFFFFEFFF 4315#define S_036114_SX_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 13) 4316#define G_036114_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1) 4317#define C_036114_SX_BUSY_USER_DEFINED_MASK 0xFFFFDFFF 4318#define S_036114_SPI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 15) 4319#define G_036114_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 15) & 0x1) 4320#define C_036114_SPI_BUSY_USER_DEFINED_MASK 0xFFFF7FFF 4321#define S_036114_SC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 16) 4322#define G_036114_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1) 4323#define C_036114_SC_BUSY_USER_DEFINED_MASK 0xFFFEFFFF 4324#define S_036114_DB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 17) 4325#define G_036114_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1) 4326#define C_036114_DB_BUSY_USER_DEFINED_MASK 0xFFFDFFFF 4327#define S_036114_CB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 18) 4328#define G_036114_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1) 4329#define C_036114_CB_BUSY_USER_DEFINED_MASK 0xFFFBFFFF 4330#define S_036114_VGT_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 19) 4331#define G_036114_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1) 4332#define C_036114_VGT_BUSY_USER_DEFINED_MASK 0xFFF7FFFF 4333#define S_036114_PA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 20) 4334#define G_036114_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1) 4335#define C_036114_PA_BUSY_USER_DEFINED_MASK 0xFFEFFFFF 4336#define S_036114_BCI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 21) 4337#define G_036114_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1) 4338#define C_036114_BCI_BUSY_USER_DEFINED_MASK 0xFFDFFFFF 4339#define R_036200_WD_PERFCOUNTER0_SELECT 0x036200 4340#define S_036200_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) 4341#define G_036200_PERF_SEL(x) (((x) >> 0) & 0xFF) 4342#define C_036200_PERF_SEL 0xFFFFFF00 4343#define S_036200_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) 4344#define G_036200_PERF_MODE(x) (((x) >> 28) & 0x0F) 4345#define C_036200_PERF_MODE 0x0FFFFFFF 4346#define R_036204_WD_PERFCOUNTER1_SELECT 0x036204 4347#define R_036208_WD_PERFCOUNTER2_SELECT 0x036208 4348#define R_03620C_WD_PERFCOUNTER3_SELECT 0x03620C 4349#define R_036210_IA_PERFCOUNTER0_SELECT 0x036210 4350#define S_036210_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 4351#define G_036210_PERF_SEL(x) (((x) >> 0) & 0x3FF) 4352#define C_036210_PERF_SEL 0xFFFFFC00 4353#define S_036210_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 4354#define G_036210_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 4355#define C_036210_PERF_SEL1 0xFFF003FF 4356#define S_036210_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4357#define G_036210_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4358#define C_036210_CNTR_MODE 0xFF0FFFFF 4359#define S_036210_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) 4360#define G_036210_PERF_MODE1(x) (((x) >> 24) & 0x0F) 4361#define C_036210_PERF_MODE1 0xF0FFFFFF 4362#define S_036210_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) 4363#define G_036210_PERF_MODE(x) (((x) >> 28) & 0x0F) 4364#define C_036210_PERF_MODE 0x0FFFFFFF 4365#define R_036214_IA_PERFCOUNTER1_SELECT 0x036214 4366#define R_036218_IA_PERFCOUNTER2_SELECT 0x036218 4367#define R_03621C_IA_PERFCOUNTER3_SELECT 0x03621C 4368#define R_036220_IA_PERFCOUNTER0_SELECT1 0x036220 4369#define S_036220_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 4370#define G_036220_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 4371#define C_036220_PERF_SEL2 0xFFFFFC00 4372#define S_036220_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 4373#define G_036220_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 4374#define C_036220_PERF_SEL3 0xFFF003FF 4375#define S_036220_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) 4376#define G_036220_PERF_MODE3(x) (((x) >> 24) & 0x0F) 4377#define C_036220_PERF_MODE3 0xF0FFFFFF 4378#define S_036220_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) 4379#define G_036220_PERF_MODE2(x) (((x) >> 28) & 0x0F) 4380#define C_036220_PERF_MODE2 0x0FFFFFFF 4381#define R_036230_VGT_PERFCOUNTER0_SELECT 0x036230 4382#define S_036230_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 4383#define G_036230_PERF_SEL(x) (((x) >> 0) & 0x3FF) 4384#define C_036230_PERF_SEL 0xFFFFFC00 4385#define S_036230_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 4386#define G_036230_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 4387#define C_036230_PERF_SEL1 0xFFF003FF 4388#define S_036230_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4389#define G_036230_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4390#define C_036230_CNTR_MODE 0xFF0FFFFF 4391#define S_036230_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) 4392#define G_036230_PERF_MODE1(x) (((x) >> 24) & 0x0F) 4393#define C_036230_PERF_MODE1 0xF0FFFFFF 4394#define S_036230_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) 4395#define G_036230_PERF_MODE(x) (((x) >> 28) & 0x0F) 4396#define C_036230_PERF_MODE 0x0FFFFFFF 4397#define R_036234_VGT_PERFCOUNTER1_SELECT 0x036234 4398#define R_036238_VGT_PERFCOUNTER2_SELECT 0x036238 4399#define R_03623C_VGT_PERFCOUNTER3_SELECT 0x03623C 4400#define R_036240_VGT_PERFCOUNTER0_SELECT1 0x036240 4401#define S_036240_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 4402#define G_036240_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 4403#define C_036240_PERF_SEL2 0xFFFFFC00 4404#define S_036240_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 4405#define G_036240_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 4406#define C_036240_PERF_SEL3 0xFFF003FF 4407#define S_036240_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) 4408#define G_036240_PERF_MODE3(x) (((x) >> 24) & 0x0F) 4409#define C_036240_PERF_MODE3 0xF0FFFFFF 4410#define S_036240_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) 4411#define G_036240_PERF_MODE2(x) (((x) >> 28) & 0x0F) 4412#define C_036240_PERF_MODE2 0x0FFFFFFF 4413#define R_036244_VGT_PERFCOUNTER1_SELECT1 0x036244 4414#define R_036250_VGT_PERFCOUNTER_SEID_MASK 0x036250 4415#define S_036250_PERF_SEID_IGNORE_MASK(x) (((unsigned)(x) & 0xFF) << 0) 4416#define G_036250_PERF_SEID_IGNORE_MASK(x) (((x) >> 0) & 0xFF) 4417#define C_036250_PERF_SEID_IGNORE_MASK 0xFFFFFF00 4418#define R_036400_PA_SU_PERFCOUNTER0_SELECT 0x036400 4419#define S_036400_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 4420#define G_036400_PERF_SEL(x) (((x) >> 0) & 0x3FF) 4421#define C_036400_PERF_SEL 0xFFFFFC00 4422#define S_036400_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 4423#define G_036400_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 4424#define C_036400_PERF_SEL1 0xFFF003FF 4425#define S_036400_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4426#define G_036400_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4427#define C_036400_CNTR_MODE 0xFF0FFFFF 4428#define R_036404_PA_SU_PERFCOUNTER0_SELECT1 0x036404 4429#define S_036404_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 4430#define G_036404_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 4431#define C_036404_PERF_SEL2 0xFFFFFC00 4432#define S_036404_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 4433#define G_036404_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 4434#define C_036404_PERF_SEL3 0xFFF003FF 4435#define R_036408_PA_SU_PERFCOUNTER1_SELECT 0x036408 4436#define R_03640C_PA_SU_PERFCOUNTER1_SELECT1 0x03640C 4437#define R_036410_PA_SU_PERFCOUNTER2_SELECT 0x036410 4438#define R_036414_PA_SU_PERFCOUNTER3_SELECT 0x036414 4439#define R_036500_PA_SC_PERFCOUNTER0_SELECT 0x036500 4440#define S_036500_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 4441#define G_036500_PERF_SEL(x) (((x) >> 0) & 0x3FF) 4442#define C_036500_PERF_SEL 0xFFFFFC00 4443#define S_036500_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 4444#define G_036500_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 4445#define C_036500_PERF_SEL1 0xFFF003FF 4446#define S_036500_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4447#define G_036500_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4448#define C_036500_CNTR_MODE 0xFF0FFFFF 4449#define R_036504_PA_SC_PERFCOUNTER0_SELECT1 0x036504 4450#define S_036504_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 4451#define G_036504_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 4452#define C_036504_PERF_SEL2 0xFFFFFC00 4453#define S_036504_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 4454#define G_036504_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 4455#define C_036504_PERF_SEL3 0xFFF003FF 4456#define R_036508_PA_SC_PERFCOUNTER1_SELECT 0x036508 4457#define R_03650C_PA_SC_PERFCOUNTER2_SELECT 0x03650C 4458#define R_036510_PA_SC_PERFCOUNTER3_SELECT 0x036510 4459#define R_036514_PA_SC_PERFCOUNTER4_SELECT 0x036514 4460#define R_036518_PA_SC_PERFCOUNTER5_SELECT 0x036518 4461#define R_03651C_PA_SC_PERFCOUNTER6_SELECT 0x03651C 4462#define R_036520_PA_SC_PERFCOUNTER7_SELECT 0x036520 4463#define R_036600_SPI_PERFCOUNTER0_SELECT 0x036600 4464#define S_036600_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 4465#define G_036600_PERF_SEL(x) (((x) >> 0) & 0x3FF) 4466#define C_036600_PERF_SEL 0xFFFFFC00 4467#define S_036600_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 4468#define G_036600_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 4469#define C_036600_PERF_SEL1 0xFFF003FF 4470#define S_036600_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4471#define G_036600_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4472#define C_036600_CNTR_MODE 0xFF0FFFFF 4473#define R_036604_SPI_PERFCOUNTER1_SELECT 0x036604 4474#define R_036608_SPI_PERFCOUNTER2_SELECT 0x036608 4475#define R_03660C_SPI_PERFCOUNTER3_SELECT 0x03660C 4476#define R_036610_SPI_PERFCOUNTER0_SELECT1 0x036610 4477#define S_036610_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 4478#define G_036610_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 4479#define C_036610_PERF_SEL2 0xFFFFFC00 4480#define S_036610_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 4481#define G_036610_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 4482#define C_036610_PERF_SEL3 0xFFF003FF 4483#define R_036614_SPI_PERFCOUNTER1_SELECT1 0x036614 4484#define R_036618_SPI_PERFCOUNTER2_SELECT1 0x036618 4485#define R_03661C_SPI_PERFCOUNTER3_SELECT1 0x03661C 4486#define R_036620_SPI_PERFCOUNTER4_SELECT 0x036620 4487#define R_036624_SPI_PERFCOUNTER5_SELECT 0x036624 4488#define R_036628_SPI_PERFCOUNTER_BINS 0x036628 4489#define S_036628_BIN0_MIN(x) (((unsigned)(x) & 0x0F) << 0) 4490#define G_036628_BIN0_MIN(x) (((x) >> 0) & 0x0F) 4491#define C_036628_BIN0_MIN 0xFFFFFFF0 4492#define S_036628_BIN0_MAX(x) (((unsigned)(x) & 0x0F) << 4) 4493#define G_036628_BIN0_MAX(x) (((x) >> 4) & 0x0F) 4494#define C_036628_BIN0_MAX 0xFFFFFF0F 4495#define S_036628_BIN1_MIN(x) (((unsigned)(x) & 0x0F) << 8) 4496#define G_036628_BIN1_MIN(x) (((x) >> 8) & 0x0F) 4497#define C_036628_BIN1_MIN 0xFFFFF0FF 4498#define S_036628_BIN1_MAX(x) (((unsigned)(x) & 0x0F) << 12) 4499#define G_036628_BIN1_MAX(x) (((x) >> 12) & 0x0F) 4500#define C_036628_BIN1_MAX 0xFFFF0FFF 4501#define S_036628_BIN2_MIN(x) (((unsigned)(x) & 0x0F) << 16) 4502#define G_036628_BIN2_MIN(x) (((x) >> 16) & 0x0F) 4503#define C_036628_BIN2_MIN 0xFFF0FFFF 4504#define S_036628_BIN2_MAX(x) (((unsigned)(x) & 0x0F) << 20) 4505#define G_036628_BIN2_MAX(x) (((x) >> 20) & 0x0F) 4506#define C_036628_BIN2_MAX 0xFF0FFFFF 4507#define S_036628_BIN3_MIN(x) (((unsigned)(x) & 0x0F) << 24) 4508#define G_036628_BIN3_MIN(x) (((x) >> 24) & 0x0F) 4509#define C_036628_BIN3_MIN 0xF0FFFFFF 4510#define S_036628_BIN3_MAX(x) (((unsigned)(x) & 0x0F) << 28) 4511#define G_036628_BIN3_MAX(x) (((x) >> 28) & 0x0F) 4512#define C_036628_BIN3_MAX 0x0FFFFFFF 4513#define R_036700_SQ_PERFCOUNTER0_SELECT 0x036700 4514#define S_036700_PERF_SEL(x) (((unsigned)(x) & 0x1FF) << 0) 4515#define G_036700_PERF_SEL(x) (((x) >> 0) & 0x1FF) 4516#define C_036700_PERF_SEL 0xFFFFFE00 4517#define S_036700_SQC_BANK_MASK(x) (((unsigned)(x) & 0x0F) << 12) 4518#define G_036700_SQC_BANK_MASK(x) (((x) >> 12) & 0x0F) 4519#define C_036700_SQC_BANK_MASK 0xFFFF0FFF 4520#define S_036700_SQC_CLIENT_MASK(x) (((unsigned)(x) & 0x0F) << 16) 4521#define G_036700_SQC_CLIENT_MASK(x) (((x) >> 16) & 0x0F) 4522#define C_036700_SQC_CLIENT_MASK 0xFFF0FFFF 4523#define S_036700_SPM_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4524#define G_036700_SPM_MODE(x) (((x) >> 20) & 0x0F) 4525#define C_036700_SPM_MODE 0xFF0FFFFF 4526#define S_036700_SIMD_MASK(x) (((unsigned)(x) & 0x0F) << 24) 4527#define G_036700_SIMD_MASK(x) (((x) >> 24) & 0x0F) 4528#define C_036700_SIMD_MASK 0xF0FFFFFF 4529#define S_036700_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) 4530#define G_036700_PERF_MODE(x) (((x) >> 28) & 0x0F) 4531#define C_036700_PERF_MODE 0x0FFFFFFF 4532#define R_036704_SQ_PERFCOUNTER1_SELECT 0x036704 4533#define R_036708_SQ_PERFCOUNTER2_SELECT 0x036708 4534#define R_03670C_SQ_PERFCOUNTER3_SELECT 0x03670C 4535#define R_036710_SQ_PERFCOUNTER4_SELECT 0x036710 4536#define R_036714_SQ_PERFCOUNTER5_SELECT 0x036714 4537#define R_036718_SQ_PERFCOUNTER6_SELECT 0x036718 4538#define R_03671C_SQ_PERFCOUNTER7_SELECT 0x03671C 4539#define R_036720_SQ_PERFCOUNTER8_SELECT 0x036720 4540#define R_036724_SQ_PERFCOUNTER9_SELECT 0x036724 4541#define R_036728_SQ_PERFCOUNTER10_SELECT 0x036728 4542#define R_03672C_SQ_PERFCOUNTER11_SELECT 0x03672C 4543#define R_036730_SQ_PERFCOUNTER12_SELECT 0x036730 4544#define R_036734_SQ_PERFCOUNTER13_SELECT 0x036734 4545#define R_036738_SQ_PERFCOUNTER14_SELECT 0x036738 4546#define R_03673C_SQ_PERFCOUNTER15_SELECT 0x03673C 4547#define R_036780_SQ_PERFCOUNTER_CTRL 0x036780 4548#define S_036780_PS_EN(x) (((unsigned)(x) & 0x1) << 0) 4549#define G_036780_PS_EN(x) (((x) >> 0) & 0x1) 4550#define C_036780_PS_EN 0xFFFFFFFE 4551#define S_036780_VS_EN(x) (((unsigned)(x) & 0x1) << 1) 4552#define G_036780_VS_EN(x) (((x) >> 1) & 0x1) 4553#define C_036780_VS_EN 0xFFFFFFFD 4554#define S_036780_GS_EN(x) (((unsigned)(x) & 0x1) << 2) 4555#define G_036780_GS_EN(x) (((x) >> 2) & 0x1) 4556#define C_036780_GS_EN 0xFFFFFFFB 4557#define S_036780_ES_EN(x) (((unsigned)(x) & 0x1) << 3) 4558#define G_036780_ES_EN(x) (((x) >> 3) & 0x1) 4559#define C_036780_ES_EN 0xFFFFFFF7 4560#define S_036780_HS_EN(x) (((unsigned)(x) & 0x1) << 4) 4561#define G_036780_HS_EN(x) (((x) >> 4) & 0x1) 4562#define C_036780_HS_EN 0xFFFFFFEF 4563#define S_036780_LS_EN(x) (((unsigned)(x) & 0x1) << 5) 4564#define G_036780_LS_EN(x) (((x) >> 5) & 0x1) 4565#define C_036780_LS_EN 0xFFFFFFDF 4566#define S_036780_CS_EN(x) (((unsigned)(x) & 0x1) << 6) 4567#define G_036780_CS_EN(x) (((x) >> 6) & 0x1) 4568#define C_036780_CS_EN 0xFFFFFFBF 4569#define S_036780_CNTR_RATE(x) (((unsigned)(x) & 0x1F) << 8) 4570#define G_036780_CNTR_RATE(x) (((x) >> 8) & 0x1F) 4571#define C_036780_CNTR_RATE 0xFFFFE0FF 4572#define S_036780_DISABLE_FLUSH(x) (((unsigned)(x) & 0x1) << 13) 4573#define G_036780_DISABLE_FLUSH(x) (((x) >> 13) & 0x1) 4574#define C_036780_DISABLE_FLUSH 0xFFFFDFFF 4575#define R_036784_SQ_PERFCOUNTER_MASK 0x036784 4576#define S_036784_SH0_MASK(x) (((unsigned)(x) & 0xFFFF) << 0) 4577#define G_036784_SH0_MASK(x) (((x) >> 0) & 0xFFFF) 4578#define C_036784_SH0_MASK 0xFFFF0000 4579#define S_036784_SH1_MASK(x) (((unsigned)(x) & 0xFFFF) << 16) 4580#define G_036784_SH1_MASK(x) (((x) >> 16) & 0xFFFF) 4581#define C_036784_SH1_MASK 0x0000FFFF 4582#define R_036788_SQ_PERFCOUNTER_CTRL2 0x036788 4583#define S_036788_FORCE_EN(x) (((unsigned)(x) & 0x1) << 0) 4584#define G_036788_FORCE_EN(x) (((x) >> 0) & 0x1) 4585#define C_036788_FORCE_EN 0xFFFFFFFE 4586#define R_036900_SX_PERFCOUNTER0_SELECT 0x036900 4587#define S_036900_PERFCOUNTER_SELECT(x) (((unsigned)(x) & 0x3FF) << 0) 4588#define G_036900_PERFCOUNTER_SELECT(x) (((x) >> 0) & 0x3FF) 4589#define C_036900_PERFCOUNTER_SELECT 0xFFFFFC00 4590#define S_036900_PERFCOUNTER_SELECT1(x) (((unsigned)(x) & 0x3FF) << 10) 4591#define G_036900_PERFCOUNTER_SELECT1(x) (((x) >> 10) & 0x3FF) 4592#define C_036900_PERFCOUNTER_SELECT1 0xFFF003FF 4593#define S_036900_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4594#define G_036900_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4595#define C_036900_CNTR_MODE 0xFF0FFFFF 4596#define R_036904_SX_PERFCOUNTER1_SELECT 0x036904 4597#define R_036908_SX_PERFCOUNTER2_SELECT 0x036908 4598#define R_03690C_SX_PERFCOUNTER3_SELECT 0x03690C 4599#define R_036910_SX_PERFCOUNTER0_SELECT1 0x036910 4600#define S_036910_PERFCOUNTER_SELECT2(x) (((unsigned)(x) & 0x3FF) << 0) 4601#define G_036910_PERFCOUNTER_SELECT2(x) (((x) >> 0) & 0x3FF) 4602#define C_036910_PERFCOUNTER_SELECT2 0xFFFFFC00 4603#define S_036910_PERFCOUNTER_SELECT3(x) (((unsigned)(x) & 0x3FF) << 10) 4604#define G_036910_PERFCOUNTER_SELECT3(x) (((x) >> 10) & 0x3FF) 4605#define C_036910_PERFCOUNTER_SELECT3 0xFFF003FF 4606#define R_036914_SX_PERFCOUNTER1_SELECT1 0x036914 4607#define R_036A00_GDS_PERFCOUNTER0_SELECT 0x036A00 4608#define S_036A00_PERFCOUNTER_SELECT(x) (((unsigned)(x) & 0x3FF) << 0) 4609#define G_036A00_PERFCOUNTER_SELECT(x) (((x) >> 0) & 0x3FF) 4610#define C_036A00_PERFCOUNTER_SELECT 0xFFFFFC00 4611#define S_036A00_PERFCOUNTER_SELECT1(x) (((unsigned)(x) & 0x3FF) << 10) 4612#define G_036A00_PERFCOUNTER_SELECT1(x) (((x) >> 10) & 0x3FF) 4613#define C_036A00_PERFCOUNTER_SELECT1 0xFFF003FF 4614#define S_036A00_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4615#define G_036A00_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4616#define C_036A00_CNTR_MODE 0xFF0FFFFF 4617#define R_036A04_GDS_PERFCOUNTER1_SELECT 0x036A04 4618#define R_036A08_GDS_PERFCOUNTER2_SELECT 0x036A08 4619#define R_036A0C_GDS_PERFCOUNTER3_SELECT 0x036A0C 4620#define R_036A10_GDS_PERFCOUNTER0_SELECT1 0x036A10 4621#define S_036A10_PERFCOUNTER_SELECT2(x) (((unsigned)(x) & 0x3FF) << 0) 4622#define G_036A10_PERFCOUNTER_SELECT2(x) (((x) >> 0) & 0x3FF) 4623#define C_036A10_PERFCOUNTER_SELECT2 0xFFFFFC00 4624#define S_036A10_PERFCOUNTER_SELECT3(x) (((unsigned)(x) & 0x3FF) << 10) 4625#define G_036A10_PERFCOUNTER_SELECT3(x) (((x) >> 10) & 0x3FF) 4626#define C_036A10_PERFCOUNTER_SELECT3 0xFFF003FF 4627#define R_036B00_TA_PERFCOUNTER0_SELECT 0x036B00 4628#define S_036B00_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) 4629#define G_036B00_PERF_SEL(x) (((x) >> 0) & 0xFF) 4630#define C_036B00_PERF_SEL 0xFFFFFF00 4631#define S_036B00_PERF_SEL1(x) (((unsigned)(x) & 0xFF) << 10) 4632#define G_036B00_PERF_SEL1(x) (((x) >> 10) & 0xFF) 4633#define C_036B00_PERF_SEL1 0xFFFC03FF 4634#define S_036B00_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4635#define G_036B00_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4636#define C_036B00_CNTR_MODE 0xFF0FFFFF 4637#define S_036B00_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) 4638#define G_036B00_PERF_MODE1(x) (((x) >> 24) & 0x0F) 4639#define C_036B00_PERF_MODE1 0xF0FFFFFF 4640#define S_036B00_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) 4641#define G_036B00_PERF_MODE(x) (((x) >> 28) & 0x0F) 4642#define C_036B00_PERF_MODE 0x0FFFFFFF 4643#define R_036B04_TA_PERFCOUNTER0_SELECT1 0x036B04 4644#define S_036B04_PERF_SEL2(x) (((unsigned)(x) & 0xFF) << 0) 4645#define G_036B04_PERF_SEL2(x) (((x) >> 0) & 0xFF) 4646#define C_036B04_PERF_SEL2 0xFFFFFF00 4647#define S_036B04_PERF_SEL3(x) (((unsigned)(x) & 0xFF) << 10) 4648#define G_036B04_PERF_SEL3(x) (((x) >> 10) & 0xFF) 4649#define C_036B04_PERF_SEL3 0xFFFC03FF 4650#define S_036B04_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) 4651#define G_036B04_PERF_MODE3(x) (((x) >> 24) & 0x0F) 4652#define C_036B04_PERF_MODE3 0xF0FFFFFF 4653#define S_036B04_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) 4654#define G_036B04_PERF_MODE2(x) (((x) >> 28) & 0x0F) 4655#define C_036B04_PERF_MODE2 0x0FFFFFFF 4656#define R_036B08_TA_PERFCOUNTER1_SELECT 0x036B08 4657#define R_036C00_TD_PERFCOUNTER0_SELECT 0x036C00 4658#define S_036C00_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) 4659#define G_036C00_PERF_SEL(x) (((x) >> 0) & 0xFF) 4660#define C_036C00_PERF_SEL 0xFFFFFF00 4661#define S_036C00_PERF_SEL1(x) (((unsigned)(x) & 0xFF) << 10) 4662#define G_036C00_PERF_SEL1(x) (((x) >> 10) & 0xFF) 4663#define C_036C00_PERF_SEL1 0xFFFC03FF 4664#define S_036C00_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4665#define G_036C00_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4666#define C_036C00_CNTR_MODE 0xFF0FFFFF 4667#define S_036C00_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) 4668#define G_036C00_PERF_MODE1(x) (((x) >> 24) & 0x0F) 4669#define C_036C00_PERF_MODE1 0xF0FFFFFF 4670#define S_036C00_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) 4671#define G_036C00_PERF_MODE(x) (((x) >> 28) & 0x0F) 4672#define C_036C00_PERF_MODE 0x0FFFFFFF 4673#define R_036C04_TD_PERFCOUNTER0_SELECT1 0x036C04 4674#define S_036C04_PERF_SEL2(x) (((unsigned)(x) & 0xFF) << 0) 4675#define G_036C04_PERF_SEL2(x) (((x) >> 0) & 0xFF) 4676#define C_036C04_PERF_SEL2 0xFFFFFF00 4677#define S_036C04_PERF_SEL3(x) (((unsigned)(x) & 0xFF) << 10) 4678#define G_036C04_PERF_SEL3(x) (((x) >> 10) & 0xFF) 4679#define C_036C04_PERF_SEL3 0xFFFC03FF 4680#define S_036C04_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) 4681#define G_036C04_PERF_MODE3(x) (((x) >> 24) & 0x0F) 4682#define C_036C04_PERF_MODE3 0xF0FFFFFF 4683#define S_036C04_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) 4684#define G_036C04_PERF_MODE2(x) (((x) >> 28) & 0x0F) 4685#define C_036C04_PERF_MODE2 0x0FFFFFFF 4686#define R_036C08_TD_PERFCOUNTER1_SELECT 0x036C08 4687#define R_036D00_TCP_PERFCOUNTER0_SELECT 0x036D00 4688#define S_036D00_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 4689#define G_036D00_PERF_SEL(x) (((x) >> 0) & 0x3FF) 4690#define C_036D00_PERF_SEL 0xFFFFFC00 4691#define S_036D00_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 4692#define G_036D00_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 4693#define C_036D00_PERF_SEL1 0xFFF003FF 4694#define S_036D00_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4695#define G_036D00_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4696#define C_036D00_CNTR_MODE 0xFF0FFFFF 4697#define S_036D00_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) 4698#define G_036D00_PERF_MODE1(x) (((x) >> 24) & 0x0F) 4699#define C_036D00_PERF_MODE1 0xF0FFFFFF 4700#define S_036D00_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) 4701#define G_036D00_PERF_MODE(x) (((x) >> 28) & 0x0F) 4702#define C_036D00_PERF_MODE 0x0FFFFFFF 4703#define R_036D04_TCP_PERFCOUNTER0_SELECT1 0x036D04 4704#define S_036D04_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 4705#define G_036D04_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 4706#define C_036D04_PERF_SEL2 0xFFFFFC00 4707#define S_036D04_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 4708#define G_036D04_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 4709#define C_036D04_PERF_SEL3 0xFFF003FF 4710#define S_036D04_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) 4711#define G_036D04_PERF_MODE3(x) (((x) >> 24) & 0x0F) 4712#define C_036D04_PERF_MODE3 0xF0FFFFFF 4713#define S_036D04_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) 4714#define G_036D04_PERF_MODE2(x) (((x) >> 28) & 0x0F) 4715#define C_036D04_PERF_MODE2 0x0FFFFFFF 4716#define R_036D08_TCP_PERFCOUNTER1_SELECT 0x036D08 4717#define R_036D0C_TCP_PERFCOUNTER1_SELECT1 0x036D0C 4718#define R_036D10_TCP_PERFCOUNTER2_SELECT 0x036D10 4719#define R_036D14_TCP_PERFCOUNTER3_SELECT 0x036D14 4720#define R_036E00_TCC_PERFCOUNTER0_SELECT 0x036E00 4721#define S_036E00_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 4722#define G_036E00_PERF_SEL(x) (((x) >> 0) & 0x3FF) 4723#define C_036E00_PERF_SEL 0xFFFFFC00 4724#define S_036E00_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 4725#define G_036E00_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 4726#define C_036E00_PERF_SEL1 0xFFF003FF 4727#define S_036E00_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4728#define G_036E00_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4729#define C_036E00_CNTR_MODE 0xFF0FFFFF 4730#define S_036E00_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) 4731#define G_036E00_PERF_MODE1(x) (((x) >> 24) & 0x0F) 4732#define C_036E00_PERF_MODE1 0xF0FFFFFF 4733#define S_036E00_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) 4734#define G_036E00_PERF_MODE(x) (((x) >> 28) & 0x0F) 4735#define C_036E00_PERF_MODE 0x0FFFFFFF 4736#define R_036E04_TCC_PERFCOUNTER0_SELECT1 0x036E04 4737#define S_036E04_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 4738#define G_036E04_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 4739#define C_036E04_PERF_SEL2 0xFFFFFC00 4740#define S_036E04_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 4741#define G_036E04_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 4742#define C_036E04_PERF_SEL3 0xFFF003FF 4743#define S_036E04_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 24) 4744#define G_036E04_PERF_MODE2(x) (((x) >> 24) & 0x0F) 4745#define C_036E04_PERF_MODE2 0xF0FFFFFF 4746#define S_036E04_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 28) 4747#define G_036E04_PERF_MODE3(x) (((x) >> 28) & 0x0F) 4748#define C_036E04_PERF_MODE3 0x0FFFFFFF 4749#define R_036E08_TCC_PERFCOUNTER1_SELECT 0x036E08 4750#define R_036E0C_TCC_PERFCOUNTER1_SELECT1 0x036E0C 4751#define R_036E10_TCC_PERFCOUNTER2_SELECT 0x036E10 4752#define R_036E14_TCC_PERFCOUNTER3_SELECT 0x036E14 4753#define R_036E40_TCA_PERFCOUNTER0_SELECT 0x036E40 4754#define S_036E40_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 4755#define G_036E40_PERF_SEL(x) (((x) >> 0) & 0x3FF) 4756#define C_036E40_PERF_SEL 0xFFFFFC00 4757#define S_036E40_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 4758#define G_036E40_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 4759#define C_036E40_PERF_SEL1 0xFFF003FF 4760#define S_036E40_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4761#define G_036E40_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4762#define C_036E40_CNTR_MODE 0xFF0FFFFF 4763#define S_036E40_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) 4764#define G_036E40_PERF_MODE1(x) (((x) >> 24) & 0x0F) 4765#define C_036E40_PERF_MODE1 0xF0FFFFFF 4766#define S_036E40_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) 4767#define G_036E40_PERF_MODE(x) (((x) >> 28) & 0x0F) 4768#define C_036E40_PERF_MODE 0x0FFFFFFF 4769#define R_036E44_TCA_PERFCOUNTER0_SELECT1 0x036E44 4770#define S_036E44_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 4771#define G_036E44_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 4772#define C_036E44_PERF_SEL2 0xFFFFFC00 4773#define S_036E44_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 4774#define G_036E44_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 4775#define C_036E44_PERF_SEL3 0xFFF003FF 4776#define S_036E44_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 24) 4777#define G_036E44_PERF_MODE2(x) (((x) >> 24) & 0x0F) 4778#define C_036E44_PERF_MODE2 0xF0FFFFFF 4779#define S_036E44_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 28) 4780#define G_036E44_PERF_MODE3(x) (((x) >> 28) & 0x0F) 4781#define C_036E44_PERF_MODE3 0x0FFFFFFF 4782#define R_036E48_TCA_PERFCOUNTER1_SELECT 0x036E48 4783#define R_036E4C_TCA_PERFCOUNTER1_SELECT1 0x036E4C 4784#define R_036E50_TCA_PERFCOUNTER2_SELECT 0x036E50 4785#define R_036E54_TCA_PERFCOUNTER3_SELECT 0x036E54 4786#define R_037000_CB_PERFCOUNTER_FILTER 0x037000 4787#define S_037000_OP_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 4788#define G_037000_OP_FILTER_ENABLE(x) (((x) >> 0) & 0x1) 4789#define C_037000_OP_FILTER_ENABLE 0xFFFFFFFE 4790#define S_037000_OP_FILTER_SEL(x) (((unsigned)(x) & 0x07) << 1) 4791#define G_037000_OP_FILTER_SEL(x) (((x) >> 1) & 0x07) 4792#define C_037000_OP_FILTER_SEL 0xFFFFFFF1 4793#define S_037000_FORMAT_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 4) 4794#define G_037000_FORMAT_FILTER_ENABLE(x) (((x) >> 4) & 0x1) 4795#define C_037000_FORMAT_FILTER_ENABLE 0xFFFFFFEF 4796#define S_037000_FORMAT_FILTER_SEL(x) (((unsigned)(x) & 0x1F) << 5) 4797#define G_037000_FORMAT_FILTER_SEL(x) (((x) >> 5) & 0x1F) 4798#define C_037000_FORMAT_FILTER_SEL 0xFFFFFC1F 4799#define S_037000_CLEAR_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 10) 4800#define G_037000_CLEAR_FILTER_ENABLE(x) (((x) >> 10) & 0x1) 4801#define C_037000_CLEAR_FILTER_ENABLE 0xFFFFFBFF 4802#define S_037000_CLEAR_FILTER_SEL(x) (((unsigned)(x) & 0x1) << 11) 4803#define G_037000_CLEAR_FILTER_SEL(x) (((x) >> 11) & 0x1) 4804#define C_037000_CLEAR_FILTER_SEL 0xFFFFF7FF 4805#define S_037000_MRT_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 12) 4806#define G_037000_MRT_FILTER_ENABLE(x) (((x) >> 12) & 0x1) 4807#define C_037000_MRT_FILTER_ENABLE 0xFFFFEFFF 4808#define S_037000_MRT_FILTER_SEL(x) (((unsigned)(x) & 0x07) << 13) 4809#define G_037000_MRT_FILTER_SEL(x) (((x) >> 13) & 0x07) 4810#define C_037000_MRT_FILTER_SEL 0xFFFF1FFF 4811#define S_037000_NUM_SAMPLES_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 17) 4812#define G_037000_NUM_SAMPLES_FILTER_ENABLE(x) (((x) >> 17) & 0x1) 4813#define C_037000_NUM_SAMPLES_FILTER_ENABLE 0xFFFDFFFF 4814#define S_037000_NUM_SAMPLES_FILTER_SEL(x) (((unsigned)(x) & 0x07) << 18) 4815#define G_037000_NUM_SAMPLES_FILTER_SEL(x) (((x) >> 18) & 0x07) 4816#define C_037000_NUM_SAMPLES_FILTER_SEL 0xFFE3FFFF 4817#define S_037000_NUM_FRAGMENTS_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 21) 4818#define G_037000_NUM_FRAGMENTS_FILTER_ENABLE(x) (((x) >> 21) & 0x1) 4819#define C_037000_NUM_FRAGMENTS_FILTER_ENABLE 0xFFDFFFFF 4820#define S_037000_NUM_FRAGMENTS_FILTER_SEL(x) (((unsigned)(x) & 0x03) << 22) 4821#define G_037000_NUM_FRAGMENTS_FILTER_SEL(x) (((x) >> 22) & 0x03) 4822#define C_037000_NUM_FRAGMENTS_FILTER_SEL 0xFF3FFFFF 4823#define R_037004_CB_PERFCOUNTER0_SELECT 0x037004 4824#define S_037004_PERF_SEL(x) (((unsigned)(x) & 0x1FF) << 0) 4825#define G_037004_PERF_SEL(x) (((x) >> 0) & 0x1FF) 4826#define C_037004_PERF_SEL 0xFFFFFE00 4827#define S_037004_PERF_SEL1(x) (((unsigned)(x) & 0x1FF) << 10) 4828#define G_037004_PERF_SEL1(x) (((x) >> 10) & 0x1FF) 4829#define C_037004_PERF_SEL1 0xFFF803FF 4830#define S_037004_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4831#define G_037004_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4832#define C_037004_CNTR_MODE 0xFF0FFFFF 4833#define S_037004_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) 4834#define G_037004_PERF_MODE1(x) (((x) >> 24) & 0x0F) 4835#define C_037004_PERF_MODE1 0xF0FFFFFF 4836#define S_037004_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) 4837#define G_037004_PERF_MODE(x) (((x) >> 28) & 0x0F) 4838#define C_037004_PERF_MODE 0x0FFFFFFF 4839#define R_037008_CB_PERFCOUNTER0_SELECT1 0x037008 4840#define S_037008_PERF_SEL2(x) (((unsigned)(x) & 0x1FF) << 0) 4841#define G_037008_PERF_SEL2(x) (((x) >> 0) & 0x1FF) 4842#define C_037008_PERF_SEL2 0xFFFFFE00 4843#define S_037008_PERF_SEL3(x) (((unsigned)(x) & 0x1FF) << 10) 4844#define G_037008_PERF_SEL3(x) (((x) >> 10) & 0x1FF) 4845#define C_037008_PERF_SEL3 0xFFF803FF 4846#define S_037008_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) 4847#define G_037008_PERF_MODE3(x) (((x) >> 24) & 0x0F) 4848#define C_037008_PERF_MODE3 0xF0FFFFFF 4849#define S_037008_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) 4850#define G_037008_PERF_MODE2(x) (((x) >> 28) & 0x0F) 4851#define C_037008_PERF_MODE2 0x0FFFFFFF 4852#define R_03700C_CB_PERFCOUNTER1_SELECT 0x03700C 4853#define R_037010_CB_PERFCOUNTER2_SELECT 0x037010 4854#define R_037014_CB_PERFCOUNTER3_SELECT 0x037014 4855#define R_037100_DB_PERFCOUNTER0_SELECT 0x037100 4856#define S_037100_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) 4857#define G_037100_PERF_SEL(x) (((x) >> 0) & 0x3FF) 4858#define C_037100_PERF_SEL 0xFFFFFC00 4859#define S_037100_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) 4860#define G_037100_PERF_SEL1(x) (((x) >> 10) & 0x3FF) 4861#define C_037100_PERF_SEL1 0xFFF003FF 4862#define S_037100_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) 4863#define G_037100_CNTR_MODE(x) (((x) >> 20) & 0x0F) 4864#define C_037100_CNTR_MODE 0xFF0FFFFF 4865#define S_037100_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) 4866#define G_037100_PERF_MODE1(x) (((x) >> 24) & 0x0F) 4867#define C_037100_PERF_MODE1 0xF0FFFFFF 4868#define S_037100_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) 4869#define G_037100_PERF_MODE(x) (((x) >> 28) & 0x0F) 4870#define C_037100_PERF_MODE 0x0FFFFFFF 4871#define R_037104_DB_PERFCOUNTER0_SELECT1 0x037104 4872#define S_037104_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) 4873#define G_037104_PERF_SEL2(x) (((x) >> 0) & 0x3FF) 4874#define C_037104_PERF_SEL2 0xFFFFFC00 4875#define S_037104_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) 4876#define G_037104_PERF_SEL3(x) (((x) >> 10) & 0x3FF) 4877#define C_037104_PERF_SEL3 0xFFF003FF 4878#define S_037104_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) 4879#define G_037104_PERF_MODE3(x) (((x) >> 24) & 0x0F) 4880#define C_037104_PERF_MODE3 0xF0FFFFFF 4881#define S_037104_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) 4882#define G_037104_PERF_MODE2(x) (((x) >> 28) & 0x0F) 4883#define C_037104_PERF_MODE2 0x0FFFFFFF 4884#define R_037108_DB_PERFCOUNTER1_SELECT 0x037108 4885#define R_03710C_DB_PERFCOUNTER1_SELECT1 0x03710C 4886#define R_037110_DB_PERFCOUNTER2_SELECT 0x037110 4887#define R_037118_DB_PERFCOUNTER3_SELECT 0x037118 4888#define R_028000_DB_RENDER_CONTROL 0x028000 4889#define S_028000_DEPTH_CLEAR_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 4890#define G_028000_DEPTH_CLEAR_ENABLE(x) (((x) >> 0) & 0x1) 4891#define C_028000_DEPTH_CLEAR_ENABLE 0xFFFFFFFE 4892#define S_028000_STENCIL_CLEAR_ENABLE(x) (((unsigned)(x) & 0x1) << 1) 4893#define G_028000_STENCIL_CLEAR_ENABLE(x) (((x) >> 1) & 0x1) 4894#define C_028000_STENCIL_CLEAR_ENABLE 0xFFFFFFFD 4895#define S_028000_DEPTH_COPY(x) (((unsigned)(x) & 0x1) << 2) 4896#define G_028000_DEPTH_COPY(x) (((x) >> 2) & 0x1) 4897#define C_028000_DEPTH_COPY 0xFFFFFFFB 4898#define S_028000_STENCIL_COPY(x) (((unsigned)(x) & 0x1) << 3) 4899#define G_028000_STENCIL_COPY(x) (((x) >> 3) & 0x1) 4900#define C_028000_STENCIL_COPY 0xFFFFFFF7 4901#define S_028000_RESUMMARIZE_ENABLE(x) (((unsigned)(x) & 0x1) << 4) 4902#define G_028000_RESUMMARIZE_ENABLE(x) (((x) >> 4) & 0x1) 4903#define C_028000_RESUMMARIZE_ENABLE 0xFFFFFFEF 4904#define S_028000_STENCIL_COMPRESS_DISABLE(x) (((unsigned)(x) & 0x1) << 5) 4905#define G_028000_STENCIL_COMPRESS_DISABLE(x) (((x) >> 5) & 0x1) 4906#define C_028000_STENCIL_COMPRESS_DISABLE 0xFFFFFFDF 4907#define S_028000_DEPTH_COMPRESS_DISABLE(x) (((unsigned)(x) & 0x1) << 6) 4908#define G_028000_DEPTH_COMPRESS_DISABLE(x) (((x) >> 6) & 0x1) 4909#define C_028000_DEPTH_COMPRESS_DISABLE 0xFFFFFFBF 4910#define S_028000_COPY_CENTROID(x) (((unsigned)(x) & 0x1) << 7) 4911#define G_028000_COPY_CENTROID(x) (((x) >> 7) & 0x1) 4912#define C_028000_COPY_CENTROID 0xFFFFFF7F 4913#define S_028000_COPY_SAMPLE(x) (((unsigned)(x) & 0x0F) << 8) 4914#define G_028000_COPY_SAMPLE(x) (((x) >> 8) & 0x0F) 4915#define C_028000_COPY_SAMPLE 0xFFFFF0FF 4916/* VI */ 4917#define S_028000_DECOMPRESS_ENABLE(x) (((unsigned)(x) & 0x1) << 12) 4918#define G_028000_DECOMPRESS_ENABLE(x) (((x) >> 12) & 0x1) 4919#define C_028000_DECOMPRESS_ENABLE 0xFFFFEFFF 4920/* */ 4921#define R_028004_DB_COUNT_CONTROL 0x028004 4922#define S_028004_ZPASS_INCREMENT_DISABLE(x) (((unsigned)(x) & 0x1) << 0) 4923#define G_028004_ZPASS_INCREMENT_DISABLE(x) (((x) >> 0) & 0x1) 4924#define C_028004_ZPASS_INCREMENT_DISABLE 0xFFFFFFFE 4925#define S_028004_PERFECT_ZPASS_COUNTS(x) (((unsigned)(x) & 0x1) << 1) 4926#define G_028004_PERFECT_ZPASS_COUNTS(x) (((x) >> 1) & 0x1) 4927#define C_028004_PERFECT_ZPASS_COUNTS 0xFFFFFFFD 4928#define S_028004_SAMPLE_RATE(x) (((unsigned)(x) & 0x07) << 4) 4929#define G_028004_SAMPLE_RATE(x) (((x) >> 4) & 0x07) 4930#define C_028004_SAMPLE_RATE 0xFFFFFF8F 4931/* CIK */ 4932#define S_028004_ZPASS_ENABLE(x) (((unsigned)(x) & 0x0F) << 8) 4933#define G_028004_ZPASS_ENABLE(x) (((x) >> 8) & 0x0F) 4934#define C_028004_ZPASS_ENABLE 0xFFFFF0FF 4935#define S_028004_ZFAIL_ENABLE(x) (((unsigned)(x) & 0x0F) << 12) 4936#define G_028004_ZFAIL_ENABLE(x) (((x) >> 12) & 0x0F) 4937#define C_028004_ZFAIL_ENABLE 0xFFFF0FFF 4938#define S_028004_SFAIL_ENABLE(x) (((unsigned)(x) & 0x0F) << 16) 4939#define G_028004_SFAIL_ENABLE(x) (((x) >> 16) & 0x0F) 4940#define C_028004_SFAIL_ENABLE 0xFFF0FFFF 4941#define S_028004_DBFAIL_ENABLE(x) (((unsigned)(x) & 0x0F) << 20) 4942#define G_028004_DBFAIL_ENABLE(x) (((x) >> 20) & 0x0F) 4943#define C_028004_DBFAIL_ENABLE 0xFF0FFFFF 4944#define S_028004_SLICE_EVEN_ENABLE(x) (((unsigned)(x) & 0x0F) << 24) 4945#define G_028004_SLICE_EVEN_ENABLE(x) (((x) >> 24) & 0x0F) 4946#define C_028004_SLICE_EVEN_ENABLE 0xF0FFFFFF 4947#define S_028004_SLICE_ODD_ENABLE(x) (((unsigned)(x) & 0x0F) << 28) 4948#define G_028004_SLICE_ODD_ENABLE(x) (((x) >> 28) & 0x0F) 4949#define C_028004_SLICE_ODD_ENABLE 0x0FFFFFFF 4950/* */ 4951#define R_028008_DB_DEPTH_VIEW 0x028008 4952#define S_028008_SLICE_START(x) (((unsigned)(x) & 0x7FF) << 0) 4953#define G_028008_SLICE_START(x) (((x) >> 0) & 0x7FF) 4954#define C_028008_SLICE_START 0xFFFFF800 4955#define S_028008_SLICE_MAX(x) (((unsigned)(x) & 0x7FF) << 13) 4956#define G_028008_SLICE_MAX(x) (((x) >> 13) & 0x7FF) 4957#define C_028008_SLICE_MAX 0xFF001FFF 4958#define S_028008_Z_READ_ONLY(x) (((unsigned)(x) & 0x1) << 24) 4959#define G_028008_Z_READ_ONLY(x) (((x) >> 24) & 0x1) 4960#define C_028008_Z_READ_ONLY 0xFEFFFFFF 4961#define S_028008_STENCIL_READ_ONLY(x) (((unsigned)(x) & 0x1) << 25) 4962#define G_028008_STENCIL_READ_ONLY(x) (((x) >> 25) & 0x1) 4963#define C_028008_STENCIL_READ_ONLY 0xFDFFFFFF 4964#define R_02800C_DB_RENDER_OVERRIDE 0x02800C 4965#define S_02800C_FORCE_HIZ_ENABLE(x) (((unsigned)(x) & 0x03) << 0) 4966#define G_02800C_FORCE_HIZ_ENABLE(x) (((x) >> 0) & 0x03) 4967#define C_02800C_FORCE_HIZ_ENABLE 0xFFFFFFFC 4968#define V_02800C_FORCE_OFF 0x00 4969#define V_02800C_FORCE_ENABLE 0x01 4970#define V_02800C_FORCE_DISABLE 0x02 4971#define V_02800C_FORCE_RESERVED 0x03 4972#define S_02800C_FORCE_HIS_ENABLE0(x) (((unsigned)(x) & 0x03) << 2) 4973#define G_02800C_FORCE_HIS_ENABLE0(x) (((x) >> 2) & 0x03) 4974#define C_02800C_FORCE_HIS_ENABLE0 0xFFFFFFF3 4975#define V_02800C_FORCE_OFF 0x00 4976#define V_02800C_FORCE_ENABLE 0x01 4977#define V_02800C_FORCE_DISABLE 0x02 4978#define V_02800C_FORCE_RESERVED 0x03 4979#define S_02800C_FORCE_HIS_ENABLE1(x) (((unsigned)(x) & 0x03) << 4) 4980#define G_02800C_FORCE_HIS_ENABLE1(x) (((x) >> 4) & 0x03) 4981#define C_02800C_FORCE_HIS_ENABLE1 0xFFFFFFCF 4982#define V_02800C_FORCE_OFF 0x00 4983#define V_02800C_FORCE_ENABLE 0x01 4984#define V_02800C_FORCE_DISABLE 0x02 4985#define V_02800C_FORCE_RESERVED 0x03 4986#define S_02800C_FORCE_SHADER_Z_ORDER(x) (((unsigned)(x) & 0x1) << 6) 4987#define G_02800C_FORCE_SHADER_Z_ORDER(x) (((x) >> 6) & 0x1) 4988#define C_02800C_FORCE_SHADER_Z_ORDER 0xFFFFFFBF 4989#define S_02800C_FAST_Z_DISABLE(x) (((unsigned)(x) & 0x1) << 7) 4990#define G_02800C_FAST_Z_DISABLE(x) (((x) >> 7) & 0x1) 4991#define C_02800C_FAST_Z_DISABLE 0xFFFFFF7F 4992#define S_02800C_FAST_STENCIL_DISABLE(x) (((unsigned)(x) & 0x1) << 8) 4993#define G_02800C_FAST_STENCIL_DISABLE(x) (((x) >> 8) & 0x1) 4994#define C_02800C_FAST_STENCIL_DISABLE 0xFFFFFEFF 4995#define S_02800C_NOOP_CULL_DISABLE(x) (((unsigned)(x) & 0x1) << 9) 4996#define G_02800C_NOOP_CULL_DISABLE(x) (((x) >> 9) & 0x1) 4997#define C_02800C_NOOP_CULL_DISABLE 0xFFFFFDFF 4998#define S_02800C_FORCE_COLOR_KILL(x) (((unsigned)(x) & 0x1) << 10) 4999#define G_02800C_FORCE_COLOR_KILL(x) (((x) >> 10) & 0x1) 5000#define C_02800C_FORCE_COLOR_KILL 0xFFFFFBFF 5001#define S_02800C_FORCE_Z_READ(x) (((unsigned)(x) & 0x1) << 11) 5002#define G_02800C_FORCE_Z_READ(x) (((x) >> 11) & 0x1) 5003#define C_02800C_FORCE_Z_READ 0xFFFFF7FF 5004#define S_02800C_FORCE_STENCIL_READ(x) (((unsigned)(x) & 0x1) << 12) 5005#define G_02800C_FORCE_STENCIL_READ(x) (((x) >> 12) & 0x1) 5006#define C_02800C_FORCE_STENCIL_READ 0xFFFFEFFF 5007#define S_02800C_FORCE_FULL_Z_RANGE(x) (((unsigned)(x) & 0x03) << 13) 5008#define G_02800C_FORCE_FULL_Z_RANGE(x) (((x) >> 13) & 0x03) 5009#define C_02800C_FORCE_FULL_Z_RANGE 0xFFFF9FFF 5010#define V_02800C_FORCE_OFF 0x00 5011#define V_02800C_FORCE_ENABLE 0x01 5012#define V_02800C_FORCE_DISABLE 0x02 5013#define V_02800C_FORCE_RESERVED 0x03 5014#define S_02800C_FORCE_QC_SMASK_CONFLICT(x) (((unsigned)(x) & 0x1) << 15) 5015#define G_02800C_FORCE_QC_SMASK_CONFLICT(x) (((x) >> 15) & 0x1) 5016#define C_02800C_FORCE_QC_SMASK_CONFLICT 0xFFFF7FFF 5017#define S_02800C_DISABLE_VIEWPORT_CLAMP(x) (((unsigned)(x) & 0x1) << 16) 5018#define G_02800C_DISABLE_VIEWPORT_CLAMP(x) (((x) >> 16) & 0x1) 5019#define C_02800C_DISABLE_VIEWPORT_CLAMP 0xFFFEFFFF 5020#define S_02800C_IGNORE_SC_ZRANGE(x) (((unsigned)(x) & 0x1) << 17) 5021#define G_02800C_IGNORE_SC_ZRANGE(x) (((x) >> 17) & 0x1) 5022#define C_02800C_IGNORE_SC_ZRANGE 0xFFFDFFFF 5023#define S_02800C_DISABLE_FULLY_COVERED(x) (((unsigned)(x) & 0x1) << 18) 5024#define G_02800C_DISABLE_FULLY_COVERED(x) (((x) >> 18) & 0x1) 5025#define C_02800C_DISABLE_FULLY_COVERED 0xFFFBFFFF 5026#define S_02800C_FORCE_Z_LIMIT_SUMM(x) (((unsigned)(x) & 0x03) << 19) 5027#define G_02800C_FORCE_Z_LIMIT_SUMM(x) (((x) >> 19) & 0x03) 5028#define C_02800C_FORCE_Z_LIMIT_SUMM 0xFFE7FFFF 5029#define V_02800C_FORCE_SUMM_OFF 0x00 5030#define V_02800C_FORCE_SUMM_MINZ 0x01 5031#define V_02800C_FORCE_SUMM_MAXZ 0x02 5032#define V_02800C_FORCE_SUMM_BOTH 0x03 5033#define S_02800C_MAX_TILES_IN_DTT(x) (((unsigned)(x) & 0x1F) << 21) 5034#define G_02800C_MAX_TILES_IN_DTT(x) (((x) >> 21) & 0x1F) 5035#define C_02800C_MAX_TILES_IN_DTT 0xFC1FFFFF 5036#define S_02800C_DISABLE_TILE_RATE_TILES(x) (((unsigned)(x) & 0x1) << 26) 5037#define G_02800C_DISABLE_TILE_RATE_TILES(x) (((x) >> 26) & 0x1) 5038#define C_02800C_DISABLE_TILE_RATE_TILES 0xFBFFFFFF 5039#define S_02800C_FORCE_Z_DIRTY(x) (((unsigned)(x) & 0x1) << 27) 5040#define G_02800C_FORCE_Z_DIRTY(x) (((x) >> 27) & 0x1) 5041#define C_02800C_FORCE_Z_DIRTY 0xF7FFFFFF 5042#define S_02800C_FORCE_STENCIL_DIRTY(x) (((unsigned)(x) & 0x1) << 28) 5043#define G_02800C_FORCE_STENCIL_DIRTY(x) (((x) >> 28) & 0x1) 5044#define C_02800C_FORCE_STENCIL_DIRTY 0xEFFFFFFF 5045#define S_02800C_FORCE_Z_VALID(x) (((unsigned)(x) & 0x1) << 29) 5046#define G_02800C_FORCE_Z_VALID(x) (((x) >> 29) & 0x1) 5047#define C_02800C_FORCE_Z_VALID 0xDFFFFFFF 5048#define S_02800C_FORCE_STENCIL_VALID(x) (((unsigned)(x) & 0x1) << 30) 5049#define G_02800C_FORCE_STENCIL_VALID(x) (((x) >> 30) & 0x1) 5050#define C_02800C_FORCE_STENCIL_VALID 0xBFFFFFFF 5051#define S_02800C_PRESERVE_COMPRESSION(x) (((unsigned)(x) & 0x1) << 31) 5052#define G_02800C_PRESERVE_COMPRESSION(x) (((x) >> 31) & 0x1) 5053#define C_02800C_PRESERVE_COMPRESSION 0x7FFFFFFF 5054#define R_028010_DB_RENDER_OVERRIDE2 0x028010 5055#define S_028010_PARTIAL_SQUAD_LAUNCH_CONTROL(x) (((unsigned)(x) & 0x03) << 0) 5056#define G_028010_PARTIAL_SQUAD_LAUNCH_CONTROL(x) (((x) >> 0) & 0x03) 5057#define C_028010_PARTIAL_SQUAD_LAUNCH_CONTROL 0xFFFFFFFC 5058#define V_028010_PSLC_AUTO 0x00 5059#define V_028010_PSLC_ON_HANG_ONLY 0x01 5060#define V_028010_PSLC_ASAP 0x02 5061#define V_028010_PSLC_COUNTDOWN 0x03 5062#define S_028010_PARTIAL_SQUAD_LAUNCH_COUNTDOWN(x) (((unsigned)(x) & 0x07) << 2) 5063#define G_028010_PARTIAL_SQUAD_LAUNCH_COUNTDOWN(x) (((x) >> 2) & 0x07) 5064#define C_028010_PARTIAL_SQUAD_LAUNCH_COUNTDOWN 0xFFFFFFE3 5065#define S_028010_DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION(x) (((unsigned)(x) & 0x1) << 5) 5066#define G_028010_DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION(x) (((x) >> 5) & 0x1) 5067#define C_028010_DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION 0xFFFFFFDF 5068#define S_028010_DISABLE_SMEM_EXPCLEAR_OPTIMIZATION(x) (((unsigned)(x) & 0x1) << 6) 5069#define G_028010_DISABLE_SMEM_EXPCLEAR_OPTIMIZATION(x) (((x) >> 6) & 0x1) 5070#define C_028010_DISABLE_SMEM_EXPCLEAR_OPTIMIZATION 0xFFFFFFBF 5071#define S_028010_DISABLE_COLOR_ON_VALIDATION(x) (((unsigned)(x) & 0x1) << 7) 5072#define G_028010_DISABLE_COLOR_ON_VALIDATION(x) (((x) >> 7) & 0x1) 5073#define C_028010_DISABLE_COLOR_ON_VALIDATION 0xFFFFFF7F 5074#define S_028010_DECOMPRESS_Z_ON_FLUSH(x) (((unsigned)(x) & 0x1) << 8) 5075#define G_028010_DECOMPRESS_Z_ON_FLUSH(x) (((x) >> 8) & 0x1) 5076#define C_028010_DECOMPRESS_Z_ON_FLUSH 0xFFFFFEFF 5077#define S_028010_DISABLE_REG_SNOOP(x) (((unsigned)(x) & 0x1) << 9) 5078#define G_028010_DISABLE_REG_SNOOP(x) (((x) >> 9) & 0x1) 5079#define C_028010_DISABLE_REG_SNOOP 0xFFFFFDFF 5080#define S_028010_DEPTH_BOUNDS_HIER_DEPTH_DISABLE(x) (((unsigned)(x) & 0x1) << 10) 5081#define G_028010_DEPTH_BOUNDS_HIER_DEPTH_DISABLE(x) (((x) >> 10) & 0x1) 5082#define C_028010_DEPTH_BOUNDS_HIER_DEPTH_DISABLE 0xFFFFFBFF 5083/* CIK */ 5084#define S_028010_SEPARATE_HIZS_FUNC_ENABLE(x) (((unsigned)(x) & 0x1) << 11) 5085#define G_028010_SEPARATE_HIZS_FUNC_ENABLE(x) (((x) >> 11) & 0x1) 5086#define C_028010_SEPARATE_HIZS_FUNC_ENABLE 0xFFFFF7FF 5087#define S_028010_HIZ_ZFUNC(x) (((unsigned)(x) & 0x07) << 12) 5088#define G_028010_HIZ_ZFUNC(x) (((x) >> 12) & 0x07) 5089#define C_028010_HIZ_ZFUNC 0xFFFF8FFF 5090#define S_028010_HIS_SFUNC_FF(x) (((unsigned)(x) & 0x07) << 15) 5091#define G_028010_HIS_SFUNC_FF(x) (((x) >> 15) & 0x07) 5092#define C_028010_HIS_SFUNC_FF 0xFFFC7FFF 5093#define S_028010_HIS_SFUNC_BF(x) (((unsigned)(x) & 0x07) << 18) 5094#define G_028010_HIS_SFUNC_BF(x) (((x) >> 18) & 0x07) 5095#define C_028010_HIS_SFUNC_BF 0xFFE3FFFF 5096#define S_028010_PRESERVE_ZRANGE(x) (((unsigned)(x) & 0x1) << 21) 5097#define G_028010_PRESERVE_ZRANGE(x) (((x) >> 21) & 0x1) 5098#define C_028010_PRESERVE_ZRANGE 0xFFDFFFFF 5099#define S_028010_PRESERVE_SRESULTS(x) (((unsigned)(x) & 0x1) << 22) 5100#define G_028010_PRESERVE_SRESULTS(x) (((x) >> 22) & 0x1) 5101#define C_028010_PRESERVE_SRESULTS 0xFFBFFFFF 5102#define S_028010_DISABLE_FAST_PASS(x) (((unsigned)(x) & 0x1) << 23) 5103#define G_028010_DISABLE_FAST_PASS(x) (((x) >> 23) & 0x1) 5104#define C_028010_DISABLE_FAST_PASS 0xFF7FFFFF 5105/* */ 5106#define R_028014_DB_HTILE_DATA_BASE 0x028014 5107#define R_028020_DB_DEPTH_BOUNDS_MIN 0x028020 5108#define R_028024_DB_DEPTH_BOUNDS_MAX 0x028024 5109#define R_028028_DB_STENCIL_CLEAR 0x028028 5110#define S_028028_CLEAR(x) (((unsigned)(x) & 0xFF) << 0) 5111#define G_028028_CLEAR(x) (((x) >> 0) & 0xFF) 5112#define C_028028_CLEAR 0xFFFFFF00 5113#define R_02802C_DB_DEPTH_CLEAR 0x02802C 5114#define R_028030_PA_SC_SCREEN_SCISSOR_TL 0x028030 5115#define S_028030_TL_X(x) (((unsigned)(x) & 0xFFFF) << 0) 5116#define G_028030_TL_X(x) (((x) >> 0) & 0xFFFF) 5117#define C_028030_TL_X 0xFFFF0000 5118#define S_028030_TL_Y(x) (((unsigned)(x) & 0xFFFF) << 16) 5119#define G_028030_TL_Y(x) (((x) >> 16) & 0xFFFF) 5120#define C_028030_TL_Y 0x0000FFFF 5121#define R_028034_PA_SC_SCREEN_SCISSOR_BR 0x028034 5122#define S_028034_BR_X(x) (((unsigned)(x) & 0xFFFF) << 0) 5123#define G_028034_BR_X(x) (((x) >> 0) & 0xFFFF) 5124#define C_028034_BR_X 0xFFFF0000 5125#define S_028034_BR_Y(x) (((unsigned)(x) & 0xFFFF) << 16) 5126#define G_028034_BR_Y(x) (((x) >> 16) & 0xFFFF) 5127#define C_028034_BR_Y 0x0000FFFF 5128#define R_02803C_DB_DEPTH_INFO 0x02803C 5129#define S_02803C_ADDR5_SWIZZLE_MASK(x) (((unsigned)(x) & 0x0F) << 0) 5130#define G_02803C_ADDR5_SWIZZLE_MASK(x) (((x) >> 0) & 0x0F) 5131#define C_02803C_ADDR5_SWIZZLE_MASK 0xFFFFFFF0 5132/* CIK */ 5133#define S_02803C_ARRAY_MODE(x) (((unsigned)(x) & 0x0F) << 4) 5134#define G_02803C_ARRAY_MODE(x) (((x) >> 4) & 0x0F) 5135#define C_02803C_ARRAY_MODE 0xFFFFFF0F 5136#define V_02803C_ARRAY_LINEAR_GENERAL 0x00 5137#define V_02803C_ARRAY_LINEAR_ALIGNED 0x01 5138#define V_02803C_ARRAY_1D_TILED_THIN1 0x02 5139#define V_02803C_ARRAY_2D_TILED_THIN1 0x04 5140#define V_02803C_ARRAY_PRT_TILED_THIN1 0x05 5141#define V_02803C_ARRAY_PRT_2D_TILED_THIN1 0x06 5142#define S_02803C_PIPE_CONFIG(x) (((unsigned)(x) & 0x1F) << 8) 5143#define G_02803C_PIPE_CONFIG(x) (((x) >> 8) & 0x1F) 5144#define C_02803C_PIPE_CONFIG 0xFFFFE0FF 5145#define V_02803C_ADDR_SURF_P2 0x00 5146#define V_02803C_X_ADDR_SURF_P4_8X16 0x04 5147#define V_02803C_X_ADDR_SURF_P4_16X16 0x05 5148#define V_02803C_X_ADDR_SURF_P4_16X32 0x06 5149#define V_02803C_X_ADDR_SURF_P4_32X32 0x07 5150#define V_02803C_X_ADDR_SURF_P8_16X16_8X16 0x08 5151#define V_02803C_X_ADDR_SURF_P8_16X32_8X16 0x09 5152#define V_02803C_X_ADDR_SURF_P8_32X32_8X16 0x0A 5153#define V_02803C_X_ADDR_SURF_P8_16X32_16X16 0x0B 5154#define V_02803C_X_ADDR_SURF_P8_32X32_16X16 0x0C 5155#define V_02803C_X_ADDR_SURF_P8_32X32_16X32 0x0D 5156#define V_02803C_X_ADDR_SURF_P8_32X64_32X32 0x0E 5157#define V_02803C_X_ADDR_SURF_P16_32X32_8X16 0x10 5158#define V_02803C_X_ADDR_SURF_P16_32X32_16X16 0x11 5159#define S_02803C_BANK_WIDTH(x) (((unsigned)(x) & 0x03) << 13) 5160#define G_02803C_BANK_WIDTH(x) (((x) >> 13) & 0x03) 5161#define C_02803C_BANK_WIDTH 0xFFFF9FFF 5162#define V_02803C_ADDR_SURF_BANK_WIDTH_1 0x00 5163#define V_02803C_ADDR_SURF_BANK_WIDTH_2 0x01 5164#define V_02803C_ADDR_SURF_BANK_WIDTH_4 0x02 5165#define V_02803C_ADDR_SURF_BANK_WIDTH_8 0x03 5166#define S_02803C_BANK_HEIGHT(x) (((unsigned)(x) & 0x03) << 15) 5167#define G_02803C_BANK_HEIGHT(x) (((x) >> 15) & 0x03) 5168#define C_02803C_BANK_HEIGHT 0xFFFE7FFF 5169#define V_02803C_ADDR_SURF_BANK_HEIGHT_1 0x00 5170#define V_02803C_ADDR_SURF_BANK_HEIGHT_2 0x01 5171#define V_02803C_ADDR_SURF_BANK_HEIGHT_4 0x02 5172#define V_02803C_ADDR_SURF_BANK_HEIGHT_8 0x03 5173#define S_02803C_MACRO_TILE_ASPECT(x) (((unsigned)(x) & 0x03) << 17) 5174#define G_02803C_MACRO_TILE_ASPECT(x) (((x) >> 17) & 0x03) 5175#define C_02803C_MACRO_TILE_ASPECT 0xFFF9FFFF 5176#define V_02803C_ADDR_SURF_MACRO_ASPECT_1 0x00 5177#define V_02803C_ADDR_SURF_MACRO_ASPECT_2 0x01 5178#define V_02803C_ADDR_SURF_MACRO_ASPECT_4 0x02 5179#define V_02803C_ADDR_SURF_MACRO_ASPECT_8 0x03 5180#define S_02803C_NUM_BANKS(x) (((unsigned)(x) & 0x03) << 19) 5181#define G_02803C_NUM_BANKS(x) (((x) >> 19) & 0x03) 5182#define C_02803C_NUM_BANKS 0xFFE7FFFF 5183#define V_02803C_ADDR_SURF_2_BANK 0x00 5184#define V_02803C_ADDR_SURF_4_BANK 0x01 5185#define V_02803C_ADDR_SURF_8_BANK 0x02 5186#define V_02803C_ADDR_SURF_16_BANK 0x03 5187/* */ 5188#define R_028040_DB_Z_INFO 0x028040 5189#define S_028040_FORMAT(x) (((unsigned)(x) & 0x03) << 0) 5190#define G_028040_FORMAT(x) (((x) >> 0) & 0x03) 5191#define C_028040_FORMAT 0xFFFFFFFC 5192#define V_028040_Z_INVALID 0x00 5193#define V_028040_Z_16 0x01 5194#define V_028040_Z_24 0x02 /* deprecated */ 5195#define V_028040_Z_32_FLOAT 0x03 5196#define S_028040_NUM_SAMPLES(x) (((unsigned)(x) & 0x03) << 2) 5197#define G_028040_NUM_SAMPLES(x) (((x) >> 2) & 0x03) 5198#define C_028040_NUM_SAMPLES 0xFFFFFFF3 5199/* CIK */ 5200#define S_028040_TILE_SPLIT(x) (((unsigned)(x) & 0x07) << 13) 5201#define G_028040_TILE_SPLIT(x) (((x) >> 13) & 0x07) 5202#define C_028040_TILE_SPLIT 0xFFFF1FFF 5203#define V_028040_ADDR_SURF_TILE_SPLIT_64B 0x00 5204#define V_028040_ADDR_SURF_TILE_SPLIT_128B 0x01 5205#define V_028040_ADDR_SURF_TILE_SPLIT_256B 0x02 5206#define V_028040_ADDR_SURF_TILE_SPLIT_512B 0x03 5207#define V_028040_ADDR_SURF_TILE_SPLIT_1KB 0x04 5208#define V_028040_ADDR_SURF_TILE_SPLIT_2KB 0x05 5209#define V_028040_ADDR_SURF_TILE_SPLIT_4KB 0x06 5210/* */ 5211#define S_028040_TILE_MODE_INDEX(x) (((unsigned)(x) & 0x07) << 20) /* not on CIK */ 5212#define G_028040_TILE_MODE_INDEX(x) (((x) >> 20) & 0x07) /* not on CIK */ 5213#define C_028040_TILE_MODE_INDEX 0xFF8FFFFF /* not on CIK */ 5214/* VI */ 5215#define S_028040_DECOMPRESS_ON_N_ZPLANES(x) (((unsigned)(x) & 0x0F) << 23) 5216#define G_028040_DECOMPRESS_ON_N_ZPLANES(x) (((x) >> 23) & 0x0F) 5217#define C_028040_DECOMPRESS_ON_N_ZPLANES 0xF87FFFFF 5218/* */ 5219#define S_028040_ALLOW_EXPCLEAR(x) (((unsigned)(x) & 0x1) << 27) 5220#define G_028040_ALLOW_EXPCLEAR(x) (((x) >> 27) & 0x1) 5221#define C_028040_ALLOW_EXPCLEAR 0xF7FFFFFF 5222#define S_028040_READ_SIZE(x) (((unsigned)(x) & 0x1) << 28) 5223#define G_028040_READ_SIZE(x) (((x) >> 28) & 0x1) 5224#define C_028040_READ_SIZE 0xEFFFFFFF 5225#define S_028040_TILE_SURFACE_ENABLE(x) (((unsigned)(x) & 0x1) << 29) 5226#define G_028040_TILE_SURFACE_ENABLE(x) (((x) >> 29) & 0x1) 5227#define C_028040_TILE_SURFACE_ENABLE 0xDFFFFFFF 5228/* VI */ 5229#define S_028040_CLEAR_DISALLOWED(x) (((unsigned)(x) & 0x1) << 30) 5230#define G_028040_CLEAR_DISALLOWED(x) (((x) >> 30) & 0x1) 5231#define C_028040_CLEAR_DISALLOWED 0xBFFFFFFF 5232/* */ 5233#define S_028040_ZRANGE_PRECISION(x) (((unsigned)(x) & 0x1) << 31) 5234#define G_028040_ZRANGE_PRECISION(x) (((x) >> 31) & 0x1) 5235#define C_028040_ZRANGE_PRECISION 0x7FFFFFFF 5236#define R_028044_DB_STENCIL_INFO 0x028044 5237#define S_028044_FORMAT(x) (((unsigned)(x) & 0x1) << 0) 5238#define G_028044_FORMAT(x) (((x) >> 0) & 0x1) 5239#define C_028044_FORMAT 0xFFFFFFFE 5240#define V_028044_STENCIL_INVALID 0x00 5241#define V_028044_STENCIL_8 0x01 5242/* CIK */ 5243#define S_028044_TILE_SPLIT(x) (((unsigned)(x) & 0x07) << 13) 5244#define G_028044_TILE_SPLIT(x) (((x) >> 13) & 0x07) 5245#define C_028044_TILE_SPLIT 0xFFFF1FFF 5246#define V_028044_ADDR_SURF_TILE_SPLIT_64B 0x00 5247#define V_028044_ADDR_SURF_TILE_SPLIT_128B 0x01 5248#define V_028044_ADDR_SURF_TILE_SPLIT_256B 0x02 5249#define V_028044_ADDR_SURF_TILE_SPLIT_512B 0x03 5250#define V_028044_ADDR_SURF_TILE_SPLIT_1KB 0x04 5251#define V_028044_ADDR_SURF_TILE_SPLIT_2KB 0x05 5252#define V_028044_ADDR_SURF_TILE_SPLIT_4KB 0x06 5253/* */ 5254#define S_028044_TILE_MODE_INDEX(x) (((unsigned)(x) & 0x07) << 20) /* not on CIK */ 5255#define G_028044_TILE_MODE_INDEX(x) (((x) >> 20) & 0x07) /* not on CIK */ 5256#define C_028044_TILE_MODE_INDEX 0xFF8FFFFF /* not on CIK */ 5257#define S_028044_ALLOW_EXPCLEAR(x) (((unsigned)(x) & 0x1) << 27) 5258#define G_028044_ALLOW_EXPCLEAR(x) (((x) >> 27) & 0x1) 5259#define C_028044_ALLOW_EXPCLEAR 0xF7FFFFFF 5260#define S_028044_TILE_STENCIL_DISABLE(x) (((unsigned)(x) & 0x1) << 29) 5261#define G_028044_TILE_STENCIL_DISABLE(x) (((x) >> 29) & 0x1) 5262#define C_028044_TILE_STENCIL_DISABLE 0xDFFFFFFF 5263/* VI */ 5264#define S_028044_CLEAR_DISALLOWED(x) (((unsigned)(x) & 0x1) << 30) 5265#define G_028044_CLEAR_DISALLOWED(x) (((x) >> 30) & 0x1) 5266#define C_028044_CLEAR_DISALLOWED 0xBFFFFFFF 5267/* */ 5268#define R_028048_DB_Z_READ_BASE 0x028048 5269#define R_02804C_DB_STENCIL_READ_BASE 0x02804C 5270#define R_028050_DB_Z_WRITE_BASE 0x028050 5271#define R_028054_DB_STENCIL_WRITE_BASE 0x028054 5272#define R_028058_DB_DEPTH_SIZE 0x028058 5273#define S_028058_PITCH_TILE_MAX(x) (((unsigned)(x) & 0x7FF) << 0) 5274#define G_028058_PITCH_TILE_MAX(x) (((x) >> 0) & 0x7FF) 5275#define C_028058_PITCH_TILE_MAX 0xFFFFF800 5276#define S_028058_HEIGHT_TILE_MAX(x) (((unsigned)(x) & 0x7FF) << 11) 5277#define G_028058_HEIGHT_TILE_MAX(x) (((x) >> 11) & 0x7FF) 5278#define C_028058_HEIGHT_TILE_MAX 0xFFC007FF 5279#define R_02805C_DB_DEPTH_SLICE 0x02805C 5280#define S_02805C_SLICE_TILE_MAX(x) (((unsigned)(x) & 0x3FFFFF) << 0) 5281#define G_02805C_SLICE_TILE_MAX(x) (((x) >> 0) & 0x3FFFFF) 5282#define C_02805C_SLICE_TILE_MAX 0xFFC00000 5283#define R_028080_TA_BC_BASE_ADDR 0x028080 5284/* CIK */ 5285#define R_028084_TA_BC_BASE_ADDR_HI 0x028084 5286#define S_028084_ADDRESS(x) (((unsigned)(x) & 0xFF) << 0) 5287#define G_028084_ADDRESS(x) (((x) >> 0) & 0xFF) 5288#define C_028084_ADDRESS 0xFFFFFF00 5289#define R_0281E8_COHER_DEST_BASE_HI_0 0x0281E8 5290#define R_0281EC_COHER_DEST_BASE_HI_1 0x0281EC 5291#define R_0281F0_COHER_DEST_BASE_HI_2 0x0281F0 5292#define R_0281F4_COHER_DEST_BASE_HI_3 0x0281F4 5293/* */ 5294#define R_0281F8_COHER_DEST_BASE_2 0x0281F8 5295#define R_0281FC_COHER_DEST_BASE_3 0x0281FC 5296#define R_028200_PA_SC_WINDOW_OFFSET 0x028200 5297#define S_028200_WINDOW_X_OFFSET(x) (((unsigned)(x) & 0xFFFF) << 0) 5298#define G_028200_WINDOW_X_OFFSET(x) (((x) >> 0) & 0xFFFF) 5299#define C_028200_WINDOW_X_OFFSET 0xFFFF0000 5300#define S_028200_WINDOW_Y_OFFSET(x) (((unsigned)(x) & 0xFFFF) << 16) 5301#define G_028200_WINDOW_Y_OFFSET(x) (((x) >> 16) & 0xFFFF) 5302#define C_028200_WINDOW_Y_OFFSET 0x0000FFFF 5303#define R_028204_PA_SC_WINDOW_SCISSOR_TL 0x028204 5304#define S_028204_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0) 5305#define G_028204_TL_X(x) (((x) >> 0) & 0x7FFF) 5306#define C_028204_TL_X 0xFFFF8000 5307#define S_028204_TL_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 5308#define G_028204_TL_Y(x) (((x) >> 16) & 0x7FFF) 5309#define C_028204_TL_Y 0x8000FFFF 5310#define S_028204_WINDOW_OFFSET_DISABLE(x) (((unsigned)(x) & 0x1) << 31) 5311#define G_028204_WINDOW_OFFSET_DISABLE(x) (((x) >> 31) & 0x1) 5312#define C_028204_WINDOW_OFFSET_DISABLE 0x7FFFFFFF 5313#define R_028208_PA_SC_WINDOW_SCISSOR_BR 0x028208 5314#define S_028208_BR_X(x) (((unsigned)(x) & 0x7FFF) << 0) 5315#define G_028208_BR_X(x) (((x) >> 0) & 0x7FFF) 5316#define C_028208_BR_X 0xFFFF8000 5317#define S_028208_BR_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 5318#define G_028208_BR_Y(x) (((x) >> 16) & 0x7FFF) 5319#define C_028208_BR_Y 0x8000FFFF 5320#define R_02820C_PA_SC_CLIPRECT_RULE 0x02820C 5321#define S_02820C_CLIP_RULE(x) (((unsigned)(x) & 0xFFFF) << 0) 5322#define G_02820C_CLIP_RULE(x) (((x) >> 0) & 0xFFFF) 5323#define C_02820C_CLIP_RULE 0xFFFF0000 5324#define V_02820C_OUT 0x0001 5325#define V_02820C_IN_0 0x0002 5326#define V_02820C_IN_1 0x0004 5327#define V_02820C_IN_10 0x0008 5328#define V_02820C_IN_2 0x0010 5329#define V_02820C_IN_20 0x0020 5330#define V_02820C_IN_21 0x0040 5331#define V_02820C_IN_210 0x0080 5332#define V_02820C_IN_3 0x0100 5333#define V_02820C_IN_30 0x0200 5334#define V_02820C_IN_31 0x0400 5335#define V_02820C_IN_310 0x0800 5336#define V_02820C_IN_32 0x1000 5337#define V_02820C_IN_320 0x2000 5338#define V_02820C_IN_321 0x4000 5339#define V_02820C_IN_3210 0x8000 5340#define R_028210_PA_SC_CLIPRECT_0_TL 0x028210 5341#define S_028210_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0) 5342#define G_028210_TL_X(x) (((x) >> 0) & 0x7FFF) 5343#define C_028210_TL_X 0xFFFF8000 5344#define S_028210_TL_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 5345#define G_028210_TL_Y(x) (((x) >> 16) & 0x7FFF) 5346#define C_028210_TL_Y 0x8000FFFF 5347#define R_028214_PA_SC_CLIPRECT_0_BR 0x028214 5348#define S_028214_BR_X(x) (((unsigned)(x) & 0x7FFF) << 0) 5349#define G_028214_BR_X(x) (((x) >> 0) & 0x7FFF) 5350#define C_028214_BR_X 0xFFFF8000 5351#define S_028214_BR_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 5352#define G_028214_BR_Y(x) (((x) >> 16) & 0x7FFF) 5353#define C_028214_BR_Y 0x8000FFFF 5354#define R_028218_PA_SC_CLIPRECT_1_TL 0x028218 5355#define R_02821C_PA_SC_CLIPRECT_1_BR 0x02821C 5356#define R_028220_PA_SC_CLIPRECT_2_TL 0x028220 5357#define R_028224_PA_SC_CLIPRECT_2_BR 0x028224 5358#define R_028228_PA_SC_CLIPRECT_3_TL 0x028228 5359#define R_02822C_PA_SC_CLIPRECT_3_BR 0x02822C 5360#define R_028230_PA_SC_EDGERULE 0x028230 5361#define S_028230_ER_TRI(x) (((unsigned)(x) & 0x0F) << 0) 5362#define G_028230_ER_TRI(x) (((x) >> 0) & 0x0F) 5363#define C_028230_ER_TRI 0xFFFFFFF0 5364#define S_028230_ER_POINT(x) (((unsigned)(x) & 0x0F) << 4) 5365#define G_028230_ER_POINT(x) (((x) >> 4) & 0x0F) 5366#define C_028230_ER_POINT 0xFFFFFF0F 5367#define S_028230_ER_RECT(x) (((unsigned)(x) & 0x0F) << 8) 5368#define G_028230_ER_RECT(x) (((x) >> 8) & 0x0F) 5369#define C_028230_ER_RECT 0xFFFFF0FF 5370#define S_028230_ER_LINE_LR(x) (((unsigned)(x) & 0x3F) << 12) 5371#define G_028230_ER_LINE_LR(x) (((x) >> 12) & 0x3F) 5372#define C_028230_ER_LINE_LR 0xFFFC0FFF 5373#define S_028230_ER_LINE_RL(x) (((unsigned)(x) & 0x3F) << 18) 5374#define G_028230_ER_LINE_RL(x) (((x) >> 18) & 0x3F) 5375#define C_028230_ER_LINE_RL 0xFF03FFFF 5376#define S_028230_ER_LINE_TB(x) (((unsigned)(x) & 0x0F) << 24) 5377#define G_028230_ER_LINE_TB(x) (((x) >> 24) & 0x0F) 5378#define C_028230_ER_LINE_TB 0xF0FFFFFF 5379#define S_028230_ER_LINE_BT(x) (((unsigned)(x) & 0x0F) << 28) 5380#define G_028230_ER_LINE_BT(x) (((x) >> 28) & 0x0F) 5381#define C_028230_ER_LINE_BT 0x0FFFFFFF 5382#define R_028234_PA_SU_HARDWARE_SCREEN_OFFSET 0x028234 5383#define S_028234_HW_SCREEN_OFFSET_X(x) (((unsigned)(x) & 0x1FF) << 0) 5384#define G_028234_HW_SCREEN_OFFSET_X(x) (((x) >> 0) & 0x1FF) 5385#define C_028234_HW_SCREEN_OFFSET_X 0xFFFFFE00 5386#define S_028234_HW_SCREEN_OFFSET_Y(x) (((unsigned)(x) & 0x1FF) << 16) 5387#define G_028234_HW_SCREEN_OFFSET_Y(x) (((x) >> 16) & 0x1FF) 5388#define C_028234_HW_SCREEN_OFFSET_Y 0xFE00FFFF 5389#define R_028238_CB_TARGET_MASK 0x028238 5390#define S_028238_TARGET0_ENABLE(x) (((unsigned)(x) & 0x0F) << 0) 5391#define G_028238_TARGET0_ENABLE(x) (((x) >> 0) & 0x0F) 5392#define C_028238_TARGET0_ENABLE 0xFFFFFFF0 5393#define S_028238_TARGET1_ENABLE(x) (((unsigned)(x) & 0x0F) << 4) 5394#define G_028238_TARGET1_ENABLE(x) (((x) >> 4) & 0x0F) 5395#define C_028238_TARGET1_ENABLE 0xFFFFFF0F 5396#define S_028238_TARGET2_ENABLE(x) (((unsigned)(x) & 0x0F) << 8) 5397#define G_028238_TARGET2_ENABLE(x) (((x) >> 8) & 0x0F) 5398#define C_028238_TARGET2_ENABLE 0xFFFFF0FF 5399#define S_028238_TARGET3_ENABLE(x) (((unsigned)(x) & 0x0F) << 12) 5400#define G_028238_TARGET3_ENABLE(x) (((x) >> 12) & 0x0F) 5401#define C_028238_TARGET3_ENABLE 0xFFFF0FFF 5402#define S_028238_TARGET4_ENABLE(x) (((unsigned)(x) & 0x0F) << 16) 5403#define G_028238_TARGET4_ENABLE(x) (((x) >> 16) & 0x0F) 5404#define C_028238_TARGET4_ENABLE 0xFFF0FFFF 5405#define S_028238_TARGET5_ENABLE(x) (((unsigned)(x) & 0x0F) << 20) 5406#define G_028238_TARGET5_ENABLE(x) (((x) >> 20) & 0x0F) 5407#define C_028238_TARGET5_ENABLE 0xFF0FFFFF 5408#define S_028238_TARGET6_ENABLE(x) (((unsigned)(x) & 0x0F) << 24) 5409#define G_028238_TARGET6_ENABLE(x) (((x) >> 24) & 0x0F) 5410#define C_028238_TARGET6_ENABLE 0xF0FFFFFF 5411#define S_028238_TARGET7_ENABLE(x) (((unsigned)(x) & 0x0F) << 28) 5412#define G_028238_TARGET7_ENABLE(x) (((x) >> 28) & 0x0F) 5413#define C_028238_TARGET7_ENABLE 0x0FFFFFFF 5414#define R_02823C_CB_SHADER_MASK 0x02823C 5415#define S_02823C_OUTPUT0_ENABLE(x) (((unsigned)(x) & 0x0F) << 0) 5416#define G_02823C_OUTPUT0_ENABLE(x) (((x) >> 0) & 0x0F) 5417#define C_02823C_OUTPUT0_ENABLE 0xFFFFFFF0 5418#define S_02823C_OUTPUT1_ENABLE(x) (((unsigned)(x) & 0x0F) << 4) 5419#define G_02823C_OUTPUT1_ENABLE(x) (((x) >> 4) & 0x0F) 5420#define C_02823C_OUTPUT1_ENABLE 0xFFFFFF0F 5421#define S_02823C_OUTPUT2_ENABLE(x) (((unsigned)(x) & 0x0F) << 8) 5422#define G_02823C_OUTPUT2_ENABLE(x) (((x) >> 8) & 0x0F) 5423#define C_02823C_OUTPUT2_ENABLE 0xFFFFF0FF 5424#define S_02823C_OUTPUT3_ENABLE(x) (((unsigned)(x) & 0x0F) << 12) 5425#define G_02823C_OUTPUT3_ENABLE(x) (((x) >> 12) & 0x0F) 5426#define C_02823C_OUTPUT3_ENABLE 0xFFFF0FFF 5427#define S_02823C_OUTPUT4_ENABLE(x) (((unsigned)(x) & 0x0F) << 16) 5428#define G_02823C_OUTPUT4_ENABLE(x) (((x) >> 16) & 0x0F) 5429#define C_02823C_OUTPUT4_ENABLE 0xFFF0FFFF 5430#define S_02823C_OUTPUT5_ENABLE(x) (((unsigned)(x) & 0x0F) << 20) 5431#define G_02823C_OUTPUT5_ENABLE(x) (((x) >> 20) & 0x0F) 5432#define C_02823C_OUTPUT5_ENABLE 0xFF0FFFFF 5433#define S_02823C_OUTPUT6_ENABLE(x) (((unsigned)(x) & 0x0F) << 24) 5434#define G_02823C_OUTPUT6_ENABLE(x) (((x) >> 24) & 0x0F) 5435#define C_02823C_OUTPUT6_ENABLE 0xF0FFFFFF 5436#define S_02823C_OUTPUT7_ENABLE(x) (((unsigned)(x) & 0x0F) << 28) 5437#define G_02823C_OUTPUT7_ENABLE(x) (((x) >> 28) & 0x0F) 5438#define C_02823C_OUTPUT7_ENABLE 0x0FFFFFFF 5439#define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 5440#define S_028240_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0) 5441#define G_028240_TL_X(x) (((x) >> 0) & 0x7FFF) 5442#define C_028240_TL_X 0xFFFF8000 5443#define S_028240_TL_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 5444#define G_028240_TL_Y(x) (((x) >> 16) & 0x7FFF) 5445#define C_028240_TL_Y 0x8000FFFF 5446#define S_028240_WINDOW_OFFSET_DISABLE(x) (((unsigned)(x) & 0x1) << 31) 5447#define G_028240_WINDOW_OFFSET_DISABLE(x) (((x) >> 31) & 0x1) 5448#define C_028240_WINDOW_OFFSET_DISABLE 0x7FFFFFFF 5449#define R_028244_PA_SC_GENERIC_SCISSOR_BR 0x028244 5450#define S_028244_BR_X(x) (((unsigned)(x) & 0x7FFF) << 0) 5451#define G_028244_BR_X(x) (((x) >> 0) & 0x7FFF) 5452#define C_028244_BR_X 0xFFFF8000 5453#define S_028244_BR_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 5454#define G_028244_BR_Y(x) (((x) >> 16) & 0x7FFF) 5455#define C_028244_BR_Y 0x8000FFFF 5456#define R_028248_COHER_DEST_BASE_0 0x028248 5457#define R_02824C_COHER_DEST_BASE_1 0x02824C 5458#define R_028250_PA_SC_VPORT_SCISSOR_0_TL 0x028250 5459#define S_028250_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0) 5460#define G_028250_TL_X(x) (((x) >> 0) & 0x7FFF) 5461#define C_028250_TL_X 0xFFFF8000 5462#define S_028250_TL_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 5463#define G_028250_TL_Y(x) (((x) >> 16) & 0x7FFF) 5464#define C_028250_TL_Y 0x8000FFFF 5465#define S_028250_WINDOW_OFFSET_DISABLE(x) (((unsigned)(x) & 0x1) << 31) 5466#define G_028250_WINDOW_OFFSET_DISABLE(x) (((x) >> 31) & 0x1) 5467#define C_028250_WINDOW_OFFSET_DISABLE 0x7FFFFFFF 5468#define R_028254_PA_SC_VPORT_SCISSOR_0_BR 0x028254 5469#define S_028254_BR_X(x) (((unsigned)(x) & 0x7FFF) << 0) 5470#define G_028254_BR_X(x) (((x) >> 0) & 0x7FFF) 5471#define C_028254_BR_X 0xFFFF8000 5472#define S_028254_BR_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 5473#define G_028254_BR_Y(x) (((x) >> 16) & 0x7FFF) 5474#define C_028254_BR_Y 0x8000FFFF 5475#define R_028258_PA_SC_VPORT_SCISSOR_1_TL 0x028258 5476#define R_02825C_PA_SC_VPORT_SCISSOR_1_BR 0x02825C 5477#define R_028260_PA_SC_VPORT_SCISSOR_2_TL 0x028260 5478#define R_028264_PA_SC_VPORT_SCISSOR_2_BR 0x028264 5479#define R_028268_PA_SC_VPORT_SCISSOR_3_TL 0x028268 5480#define R_02826C_PA_SC_VPORT_SCISSOR_3_BR 0x02826C 5481#define R_028270_PA_SC_VPORT_SCISSOR_4_TL 0x028270 5482#define R_028274_PA_SC_VPORT_SCISSOR_4_BR 0x028274 5483#define R_028278_PA_SC_VPORT_SCISSOR_5_TL 0x028278 5484#define R_02827C_PA_SC_VPORT_SCISSOR_5_BR 0x02827C 5485#define R_028280_PA_SC_VPORT_SCISSOR_6_TL 0x028280 5486#define R_028284_PA_SC_VPORT_SCISSOR_6_BR 0x028284 5487#define R_028288_PA_SC_VPORT_SCISSOR_7_TL 0x028288 5488#define R_02828C_PA_SC_VPORT_SCISSOR_7_BR 0x02828C 5489#define R_028290_PA_SC_VPORT_SCISSOR_8_TL 0x028290 5490#define R_028294_PA_SC_VPORT_SCISSOR_8_BR 0x028294 5491#define R_028298_PA_SC_VPORT_SCISSOR_9_TL 0x028298 5492#define R_02829C_PA_SC_VPORT_SCISSOR_9_BR 0x02829C 5493#define R_0282A0_PA_SC_VPORT_SCISSOR_10_TL 0x0282A0 5494#define R_0282A4_PA_SC_VPORT_SCISSOR_10_BR 0x0282A4 5495#define R_0282A8_PA_SC_VPORT_SCISSOR_11_TL 0x0282A8 5496#define R_0282AC_PA_SC_VPORT_SCISSOR_11_BR 0x0282AC 5497#define R_0282B0_PA_SC_VPORT_SCISSOR_12_TL 0x0282B0 5498#define R_0282B4_PA_SC_VPORT_SCISSOR_12_BR 0x0282B4 5499#define R_0282B8_PA_SC_VPORT_SCISSOR_13_TL 0x0282B8 5500#define R_0282BC_PA_SC_VPORT_SCISSOR_13_BR 0x0282BC 5501#define R_0282C0_PA_SC_VPORT_SCISSOR_14_TL 0x0282C0 5502#define R_0282C4_PA_SC_VPORT_SCISSOR_14_BR 0x0282C4 5503#define R_0282C8_PA_SC_VPORT_SCISSOR_15_TL 0x0282C8 5504#define R_0282CC_PA_SC_VPORT_SCISSOR_15_BR 0x0282CC 5505#define R_0282D0_PA_SC_VPORT_ZMIN_0 0x0282D0 5506#define R_0282D4_PA_SC_VPORT_ZMAX_0 0x0282D4 5507#define R_0282D8_PA_SC_VPORT_ZMIN_1 0x0282D8 5508#define R_0282DC_PA_SC_VPORT_ZMAX_1 0x0282DC 5509#define R_0282E0_PA_SC_VPORT_ZMIN_2 0x0282E0 5510#define R_0282E4_PA_SC_VPORT_ZMAX_2 0x0282E4 5511#define R_0282E8_PA_SC_VPORT_ZMIN_3 0x0282E8 5512#define R_0282EC_PA_SC_VPORT_ZMAX_3 0x0282EC 5513#define R_0282F0_PA_SC_VPORT_ZMIN_4 0x0282F0 5514#define R_0282F4_PA_SC_VPORT_ZMAX_4 0x0282F4 5515#define R_0282F8_PA_SC_VPORT_ZMIN_5 0x0282F8 5516#define R_0282FC_PA_SC_VPORT_ZMAX_5 0x0282FC 5517#define R_028300_PA_SC_VPORT_ZMIN_6 0x028300 5518#define R_028304_PA_SC_VPORT_ZMAX_6 0x028304 5519#define R_028308_PA_SC_VPORT_ZMIN_7 0x028308 5520#define R_02830C_PA_SC_VPORT_ZMAX_7 0x02830C 5521#define R_028310_PA_SC_VPORT_ZMIN_8 0x028310 5522#define R_028314_PA_SC_VPORT_ZMAX_8 0x028314 5523#define R_028318_PA_SC_VPORT_ZMIN_9 0x028318 5524#define R_02831C_PA_SC_VPORT_ZMAX_9 0x02831C 5525#define R_028320_PA_SC_VPORT_ZMIN_10 0x028320 5526#define R_028324_PA_SC_VPORT_ZMAX_10 0x028324 5527#define R_028328_PA_SC_VPORT_ZMIN_11 0x028328 5528#define R_02832C_PA_SC_VPORT_ZMAX_11 0x02832C 5529#define R_028330_PA_SC_VPORT_ZMIN_12 0x028330 5530#define R_028334_PA_SC_VPORT_ZMAX_12 0x028334 5531#define R_028338_PA_SC_VPORT_ZMIN_13 0x028338 5532#define R_02833C_PA_SC_VPORT_ZMAX_13 0x02833C 5533#define R_028340_PA_SC_VPORT_ZMIN_14 0x028340 5534#define R_028344_PA_SC_VPORT_ZMAX_14 0x028344 5535#define R_028348_PA_SC_VPORT_ZMIN_15 0x028348 5536#define R_02834C_PA_SC_VPORT_ZMAX_15 0x02834C 5537#define R_028350_PA_SC_RASTER_CONFIG 0x028350 5538#define S_028350_RB_MAP_PKR0(x) (((unsigned)(x) & 0x03) << 0) 5539#define G_028350_RB_MAP_PKR0(x) (((x) >> 0) & 0x03) 5540#define C_028350_RB_MAP_PKR0 0xFFFFFFFC 5541#define V_028350_RASTER_CONFIG_RB_MAP_0 0x00 5542#define V_028350_RASTER_CONFIG_RB_MAP_1 0x01 5543#define V_028350_RASTER_CONFIG_RB_MAP_2 0x02 5544#define V_028350_RASTER_CONFIG_RB_MAP_3 0x03 5545#define S_028350_RB_MAP_PKR1(x) (((unsigned)(x) & 0x03) << 2) 5546#define G_028350_RB_MAP_PKR1(x) (((x) >> 2) & 0x03) 5547#define C_028350_RB_MAP_PKR1 0xFFFFFFF3 5548#define V_028350_RASTER_CONFIG_RB_MAP_0 0x00 5549#define V_028350_RASTER_CONFIG_RB_MAP_1 0x01 5550#define V_028350_RASTER_CONFIG_RB_MAP_2 0x02 5551#define V_028350_RASTER_CONFIG_RB_MAP_3 0x03 5552#define S_028350_RB_XSEL2(x) (((unsigned)(x) & 0x03) << 4) 5553#define G_028350_RB_XSEL2(x) (((x) >> 4) & 0x03) 5554#define C_028350_RB_XSEL2 0xFFFFFFCF 5555#define V_028350_RASTER_CONFIG_RB_XSEL2_0 0x00 5556#define V_028350_RASTER_CONFIG_RB_XSEL2_1 0x01 5557#define V_028350_RASTER_CONFIG_RB_XSEL2_2 0x02 5558#define V_028350_RASTER_CONFIG_RB_XSEL2_3 0x03 5559#define S_028350_RB_XSEL(x) (((unsigned)(x) & 0x1) << 6) 5560#define G_028350_RB_XSEL(x) (((x) >> 6) & 0x1) 5561#define C_028350_RB_XSEL 0xFFFFFFBF 5562#define S_028350_RB_YSEL(x) (((unsigned)(x) & 0x1) << 7) 5563#define G_028350_RB_YSEL(x) (((x) >> 7) & 0x1) 5564#define C_028350_RB_YSEL 0xFFFFFF7F 5565#define S_028350_PKR_MAP(x) (((unsigned)(x) & 0x03) << 8) 5566#define G_028350_PKR_MAP(x) (((x) >> 8) & 0x03) 5567#define C_028350_PKR_MAP 0xFFFFFCFF 5568#define V_028350_RASTER_CONFIG_PKR_MAP_0 0x00 5569#define V_028350_RASTER_CONFIG_PKR_MAP_1 0x01 5570#define V_028350_RASTER_CONFIG_PKR_MAP_2 0x02 5571#define V_028350_RASTER_CONFIG_PKR_MAP_3 0x03 5572#define S_028350_PKR_XSEL(x) (((unsigned)(x) & 0x03) << 10) 5573#define G_028350_PKR_XSEL(x) (((x) >> 10) & 0x03) 5574#define C_028350_PKR_XSEL 0xFFFFF3FF 5575#define V_028350_RASTER_CONFIG_PKR_XSEL_0 0x00 5576#define V_028350_RASTER_CONFIG_PKR_XSEL_1 0x01 5577#define V_028350_RASTER_CONFIG_PKR_XSEL_2 0x02 5578#define V_028350_RASTER_CONFIG_PKR_XSEL_3 0x03 5579#define S_028350_PKR_YSEL(x) (((unsigned)(x) & 0x03) << 12) 5580#define G_028350_PKR_YSEL(x) (((x) >> 12) & 0x03) 5581#define C_028350_PKR_YSEL 0xFFFFCFFF 5582#define V_028350_RASTER_CONFIG_PKR_YSEL_0 0x00 5583#define V_028350_RASTER_CONFIG_PKR_YSEL_1 0x01 5584#define V_028350_RASTER_CONFIG_PKR_YSEL_2 0x02 5585#define V_028350_RASTER_CONFIG_PKR_YSEL_3 0x03 5586#define S_028350_PKR_XSEL2(x) (((unsigned)(x) & 0x03) << 14) 5587#define G_028350_PKR_XSEL2(x) (((x) >> 14) & 0x03) 5588#define C_028350_PKR_XSEL2 0xFFFF3FFF 5589#define V_028350_RASTER_CONFIG_PKR_XSEL2_0 0x00 5590#define V_028350_RASTER_CONFIG_PKR_XSEL2_1 0x01 5591#define V_028350_RASTER_CONFIG_PKR_XSEL2_2 0x02 5592#define V_028350_RASTER_CONFIG_PKR_XSEL2_3 0x03 5593#define S_028350_SC_MAP(x) (((unsigned)(x) & 0x03) << 16) 5594#define G_028350_SC_MAP(x) (((x) >> 16) & 0x03) 5595#define C_028350_SC_MAP 0xFFFCFFFF 5596#define V_028350_RASTER_CONFIG_SC_MAP_0 0x00 5597#define V_028350_RASTER_CONFIG_SC_MAP_1 0x01 5598#define V_028350_RASTER_CONFIG_SC_MAP_2 0x02 5599#define V_028350_RASTER_CONFIG_SC_MAP_3 0x03 5600#define S_028350_SC_XSEL(x) (((unsigned)(x) & 0x03) << 18) 5601#define G_028350_SC_XSEL(x) (((x) >> 18) & 0x03) 5602#define C_028350_SC_XSEL 0xFFF3FFFF 5603#define V_028350_RASTER_CONFIG_SC_XSEL_8_WIDE_TILE 0x00 5604#define V_028350_RASTER_CONFIG_SC_XSEL_16_WIDE_TILE 0x01 5605#define V_028350_RASTER_CONFIG_SC_XSEL_32_WIDE_TILE 0x02 5606#define V_028350_RASTER_CONFIG_SC_XSEL_64_WIDE_TILE 0x03 5607#define S_028350_SC_YSEL(x) (((unsigned)(x) & 0x03) << 20) 5608#define G_028350_SC_YSEL(x) (((x) >> 20) & 0x03) 5609#define C_028350_SC_YSEL 0xFFCFFFFF 5610#define V_028350_RASTER_CONFIG_SC_YSEL_8_WIDE_TILE 0x00 5611#define V_028350_RASTER_CONFIG_SC_YSEL_16_WIDE_TILE 0x01 5612#define V_028350_RASTER_CONFIG_SC_YSEL_32_WIDE_TILE 0x02 5613#define V_028350_RASTER_CONFIG_SC_YSEL_64_WIDE_TILE 0x03 5614#define S_028350_SE_MAP(x) (((unsigned)(x) & 0x03) << 24) 5615#define G_028350_SE_MAP(x) (((x) >> 24) & 0x03) 5616#define C_028350_SE_MAP 0xFCFFFFFF 5617#define V_028350_RASTER_CONFIG_SE_MAP_0 0x00 5618#define V_028350_RASTER_CONFIG_SE_MAP_1 0x01 5619#define V_028350_RASTER_CONFIG_SE_MAP_2 0x02 5620#define V_028350_RASTER_CONFIG_SE_MAP_3 0x03 5621#define S_028350_SE_XSEL_GFX6(x) (((unsigned)(x) & 0x03) << 26) 5622#define G_028350_SE_XSEL_GFX6(x) (((x) >> 26) & 0x03) 5623#define C_028350_SE_XSEL_GFX6 0xF3FFFFFF 5624#define V_028350_RASTER_CONFIG_SE_XSEL_8_WIDE_TILE 0x00 5625#define V_028350_RASTER_CONFIG_SE_XSEL_16_WIDE_TILE 0x01 5626#define V_028350_RASTER_CONFIG_SE_XSEL_32_WIDE_TILE 0x02 5627#define V_028350_RASTER_CONFIG_SE_XSEL_64_WIDE_TILE 0x03 5628#define S_028350_SE_YSEL_GFX6(x) (((unsigned)(x) & 0x03) << 28) 5629#define G_028350_SE_YSEL_GFX6(x) (((x) >> 28) & 0x03) 5630#define C_028350_SE_YSEL_GFX6 0xCFFFFFFF 5631#define V_028350_RASTER_CONFIG_SE_YSEL_8_WIDE_TILE 0x00 5632#define V_028350_RASTER_CONFIG_SE_YSEL_16_WIDE_TILE 0x01 5633#define V_028350_RASTER_CONFIG_SE_YSEL_32_WIDE_TILE 0x02 5634#define V_028350_RASTER_CONFIG_SE_YSEL_64_WIDE_TILE 0x03 5635/* CIK */ 5636#define R_028354_PA_SC_RASTER_CONFIG_1 0x028354 5637#define S_028354_SE_PAIR_MAP(x) (((unsigned)(x) & 0x03) << 0) 5638#define G_028354_SE_PAIR_MAP(x) (((x) >> 0) & 0x03) 5639#define C_028354_SE_PAIR_MAP 0xFFFFFFFC 5640#define V_028354_RASTER_CONFIG_SE_PAIR_MAP_0 0x00 5641#define V_028354_RASTER_CONFIG_SE_PAIR_MAP_1 0x01 5642#define V_028354_RASTER_CONFIG_SE_PAIR_MAP_2 0x02 5643#define V_028354_RASTER_CONFIG_SE_PAIR_MAP_3 0x03 5644#define S_028354_SE_PAIR_XSEL_GFX6(x) (((unsigned)(x) & 0x03) << 2) 5645#define G_028354_SE_PAIR_XSEL_GFX6(x) (((x) >> 2) & 0x03) 5646#define C_028354_SE_PAIR_XSEL_GFX6 0xFFFFFFF3 5647#define V_028354_RASTER_CONFIG_SE_PAIR_XSEL_8_WIDE_TILE 0x00 5648#define V_028354_RASTER_CONFIG_SE_PAIR_XSEL_16_WIDE_TILE 0x01 5649#define V_028354_RASTER_CONFIG_SE_PAIR_XSEL_32_WIDE_TILE 0x02 5650#define V_028354_RASTER_CONFIG_SE_PAIR_XSEL_64_WIDE_TILE 0x03 5651#define S_028354_SE_PAIR_YSEL_GFX6(x) (((unsigned)(x) & 0x03) << 4) 5652#define G_028354_SE_PAIR_YSEL_GFX6(x) (((x) >> 4) & 0x03) 5653#define C_028354_SE_PAIR_YSEL_GFX6 0xFFFFFFCF 5654#define V_028354_RASTER_CONFIG_SE_PAIR_YSEL_8_WIDE_TILE 0x00 5655#define V_028354_RASTER_CONFIG_SE_PAIR_YSEL_16_WIDE_TILE 0x01 5656#define V_028354_RASTER_CONFIG_SE_PAIR_YSEL_32_WIDE_TILE 0x02 5657#define V_028354_RASTER_CONFIG_SE_PAIR_YSEL_64_WIDE_TILE 0x03 5658#define R_028358_PA_SC_SCREEN_EXTENT_CONTROL 0x028358 5659#define S_028358_SLICE_EVEN_ENABLE(x) (((unsigned)(x) & 0x03) << 0) 5660#define G_028358_SLICE_EVEN_ENABLE(x) (((x) >> 0) & 0x03) 5661#define C_028358_SLICE_EVEN_ENABLE 0xFFFFFFFC 5662#define S_028358_SLICE_ODD_ENABLE(x) (((unsigned)(x) & 0x03) << 2) 5663#define G_028358_SLICE_ODD_ENABLE(x) (((x) >> 2) & 0x03) 5664#define C_028358_SLICE_ODD_ENABLE 0xFFFFFFF3 5665/* */ 5666#define R_028400_VGT_MAX_VTX_INDX 0x028400 5667#define R_028404_VGT_MIN_VTX_INDX 0x028404 5668#define R_028408_VGT_INDX_OFFSET 0x028408 5669#define R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX 0x02840C 5670#define R_028414_CB_BLEND_RED 0x028414 5671#define R_028418_CB_BLEND_GREEN 0x028418 5672#define R_02841C_CB_BLEND_BLUE 0x02841C 5673#define R_028420_CB_BLEND_ALPHA 0x028420 5674/* VI */ 5675#define R_028424_CB_DCC_CONTROL 0x028424 5676#define S_028424_OVERWRITE_COMBINER_DISABLE(x) (((unsigned)(x) & 0x1) << 0) 5677#define G_028424_OVERWRITE_COMBINER_DISABLE(x) (((x) >> 0) & 0x1) 5678#define C_028424_OVERWRITE_COMBINER_DISABLE 0xFFFFFFFE 5679#define S_028424_OVERWRITE_COMBINER_MRT_SHARING_DISABLE(x) (((unsigned)(x) & 0x1) << 1) 5680#define G_028424_OVERWRITE_COMBINER_MRT_SHARING_DISABLE(x) (((x) >> 1) & 0x1) 5681#define C_028424_OVERWRITE_COMBINER_MRT_SHARING_DISABLE 0xFFFFFFFD 5682#define S_028424_OVERWRITE_COMBINER_WATERMARK(x) (((unsigned)(x) & 0x1F) << 2) 5683#define G_028424_OVERWRITE_COMBINER_WATERMARK(x) (((x) >> 2) & 0x1F) 5684#define C_028424_OVERWRITE_COMBINER_WATERMARK 0xFFFFFF83 5685/* */ 5686#define R_02842C_DB_STENCIL_CONTROL 0x02842C 5687#define S_02842C_STENCILFAIL(x) (((unsigned)(x) & 0x0F) << 0) 5688#define G_02842C_STENCILFAIL(x) (((x) >> 0) & 0x0F) 5689#define C_02842C_STENCILFAIL 0xFFFFFFF0 5690#define V_02842C_STENCIL_KEEP 0x00 5691#define V_02842C_STENCIL_ZERO 0x01 5692#define V_02842C_STENCIL_ONES 0x02 5693#define V_02842C_STENCIL_REPLACE_TEST 0x03 5694#define V_02842C_STENCIL_REPLACE_OP 0x04 5695#define V_02842C_STENCIL_ADD_CLAMP 0x05 5696#define V_02842C_STENCIL_SUB_CLAMP 0x06 5697#define V_02842C_STENCIL_INVERT 0x07 5698#define V_02842C_STENCIL_ADD_WRAP 0x08 5699#define V_02842C_STENCIL_SUB_WRAP 0x09 5700#define V_02842C_STENCIL_AND 0x0A 5701#define V_02842C_STENCIL_OR 0x0B 5702#define V_02842C_STENCIL_XOR 0x0C 5703#define V_02842C_STENCIL_NAND 0x0D 5704#define V_02842C_STENCIL_NOR 0x0E 5705#define V_02842C_STENCIL_XNOR 0x0F 5706#define S_02842C_STENCILZPASS(x) (((unsigned)(x) & 0x0F) << 4) 5707#define G_02842C_STENCILZPASS(x) (((x) >> 4) & 0x0F) 5708#define C_02842C_STENCILZPASS 0xFFFFFF0F 5709#define V_02842C_STENCIL_KEEP 0x00 5710#define V_02842C_STENCIL_ZERO 0x01 5711#define V_02842C_STENCIL_ONES 0x02 5712#define V_02842C_STENCIL_REPLACE_TEST 0x03 5713#define V_02842C_STENCIL_REPLACE_OP 0x04 5714#define V_02842C_STENCIL_ADD_CLAMP 0x05 5715#define V_02842C_STENCIL_SUB_CLAMP 0x06 5716#define V_02842C_STENCIL_INVERT 0x07 5717#define V_02842C_STENCIL_ADD_WRAP 0x08 5718#define V_02842C_STENCIL_SUB_WRAP 0x09 5719#define V_02842C_STENCIL_AND 0x0A 5720#define V_02842C_STENCIL_OR 0x0B 5721#define V_02842C_STENCIL_XOR 0x0C 5722#define V_02842C_STENCIL_NAND 0x0D 5723#define V_02842C_STENCIL_NOR 0x0E 5724#define V_02842C_STENCIL_XNOR 0x0F 5725#define S_02842C_STENCILZFAIL(x) (((unsigned)(x) & 0x0F) << 8) 5726#define G_02842C_STENCILZFAIL(x) (((x) >> 8) & 0x0F) 5727#define C_02842C_STENCILZFAIL 0xFFFFF0FF 5728#define V_02842C_STENCIL_KEEP 0x00 5729#define V_02842C_STENCIL_ZERO 0x01 5730#define V_02842C_STENCIL_ONES 0x02 5731#define V_02842C_STENCIL_REPLACE_TEST 0x03 5732#define V_02842C_STENCIL_REPLACE_OP 0x04 5733#define V_02842C_STENCIL_ADD_CLAMP 0x05 5734#define V_02842C_STENCIL_SUB_CLAMP 0x06 5735#define V_02842C_STENCIL_INVERT 0x07 5736#define V_02842C_STENCIL_ADD_WRAP 0x08 5737#define V_02842C_STENCIL_SUB_WRAP 0x09 5738#define V_02842C_STENCIL_AND 0x0A 5739#define V_02842C_STENCIL_OR 0x0B 5740#define V_02842C_STENCIL_XOR 0x0C 5741#define V_02842C_STENCIL_NAND 0x0D 5742#define V_02842C_STENCIL_NOR 0x0E 5743#define V_02842C_STENCIL_XNOR 0x0F 5744#define S_02842C_STENCILFAIL_BF(x) (((unsigned)(x) & 0x0F) << 12) 5745#define G_02842C_STENCILFAIL_BF(x) (((x) >> 12) & 0x0F) 5746#define C_02842C_STENCILFAIL_BF 0xFFFF0FFF 5747#define V_02842C_STENCIL_KEEP 0x00 5748#define V_02842C_STENCIL_ZERO 0x01 5749#define V_02842C_STENCIL_ONES 0x02 5750#define V_02842C_STENCIL_REPLACE_TEST 0x03 5751#define V_02842C_STENCIL_REPLACE_OP 0x04 5752#define V_02842C_STENCIL_ADD_CLAMP 0x05 5753#define V_02842C_STENCIL_SUB_CLAMP 0x06 5754#define V_02842C_STENCIL_INVERT 0x07 5755#define V_02842C_STENCIL_ADD_WRAP 0x08 5756#define V_02842C_STENCIL_SUB_WRAP 0x09 5757#define V_02842C_STENCIL_AND 0x0A 5758#define V_02842C_STENCIL_OR 0x0B 5759#define V_02842C_STENCIL_XOR 0x0C 5760#define V_02842C_STENCIL_NAND 0x0D 5761#define V_02842C_STENCIL_NOR 0x0E 5762#define V_02842C_STENCIL_XNOR 0x0F 5763#define S_02842C_STENCILZPASS_BF(x) (((unsigned)(x) & 0x0F) << 16) 5764#define G_02842C_STENCILZPASS_BF(x) (((x) >> 16) & 0x0F) 5765#define C_02842C_STENCILZPASS_BF 0xFFF0FFFF 5766#define V_02842C_STENCIL_KEEP 0x00 5767#define V_02842C_STENCIL_ZERO 0x01 5768#define V_02842C_STENCIL_ONES 0x02 5769#define V_02842C_STENCIL_REPLACE_TEST 0x03 5770#define V_02842C_STENCIL_REPLACE_OP 0x04 5771#define V_02842C_STENCIL_ADD_CLAMP 0x05 5772#define V_02842C_STENCIL_SUB_CLAMP 0x06 5773#define V_02842C_STENCIL_INVERT 0x07 5774#define V_02842C_STENCIL_ADD_WRAP 0x08 5775#define V_02842C_STENCIL_SUB_WRAP 0x09 5776#define V_02842C_STENCIL_AND 0x0A 5777#define V_02842C_STENCIL_OR 0x0B 5778#define V_02842C_STENCIL_XOR 0x0C 5779#define V_02842C_STENCIL_NAND 0x0D 5780#define V_02842C_STENCIL_NOR 0x0E 5781#define V_02842C_STENCIL_XNOR 0x0F 5782#define S_02842C_STENCILZFAIL_BF(x) (((unsigned)(x) & 0x0F) << 20) 5783#define G_02842C_STENCILZFAIL_BF(x) (((x) >> 20) & 0x0F) 5784#define C_02842C_STENCILZFAIL_BF 0xFF0FFFFF 5785#define V_02842C_STENCIL_KEEP 0x00 5786#define V_02842C_STENCIL_ZERO 0x01 5787#define V_02842C_STENCIL_ONES 0x02 5788#define V_02842C_STENCIL_REPLACE_TEST 0x03 5789#define V_02842C_STENCIL_REPLACE_OP 0x04 5790#define V_02842C_STENCIL_ADD_CLAMP 0x05 5791#define V_02842C_STENCIL_SUB_CLAMP 0x06 5792#define V_02842C_STENCIL_INVERT 0x07 5793#define V_02842C_STENCIL_ADD_WRAP 0x08 5794#define V_02842C_STENCIL_SUB_WRAP 0x09 5795#define V_02842C_STENCIL_AND 0x0A 5796#define V_02842C_STENCIL_OR 0x0B 5797#define V_02842C_STENCIL_XOR 0x0C 5798#define V_02842C_STENCIL_NAND 0x0D 5799#define V_02842C_STENCIL_NOR 0x0E 5800#define V_02842C_STENCIL_XNOR 0x0F 5801#define R_028430_DB_STENCILREFMASK 0x028430 5802#define S_028430_STENCILTESTVAL(x) (((unsigned)(x) & 0xFF) << 0) 5803#define G_028430_STENCILTESTVAL(x) (((x) >> 0) & 0xFF) 5804#define C_028430_STENCILTESTVAL 0xFFFFFF00 5805#define S_028430_STENCILMASK(x) (((unsigned)(x) & 0xFF) << 8) 5806#define G_028430_STENCILMASK(x) (((x) >> 8) & 0xFF) 5807#define C_028430_STENCILMASK 0xFFFF00FF 5808#define S_028430_STENCILWRITEMASK(x) (((unsigned)(x) & 0xFF) << 16) 5809#define G_028430_STENCILWRITEMASK(x) (((x) >> 16) & 0xFF) 5810#define C_028430_STENCILWRITEMASK 0xFF00FFFF 5811#define S_028430_STENCILOPVAL(x) (((unsigned)(x) & 0xFF) << 24) 5812#define G_028430_STENCILOPVAL(x) (((x) >> 24) & 0xFF) 5813#define C_028430_STENCILOPVAL 0x00FFFFFF 5814#define R_028434_DB_STENCILREFMASK_BF 0x028434 5815#define S_028434_STENCILTESTVAL_BF(x) (((unsigned)(x) & 0xFF) << 0) 5816#define G_028434_STENCILTESTVAL_BF(x) (((x) >> 0) & 0xFF) 5817#define C_028434_STENCILTESTVAL_BF 0xFFFFFF00 5818#define S_028434_STENCILMASK_BF(x) (((unsigned)(x) & 0xFF) << 8) 5819#define G_028434_STENCILMASK_BF(x) (((x) >> 8) & 0xFF) 5820#define C_028434_STENCILMASK_BF 0xFFFF00FF 5821#define S_028434_STENCILWRITEMASK_BF(x) (((unsigned)(x) & 0xFF) << 16) 5822#define G_028434_STENCILWRITEMASK_BF(x) (((x) >> 16) & 0xFF) 5823#define C_028434_STENCILWRITEMASK_BF 0xFF00FFFF 5824#define S_028434_STENCILOPVAL_BF(x) (((unsigned)(x) & 0xFF) << 24) 5825#define G_028434_STENCILOPVAL_BF(x) (((x) >> 24) & 0xFF) 5826#define C_028434_STENCILOPVAL_BF 0x00FFFFFF 5827#define R_02843C_PA_CL_VPORT_XSCALE 0x02843C 5828#define R_028440_PA_CL_VPORT_XOFFSET 0x028440 5829#define R_028444_PA_CL_VPORT_YSCALE 0x028444 5830#define R_028448_PA_CL_VPORT_YOFFSET 0x028448 5831#define R_02844C_PA_CL_VPORT_ZSCALE 0x02844C 5832#define R_028450_PA_CL_VPORT_ZOFFSET 0x028450 5833#define R_028454_PA_CL_VPORT_XSCALE_1 0x028454 5834#define R_028458_PA_CL_VPORT_XOFFSET_1 0x028458 5835#define R_02845C_PA_CL_VPORT_YSCALE_1 0x02845C 5836#define R_028460_PA_CL_VPORT_YOFFSET_1 0x028460 5837#define R_028464_PA_CL_VPORT_ZSCALE_1 0x028464 5838#define R_028468_PA_CL_VPORT_ZOFFSET_1 0x028468 5839#define R_02846C_PA_CL_VPORT_XSCALE_2 0x02846C 5840#define R_028470_PA_CL_VPORT_XOFFSET_2 0x028470 5841#define R_028474_PA_CL_VPORT_YSCALE_2 0x028474 5842#define R_028478_PA_CL_VPORT_YOFFSET_2 0x028478 5843#define R_02847C_PA_CL_VPORT_ZSCALE_2 0x02847C 5844#define R_028480_PA_CL_VPORT_ZOFFSET_2 0x028480 5845#define R_028484_PA_CL_VPORT_XSCALE_3 0x028484 5846#define R_028488_PA_CL_VPORT_XOFFSET_3 0x028488 5847#define R_02848C_PA_CL_VPORT_YSCALE_3 0x02848C 5848#define R_028490_PA_CL_VPORT_YOFFSET_3 0x028490 5849#define R_028494_PA_CL_VPORT_ZSCALE_3 0x028494 5850#define R_028498_PA_CL_VPORT_ZOFFSET_3 0x028498 5851#define R_02849C_PA_CL_VPORT_XSCALE_4 0x02849C 5852#define R_0284A0_PA_CL_VPORT_XOFFSET_4 0x0284A0 5853#define R_0284A4_PA_CL_VPORT_YSCALE_4 0x0284A4 5854#define R_0284A8_PA_CL_VPORT_YOFFSET_4 0x0284A8 5855#define R_0284AC_PA_CL_VPORT_ZSCALE_4 0x0284AC 5856#define R_0284B0_PA_CL_VPORT_ZOFFSET_4 0x0284B0 5857#define R_0284B4_PA_CL_VPORT_XSCALE_5 0x0284B4 5858#define R_0284B8_PA_CL_VPORT_XOFFSET_5 0x0284B8 5859#define R_0284BC_PA_CL_VPORT_YSCALE_5 0x0284BC 5860#define R_0284C0_PA_CL_VPORT_YOFFSET_5 0x0284C0 5861#define R_0284C4_PA_CL_VPORT_ZSCALE_5 0x0284C4 5862#define R_0284C8_PA_CL_VPORT_ZOFFSET_5 0x0284C8 5863#define R_0284CC_PA_CL_VPORT_XSCALE_6 0x0284CC 5864#define R_0284D0_PA_CL_VPORT_XOFFSET_6 0x0284D0 5865#define R_0284D4_PA_CL_VPORT_YSCALE_6 0x0284D4 5866#define R_0284D8_PA_CL_VPORT_YOFFSET_6 0x0284D8 5867#define R_0284DC_PA_CL_VPORT_ZSCALE_6 0x0284DC 5868#define R_0284E0_PA_CL_VPORT_ZOFFSET_6 0x0284E0 5869#define R_0284E4_PA_CL_VPORT_XSCALE_7 0x0284E4 5870#define R_0284E8_PA_CL_VPORT_XOFFSET_7 0x0284E8 5871#define R_0284EC_PA_CL_VPORT_YSCALE_7 0x0284EC 5872#define R_0284F0_PA_CL_VPORT_YOFFSET_7 0x0284F0 5873#define R_0284F4_PA_CL_VPORT_ZSCALE_7 0x0284F4 5874#define R_0284F8_PA_CL_VPORT_ZOFFSET_7 0x0284F8 5875#define R_0284FC_PA_CL_VPORT_XSCALE_8 0x0284FC 5876#define R_028500_PA_CL_VPORT_XOFFSET_8 0x028500 5877#define R_028504_PA_CL_VPORT_YSCALE_8 0x028504 5878#define R_028508_PA_CL_VPORT_YOFFSET_8 0x028508 5879#define R_02850C_PA_CL_VPORT_ZSCALE_8 0x02850C 5880#define R_028510_PA_CL_VPORT_ZOFFSET_8 0x028510 5881#define R_028514_PA_CL_VPORT_XSCALE_9 0x028514 5882#define R_028518_PA_CL_VPORT_XOFFSET_9 0x028518 5883#define R_02851C_PA_CL_VPORT_YSCALE_9 0x02851C 5884#define R_028520_PA_CL_VPORT_YOFFSET_9 0x028520 5885#define R_028524_PA_CL_VPORT_ZSCALE_9 0x028524 5886#define R_028528_PA_CL_VPORT_ZOFFSET_9 0x028528 5887#define R_02852C_PA_CL_VPORT_XSCALE_10 0x02852C 5888#define R_028530_PA_CL_VPORT_XOFFSET_10 0x028530 5889#define R_028534_PA_CL_VPORT_YSCALE_10 0x028534 5890#define R_028538_PA_CL_VPORT_YOFFSET_10 0x028538 5891#define R_02853C_PA_CL_VPORT_ZSCALE_10 0x02853C 5892#define R_028540_PA_CL_VPORT_ZOFFSET_10 0x028540 5893#define R_028544_PA_CL_VPORT_XSCALE_11 0x028544 5894#define R_028548_PA_CL_VPORT_XOFFSET_11 0x028548 5895#define R_02854C_PA_CL_VPORT_YSCALE_11 0x02854C 5896#define R_028550_PA_CL_VPORT_YOFFSET_11 0x028550 5897#define R_028554_PA_CL_VPORT_ZSCALE_11 0x028554 5898#define R_028558_PA_CL_VPORT_ZOFFSET_11 0x028558 5899#define R_02855C_PA_CL_VPORT_XSCALE_12 0x02855C 5900#define R_028560_PA_CL_VPORT_XOFFSET_12 0x028560 5901#define R_028564_PA_CL_VPORT_YSCALE_12 0x028564 5902#define R_028568_PA_CL_VPORT_YOFFSET_12 0x028568 5903#define R_02856C_PA_CL_VPORT_ZSCALE_12 0x02856C 5904#define R_028570_PA_CL_VPORT_ZOFFSET_12 0x028570 5905#define R_028574_PA_CL_VPORT_XSCALE_13 0x028574 5906#define R_028578_PA_CL_VPORT_XOFFSET_13 0x028578 5907#define R_02857C_PA_CL_VPORT_YSCALE_13 0x02857C 5908#define R_028580_PA_CL_VPORT_YOFFSET_13 0x028580 5909#define R_028584_PA_CL_VPORT_ZSCALE_13 0x028584 5910#define R_028588_PA_CL_VPORT_ZOFFSET_13 0x028588 5911#define R_02858C_PA_CL_VPORT_XSCALE_14 0x02858C 5912#define R_028590_PA_CL_VPORT_XOFFSET_14 0x028590 5913#define R_028594_PA_CL_VPORT_YSCALE_14 0x028594 5914#define R_028598_PA_CL_VPORT_YOFFSET_14 0x028598 5915#define R_02859C_PA_CL_VPORT_ZSCALE_14 0x02859C 5916#define R_0285A0_PA_CL_VPORT_ZOFFSET_14 0x0285A0 5917#define R_0285A4_PA_CL_VPORT_XSCALE_15 0x0285A4 5918#define R_0285A8_PA_CL_VPORT_XOFFSET_15 0x0285A8 5919#define R_0285AC_PA_CL_VPORT_YSCALE_15 0x0285AC 5920#define R_0285B0_PA_CL_VPORT_YOFFSET_15 0x0285B0 5921#define R_0285B4_PA_CL_VPORT_ZSCALE_15 0x0285B4 5922#define R_0285B8_PA_CL_VPORT_ZOFFSET_15 0x0285B8 5923#define R_0285BC_PA_CL_UCP_0_X 0x0285BC 5924#define R_0285C0_PA_CL_UCP_0_Y 0x0285C0 5925#define R_0285C4_PA_CL_UCP_0_Z 0x0285C4 5926#define R_0285C8_PA_CL_UCP_0_W 0x0285C8 5927#define R_0285CC_PA_CL_UCP_1_X 0x0285CC 5928#define R_0285D0_PA_CL_UCP_1_Y 0x0285D0 5929#define R_0285D4_PA_CL_UCP_1_Z 0x0285D4 5930#define R_0285D8_PA_CL_UCP_1_W 0x0285D8 5931#define R_0285DC_PA_CL_UCP_2_X 0x0285DC 5932#define R_0285E0_PA_CL_UCP_2_Y 0x0285E0 5933#define R_0285E4_PA_CL_UCP_2_Z 0x0285E4 5934#define R_0285E8_PA_CL_UCP_2_W 0x0285E8 5935#define R_0285EC_PA_CL_UCP_3_X 0x0285EC 5936#define R_0285F0_PA_CL_UCP_3_Y 0x0285F0 5937#define R_0285F4_PA_CL_UCP_3_Z 0x0285F4 5938#define R_0285F8_PA_CL_UCP_3_W 0x0285F8 5939#define R_0285FC_PA_CL_UCP_4_X 0x0285FC 5940#define R_028600_PA_CL_UCP_4_Y 0x028600 5941#define R_028604_PA_CL_UCP_4_Z 0x028604 5942#define R_028608_PA_CL_UCP_4_W 0x028608 5943#define R_02860C_PA_CL_UCP_5_X 0x02860C 5944#define R_028610_PA_CL_UCP_5_Y 0x028610 5945#define R_028614_PA_CL_UCP_5_Z 0x028614 5946#define R_028618_PA_CL_UCP_5_W 0x028618 5947#define R_028644_SPI_PS_INPUT_CNTL_0 0x028644 5948#define S_028644_OFFSET(x) (((unsigned)(x) & 0x3F) << 0) 5949#define G_028644_OFFSET(x) (((x) >> 0) & 0x3F) 5950#define C_028644_OFFSET 0xFFFFFFC0 5951#define S_028644_DEFAULT_VAL(x) (((unsigned)(x) & 0x03) << 8) 5952#define G_028644_DEFAULT_VAL(x) (((x) >> 8) & 0x03) 5953#define C_028644_DEFAULT_VAL 0xFFFFFCFF 5954#define V_028644_X_0_0F 0x00 5955#define S_028644_FLAT_SHADE(x) (((unsigned)(x) & 0x1) << 10) 5956#define G_028644_FLAT_SHADE(x) (((x) >> 10) & 0x1) 5957#define C_028644_FLAT_SHADE 0xFFFFFBFF 5958#define S_028644_CYL_WRAP(x) (((unsigned)(x) & 0x0F) << 13) 5959#define G_028644_CYL_WRAP(x) (((x) >> 13) & 0x0F) 5960#define C_028644_CYL_WRAP 0xFFFE1FFF 5961#define S_028644_PT_SPRITE_TEX(x) (((unsigned)(x) & 0x1) << 17) 5962#define G_028644_PT_SPRITE_TEX(x) (((x) >> 17) & 0x1) 5963#define C_028644_PT_SPRITE_TEX 0xFFFDFFFF 5964/* CIK */ 5965#define S_028644_DUP(x) (((unsigned)(x) & 0x1) << 18) 5966#define G_028644_DUP(x) (((x) >> 18) & 0x1) 5967#define C_028644_DUP 0xFFFBFFFF 5968/* */ 5969/* VI */ 5970#define S_028644_FP16_INTERP_MODE(x) (((unsigned)(x) & 0x1) << 19) 5971#define G_028644_FP16_INTERP_MODE(x) (((x) >> 19) & 0x1) 5972#define C_028644_FP16_INTERP_MODE 0xFFF7FFFF 5973#define S_028644_USE_DEFAULT_ATTR1(x) (((unsigned)(x) & 0x1) << 20) 5974#define G_028644_USE_DEFAULT_ATTR1(x) (((x) >> 20) & 0x1) 5975#define C_028644_USE_DEFAULT_ATTR1 0xFFEFFFFF 5976#define S_028644_DEFAULT_VAL_ATTR1(x) (((unsigned)(x) & 0x03) << 21) 5977#define G_028644_DEFAULT_VAL_ATTR1(x) (((x) >> 21) & 0x03) 5978#define C_028644_DEFAULT_VAL_ATTR1 0xFF9FFFFF 5979#define S_028644_PT_SPRITE_TEX_ATTR1(x) (((unsigned)(x) & 0x1) << 23) 5980#define G_028644_PT_SPRITE_TEX_ATTR1(x) (((x) >> 23) & 0x1) 5981#define C_028644_PT_SPRITE_TEX_ATTR1 0xFF7FFFFF 5982#define S_028644_ATTR0_VALID(x) (((unsigned)(x) & 0x1) << 24) 5983#define G_028644_ATTR0_VALID(x) (((x) >> 24) & 0x1) 5984#define C_028644_ATTR0_VALID 0xFEFFFFFF 5985#define S_028644_ATTR1_VALID(x) (((unsigned)(x) & 0x1) << 25) 5986#define G_028644_ATTR1_VALID(x) (((x) >> 25) & 0x1) 5987#define C_028644_ATTR1_VALID 0xFDFFFFFF 5988/* */ 5989#define R_028648_SPI_PS_INPUT_CNTL_1 0x028648 5990#define R_02864C_SPI_PS_INPUT_CNTL_2 0x02864C 5991#define R_028650_SPI_PS_INPUT_CNTL_3 0x028650 5992#define R_028654_SPI_PS_INPUT_CNTL_4 0x028654 5993#define R_028658_SPI_PS_INPUT_CNTL_5 0x028658 5994#define R_02865C_SPI_PS_INPUT_CNTL_6 0x02865C 5995#define R_028660_SPI_PS_INPUT_CNTL_7 0x028660 5996#define R_028664_SPI_PS_INPUT_CNTL_8 0x028664 5997#define R_028668_SPI_PS_INPUT_CNTL_9 0x028668 5998#define R_02866C_SPI_PS_INPUT_CNTL_10 0x02866C 5999#define R_028670_SPI_PS_INPUT_CNTL_11 0x028670 6000#define R_028674_SPI_PS_INPUT_CNTL_12 0x028674 6001#define R_028678_SPI_PS_INPUT_CNTL_13 0x028678 6002#define R_02867C_SPI_PS_INPUT_CNTL_14 0x02867C 6003#define R_028680_SPI_PS_INPUT_CNTL_15 0x028680 6004#define R_028684_SPI_PS_INPUT_CNTL_16 0x028684 6005#define R_028688_SPI_PS_INPUT_CNTL_17 0x028688 6006#define R_02868C_SPI_PS_INPUT_CNTL_18 0x02868C 6007#define R_028690_SPI_PS_INPUT_CNTL_19 0x028690 6008#define R_028694_SPI_PS_INPUT_CNTL_20 0x028694 6009#define R_028698_SPI_PS_INPUT_CNTL_21 0x028698 6010#define R_02869C_SPI_PS_INPUT_CNTL_22 0x02869C 6011#define R_0286A0_SPI_PS_INPUT_CNTL_23 0x0286A0 6012#define R_0286A4_SPI_PS_INPUT_CNTL_24 0x0286A4 6013#define R_0286A8_SPI_PS_INPUT_CNTL_25 0x0286A8 6014#define R_0286AC_SPI_PS_INPUT_CNTL_26 0x0286AC 6015#define R_0286B0_SPI_PS_INPUT_CNTL_27 0x0286B0 6016#define R_0286B4_SPI_PS_INPUT_CNTL_28 0x0286B4 6017#define R_0286B8_SPI_PS_INPUT_CNTL_29 0x0286B8 6018#define R_0286BC_SPI_PS_INPUT_CNTL_30 0x0286BC 6019#define R_0286C0_SPI_PS_INPUT_CNTL_31 0x0286C0 6020#define R_0286C4_SPI_VS_OUT_CONFIG 0x0286C4 6021#define S_0286C4_VS_EXPORT_COUNT(x) (((unsigned)(x) & 0x1F) << 1) 6022#define G_0286C4_VS_EXPORT_COUNT(x) (((x) >> 1) & 0x1F) 6023#define C_0286C4_VS_EXPORT_COUNT 0xFFFFFFC1 6024#define S_0286C4_VS_HALF_PACK(x) (((unsigned)(x) & 0x1) << 6) 6025#define G_0286C4_VS_HALF_PACK(x) (((x) >> 6) & 0x1) 6026#define C_0286C4_VS_HALF_PACK 0xFFFFFFBF 6027#define S_0286C4_VS_EXPORTS_FOG(x) (((unsigned)(x) & 0x1) << 7) /* not on CIK */ 6028#define G_0286C4_VS_EXPORTS_FOG(x) (((x) >> 7) & 0x1) /* not on CIK */ 6029#define C_0286C4_VS_EXPORTS_FOG 0xFFFFFF7F /* not on CIK */ 6030#define S_0286C4_VS_OUT_FOG_VEC_ADDR(x) (((unsigned)(x) & 0x1F) << 8) /* not on CIK */ 6031#define G_0286C4_VS_OUT_FOG_VEC_ADDR(x) (((x) >> 8) & 0x1F) /* not on CIK */ 6032#define C_0286C4_VS_OUT_FOG_VEC_ADDR 0xFFFFE0FF /* not on CIK */ 6033#define R_0286CC_SPI_PS_INPUT_ENA 0x0286CC 6034#define S_0286CC_PERSP_SAMPLE_ENA(x) (((unsigned)(x) & 0x1) << 0) 6035#define G_0286CC_PERSP_SAMPLE_ENA(x) (((x) >> 0) & 0x1) 6036#define C_0286CC_PERSP_SAMPLE_ENA 0xFFFFFFFE 6037#define S_0286CC_PERSP_CENTER_ENA(x) (((unsigned)(x) & 0x1) << 1) 6038#define G_0286CC_PERSP_CENTER_ENA(x) (((x) >> 1) & 0x1) 6039#define C_0286CC_PERSP_CENTER_ENA 0xFFFFFFFD 6040#define S_0286CC_PERSP_CENTROID_ENA(x) (((unsigned)(x) & 0x1) << 2) 6041#define G_0286CC_PERSP_CENTROID_ENA(x) (((x) >> 2) & 0x1) 6042#define C_0286CC_PERSP_CENTROID_ENA 0xFFFFFFFB 6043#define S_0286CC_PERSP_PULL_MODEL_ENA(x) (((unsigned)(x) & 0x1) << 3) 6044#define G_0286CC_PERSP_PULL_MODEL_ENA(x) (((x) >> 3) & 0x1) 6045#define C_0286CC_PERSP_PULL_MODEL_ENA 0xFFFFFFF7 6046#define S_0286CC_LINEAR_SAMPLE_ENA(x) (((unsigned)(x) & 0x1) << 4) 6047#define G_0286CC_LINEAR_SAMPLE_ENA(x) (((x) >> 4) & 0x1) 6048#define C_0286CC_LINEAR_SAMPLE_ENA 0xFFFFFFEF 6049#define S_0286CC_LINEAR_CENTER_ENA(x) (((unsigned)(x) & 0x1) << 5) 6050#define G_0286CC_LINEAR_CENTER_ENA(x) (((x) >> 5) & 0x1) 6051#define C_0286CC_LINEAR_CENTER_ENA 0xFFFFFFDF 6052#define S_0286CC_LINEAR_CENTROID_ENA(x) (((unsigned)(x) & 0x1) << 6) 6053#define G_0286CC_LINEAR_CENTROID_ENA(x) (((x) >> 6) & 0x1) 6054#define C_0286CC_LINEAR_CENTROID_ENA 0xFFFFFFBF 6055#define S_0286CC_LINE_STIPPLE_TEX_ENA(x) (((unsigned)(x) & 0x1) << 7) 6056#define G_0286CC_LINE_STIPPLE_TEX_ENA(x) (((x) >> 7) & 0x1) 6057#define C_0286CC_LINE_STIPPLE_TEX_ENA 0xFFFFFF7F 6058#define S_0286CC_POS_X_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 8) 6059#define G_0286CC_POS_X_FLOAT_ENA(x) (((x) >> 8) & 0x1) 6060#define C_0286CC_POS_X_FLOAT_ENA 0xFFFFFEFF 6061#define S_0286CC_POS_Y_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 9) 6062#define G_0286CC_POS_Y_FLOAT_ENA(x) (((x) >> 9) & 0x1) 6063#define C_0286CC_POS_Y_FLOAT_ENA 0xFFFFFDFF 6064#define S_0286CC_POS_Z_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 10) 6065#define G_0286CC_POS_Z_FLOAT_ENA(x) (((x) >> 10) & 0x1) 6066#define C_0286CC_POS_Z_FLOAT_ENA 0xFFFFFBFF 6067#define S_0286CC_POS_W_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 11) 6068#define G_0286CC_POS_W_FLOAT_ENA(x) (((x) >> 11) & 0x1) 6069#define C_0286CC_POS_W_FLOAT_ENA 0xFFFFF7FF 6070#define S_0286CC_FRONT_FACE_ENA(x) (((unsigned)(x) & 0x1) << 12) 6071#define G_0286CC_FRONT_FACE_ENA(x) (((x) >> 12) & 0x1) 6072#define C_0286CC_FRONT_FACE_ENA 0xFFFFEFFF 6073#define S_0286CC_ANCILLARY_ENA(x) (((unsigned)(x) & 0x1) << 13) 6074#define G_0286CC_ANCILLARY_ENA(x) (((x) >> 13) & 0x1) 6075#define C_0286CC_ANCILLARY_ENA 0xFFFFDFFF 6076#define S_0286CC_SAMPLE_COVERAGE_ENA(x) (((unsigned)(x) & 0x1) << 14) 6077#define G_0286CC_SAMPLE_COVERAGE_ENA(x) (((x) >> 14) & 0x1) 6078#define C_0286CC_SAMPLE_COVERAGE_ENA 0xFFFFBFFF 6079#define S_0286CC_POS_FIXED_PT_ENA(x) (((unsigned)(x) & 0x1) << 15) 6080#define G_0286CC_POS_FIXED_PT_ENA(x) (((x) >> 15) & 0x1) 6081#define C_0286CC_POS_FIXED_PT_ENA 0xFFFF7FFF 6082#define R_0286D0_SPI_PS_INPUT_ADDR 0x0286D0 6083#define S_0286D0_PERSP_SAMPLE_ENA(x) (((unsigned)(x) & 0x1) << 0) 6084#define G_0286D0_PERSP_SAMPLE_ENA(x) (((x) >> 0) & 0x1) 6085#define C_0286D0_PERSP_SAMPLE_ENA 0xFFFFFFFE 6086#define S_0286D0_PERSP_CENTER_ENA(x) (((unsigned)(x) & 0x1) << 1) 6087#define G_0286D0_PERSP_CENTER_ENA(x) (((x) >> 1) & 0x1) 6088#define C_0286D0_PERSP_CENTER_ENA 0xFFFFFFFD 6089#define S_0286D0_PERSP_CENTROID_ENA(x) (((unsigned)(x) & 0x1) << 2) 6090#define G_0286D0_PERSP_CENTROID_ENA(x) (((x) >> 2) & 0x1) 6091#define C_0286D0_PERSP_CENTROID_ENA 0xFFFFFFFB 6092#define S_0286D0_PERSP_PULL_MODEL_ENA(x) (((unsigned)(x) & 0x1) << 3) 6093#define G_0286D0_PERSP_PULL_MODEL_ENA(x) (((x) >> 3) & 0x1) 6094#define C_0286D0_PERSP_PULL_MODEL_ENA 0xFFFFFFF7 6095#define S_0286D0_LINEAR_SAMPLE_ENA(x) (((unsigned)(x) & 0x1) << 4) 6096#define G_0286D0_LINEAR_SAMPLE_ENA(x) (((x) >> 4) & 0x1) 6097#define C_0286D0_LINEAR_SAMPLE_ENA 0xFFFFFFEF 6098#define S_0286D0_LINEAR_CENTER_ENA(x) (((unsigned)(x) & 0x1) << 5) 6099#define G_0286D0_LINEAR_CENTER_ENA(x) (((x) >> 5) & 0x1) 6100#define C_0286D0_LINEAR_CENTER_ENA 0xFFFFFFDF 6101#define S_0286D0_LINEAR_CENTROID_ENA(x) (((unsigned)(x) & 0x1) << 6) 6102#define G_0286D0_LINEAR_CENTROID_ENA(x) (((x) >> 6) & 0x1) 6103#define C_0286D0_LINEAR_CENTROID_ENA 0xFFFFFFBF 6104#define S_0286D0_LINE_STIPPLE_TEX_ENA(x) (((unsigned)(x) & 0x1) << 7) 6105#define G_0286D0_LINE_STIPPLE_TEX_ENA(x) (((x) >> 7) & 0x1) 6106#define C_0286D0_LINE_STIPPLE_TEX_ENA 0xFFFFFF7F 6107#define S_0286D0_POS_X_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 8) 6108#define G_0286D0_POS_X_FLOAT_ENA(x) (((x) >> 8) & 0x1) 6109#define C_0286D0_POS_X_FLOAT_ENA 0xFFFFFEFF 6110#define S_0286D0_POS_Y_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 9) 6111#define G_0286D0_POS_Y_FLOAT_ENA(x) (((x) >> 9) & 0x1) 6112#define C_0286D0_POS_Y_FLOAT_ENA 0xFFFFFDFF 6113#define S_0286D0_POS_Z_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 10) 6114#define G_0286D0_POS_Z_FLOAT_ENA(x) (((x) >> 10) & 0x1) 6115#define C_0286D0_POS_Z_FLOAT_ENA 0xFFFFFBFF 6116#define S_0286D0_POS_W_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 11) 6117#define G_0286D0_POS_W_FLOAT_ENA(x) (((x) >> 11) & 0x1) 6118#define C_0286D0_POS_W_FLOAT_ENA 0xFFFFF7FF 6119#define S_0286D0_FRONT_FACE_ENA(x) (((unsigned)(x) & 0x1) << 12) 6120#define G_0286D0_FRONT_FACE_ENA(x) (((x) >> 12) & 0x1) 6121#define C_0286D0_FRONT_FACE_ENA 0xFFFFEFFF 6122#define S_0286D0_ANCILLARY_ENA(x) (((unsigned)(x) & 0x1) << 13) 6123#define G_0286D0_ANCILLARY_ENA(x) (((x) >> 13) & 0x1) 6124#define C_0286D0_ANCILLARY_ENA 0xFFFFDFFF 6125#define S_0286D0_SAMPLE_COVERAGE_ENA(x) (((unsigned)(x) & 0x1) << 14) 6126#define G_0286D0_SAMPLE_COVERAGE_ENA(x) (((x) >> 14) & 0x1) 6127#define C_0286D0_SAMPLE_COVERAGE_ENA 0xFFFFBFFF 6128#define S_0286D0_POS_FIXED_PT_ENA(x) (((unsigned)(x) & 0x1) << 15) 6129#define G_0286D0_POS_FIXED_PT_ENA(x) (((x) >> 15) & 0x1) 6130#define C_0286D0_POS_FIXED_PT_ENA 0xFFFF7FFF 6131#define R_0286D4_SPI_INTERP_CONTROL_0 0x0286D4 6132#define S_0286D4_FLAT_SHADE_ENA(x) (((unsigned)(x) & 0x1) << 0) 6133#define G_0286D4_FLAT_SHADE_ENA(x) (((x) >> 0) & 0x1) 6134#define C_0286D4_FLAT_SHADE_ENA 0xFFFFFFFE 6135#define S_0286D4_PNT_SPRITE_ENA(x) (((unsigned)(x) & 0x1) << 1) 6136#define G_0286D4_PNT_SPRITE_ENA(x) (((x) >> 1) & 0x1) 6137#define C_0286D4_PNT_SPRITE_ENA 0xFFFFFFFD 6138#define S_0286D4_PNT_SPRITE_OVRD_X(x) (((unsigned)(x) & 0x07) << 2) 6139#define G_0286D4_PNT_SPRITE_OVRD_X(x) (((x) >> 2) & 0x07) 6140#define C_0286D4_PNT_SPRITE_OVRD_X 0xFFFFFFE3 6141#define V_0286D4_SPI_PNT_SPRITE_SEL_0 0x00 6142#define V_0286D4_SPI_PNT_SPRITE_SEL_1 0x01 6143#define V_0286D4_SPI_PNT_SPRITE_SEL_S 0x02 6144#define V_0286D4_SPI_PNT_SPRITE_SEL_T 0x03 6145#define V_0286D4_SPI_PNT_SPRITE_SEL_NONE 0x04 6146#define S_0286D4_PNT_SPRITE_OVRD_Y(x) (((unsigned)(x) & 0x07) << 5) 6147#define G_0286D4_PNT_SPRITE_OVRD_Y(x) (((x) >> 5) & 0x07) 6148#define C_0286D4_PNT_SPRITE_OVRD_Y 0xFFFFFF1F 6149#define V_0286D4_SPI_PNT_SPRITE_SEL_0 0x00 6150#define V_0286D4_SPI_PNT_SPRITE_SEL_1 0x01 6151#define V_0286D4_SPI_PNT_SPRITE_SEL_S 0x02 6152#define V_0286D4_SPI_PNT_SPRITE_SEL_T 0x03 6153#define V_0286D4_SPI_PNT_SPRITE_SEL_NONE 0x04 6154#define S_0286D4_PNT_SPRITE_OVRD_Z(x) (((unsigned)(x) & 0x07) << 8) 6155#define G_0286D4_PNT_SPRITE_OVRD_Z(x) (((x) >> 8) & 0x07) 6156#define C_0286D4_PNT_SPRITE_OVRD_Z 0xFFFFF8FF 6157#define V_0286D4_SPI_PNT_SPRITE_SEL_0 0x00 6158#define V_0286D4_SPI_PNT_SPRITE_SEL_1 0x01 6159#define V_0286D4_SPI_PNT_SPRITE_SEL_S 0x02 6160#define V_0286D4_SPI_PNT_SPRITE_SEL_T 0x03 6161#define V_0286D4_SPI_PNT_SPRITE_SEL_NONE 0x04 6162#define S_0286D4_PNT_SPRITE_OVRD_W(x) (((unsigned)(x) & 0x07) << 11) 6163#define G_0286D4_PNT_SPRITE_OVRD_W(x) (((x) >> 11) & 0x07) 6164#define C_0286D4_PNT_SPRITE_OVRD_W 0xFFFFC7FF 6165#define V_0286D4_SPI_PNT_SPRITE_SEL_0 0x00 6166#define V_0286D4_SPI_PNT_SPRITE_SEL_1 0x01 6167#define V_0286D4_SPI_PNT_SPRITE_SEL_S 0x02 6168#define V_0286D4_SPI_PNT_SPRITE_SEL_T 0x03 6169#define V_0286D4_SPI_PNT_SPRITE_SEL_NONE 0x04 6170#define S_0286D4_PNT_SPRITE_TOP_1(x) (((unsigned)(x) & 0x1) << 14) 6171#define G_0286D4_PNT_SPRITE_TOP_1(x) (((x) >> 14) & 0x1) 6172#define C_0286D4_PNT_SPRITE_TOP_1 0xFFFFBFFF 6173#define R_0286D8_SPI_PS_IN_CONTROL 0x0286D8 6174#define S_0286D8_NUM_INTERP(x) (((unsigned)(x) & 0x3F) << 0) 6175#define G_0286D8_NUM_INTERP(x) (((x) >> 0) & 0x3F) 6176#define C_0286D8_NUM_INTERP 0xFFFFFFC0 6177#define S_0286D8_PARAM_GEN(x) (((unsigned)(x) & 0x1) << 6) 6178#define G_0286D8_PARAM_GEN(x) (((x) >> 6) & 0x1) 6179#define C_0286D8_PARAM_GEN 0xFFFFFFBF 6180#define S_0286D8_FOG_ADDR(x) (((unsigned)(x) & 0x7F) << 7) /* not on CIK */ 6181#define G_0286D8_FOG_ADDR(x) (((x) >> 7) & 0x7F) /* not on CIK */ 6182#define C_0286D8_FOG_ADDR 0xFFFFC07F /* not on CIK */ 6183#define S_0286D8_BC_OPTIMIZE_DISABLE(x) (((unsigned)(x) & 0x1) << 14) 6184#define G_0286D8_BC_OPTIMIZE_DISABLE(x) (((x) >> 14) & 0x1) 6185#define C_0286D8_BC_OPTIMIZE_DISABLE 0xFFFFBFFF 6186#define S_0286D8_PASS_FOG_THROUGH_PS(x) (((unsigned)(x) & 0x1) << 15) /* not on CIK */ 6187#define G_0286D8_PASS_FOG_THROUGH_PS(x) (((x) >> 15) & 0x1) /* not on CIK */ 6188#define C_0286D8_PASS_FOG_THROUGH_PS 0xFFFF7FFF /* not on CIK */ 6189#define R_0286E0_SPI_BARYC_CNTL 0x0286E0 6190#define S_0286E0_PERSP_CENTER_CNTL(x) (((unsigned)(x) & 0x1) << 0) 6191#define G_0286E0_PERSP_CENTER_CNTL(x) (((x) >> 0) & 0x1) 6192#define C_0286E0_PERSP_CENTER_CNTL 0xFFFFFFFE 6193#define S_0286E0_PERSP_CENTROID_CNTL(x) (((unsigned)(x) & 0x1) << 4) 6194#define G_0286E0_PERSP_CENTROID_CNTL(x) (((x) >> 4) & 0x1) 6195#define C_0286E0_PERSP_CENTROID_CNTL 0xFFFFFFEF 6196#define S_0286E0_LINEAR_CENTER_CNTL(x) (((unsigned)(x) & 0x1) << 8) 6197#define G_0286E0_LINEAR_CENTER_CNTL(x) (((x) >> 8) & 0x1) 6198#define C_0286E0_LINEAR_CENTER_CNTL 0xFFFFFEFF 6199#define S_0286E0_LINEAR_CENTROID_CNTL(x) (((unsigned)(x) & 0x1) << 12) 6200#define G_0286E0_LINEAR_CENTROID_CNTL(x) (((x) >> 12) & 0x1) 6201#define C_0286E0_LINEAR_CENTROID_CNTL 0xFFFFEFFF 6202#define S_0286E0_POS_FLOAT_LOCATION(x) (((unsigned)(x) & 0x03) << 16) 6203#define G_0286E0_POS_FLOAT_LOCATION(x) (((x) >> 16) & 0x03) 6204#define C_0286E0_POS_FLOAT_LOCATION 0xFFFCFFFF 6205#define V_0286E0_X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT 0x00 6206#define S_0286E0_POS_FLOAT_ULC(x) (((unsigned)(x) & 0x1) << 20) 6207#define G_0286E0_POS_FLOAT_ULC(x) (((x) >> 20) & 0x1) 6208#define C_0286E0_POS_FLOAT_ULC 0xFFEFFFFF 6209#define S_0286E0_FRONT_FACE_ALL_BITS(x) (((unsigned)(x) & 0x1) << 24) 6210#define G_0286E0_FRONT_FACE_ALL_BITS(x) (((x) >> 24) & 0x1) 6211#define C_0286E0_FRONT_FACE_ALL_BITS 0xFEFFFFFF 6212#define R_0286E8_SPI_TMPRING_SIZE 0x0286E8 6213#define S_0286E8_WAVES(x) (((unsigned)(x) & 0xFFF) << 0) 6214#define G_0286E8_WAVES(x) (((x) >> 0) & 0xFFF) 6215#define C_0286E8_WAVES 0xFFFFF000 6216#define S_0286E8_WAVESIZE(x) (((unsigned)(x) & 0x1FFF) << 12) 6217#define G_0286E8_WAVESIZE(x) (((x) >> 12) & 0x1FFF) 6218#define C_0286E8_WAVESIZE 0xFE000FFF 6219#define R_028704_SPI_WAVE_MGMT_1 0x028704 /* not on CIK */ 6220#define S_028704_NUM_PS_WAVES(x) (((unsigned)(x) & 0x3F) << 0) 6221#define G_028704_NUM_PS_WAVES(x) (((x) >> 0) & 0x3F) 6222#define C_028704_NUM_PS_WAVES 0xFFFFFFC0 6223#define S_028704_NUM_VS_WAVES(x) (((unsigned)(x) & 0x3F) << 6) 6224#define G_028704_NUM_VS_WAVES(x) (((x) >> 6) & 0x3F) 6225#define C_028704_NUM_VS_WAVES 0xFFFFF03F 6226#define S_028704_NUM_GS_WAVES(x) (((unsigned)(x) & 0x3F) << 12) 6227#define G_028704_NUM_GS_WAVES(x) (((x) >> 12) & 0x3F) 6228#define C_028704_NUM_GS_WAVES 0xFFFC0FFF 6229#define S_028704_NUM_ES_WAVES(x) (((unsigned)(x) & 0x3F) << 18) 6230#define G_028704_NUM_ES_WAVES(x) (((x) >> 18) & 0x3F) 6231#define C_028704_NUM_ES_WAVES 0xFF03FFFF 6232#define S_028704_NUM_HS_WAVES(x) (((unsigned)(x) & 0x3F) << 24) 6233#define G_028704_NUM_HS_WAVES(x) (((x) >> 24) & 0x3F) 6234#define C_028704_NUM_HS_WAVES 0xC0FFFFFF 6235#define R_028708_SPI_WAVE_MGMT_2 0x028708 /* not on CIK */ 6236#define S_028708_NUM_LS_WAVES(x) (((unsigned)(x) & 0x3F) << 0) 6237#define G_028708_NUM_LS_WAVES(x) (((x) >> 0) & 0x3F) 6238#define C_028708_NUM_LS_WAVES 0xFFFFFFC0 6239#define R_02870C_SPI_SHADER_POS_FORMAT 0x02870C 6240#define S_02870C_POS0_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 0) 6241#define G_02870C_POS0_EXPORT_FORMAT(x) (((x) >> 0) & 0x0F) 6242#define C_02870C_POS0_EXPORT_FORMAT 0xFFFFFFF0 6243#define V_02870C_SPI_SHADER_NONE 0x00 6244#define V_02870C_SPI_SHADER_1COMP 0x01 6245#define V_02870C_SPI_SHADER_2COMP 0x02 6246#define V_02870C_SPI_SHADER_4COMPRESS 0x03 6247#define V_02870C_SPI_SHADER_4COMP 0x04 6248#define S_02870C_POS1_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 4) 6249#define G_02870C_POS1_EXPORT_FORMAT(x) (((x) >> 4) & 0x0F) 6250#define C_02870C_POS1_EXPORT_FORMAT 0xFFFFFF0F 6251#define V_02870C_SPI_SHADER_NONE 0x00 6252#define V_02870C_SPI_SHADER_1COMP 0x01 6253#define V_02870C_SPI_SHADER_2COMP 0x02 6254#define V_02870C_SPI_SHADER_4COMPRESS 0x03 6255#define V_02870C_SPI_SHADER_4COMP 0x04 6256#define S_02870C_POS2_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 8) 6257#define G_02870C_POS2_EXPORT_FORMAT(x) (((x) >> 8) & 0x0F) 6258#define C_02870C_POS2_EXPORT_FORMAT 0xFFFFF0FF 6259#define V_02870C_SPI_SHADER_NONE 0x00 6260#define V_02870C_SPI_SHADER_1COMP 0x01 6261#define V_02870C_SPI_SHADER_2COMP 0x02 6262#define V_02870C_SPI_SHADER_4COMPRESS 0x03 6263#define V_02870C_SPI_SHADER_4COMP 0x04 6264#define S_02870C_POS3_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 12) 6265#define G_02870C_POS3_EXPORT_FORMAT(x) (((x) >> 12) & 0x0F) 6266#define C_02870C_POS3_EXPORT_FORMAT 0xFFFF0FFF 6267#define V_02870C_SPI_SHADER_NONE 0x00 6268#define V_02870C_SPI_SHADER_1COMP 0x01 6269#define V_02870C_SPI_SHADER_2COMP 0x02 6270#define V_02870C_SPI_SHADER_4COMPRESS 0x03 6271#define V_02870C_SPI_SHADER_4COMP 0x04 6272#define R_028710_SPI_SHADER_Z_FORMAT 0x028710 6273#define S_028710_Z_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 0) 6274#define G_028710_Z_EXPORT_FORMAT(x) (((x) >> 0) & 0x0F) 6275#define C_028710_Z_EXPORT_FORMAT 0xFFFFFFF0 6276#define V_028710_SPI_SHADER_ZERO 0x00 6277#define V_028710_SPI_SHADER_32_R 0x01 6278#define V_028710_SPI_SHADER_32_GR 0x02 6279#define V_028710_SPI_SHADER_32_AR 0x03 6280#define V_028710_SPI_SHADER_FP16_ABGR 0x04 6281#define V_028710_SPI_SHADER_UNORM16_ABGR 0x05 6282#define V_028710_SPI_SHADER_SNORM16_ABGR 0x06 6283#define V_028710_SPI_SHADER_UINT16_ABGR 0x07 6284#define V_028710_SPI_SHADER_SINT16_ABGR 0x08 6285#define V_028710_SPI_SHADER_32_ABGR 0x09 6286#define R_028714_SPI_SHADER_COL_FORMAT 0x028714 6287#define S_028714_COL0_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 0) 6288#define G_028714_COL0_EXPORT_FORMAT(x) (((x) >> 0) & 0x0F) 6289#define C_028714_COL0_EXPORT_FORMAT 0xFFFFFFF0 6290#define V_028714_SPI_SHADER_ZERO 0x00 6291#define V_028714_SPI_SHADER_32_R 0x01 6292#define V_028714_SPI_SHADER_32_GR 0x02 6293#define V_028714_SPI_SHADER_32_AR 0x03 6294#define V_028714_SPI_SHADER_FP16_ABGR 0x04 6295#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 6296#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 6297#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 6298#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 6299#define V_028714_SPI_SHADER_32_ABGR 0x09 6300#define S_028714_COL1_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 4) 6301#define G_028714_COL1_EXPORT_FORMAT(x) (((x) >> 4) & 0x0F) 6302#define C_028714_COL1_EXPORT_FORMAT 0xFFFFFF0F 6303#define V_028714_SPI_SHADER_ZERO 0x00 6304#define V_028714_SPI_SHADER_32_R 0x01 6305#define V_028714_SPI_SHADER_32_GR 0x02 6306#define V_028714_SPI_SHADER_32_AR 0x03 6307#define V_028714_SPI_SHADER_FP16_ABGR 0x04 6308#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 6309#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 6310#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 6311#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 6312#define V_028714_SPI_SHADER_32_ABGR 0x09 6313#define S_028714_COL2_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 8) 6314#define G_028714_COL2_EXPORT_FORMAT(x) (((x) >> 8) & 0x0F) 6315#define C_028714_COL2_EXPORT_FORMAT 0xFFFFF0FF 6316#define V_028714_SPI_SHADER_ZERO 0x00 6317#define V_028714_SPI_SHADER_32_R 0x01 6318#define V_028714_SPI_SHADER_32_GR 0x02 6319#define V_028714_SPI_SHADER_32_AR 0x03 6320#define V_028714_SPI_SHADER_FP16_ABGR 0x04 6321#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 6322#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 6323#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 6324#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 6325#define V_028714_SPI_SHADER_32_ABGR 0x09 6326#define S_028714_COL3_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 12) 6327#define G_028714_COL3_EXPORT_FORMAT(x) (((x) >> 12) & 0x0F) 6328#define C_028714_COL3_EXPORT_FORMAT 0xFFFF0FFF 6329#define V_028714_SPI_SHADER_ZERO 0x00 6330#define V_028714_SPI_SHADER_32_R 0x01 6331#define V_028714_SPI_SHADER_32_GR 0x02 6332#define V_028714_SPI_SHADER_32_AR 0x03 6333#define V_028714_SPI_SHADER_FP16_ABGR 0x04 6334#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 6335#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 6336#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 6337#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 6338#define V_028714_SPI_SHADER_32_ABGR 0x09 6339#define S_028714_COL4_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 16) 6340#define G_028714_COL4_EXPORT_FORMAT(x) (((x) >> 16) & 0x0F) 6341#define C_028714_COL4_EXPORT_FORMAT 0xFFF0FFFF 6342#define V_028714_SPI_SHADER_ZERO 0x00 6343#define V_028714_SPI_SHADER_32_R 0x01 6344#define V_028714_SPI_SHADER_32_GR 0x02 6345#define V_028714_SPI_SHADER_32_AR 0x03 6346#define V_028714_SPI_SHADER_FP16_ABGR 0x04 6347#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 6348#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 6349#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 6350#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 6351#define V_028714_SPI_SHADER_32_ABGR 0x09 6352#define S_028714_COL5_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 20) 6353#define G_028714_COL5_EXPORT_FORMAT(x) (((x) >> 20) & 0x0F) 6354#define C_028714_COL5_EXPORT_FORMAT 0xFF0FFFFF 6355#define V_028714_SPI_SHADER_ZERO 0x00 6356#define V_028714_SPI_SHADER_32_R 0x01 6357#define V_028714_SPI_SHADER_32_GR 0x02 6358#define V_028714_SPI_SHADER_32_AR 0x03 6359#define V_028714_SPI_SHADER_FP16_ABGR 0x04 6360#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 6361#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 6362#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 6363#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 6364#define V_028714_SPI_SHADER_32_ABGR 0x09 6365#define S_028714_COL6_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 24) 6366#define G_028714_COL6_EXPORT_FORMAT(x) (((x) >> 24) & 0x0F) 6367#define C_028714_COL6_EXPORT_FORMAT 0xF0FFFFFF 6368#define V_028714_SPI_SHADER_ZERO 0x00 6369#define V_028714_SPI_SHADER_32_R 0x01 6370#define V_028714_SPI_SHADER_32_GR 0x02 6371#define V_028714_SPI_SHADER_32_AR 0x03 6372#define V_028714_SPI_SHADER_FP16_ABGR 0x04 6373#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 6374#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 6375#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 6376#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 6377#define V_028714_SPI_SHADER_32_ABGR 0x09 6378#define S_028714_COL7_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 28) 6379#define G_028714_COL7_EXPORT_FORMAT(x) (((x) >> 28) & 0x0F) 6380#define C_028714_COL7_EXPORT_FORMAT 0x0FFFFFFF 6381#define V_028714_SPI_SHADER_ZERO 0x00 6382#define V_028714_SPI_SHADER_32_R 0x01 6383#define V_028714_SPI_SHADER_32_GR 0x02 6384#define V_028714_SPI_SHADER_32_AR 0x03 6385#define V_028714_SPI_SHADER_FP16_ABGR 0x04 6386#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 6387#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 6388#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 6389#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 6390#define V_028714_SPI_SHADER_32_ABGR 0x09 6391/* Stoney */ 6392#define R_028754_SX_PS_DOWNCONVERT 0x028754 6393#define S_028754_MRT0(x) (((unsigned)(x) & 0x0F) << 0) 6394#define G_028754_MRT0(x) (((x) >> 0) & 0x0F) 6395#define C_028754_MRT0 0xFFFFFFF0 6396#define V_028754_SX_RT_EXPORT_NO_CONVERSION 0 6397#define V_028754_SX_RT_EXPORT_32_R 1 6398#define V_028754_SX_RT_EXPORT_32_A 2 6399#define V_028754_SX_RT_EXPORT_10_11_11 3 6400#define V_028754_SX_RT_EXPORT_2_10_10_10 4 6401#define V_028754_SX_RT_EXPORT_8_8_8_8 5 6402#define V_028754_SX_RT_EXPORT_5_6_5 6 6403#define V_028754_SX_RT_EXPORT_1_5_5_5 7 6404#define V_028754_SX_RT_EXPORT_4_4_4_4 8 6405#define V_028754_SX_RT_EXPORT_16_16_GR 9 6406#define V_028754_SX_RT_EXPORT_16_16_AR 10 6407#define S_028754_MRT1(x) (((unsigned)(x) & 0x0F) << 4) 6408#define G_028754_MRT1(x) (((x) >> 4) & 0x0F) 6409#define C_028754_MRT1 0xFFFFFF0F 6410#define S_028754_MRT2(x) (((unsigned)(x) & 0x0F) << 8) 6411#define G_028754_MRT2(x) (((x) >> 8) & 0x0F) 6412#define C_028754_MRT2 0xFFFFF0FF 6413#define S_028754_MRT3(x) (((unsigned)(x) & 0x0F) << 12) 6414#define G_028754_MRT3(x) (((x) >> 12) & 0x0F) 6415#define C_028754_MRT3 0xFFFF0FFF 6416#define S_028754_MRT4(x) (((unsigned)(x) & 0x0F) << 16) 6417#define G_028754_MRT4(x) (((x) >> 16) & 0x0F) 6418#define C_028754_MRT4 0xFFF0FFFF 6419#define S_028754_MRT5(x) (((unsigned)(x) & 0x0F) << 20) 6420#define G_028754_MRT5(x) (((x) >> 20) & 0x0F) 6421#define C_028754_MRT5 0xFF0FFFFF 6422#define S_028754_MRT6(x) (((unsigned)(x) & 0x0F) << 24) 6423#define G_028754_MRT6(x) (((x) >> 24) & 0x0F) 6424#define C_028754_MRT6 0xF0FFFFFF 6425#define S_028754_MRT7(x) (((unsigned)(x) & 0x0F) << 28) 6426#define G_028754_MRT7(x) (((x) >> 28) & 0x0F) 6427#define C_028754_MRT7 0x0FFFFFFF 6428#define R_028758_SX_BLEND_OPT_EPSILON 0x028758 6429#define S_028758_MRT0_EPSILON(x) (((unsigned)(x) & 0x0F) << 0) 6430#define G_028758_MRT0_EPSILON(x) (((x) >> 0) & 0x0F) 6431#define C_028758_MRT0_EPSILON 0xFFFFFFF0 6432#define V_028758_EXACT 0 6433#define V_028758_11BIT_FORMAT 1 6434#define V_028758_10BIT_FORMAT 3 6435#define V_028758_8BIT_FORMAT 7 6436#define V_028758_6BIT_FORMAT 11 6437#define V_028758_5BIT_FORMAT 13 6438#define V_028758_4BIT_FORMAT 15 6439#define S_028758_MRT1_EPSILON(x) (((unsigned)(x) & 0x0F) << 4) 6440#define G_028758_MRT1_EPSILON(x) (((x) >> 4) & 0x0F) 6441#define C_028758_MRT1_EPSILON 0xFFFFFF0F 6442#define S_028758_MRT2_EPSILON(x) (((unsigned)(x) & 0x0F) << 8) 6443#define G_028758_MRT2_EPSILON(x) (((x) >> 8) & 0x0F) 6444#define C_028758_MRT2_EPSILON 0xFFFFF0FF 6445#define S_028758_MRT3_EPSILON(x) (((unsigned)(x) & 0x0F) << 12) 6446#define G_028758_MRT3_EPSILON(x) (((x) >> 12) & 0x0F) 6447#define C_028758_MRT3_EPSILON 0xFFFF0FFF 6448#define S_028758_MRT4_EPSILON(x) (((unsigned)(x) & 0x0F) << 16) 6449#define G_028758_MRT4_EPSILON(x) (((x) >> 16) & 0x0F) 6450#define C_028758_MRT4_EPSILON 0xFFF0FFFF 6451#define S_028758_MRT5_EPSILON(x) (((unsigned)(x) & 0x0F) << 20) 6452#define G_028758_MRT5_EPSILON(x) (((x) >> 20) & 0x0F) 6453#define C_028758_MRT5_EPSILON 0xFF0FFFFF 6454#define S_028758_MRT6_EPSILON(x) (((unsigned)(x) & 0x0F) << 24) 6455#define G_028758_MRT6_EPSILON(x) (((x) >> 24) & 0x0F) 6456#define C_028758_MRT6_EPSILON 0xF0FFFFFF 6457#define S_028758_MRT7_EPSILON(x) (((unsigned)(x) & 0x0F) << 28) 6458#define G_028758_MRT7_EPSILON(x) (((x) >> 28) & 0x0F) 6459#define C_028758_MRT7_EPSILON 0x0FFFFFFF 6460#define R_02875C_SX_BLEND_OPT_CONTROL 0x02875C 6461#define S_02875C_MRT0_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 0) 6462#define G_02875C_MRT0_COLOR_OPT_DISABLE(x) (((x) >> 0) & 0x1) 6463#define C_02875C_MRT0_COLOR_OPT_DISABLE 0xFFFFFFFE 6464#define S_02875C_MRT0_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 1) 6465#define G_02875C_MRT0_ALPHA_OPT_DISABLE(x) (((x) >> 1) & 0x1) 6466#define C_02875C_MRT0_ALPHA_OPT_DISABLE 0xFFFFFFFD 6467#define S_02875C_MRT1_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 4) 6468#define G_02875C_MRT1_COLOR_OPT_DISABLE(x) (((x) >> 4) & 0x1) 6469#define C_02875C_MRT1_COLOR_OPT_DISABLE 0xFFFFFFEF 6470#define S_02875C_MRT1_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 5) 6471#define G_02875C_MRT1_ALPHA_OPT_DISABLE(x) (((x) >> 5) & 0x1) 6472#define C_02875C_MRT1_ALPHA_OPT_DISABLE 0xFFFFFFDF 6473#define S_02875C_MRT2_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 8) 6474#define G_02875C_MRT2_COLOR_OPT_DISABLE(x) (((x) >> 8) & 0x1) 6475#define C_02875C_MRT2_COLOR_OPT_DISABLE 0xFFFFFEFF 6476#define S_02875C_MRT2_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 9) 6477#define G_02875C_MRT2_ALPHA_OPT_DISABLE(x) (((x) >> 9) & 0x1) 6478#define C_02875C_MRT2_ALPHA_OPT_DISABLE 0xFFFFFDFF 6479#define S_02875C_MRT3_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 12) 6480#define G_02875C_MRT3_COLOR_OPT_DISABLE(x) (((x) >> 12) & 0x1) 6481#define C_02875C_MRT3_COLOR_OPT_DISABLE 0xFFFFEFFF 6482#define S_02875C_MRT3_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 13) 6483#define G_02875C_MRT3_ALPHA_OPT_DISABLE(x) (((x) >> 13) & 0x1) 6484#define C_02875C_MRT3_ALPHA_OPT_DISABLE 0xFFFFDFFF 6485#define S_02875C_MRT4_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 16) 6486#define G_02875C_MRT4_COLOR_OPT_DISABLE(x) (((x) >> 16) & 0x1) 6487#define C_02875C_MRT4_COLOR_OPT_DISABLE 0xFFFEFFFF 6488#define S_02875C_MRT4_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 17) 6489#define G_02875C_MRT4_ALPHA_OPT_DISABLE(x) (((x) >> 17) & 0x1) 6490#define C_02875C_MRT4_ALPHA_OPT_DISABLE 0xFFFDFFFF 6491#define S_02875C_MRT5_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 20) 6492#define G_02875C_MRT5_COLOR_OPT_DISABLE(x) (((x) >> 20) & 0x1) 6493#define C_02875C_MRT5_COLOR_OPT_DISABLE 0xFFEFFFFF 6494#define S_02875C_MRT5_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 21) 6495#define G_02875C_MRT5_ALPHA_OPT_DISABLE(x) (((x) >> 21) & 0x1) 6496#define C_02875C_MRT5_ALPHA_OPT_DISABLE 0xFFDFFFFF 6497#define S_02875C_MRT6_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 24) 6498#define G_02875C_MRT6_COLOR_OPT_DISABLE(x) (((x) >> 24) & 0x1) 6499#define C_02875C_MRT6_COLOR_OPT_DISABLE 0xFEFFFFFF 6500#define S_02875C_MRT6_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 25) 6501#define G_02875C_MRT6_ALPHA_OPT_DISABLE(x) (((x) >> 25) & 0x1) 6502#define C_02875C_MRT6_ALPHA_OPT_DISABLE 0xFDFFFFFF 6503#define S_02875C_MRT7_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 28) 6504#define G_02875C_MRT7_COLOR_OPT_DISABLE(x) (((x) >> 28) & 0x1) 6505#define C_02875C_MRT7_COLOR_OPT_DISABLE 0xEFFFFFFF 6506#define S_02875C_MRT7_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 29) 6507#define G_02875C_MRT7_ALPHA_OPT_DISABLE(x) (((x) >> 29) & 0x1) 6508#define C_02875C_MRT7_ALPHA_OPT_DISABLE 0xDFFFFFFF 6509#define S_02875C_PIXEN_ZERO_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 31) 6510#define G_02875C_PIXEN_ZERO_OPT_DISABLE(x) (((x) >> 31) & 0x1) 6511#define C_02875C_PIXEN_ZERO_OPT_DISABLE 0x7FFFFFFF 6512#define R_028760_SX_MRT0_BLEND_OPT 0x028760 6513#define S_028760_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) 6514#define G_028760_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) 6515#define C_028760_COLOR_SRC_OPT 0xFFFFFFF8 6516#define V_028760_BLEND_OPT_PRESERVE_NONE_IGNORE_ALL 0 6517#define V_028760_BLEND_OPT_PRESERVE_ALL_IGNORE_NONE 1 6518#define V_028760_BLEND_OPT_PRESERVE_C1_IGNORE_C0 2 6519#define V_028760_BLEND_OPT_PRESERVE_C0_IGNORE_C1 3 6520#define V_028760_BLEND_OPT_PRESERVE_A1_IGNORE_A0 4 6521#define V_028760_BLEND_OPT_PRESERVE_A0_IGNORE_A1 5 6522#define V_028760_BLEND_OPT_PRESERVE_NONE_IGNORE_A0 6 6523#define V_028760_BLEND_OPT_PRESERVE_NONE_IGNORE_NONE 7 6524#define S_028760_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) 6525#define G_028760_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) 6526#define C_028760_COLOR_DST_OPT 0xFFFFFF8F 6527#define S_028760_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) 6528#define G_028760_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) 6529#define C_028760_COLOR_COMB_FCN 0xFFFFF8FF 6530#define V_028760_OPT_COMB_NONE 0 6531#define V_028760_OPT_COMB_ADD 1 6532#define V_028760_OPT_COMB_SUBTRACT 2 6533#define V_028760_OPT_COMB_MIN 3 6534#define V_028760_OPT_COMB_MAX 4 6535#define V_028760_OPT_COMB_REVSUBTRACT 5 6536#define V_028760_OPT_COMB_BLEND_DISABLED 6 6537#define V_028760_OPT_COMB_SAFE_ADD 7 6538#define S_028760_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) 6539#define G_028760_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) 6540#define C_028760_ALPHA_SRC_OPT 0xFFF8FFFF 6541#define S_028760_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) 6542#define G_028760_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) 6543#define C_028760_ALPHA_DST_OPT 0xFF8FFFFF 6544#define S_028760_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) 6545#define G_028760_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) 6546#define C_028760_ALPHA_COMB_FCN 0xF8FFFFFF 6547#define R_028764_SX_MRT1_BLEND_OPT 0x028764 6548#define S_028764_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) 6549#define G_028764_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) 6550#define C_028764_COLOR_SRC_OPT 0xFFFFFFF8 6551#define S_028764_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) 6552#define G_028764_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) 6553#define C_028764_COLOR_DST_OPT 0xFFFFFF8F 6554#define S_028764_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) 6555#define G_028764_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) 6556#define C_028764_COLOR_COMB_FCN 0xFFFFF8FF 6557#define S_028764_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) 6558#define G_028764_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) 6559#define C_028764_ALPHA_SRC_OPT 0xFFF8FFFF 6560#define S_028764_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) 6561#define G_028764_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) 6562#define C_028764_ALPHA_DST_OPT 0xFF8FFFFF 6563#define S_028764_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) 6564#define G_028764_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) 6565#define C_028764_ALPHA_COMB_FCN 0xF8FFFFFF 6566#define R_028768_SX_MRT2_BLEND_OPT 0x028768 6567#define S_028768_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) 6568#define G_028768_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) 6569#define C_028768_COLOR_SRC_OPT 0xFFFFFFF8 6570#define S_028768_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) 6571#define G_028768_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) 6572#define C_028768_COLOR_DST_OPT 0xFFFFFF8F 6573#define S_028768_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) 6574#define G_028768_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) 6575#define C_028768_COLOR_COMB_FCN 0xFFFFF8FF 6576#define S_028768_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) 6577#define G_028768_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) 6578#define C_028768_ALPHA_SRC_OPT 0xFFF8FFFF 6579#define S_028768_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) 6580#define G_028768_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) 6581#define C_028768_ALPHA_DST_OPT 0xFF8FFFFF 6582#define S_028768_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) 6583#define G_028768_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) 6584#define C_028768_ALPHA_COMB_FCN 0xF8FFFFFF 6585#define R_02876C_SX_MRT3_BLEND_OPT 0x02876C 6586#define S_02876C_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) 6587#define G_02876C_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) 6588#define C_02876C_COLOR_SRC_OPT 0xFFFFFFF8 6589#define S_02876C_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) 6590#define G_02876C_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) 6591#define C_02876C_COLOR_DST_OPT 0xFFFFFF8F 6592#define S_02876C_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) 6593#define G_02876C_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) 6594#define C_02876C_COLOR_COMB_FCN 0xFFFFF8FF 6595#define S_02876C_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) 6596#define G_02876C_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) 6597#define C_02876C_ALPHA_SRC_OPT 0xFFF8FFFF 6598#define S_02876C_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) 6599#define G_02876C_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) 6600#define C_02876C_ALPHA_DST_OPT 0xFF8FFFFF 6601#define S_02876C_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) 6602#define G_02876C_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) 6603#define C_02876C_ALPHA_COMB_FCN 0xF8FFFFFF 6604#define R_028770_SX_MRT4_BLEND_OPT 0x028770 6605#define S_028770_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) 6606#define G_028770_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) 6607#define C_028770_COLOR_SRC_OPT 0xFFFFFFF8 6608#define S_028770_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) 6609#define G_028770_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) 6610#define C_028770_COLOR_DST_OPT 0xFFFFFF8F 6611#define S_028770_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) 6612#define G_028770_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) 6613#define C_028770_COLOR_COMB_FCN 0xFFFFF8FF 6614#define S_028770_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) 6615#define G_028770_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) 6616#define C_028770_ALPHA_SRC_OPT 0xFFF8FFFF 6617#define S_028770_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) 6618#define G_028770_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) 6619#define C_028770_ALPHA_DST_OPT 0xFF8FFFFF 6620#define S_028770_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) 6621#define G_028770_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) 6622#define C_028770_ALPHA_COMB_FCN 0xF8FFFFFF 6623#define R_028774_SX_MRT5_BLEND_OPT 0x028774 6624#define S_028774_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) 6625#define G_028774_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) 6626#define C_028774_COLOR_SRC_OPT 0xFFFFFFF8 6627#define S_028774_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) 6628#define G_028774_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) 6629#define C_028774_COLOR_DST_OPT 0xFFFFFF8F 6630#define S_028774_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) 6631#define G_028774_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) 6632#define C_028774_COLOR_COMB_FCN 0xFFFFF8FF 6633#define S_028774_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) 6634#define G_028774_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) 6635#define C_028774_ALPHA_SRC_OPT 0xFFF8FFFF 6636#define S_028774_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) 6637#define G_028774_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) 6638#define C_028774_ALPHA_DST_OPT 0xFF8FFFFF 6639#define S_028774_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) 6640#define G_028774_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) 6641#define C_028774_ALPHA_COMB_FCN 0xF8FFFFFF 6642#define R_028778_SX_MRT6_BLEND_OPT 0x028778 6643#define S_028778_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) 6644#define G_028778_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) 6645#define C_028778_COLOR_SRC_OPT 0xFFFFFFF8 6646#define S_028778_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) 6647#define G_028778_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) 6648#define C_028778_COLOR_DST_OPT 0xFFFFFF8F 6649#define S_028778_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) 6650#define G_028778_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) 6651#define C_028778_COLOR_COMB_FCN 0xFFFFF8FF 6652#define S_028778_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) 6653#define G_028778_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) 6654#define C_028778_ALPHA_SRC_OPT 0xFFF8FFFF 6655#define S_028778_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) 6656#define G_028778_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) 6657#define C_028778_ALPHA_DST_OPT 0xFF8FFFFF 6658#define S_028778_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) 6659#define G_028778_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) 6660#define C_028778_ALPHA_COMB_FCN 0xF8FFFFFF 6661#define R_02877C_SX_MRT7_BLEND_OPT 0x02877C 6662#define S_02877C_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) 6663#define G_02877C_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) 6664#define C_02877C_COLOR_SRC_OPT 0xFFFFFFF8 6665#define S_02877C_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) 6666#define G_02877C_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) 6667#define C_02877C_COLOR_DST_OPT 0xFFFFFF8F 6668#define S_02877C_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) 6669#define G_02877C_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) 6670#define C_02877C_COLOR_COMB_FCN 0xFFFFF8FF 6671#define S_02877C_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) 6672#define G_02877C_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) 6673#define C_02877C_ALPHA_SRC_OPT 0xFFF8FFFF 6674#define S_02877C_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) 6675#define G_02877C_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) 6676#define C_02877C_ALPHA_DST_OPT 0xFF8FFFFF 6677#define S_02877C_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) 6678#define G_02877C_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) 6679#define C_02877C_ALPHA_COMB_FCN 0xF8FFFFFF 6680/* */ 6681#define R_028780_CB_BLEND0_CONTROL 0x028780 6682#define S_028780_COLOR_SRCBLEND(x) (((unsigned)(x) & 0x1F) << 0) 6683#define G_028780_COLOR_SRCBLEND(x) (((x) >> 0) & 0x1F) 6684#define C_028780_COLOR_SRCBLEND 0xFFFFFFE0 6685#define V_028780_BLEND_ZERO 0x00 6686#define V_028780_BLEND_ONE 0x01 6687#define V_028780_BLEND_SRC_COLOR 0x02 6688#define V_028780_BLEND_ONE_MINUS_SRC_COLOR 0x03 6689#define V_028780_BLEND_SRC_ALPHA 0x04 6690#define V_028780_BLEND_ONE_MINUS_SRC_ALPHA 0x05 6691#define V_028780_BLEND_DST_ALPHA 0x06 6692#define V_028780_BLEND_ONE_MINUS_DST_ALPHA 0x07 6693#define V_028780_BLEND_DST_COLOR 0x08 6694#define V_028780_BLEND_ONE_MINUS_DST_COLOR 0x09 6695#define V_028780_BLEND_SRC_ALPHA_SATURATE 0x0A 6696#define V_028780_BLEND_CONSTANT_COLOR 0x0D 6697#define V_028780_BLEND_ONE_MINUS_CONSTANT_COLOR 0x0E 6698#define V_028780_BLEND_SRC1_COLOR 0x0F 6699#define V_028780_BLEND_INV_SRC1_COLOR 0x10 6700#define V_028780_BLEND_SRC1_ALPHA 0x11 6701#define V_028780_BLEND_INV_SRC1_ALPHA 0x12 6702#define V_028780_BLEND_CONSTANT_ALPHA 0x13 6703#define V_028780_BLEND_ONE_MINUS_CONSTANT_ALPHA 0x14 6704#define S_028780_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 5) 6705#define G_028780_COLOR_COMB_FCN(x) (((x) >> 5) & 0x07) 6706#define C_028780_COLOR_COMB_FCN 0xFFFFFF1F 6707#define V_028780_COMB_DST_PLUS_SRC 0x00 6708#define V_028780_COMB_SRC_MINUS_DST 0x01 6709#define V_028780_COMB_MIN_DST_SRC 0x02 6710#define V_028780_COMB_MAX_DST_SRC 0x03 6711#define V_028780_COMB_DST_MINUS_SRC 0x04 6712#define S_028780_COLOR_DESTBLEND(x) (((unsigned)(x) & 0x1F) << 8) 6713#define G_028780_COLOR_DESTBLEND(x) (((x) >> 8) & 0x1F) 6714#define C_028780_COLOR_DESTBLEND 0xFFFFE0FF 6715#define V_028780_BLEND_ZERO 0x00 6716#define V_028780_BLEND_ONE 0x01 6717#define V_028780_BLEND_SRC_COLOR 0x02 6718#define V_028780_BLEND_ONE_MINUS_SRC_COLOR 0x03 6719#define V_028780_BLEND_SRC_ALPHA 0x04 6720#define V_028780_BLEND_ONE_MINUS_SRC_ALPHA 0x05 6721#define V_028780_BLEND_DST_ALPHA 0x06 6722#define V_028780_BLEND_ONE_MINUS_DST_ALPHA 0x07 6723#define V_028780_BLEND_DST_COLOR 0x08 6724#define V_028780_BLEND_ONE_MINUS_DST_COLOR 0x09 6725#define V_028780_BLEND_SRC_ALPHA_SATURATE 0x0A 6726#define V_028780_BLEND_CONSTANT_COLOR 0x0D 6727#define V_028780_BLEND_ONE_MINUS_CONSTANT_COLOR 0x0E 6728#define V_028780_BLEND_SRC1_COLOR 0x0F 6729#define V_028780_BLEND_INV_SRC1_COLOR 0x10 6730#define V_028780_BLEND_SRC1_ALPHA 0x11 6731#define V_028780_BLEND_INV_SRC1_ALPHA 0x12 6732#define V_028780_BLEND_CONSTANT_ALPHA 0x13 6733#define V_028780_BLEND_ONE_MINUS_CONSTANT_ALPHA 0x14 6734#define S_028780_ALPHA_SRCBLEND(x) (((unsigned)(x) & 0x1F) << 16) 6735#define G_028780_ALPHA_SRCBLEND(x) (((x) >> 16) & 0x1F) 6736#define C_028780_ALPHA_SRCBLEND 0xFFE0FFFF 6737#define V_028780_BLEND_ZERO 0x00 6738#define V_028780_BLEND_ONE 0x01 6739#define V_028780_BLEND_SRC_COLOR 0x02 6740#define V_028780_BLEND_ONE_MINUS_SRC_COLOR 0x03 6741#define V_028780_BLEND_SRC_ALPHA 0x04 6742#define V_028780_BLEND_ONE_MINUS_SRC_ALPHA 0x05 6743#define V_028780_BLEND_DST_ALPHA 0x06 6744#define V_028780_BLEND_ONE_MINUS_DST_ALPHA 0x07 6745#define V_028780_BLEND_DST_COLOR 0x08 6746#define V_028780_BLEND_ONE_MINUS_DST_COLOR 0x09 6747#define V_028780_BLEND_SRC_ALPHA_SATURATE 0x0A 6748#define V_028780_BLEND_CONSTANT_COLOR 0x0D 6749#define V_028780_BLEND_ONE_MINUS_CONSTANT_COLOR 0x0E 6750#define V_028780_BLEND_SRC1_COLOR 0x0F 6751#define V_028780_BLEND_INV_SRC1_COLOR 0x10 6752#define V_028780_BLEND_SRC1_ALPHA 0x11 6753#define V_028780_BLEND_INV_SRC1_ALPHA 0x12 6754#define V_028780_BLEND_CONSTANT_ALPHA 0x13 6755#define V_028780_BLEND_ONE_MINUS_CONSTANT_ALPHA 0x14 6756#define S_028780_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 21) 6757#define G_028780_ALPHA_COMB_FCN(x) (((x) >> 21) & 0x07) 6758#define C_028780_ALPHA_COMB_FCN 0xFF1FFFFF 6759#define V_028780_COMB_DST_PLUS_SRC 0x00 6760#define V_028780_COMB_SRC_MINUS_DST 0x01 6761#define V_028780_COMB_MIN_DST_SRC 0x02 6762#define V_028780_COMB_MAX_DST_SRC 0x03 6763#define V_028780_COMB_DST_MINUS_SRC 0x04 6764#define S_028780_ALPHA_DESTBLEND(x) (((unsigned)(x) & 0x1F) << 24) 6765#define G_028780_ALPHA_DESTBLEND(x) (((x) >> 24) & 0x1F) 6766#define C_028780_ALPHA_DESTBLEND 0xE0FFFFFF 6767#define V_028780_BLEND_ZERO 0x00 6768#define V_028780_BLEND_ONE 0x01 6769#define V_028780_BLEND_SRC_COLOR 0x02 6770#define V_028780_BLEND_ONE_MINUS_SRC_COLOR 0x03 6771#define V_028780_BLEND_SRC_ALPHA 0x04 6772#define V_028780_BLEND_ONE_MINUS_SRC_ALPHA 0x05 6773#define V_028780_BLEND_DST_ALPHA 0x06 6774#define V_028780_BLEND_ONE_MINUS_DST_ALPHA 0x07 6775#define V_028780_BLEND_DST_COLOR 0x08 6776#define V_028780_BLEND_ONE_MINUS_DST_COLOR 0x09 6777#define V_028780_BLEND_SRC_ALPHA_SATURATE 0x0A 6778#define V_028780_BLEND_CONSTANT_COLOR 0x0D 6779#define V_028780_BLEND_ONE_MINUS_CONSTANT_COLOR 0x0E 6780#define V_028780_BLEND_SRC1_COLOR 0x0F 6781#define V_028780_BLEND_INV_SRC1_COLOR 0x10 6782#define V_028780_BLEND_SRC1_ALPHA 0x11 6783#define V_028780_BLEND_INV_SRC1_ALPHA 0x12 6784#define V_028780_BLEND_CONSTANT_ALPHA 0x13 6785#define V_028780_BLEND_ONE_MINUS_CONSTANT_ALPHA 0x14 6786#define S_028780_SEPARATE_ALPHA_BLEND(x) (((unsigned)(x) & 0x1) << 29) 6787#define G_028780_SEPARATE_ALPHA_BLEND(x) (((x) >> 29) & 0x1) 6788#define C_028780_SEPARATE_ALPHA_BLEND 0xDFFFFFFF 6789#define S_028780_ENABLE(x) (((unsigned)(x) & 0x1) << 30) 6790#define G_028780_ENABLE(x) (((x) >> 30) & 0x1) 6791#define C_028780_ENABLE 0xBFFFFFFF 6792#define S_028780_DISABLE_ROP3(x) (((unsigned)(x) & 0x1) << 31) 6793#define G_028780_DISABLE_ROP3(x) (((x) >> 31) & 0x1) 6794#define C_028780_DISABLE_ROP3 0x7FFFFFFF 6795#define R_028784_CB_BLEND1_CONTROL 0x028784 6796#define R_028788_CB_BLEND2_CONTROL 0x028788 6797#define R_02878C_CB_BLEND3_CONTROL 0x02878C 6798#define R_028790_CB_BLEND4_CONTROL 0x028790 6799#define R_028794_CB_BLEND5_CONTROL 0x028794 6800#define R_028798_CB_BLEND6_CONTROL 0x028798 6801#define R_02879C_CB_BLEND7_CONTROL 0x02879C 6802#define R_0287CC_CS_COPY_STATE 0x0287CC 6803#define S_0287CC_SRC_STATE_ID(x) (((unsigned)(x) & 0x07) << 0) 6804#define G_0287CC_SRC_STATE_ID(x) (((x) >> 0) & 0x07) 6805#define C_0287CC_SRC_STATE_ID 0xFFFFFFF8 6806#define R_0287D4_PA_CL_POINT_X_RAD 0x0287D4 6807#define R_0287D8_PA_CL_POINT_Y_RAD 0x0287D8 6808#define R_0287DC_PA_CL_POINT_SIZE 0x0287DC 6809#define R_0287E0_PA_CL_POINT_CULL_RAD 0x0287E0 6810#define R_0287E4_VGT_DMA_BASE_HI 0x0287E4 6811#define S_0287E4_BASE_ADDR_GFX6(x) (((unsigned)(x) & 0xFF) << 0) 6812#define G_0287E4_BASE_ADDR_GFX6(x) (((x) >> 0) & 0xFF) 6813#define C_0287E4_BASE_ADDR_GFX6 0xFFFFFF00 6814#define R_0287E8_VGT_DMA_BASE 0x0287E8 6815#define R_0287F0_VGT_DRAW_INITIATOR 0x0287F0 6816#define S_0287F0_SOURCE_SELECT(x) (((unsigned)(x) & 0x03) << 0) 6817#define G_0287F0_SOURCE_SELECT(x) (((x) >> 0) & 0x03) 6818#define C_0287F0_SOURCE_SELECT 0xFFFFFFFC 6819#define V_0287F0_DI_SRC_SEL_DMA 0x00 6820#define V_0287F0_DI_SRC_SEL_IMMEDIATE 0x01 /* not on CIK */ 6821#define V_0287F0_DI_SRC_SEL_AUTO_INDEX 0x02 6822#define V_0287F0_DI_SRC_SEL_RESERVED 0x03 6823#define S_0287F0_MAJOR_MODE(x) (((unsigned)(x) & 0x03) << 2) 6824#define G_0287F0_MAJOR_MODE(x) (((x) >> 2) & 0x03) 6825#define C_0287F0_MAJOR_MODE 0xFFFFFFF3 6826#define V_0287F0_DI_MAJOR_MODE_0 0x00 6827#define V_0287F0_DI_MAJOR_MODE_1 0x01 6828#define S_0287F0_NOT_EOP(x) (((unsigned)(x) & 0x1) << 5) 6829#define G_0287F0_NOT_EOP(x) (((x) >> 5) & 0x1) 6830#define C_0287F0_NOT_EOP 0xFFFFFFDF 6831#define S_0287F0_USE_OPAQUE(x) (((unsigned)(x) & 0x1) << 6) 6832#define G_0287F0_USE_OPAQUE(x) (((x) >> 6) & 0x1) 6833#define C_0287F0_USE_OPAQUE 0xFFFFFFBF 6834#define R_0287F4_VGT_IMMED_DATA 0x0287F4 /* not on CIK */ 6835#define R_0287F8_VGT_EVENT_ADDRESS_REG 0x0287F8 6836#define S_0287F8_ADDRESS_LOW(x) (((unsigned)(x) & 0xFFFFFFF) << 0) 6837#define G_0287F8_ADDRESS_LOW(x) (((x) >> 0) & 0xFFFFFFF) 6838#define C_0287F8_ADDRESS_LOW 0xF0000000 6839#define R_028800_DB_DEPTH_CONTROL 0x028800 6840#define S_028800_STENCIL_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 6841#define G_028800_STENCIL_ENABLE(x) (((x) >> 0) & 0x1) 6842#define C_028800_STENCIL_ENABLE 0xFFFFFFFE 6843#define S_028800_Z_ENABLE(x) (((unsigned)(x) & 0x1) << 1) 6844#define G_028800_Z_ENABLE(x) (((x) >> 1) & 0x1) 6845#define C_028800_Z_ENABLE 0xFFFFFFFD 6846#define S_028800_Z_WRITE_ENABLE(x) (((unsigned)(x) & 0x1) << 2) 6847#define G_028800_Z_WRITE_ENABLE(x) (((x) >> 2) & 0x1) 6848#define C_028800_Z_WRITE_ENABLE 0xFFFFFFFB 6849#define S_028800_DEPTH_BOUNDS_ENABLE(x) (((unsigned)(x) & 0x1) << 3) 6850#define G_028800_DEPTH_BOUNDS_ENABLE(x) (((x) >> 3) & 0x1) 6851#define C_028800_DEPTH_BOUNDS_ENABLE 0xFFFFFFF7 6852#define S_028800_ZFUNC(x) (((unsigned)(x) & 0x07) << 4) 6853#define G_028800_ZFUNC(x) (((x) >> 4) & 0x07) 6854#define C_028800_ZFUNC 0xFFFFFF8F 6855#define V_028800_FRAG_NEVER 0x00 6856#define V_028800_FRAG_LESS 0x01 6857#define V_028800_FRAG_EQUAL 0x02 6858#define V_028800_FRAG_LEQUAL 0x03 6859#define V_028800_FRAG_GREATER 0x04 6860#define V_028800_FRAG_NOTEQUAL 0x05 6861#define V_028800_FRAG_GEQUAL 0x06 6862#define V_028800_FRAG_ALWAYS 0x07 6863#define S_028800_BACKFACE_ENABLE(x) (((unsigned)(x) & 0x1) << 7) 6864#define G_028800_BACKFACE_ENABLE(x) (((x) >> 7) & 0x1) 6865#define C_028800_BACKFACE_ENABLE 0xFFFFFF7F 6866#define S_028800_STENCILFUNC(x) (((unsigned)(x) & 0x07) << 8) 6867#define G_028800_STENCILFUNC(x) (((x) >> 8) & 0x07) 6868#define C_028800_STENCILFUNC 0xFFFFF8FF 6869#define V_028800_REF_NEVER 0x00 6870#define V_028800_REF_LESS 0x01 6871#define V_028800_REF_EQUAL 0x02 6872#define V_028800_REF_LEQUAL 0x03 6873#define V_028800_REF_GREATER 0x04 6874#define V_028800_REF_NOTEQUAL 0x05 6875#define V_028800_REF_GEQUAL 0x06 6876#define V_028800_REF_ALWAYS 0x07 6877#define S_028800_STENCILFUNC_BF(x) (((unsigned)(x) & 0x07) << 20) 6878#define G_028800_STENCILFUNC_BF(x) (((x) >> 20) & 0x07) 6879#define C_028800_STENCILFUNC_BF 0xFF8FFFFF 6880#define V_028800_REF_NEVER 0x00 6881#define V_028800_REF_LESS 0x01 6882#define V_028800_REF_EQUAL 0x02 6883#define V_028800_REF_LEQUAL 0x03 6884#define V_028800_REF_GREATER 0x04 6885#define V_028800_REF_NOTEQUAL 0x05 6886#define V_028800_REF_GEQUAL 0x06 6887#define V_028800_REF_ALWAYS 0x07 6888#define S_028800_ENABLE_COLOR_WRITES_ON_DEPTH_FAIL(x) (((unsigned)(x) & 0x1) << 30) 6889#define G_028800_ENABLE_COLOR_WRITES_ON_DEPTH_FAIL(x) (((x) >> 30) & 0x1) 6890#define C_028800_ENABLE_COLOR_WRITES_ON_DEPTH_FAIL 0xBFFFFFFF 6891#define S_028800_DISABLE_COLOR_WRITES_ON_DEPTH_PASS(x) (((unsigned)(x) & 0x1) << 31) 6892#define G_028800_DISABLE_COLOR_WRITES_ON_DEPTH_PASS(x) (((x) >> 31) & 0x1) 6893#define C_028800_DISABLE_COLOR_WRITES_ON_DEPTH_PASS 0x7FFFFFFF 6894#define R_028804_DB_EQAA 0x028804 6895#define S_028804_MAX_ANCHOR_SAMPLES(x) (((unsigned)(x) & 0x07) << 0) 6896#define G_028804_MAX_ANCHOR_SAMPLES(x) (((x) >> 0) & 0x07) 6897#define C_028804_MAX_ANCHOR_SAMPLES 0xFFFFFFF8 6898#define S_028804_PS_ITER_SAMPLES(x) (((unsigned)(x) & 0x07) << 4) 6899#define G_028804_PS_ITER_SAMPLES(x) (((x) >> 4) & 0x07) 6900#define C_028804_PS_ITER_SAMPLES 0xFFFFFF8F 6901#define S_028804_MASK_EXPORT_NUM_SAMPLES(x) (((unsigned)(x) & 0x07) << 8) 6902#define G_028804_MASK_EXPORT_NUM_SAMPLES(x) (((x) >> 8) & 0x07) 6903#define C_028804_MASK_EXPORT_NUM_SAMPLES 0xFFFFF8FF 6904#define S_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((unsigned)(x) & 0x07) << 12) 6905#define G_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((x) >> 12) & 0x07) 6906#define C_028804_ALPHA_TO_MASK_NUM_SAMPLES 0xFFFF8FFF 6907#define S_028804_HIGH_QUALITY_INTERSECTIONS(x) (((unsigned)(x) & 0x1) << 16) 6908#define G_028804_HIGH_QUALITY_INTERSECTIONS(x) (((x) >> 16) & 0x1) 6909#define C_028804_HIGH_QUALITY_INTERSECTIONS 0xFFFEFFFF 6910#define S_028804_INCOHERENT_EQAA_READS(x) (((unsigned)(x) & 0x1) << 17) 6911#define G_028804_INCOHERENT_EQAA_READS(x) (((x) >> 17) & 0x1) 6912#define C_028804_INCOHERENT_EQAA_READS 0xFFFDFFFF 6913#define S_028804_INTERPOLATE_COMP_Z(x) (((unsigned)(x) & 0x1) << 18) 6914#define G_028804_INTERPOLATE_COMP_Z(x) (((x) >> 18) & 0x1) 6915#define C_028804_INTERPOLATE_COMP_Z 0xFFFBFFFF 6916#define S_028804_INTERPOLATE_SRC_Z(x) (((unsigned)(x) & 0x1) << 19) 6917#define G_028804_INTERPOLATE_SRC_Z(x) (((x) >> 19) & 0x1) 6918#define C_028804_INTERPOLATE_SRC_Z 0xFFF7FFFF 6919#define S_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((unsigned)(x) & 0x1) << 20) 6920#define G_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((x) >> 20) & 0x1) 6921#define C_028804_STATIC_ANCHOR_ASSOCIATIONS 0xFFEFFFFF 6922#define S_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((unsigned)(x) & 0x1) << 21) 6923#define G_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((x) >> 21) & 0x1) 6924#define C_028804_ALPHA_TO_MASK_EQAA_DISABLE 0xFFDFFFFF 6925#define S_028804_OVERRASTERIZATION_AMOUNT(x) (((unsigned)(x) & 0x07) << 24) 6926#define G_028804_OVERRASTERIZATION_AMOUNT(x) (((x) >> 24) & 0x07) 6927#define C_028804_OVERRASTERIZATION_AMOUNT 0xF8FFFFFF 6928#define S_028804_ENABLE_POSTZ_OVERRASTERIZATION(x) (((unsigned)(x) & 0x1) << 27) 6929#define G_028804_ENABLE_POSTZ_OVERRASTERIZATION(x) (((x) >> 27) & 0x1) 6930#define C_028804_ENABLE_POSTZ_OVERRASTERIZATION 0xF7FFFFFF 6931#define R_028808_CB_COLOR_CONTROL 0x028808 6932#define S_028808_DISABLE_DUAL_QUAD(x) (((unsigned)(x) & 0x1) << 0) 6933#define G_028808_DISABLE_DUAL_QUAD(x) (((x) >> 0) & 0x1) 6934#define C_028808_DISABLE_DUAL_QUAD 0xFFFFFFFE 6935#define S_028808_DEGAMMA_ENABLE(x) (((unsigned)(x) & 0x1) << 3) 6936#define G_028808_DEGAMMA_ENABLE(x) (((x) >> 3) & 0x1) 6937#define C_028808_DEGAMMA_ENABLE 0xFFFFFFF7 6938#define S_028808_MODE(x) (((unsigned)(x) & 0x07) << 4) 6939#define G_028808_MODE(x) (((x) >> 4) & 0x07) 6940#define C_028808_MODE 0xFFFFFF8F 6941#define V_028808_CB_DISABLE 0x00 6942#define V_028808_CB_NORMAL 0x01 6943#define V_028808_CB_ELIMINATE_FAST_CLEAR 0x02 6944#define V_028808_CB_RESOLVE 0x03 6945#define V_028808_CB_FMASK_DECOMPRESS 0x05 6946#define V_028808_CB_DCC_DECOMPRESS 0x06 6947#define S_028808_ROP3(x) (((unsigned)(x) & 0xFF) << 16) 6948#define G_028808_ROP3(x) (((x) >> 16) & 0xFF) 6949#define C_028808_ROP3 0xFF00FFFF 6950#define V_028808_ROP3_CLEAR 0x00 6951#define V_028808_ROP3_NOR 0x11 6952#define V_028808_ROP3_AND_INVERTED 0x22 6953#define V_028808_ROP3_COPY_INVERTED 0x33 6954#define V_028808_ROP3_AND_REVERSE 0x44 6955#define V_028808_ROP3_INVERT 0x55 6956#define V_028808_ROP3_XOR 0x66 6957#define V_028808_ROP3_NAND 0x77 6958#define V_028808_ROP3_AND 0x88 6959#define V_028808_ROP3_EQUIVALENT 0x99 6960#define V_028808_ROP3_NO_OP 0xaa 6961#define V_028808_ROP3_OR_INVERTED 0xbb 6962#define V_028808_ROP3_COPY 0xcc 6963#define V_028808_ROP3_OR_REVERSE 0xdd 6964#define V_028808_ROP3_OR 0xee 6965#define V_028808_ROP3_SET 0xff 6966#define R_02880C_DB_SHADER_CONTROL 0x02880C 6967#define S_02880C_Z_EXPORT_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 6968#define G_02880C_Z_EXPORT_ENABLE(x) (((x) >> 0) & 0x1) 6969#define C_02880C_Z_EXPORT_ENABLE 0xFFFFFFFE 6970#define S_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE(x) (((unsigned)(x) & 0x1) << 1) 6971#define G_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE(x) (((x) >> 1) & 0x1) 6972#define C_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE 0xFFFFFFFD 6973#define S_02880C_STENCIL_OP_VAL_EXPORT_ENABLE(x) (((unsigned)(x) & 0x1) << 2) 6974#define G_02880C_STENCIL_OP_VAL_EXPORT_ENABLE(x) (((x) >> 2) & 0x1) 6975#define C_02880C_STENCIL_OP_VAL_EXPORT_ENABLE 0xFFFFFFFB 6976#define S_02880C_Z_ORDER(x) (((unsigned)(x) & 0x03) << 4) 6977#define G_02880C_Z_ORDER(x) (((x) >> 4) & 0x03) 6978#define C_02880C_Z_ORDER 0xFFFFFFCF 6979#define V_02880C_LATE_Z 0x00 6980#define V_02880C_EARLY_Z_THEN_LATE_Z 0x01 6981#define V_02880C_RE_Z 0x02 6982#define V_02880C_EARLY_Z_THEN_RE_Z 0x03 6983#define S_02880C_KILL_ENABLE(x) (((unsigned)(x) & 0x1) << 6) 6984#define G_02880C_KILL_ENABLE(x) (((x) >> 6) & 0x1) 6985#define C_02880C_KILL_ENABLE 0xFFFFFFBF 6986#define S_02880C_COVERAGE_TO_MASK_ENABLE(x) (((unsigned)(x) & 0x1) << 7) 6987#define G_02880C_COVERAGE_TO_MASK_ENABLE(x) (((x) >> 7) & 0x1) 6988#define C_02880C_COVERAGE_TO_MASK_ENABLE 0xFFFFFF7F 6989#define S_02880C_MASK_EXPORT_ENABLE(x) (((unsigned)(x) & 0x1) << 8) 6990#define G_02880C_MASK_EXPORT_ENABLE(x) (((x) >> 8) & 0x1) 6991#define C_02880C_MASK_EXPORT_ENABLE 0xFFFFFEFF 6992#define S_02880C_EXEC_ON_HIER_FAIL(x) (((unsigned)(x) & 0x1) << 9) 6993#define G_02880C_EXEC_ON_HIER_FAIL(x) (((x) >> 9) & 0x1) 6994#define C_02880C_EXEC_ON_HIER_FAIL 0xFFFFFDFF 6995#define S_02880C_EXEC_ON_NOOP(x) (((unsigned)(x) & 0x1) << 10) 6996#define G_02880C_EXEC_ON_NOOP(x) (((x) >> 10) & 0x1) 6997#define C_02880C_EXEC_ON_NOOP 0xFFFFFBFF 6998#define S_02880C_ALPHA_TO_MASK_DISABLE(x) (((unsigned)(x) & 0x1) << 11) 6999#define G_02880C_ALPHA_TO_MASK_DISABLE(x) (((x) >> 11) & 0x1) 7000#define C_02880C_ALPHA_TO_MASK_DISABLE 0xFFFFF7FF 7001#define S_02880C_DEPTH_BEFORE_SHADER(x) (((unsigned)(x) & 0x1) << 12) 7002#define G_02880C_DEPTH_BEFORE_SHADER(x) (((x) >> 12) & 0x1) 7003#define C_02880C_DEPTH_BEFORE_SHADER 0xFFFFEFFF 7004/* CIK */ 7005#define S_02880C_CONSERVATIVE_Z_EXPORT(x) (((unsigned)(x) & 0x03) << 13) 7006#define G_02880C_CONSERVATIVE_Z_EXPORT(x) (((x) >> 13) & 0x03) 7007#define C_02880C_CONSERVATIVE_Z_EXPORT 0xFFFF9FFF 7008#define V_02880C_EXPORT_ANY_Z 0 7009#define V_02880C_EXPORT_LESS_THAN_Z 1 7010#define V_02880C_EXPORT_GREATER_THAN_Z 2 7011#define V_02880C_EXPORT_RESERVED 3 7012/* */ 7013/* Stoney */ 7014#define S_02880C_DUAL_QUAD_DISABLE(x) (((unsigned)(x) & 0x1) << 15) 7015#define G_02880C_DUAL_QUAD_DISABLE(x) (((x) >> 15) & 0x1) 7016#define C_02880C_DUAL_QUAD_DISABLE 0xFFFF7FFF 7017/* */ 7018#define R_028810_PA_CL_CLIP_CNTL 0x028810 7019#define S_028810_UCP_ENA_0(x) (((unsigned)(x) & 0x1) << 0) 7020#define G_028810_UCP_ENA_0(x) (((x) >> 0) & 0x1) 7021#define C_028810_UCP_ENA_0 0xFFFFFFFE 7022#define S_028810_UCP_ENA_1(x) (((unsigned)(x) & 0x1) << 1) 7023#define G_028810_UCP_ENA_1(x) (((x) >> 1) & 0x1) 7024#define C_028810_UCP_ENA_1 0xFFFFFFFD 7025#define S_028810_UCP_ENA_2(x) (((unsigned)(x) & 0x1) << 2) 7026#define G_028810_UCP_ENA_2(x) (((x) >> 2) & 0x1) 7027#define C_028810_UCP_ENA_2 0xFFFFFFFB 7028#define S_028810_UCP_ENA_3(x) (((unsigned)(x) & 0x1) << 3) 7029#define G_028810_UCP_ENA_3(x) (((x) >> 3) & 0x1) 7030#define C_028810_UCP_ENA_3 0xFFFFFFF7 7031#define S_028810_UCP_ENA_4(x) (((unsigned)(x) & 0x1) << 4) 7032#define G_028810_UCP_ENA_4(x) (((x) >> 4) & 0x1) 7033#define C_028810_UCP_ENA_4 0xFFFFFFEF 7034#define S_028810_UCP_ENA_5(x) (((unsigned)(x) & 0x1) << 5) 7035#define G_028810_UCP_ENA_5(x) (((x) >> 5) & 0x1) 7036#define C_028810_UCP_ENA_5 0xFFFFFFDF 7037#define S_028810_PS_UCP_Y_SCALE_NEG(x) (((unsigned)(x) & 0x1) << 13) 7038#define G_028810_PS_UCP_Y_SCALE_NEG(x) (((x) >> 13) & 0x1) 7039#define C_028810_PS_UCP_Y_SCALE_NEG 0xFFFFDFFF 7040#define S_028810_PS_UCP_MODE(x) (((unsigned)(x) & 0x03) << 14) 7041#define G_028810_PS_UCP_MODE(x) (((x) >> 14) & 0x03) 7042#define C_028810_PS_UCP_MODE 0xFFFF3FFF 7043#define S_028810_CLIP_DISABLE(x) (((unsigned)(x) & 0x1) << 16) 7044#define G_028810_CLIP_DISABLE(x) (((x) >> 16) & 0x1) 7045#define C_028810_CLIP_DISABLE 0xFFFEFFFF 7046#define S_028810_UCP_CULL_ONLY_ENA(x) (((unsigned)(x) & 0x1) << 17) 7047#define G_028810_UCP_CULL_ONLY_ENA(x) (((x) >> 17) & 0x1) 7048#define C_028810_UCP_CULL_ONLY_ENA 0xFFFDFFFF 7049#define S_028810_BOUNDARY_EDGE_FLAG_ENA(x) (((unsigned)(x) & 0x1) << 18) 7050#define G_028810_BOUNDARY_EDGE_FLAG_ENA(x) (((x) >> 18) & 0x1) 7051#define C_028810_BOUNDARY_EDGE_FLAG_ENA 0xFFFBFFFF 7052#define S_028810_DX_CLIP_SPACE_DEF(x) (((unsigned)(x) & 0x1) << 19) 7053#define G_028810_DX_CLIP_SPACE_DEF(x) (((x) >> 19) & 0x1) 7054#define C_028810_DX_CLIP_SPACE_DEF 0xFFF7FFFF 7055#define S_028810_DIS_CLIP_ERR_DETECT(x) (((unsigned)(x) & 0x1) << 20) 7056#define G_028810_DIS_CLIP_ERR_DETECT(x) (((x) >> 20) & 0x1) 7057#define C_028810_DIS_CLIP_ERR_DETECT 0xFFEFFFFF 7058#define S_028810_VTX_KILL_OR(x) (((unsigned)(x) & 0x1) << 21) 7059#define G_028810_VTX_KILL_OR(x) (((x) >> 21) & 0x1) 7060#define C_028810_VTX_KILL_OR 0xFFDFFFFF 7061#define S_028810_DX_RASTERIZATION_KILL(x) (((unsigned)(x) & 0x1) << 22) 7062#define G_028810_DX_RASTERIZATION_KILL(x) (((x) >> 22) & 0x1) 7063#define C_028810_DX_RASTERIZATION_KILL 0xFFBFFFFF 7064#define S_028810_DX_LINEAR_ATTR_CLIP_ENA(x) (((unsigned)(x) & 0x1) << 24) 7065#define G_028810_DX_LINEAR_ATTR_CLIP_ENA(x) (((x) >> 24) & 0x1) 7066#define C_028810_DX_LINEAR_ATTR_CLIP_ENA 0xFEFFFFFF 7067#define S_028810_VTE_VPORT_PROVOKE_DISABLE(x) (((unsigned)(x) & 0x1) << 25) 7068#define G_028810_VTE_VPORT_PROVOKE_DISABLE(x) (((x) >> 25) & 0x1) 7069#define C_028810_VTE_VPORT_PROVOKE_DISABLE 0xFDFFFFFF 7070#define S_028810_ZCLIP_NEAR_DISABLE(x) (((unsigned)(x) & 0x1) << 26) 7071#define G_028810_ZCLIP_NEAR_DISABLE(x) (((x) >> 26) & 0x1) 7072#define C_028810_ZCLIP_NEAR_DISABLE 0xFBFFFFFF 7073#define S_028810_ZCLIP_FAR_DISABLE(x) (((unsigned)(x) & 0x1) << 27) 7074#define G_028810_ZCLIP_FAR_DISABLE(x) (((x) >> 27) & 0x1) 7075#define C_028810_ZCLIP_FAR_DISABLE 0xF7FFFFFF 7076#define R_028814_PA_SU_SC_MODE_CNTL 0x028814 7077#define S_028814_CULL_FRONT(x) (((unsigned)(x) & 0x1) << 0) 7078#define G_028814_CULL_FRONT(x) (((x) >> 0) & 0x1) 7079#define C_028814_CULL_FRONT 0xFFFFFFFE 7080#define S_028814_CULL_BACK(x) (((unsigned)(x) & 0x1) << 1) 7081#define G_028814_CULL_BACK(x) (((x) >> 1) & 0x1) 7082#define C_028814_CULL_BACK 0xFFFFFFFD 7083#define S_028814_FACE(x) (((unsigned)(x) & 0x1) << 2) 7084#define G_028814_FACE(x) (((x) >> 2) & 0x1) 7085#define C_028814_FACE 0xFFFFFFFB 7086#define S_028814_POLY_MODE(x) (((unsigned)(x) & 0x03) << 3) 7087#define G_028814_POLY_MODE(x) (((x) >> 3) & 0x03) 7088#define C_028814_POLY_MODE 0xFFFFFFE7 7089#define V_028814_X_DISABLE_POLY_MODE 0x00 7090#define V_028814_X_DUAL_MODE 0x01 7091#define S_028814_POLYMODE_FRONT_PTYPE(x) (((unsigned)(x) & 0x07) << 5) 7092#define G_028814_POLYMODE_FRONT_PTYPE(x) (((x) >> 5) & 0x07) 7093#define C_028814_POLYMODE_FRONT_PTYPE 0xFFFFFF1F 7094#define V_028814_X_DRAW_POINTS 0x00 7095#define V_028814_X_DRAW_LINES 0x01 7096#define V_028814_X_DRAW_TRIANGLES 0x02 7097#define S_028814_POLYMODE_BACK_PTYPE(x) (((unsigned)(x) & 0x07) << 8) 7098#define G_028814_POLYMODE_BACK_PTYPE(x) (((x) >> 8) & 0x07) 7099#define C_028814_POLYMODE_BACK_PTYPE 0xFFFFF8FF 7100#define V_028814_X_DRAW_POINTS 0x00 7101#define V_028814_X_DRAW_LINES 0x01 7102#define V_028814_X_DRAW_TRIANGLES 0x02 7103#define S_028814_POLY_OFFSET_FRONT_ENABLE(x) (((unsigned)(x) & 0x1) << 11) 7104#define G_028814_POLY_OFFSET_FRONT_ENABLE(x) (((x) >> 11) & 0x1) 7105#define C_028814_POLY_OFFSET_FRONT_ENABLE 0xFFFFF7FF 7106#define S_028814_POLY_OFFSET_BACK_ENABLE(x) (((unsigned)(x) & 0x1) << 12) 7107#define G_028814_POLY_OFFSET_BACK_ENABLE(x) (((x) >> 12) & 0x1) 7108#define C_028814_POLY_OFFSET_BACK_ENABLE 0xFFFFEFFF 7109#define S_028814_POLY_OFFSET_PARA_ENABLE(x) (((unsigned)(x) & 0x1) << 13) 7110#define G_028814_POLY_OFFSET_PARA_ENABLE(x) (((x) >> 13) & 0x1) 7111#define C_028814_POLY_OFFSET_PARA_ENABLE 0xFFFFDFFF 7112#define S_028814_VTX_WINDOW_OFFSET_ENABLE(x) (((unsigned)(x) & 0x1) << 16) 7113#define G_028814_VTX_WINDOW_OFFSET_ENABLE(x) (((x) >> 16) & 0x1) 7114#define C_028814_VTX_WINDOW_OFFSET_ENABLE 0xFFFEFFFF 7115#define S_028814_PROVOKING_VTX_LAST(x) (((unsigned)(x) & 0x1) << 19) 7116#define G_028814_PROVOKING_VTX_LAST(x) (((x) >> 19) & 0x1) 7117#define C_028814_PROVOKING_VTX_LAST 0xFFF7FFFF 7118#define S_028814_PERSP_CORR_DIS(x) (((unsigned)(x) & 0x1) << 20) 7119#define G_028814_PERSP_CORR_DIS(x) (((x) >> 20) & 0x1) 7120#define C_028814_PERSP_CORR_DIS 0xFFEFFFFF 7121#define S_028814_MULTI_PRIM_IB_ENA(x) (((unsigned)(x) & 0x1) << 21) 7122#define G_028814_MULTI_PRIM_IB_ENA(x) (((x) >> 21) & 0x1) 7123#define C_028814_MULTI_PRIM_IB_ENA 0xFFDFFFFF 7124#define R_028818_PA_CL_VTE_CNTL 0x028818 7125#define S_028818_VPORT_X_SCALE_ENA(x) (((unsigned)(x) & 0x1) << 0) 7126#define G_028818_VPORT_X_SCALE_ENA(x) (((x) >> 0) & 0x1) 7127#define C_028818_VPORT_X_SCALE_ENA 0xFFFFFFFE 7128#define S_028818_VPORT_X_OFFSET_ENA(x) (((unsigned)(x) & 0x1) << 1) 7129#define G_028818_VPORT_X_OFFSET_ENA(x) (((x) >> 1) & 0x1) 7130#define C_028818_VPORT_X_OFFSET_ENA 0xFFFFFFFD 7131#define S_028818_VPORT_Y_SCALE_ENA(x) (((unsigned)(x) & 0x1) << 2) 7132#define G_028818_VPORT_Y_SCALE_ENA(x) (((x) >> 2) & 0x1) 7133#define C_028818_VPORT_Y_SCALE_ENA 0xFFFFFFFB 7134#define S_028818_VPORT_Y_OFFSET_ENA(x) (((unsigned)(x) & 0x1) << 3) 7135#define G_028818_VPORT_Y_OFFSET_ENA(x) (((x) >> 3) & 0x1) 7136#define C_028818_VPORT_Y_OFFSET_ENA 0xFFFFFFF7 7137#define S_028818_VPORT_Z_SCALE_ENA(x) (((unsigned)(x) & 0x1) << 4) 7138#define G_028818_VPORT_Z_SCALE_ENA(x) (((x) >> 4) & 0x1) 7139#define C_028818_VPORT_Z_SCALE_ENA 0xFFFFFFEF 7140#define S_028818_VPORT_Z_OFFSET_ENA(x) (((unsigned)(x) & 0x1) << 5) 7141#define G_028818_VPORT_Z_OFFSET_ENA(x) (((x) >> 5) & 0x1) 7142#define C_028818_VPORT_Z_OFFSET_ENA 0xFFFFFFDF 7143#define S_028818_VTX_XY_FMT(x) (((unsigned)(x) & 0x1) << 8) 7144#define G_028818_VTX_XY_FMT(x) (((x) >> 8) & 0x1) 7145#define C_028818_VTX_XY_FMT 0xFFFFFEFF 7146#define S_028818_VTX_Z_FMT(x) (((unsigned)(x) & 0x1) << 9) 7147#define G_028818_VTX_Z_FMT(x) (((x) >> 9) & 0x1) 7148#define C_028818_VTX_Z_FMT 0xFFFFFDFF 7149#define S_028818_VTX_W0_FMT(x) (((unsigned)(x) & 0x1) << 10) 7150#define G_028818_VTX_W0_FMT(x) (((x) >> 10) & 0x1) 7151#define C_028818_VTX_W0_FMT 0xFFFFFBFF 7152#define R_02881C_PA_CL_VS_OUT_CNTL 0x02881C 7153#define S_02881C_CLIP_DIST_ENA_0(x) (((unsigned)(x) & 0x1) << 0) 7154#define G_02881C_CLIP_DIST_ENA_0(x) (((x) >> 0) & 0x1) 7155#define C_02881C_CLIP_DIST_ENA_0 0xFFFFFFFE 7156#define S_02881C_CLIP_DIST_ENA_1(x) (((unsigned)(x) & 0x1) << 1) 7157#define G_02881C_CLIP_DIST_ENA_1(x) (((x) >> 1) & 0x1) 7158#define C_02881C_CLIP_DIST_ENA_1 0xFFFFFFFD 7159#define S_02881C_CLIP_DIST_ENA_2(x) (((unsigned)(x) & 0x1) << 2) 7160#define G_02881C_CLIP_DIST_ENA_2(x) (((x) >> 2) & 0x1) 7161#define C_02881C_CLIP_DIST_ENA_2 0xFFFFFFFB 7162#define S_02881C_CLIP_DIST_ENA_3(x) (((unsigned)(x) & 0x1) << 3) 7163#define G_02881C_CLIP_DIST_ENA_3(x) (((x) >> 3) & 0x1) 7164#define C_02881C_CLIP_DIST_ENA_3 0xFFFFFFF7 7165#define S_02881C_CLIP_DIST_ENA_4(x) (((unsigned)(x) & 0x1) << 4) 7166#define G_02881C_CLIP_DIST_ENA_4(x) (((x) >> 4) & 0x1) 7167#define C_02881C_CLIP_DIST_ENA_4 0xFFFFFFEF 7168#define S_02881C_CLIP_DIST_ENA_5(x) (((unsigned)(x) & 0x1) << 5) 7169#define G_02881C_CLIP_DIST_ENA_5(x) (((x) >> 5) & 0x1) 7170#define C_02881C_CLIP_DIST_ENA_5 0xFFFFFFDF 7171#define S_02881C_CLIP_DIST_ENA_6(x) (((unsigned)(x) & 0x1) << 6) 7172#define G_02881C_CLIP_DIST_ENA_6(x) (((x) >> 6) & 0x1) 7173#define C_02881C_CLIP_DIST_ENA_6 0xFFFFFFBF 7174#define S_02881C_CLIP_DIST_ENA_7(x) (((unsigned)(x) & 0x1) << 7) 7175#define G_02881C_CLIP_DIST_ENA_7(x) (((x) >> 7) & 0x1) 7176#define C_02881C_CLIP_DIST_ENA_7 0xFFFFFF7F 7177#define S_02881C_CULL_DIST_ENA_0(x) (((unsigned)(x) & 0x1) << 8) 7178#define G_02881C_CULL_DIST_ENA_0(x) (((x) >> 8) & 0x1) 7179#define C_02881C_CULL_DIST_ENA_0 0xFFFFFEFF 7180#define S_02881C_CULL_DIST_ENA_1(x) (((unsigned)(x) & 0x1) << 9) 7181#define G_02881C_CULL_DIST_ENA_1(x) (((x) >> 9) & 0x1) 7182#define C_02881C_CULL_DIST_ENA_1 0xFFFFFDFF 7183#define S_02881C_CULL_DIST_ENA_2(x) (((unsigned)(x) & 0x1) << 10) 7184#define G_02881C_CULL_DIST_ENA_2(x) (((x) >> 10) & 0x1) 7185#define C_02881C_CULL_DIST_ENA_2 0xFFFFFBFF 7186#define S_02881C_CULL_DIST_ENA_3(x) (((unsigned)(x) & 0x1) << 11) 7187#define G_02881C_CULL_DIST_ENA_3(x) (((x) >> 11) & 0x1) 7188#define C_02881C_CULL_DIST_ENA_3 0xFFFFF7FF 7189#define S_02881C_CULL_DIST_ENA_4(x) (((unsigned)(x) & 0x1) << 12) 7190#define G_02881C_CULL_DIST_ENA_4(x) (((x) >> 12) & 0x1) 7191#define C_02881C_CULL_DIST_ENA_4 0xFFFFEFFF 7192#define S_02881C_CULL_DIST_ENA_5(x) (((unsigned)(x) & 0x1) << 13) 7193#define G_02881C_CULL_DIST_ENA_5(x) (((x) >> 13) & 0x1) 7194#define C_02881C_CULL_DIST_ENA_5 0xFFFFDFFF 7195#define S_02881C_CULL_DIST_ENA_6(x) (((unsigned)(x) & 0x1) << 14) 7196#define G_02881C_CULL_DIST_ENA_6(x) (((x) >> 14) & 0x1) 7197#define C_02881C_CULL_DIST_ENA_6 0xFFFFBFFF 7198#define S_02881C_CULL_DIST_ENA_7(x) (((unsigned)(x) & 0x1) << 15) 7199#define G_02881C_CULL_DIST_ENA_7(x) (((x) >> 15) & 0x1) 7200#define C_02881C_CULL_DIST_ENA_7 0xFFFF7FFF 7201#define S_02881C_USE_VTX_POINT_SIZE(x) (((unsigned)(x) & 0x1) << 16) 7202#define G_02881C_USE_VTX_POINT_SIZE(x) (((x) >> 16) & 0x1) 7203#define C_02881C_USE_VTX_POINT_SIZE 0xFFFEFFFF 7204#define S_02881C_USE_VTX_EDGE_FLAG(x) (((unsigned)(x) & 0x1) << 17) 7205#define G_02881C_USE_VTX_EDGE_FLAG(x) (((x) >> 17) & 0x1) 7206#define C_02881C_USE_VTX_EDGE_FLAG 0xFFFDFFFF 7207#define S_02881C_USE_VTX_RENDER_TARGET_INDX(x) (((unsigned)(x) & 0x1) << 18) 7208#define G_02881C_USE_VTX_RENDER_TARGET_INDX(x) (((x) >> 18) & 0x1) 7209#define C_02881C_USE_VTX_RENDER_TARGET_INDX 0xFFFBFFFF 7210#define S_02881C_USE_VTX_VIEWPORT_INDX(x) (((unsigned)(x) & 0x1) << 19) 7211#define G_02881C_USE_VTX_VIEWPORT_INDX(x) (((x) >> 19) & 0x1) 7212#define C_02881C_USE_VTX_VIEWPORT_INDX 0xFFF7FFFF 7213#define S_02881C_USE_VTX_KILL_FLAG(x) (((unsigned)(x) & 0x1) << 20) 7214#define G_02881C_USE_VTX_KILL_FLAG(x) (((x) >> 20) & 0x1) 7215#define C_02881C_USE_VTX_KILL_FLAG 0xFFEFFFFF 7216#define S_02881C_VS_OUT_MISC_VEC_ENA(x) (((unsigned)(x) & 0x1) << 21) 7217#define G_02881C_VS_OUT_MISC_VEC_ENA(x) (((x) >> 21) & 0x1) 7218#define C_02881C_VS_OUT_MISC_VEC_ENA 0xFFDFFFFF 7219#define S_02881C_VS_OUT_CCDIST0_VEC_ENA(x) (((unsigned)(x) & 0x1) << 22) 7220#define G_02881C_VS_OUT_CCDIST0_VEC_ENA(x) (((x) >> 22) & 0x1) 7221#define C_02881C_VS_OUT_CCDIST0_VEC_ENA 0xFFBFFFFF 7222#define S_02881C_VS_OUT_CCDIST1_VEC_ENA(x) (((unsigned)(x) & 0x1) << 23) 7223#define G_02881C_VS_OUT_CCDIST1_VEC_ENA(x) (((x) >> 23) & 0x1) 7224#define C_02881C_VS_OUT_CCDIST1_VEC_ENA 0xFF7FFFFF 7225#define S_02881C_VS_OUT_MISC_SIDE_BUS_ENA(x) (((unsigned)(x) & 0x1) << 24) 7226#define G_02881C_VS_OUT_MISC_SIDE_BUS_ENA(x) (((x) >> 24) & 0x1) 7227#define C_02881C_VS_OUT_MISC_SIDE_BUS_ENA 0xFEFFFFFF 7228#define S_02881C_USE_VTX_GS_CUT_FLAG(x) (((unsigned)(x) & 0x1) << 25) 7229#define G_02881C_USE_VTX_GS_CUT_FLAG(x) (((x) >> 25) & 0x1) 7230#define C_02881C_USE_VTX_GS_CUT_FLAG 0xFDFFFFFF 7231/* VI */ 7232#define S_02881C_USE_VTX_LINE_WIDTH(x) (((unsigned)(x) & 0x1) << 26) 7233#define G_02881C_USE_VTX_LINE_WIDTH(x) (((x) >> 26) & 0x1) 7234#define C_02881C_USE_VTX_LINE_WIDTH 0xFBFFFFFF 7235/* */ 7236#define R_028820_PA_CL_NANINF_CNTL 0x028820 7237#define S_028820_VTE_XY_INF_DISCARD(x) (((unsigned)(x) & 0x1) << 0) 7238#define G_028820_VTE_XY_INF_DISCARD(x) (((x) >> 0) & 0x1) 7239#define C_028820_VTE_XY_INF_DISCARD 0xFFFFFFFE 7240#define S_028820_VTE_Z_INF_DISCARD(x) (((unsigned)(x) & 0x1) << 1) 7241#define G_028820_VTE_Z_INF_DISCARD(x) (((x) >> 1) & 0x1) 7242#define C_028820_VTE_Z_INF_DISCARD 0xFFFFFFFD 7243#define S_028820_VTE_W_INF_DISCARD(x) (((unsigned)(x) & 0x1) << 2) 7244#define G_028820_VTE_W_INF_DISCARD(x) (((x) >> 2) & 0x1) 7245#define C_028820_VTE_W_INF_DISCARD 0xFFFFFFFB 7246#define S_028820_VTE_0XNANINF_IS_0(x) (((unsigned)(x) & 0x1) << 3) 7247#define G_028820_VTE_0XNANINF_IS_0(x) (((x) >> 3) & 0x1) 7248#define C_028820_VTE_0XNANINF_IS_0 0xFFFFFFF7 7249#define S_028820_VTE_XY_NAN_RETAIN(x) (((unsigned)(x) & 0x1) << 4) 7250#define G_028820_VTE_XY_NAN_RETAIN(x) (((x) >> 4) & 0x1) 7251#define C_028820_VTE_XY_NAN_RETAIN 0xFFFFFFEF 7252#define S_028820_VTE_Z_NAN_RETAIN(x) (((unsigned)(x) & 0x1) << 5) 7253#define G_028820_VTE_Z_NAN_RETAIN(x) (((x) >> 5) & 0x1) 7254#define C_028820_VTE_Z_NAN_RETAIN 0xFFFFFFDF 7255#define S_028820_VTE_W_NAN_RETAIN(x) (((unsigned)(x) & 0x1) << 6) 7256#define G_028820_VTE_W_NAN_RETAIN(x) (((x) >> 6) & 0x1) 7257#define C_028820_VTE_W_NAN_RETAIN 0xFFFFFFBF 7258#define S_028820_VTE_W_RECIP_NAN_IS_0(x) (((unsigned)(x) & 0x1) << 7) 7259#define G_028820_VTE_W_RECIP_NAN_IS_0(x) (((x) >> 7) & 0x1) 7260#define C_028820_VTE_W_RECIP_NAN_IS_0 0xFFFFFF7F 7261#define S_028820_VS_XY_NAN_TO_INF(x) (((unsigned)(x) & 0x1) << 8) 7262#define G_028820_VS_XY_NAN_TO_INF(x) (((x) >> 8) & 0x1) 7263#define C_028820_VS_XY_NAN_TO_INF 0xFFFFFEFF 7264#define S_028820_VS_XY_INF_RETAIN(x) (((unsigned)(x) & 0x1) << 9) 7265#define G_028820_VS_XY_INF_RETAIN(x) (((x) >> 9) & 0x1) 7266#define C_028820_VS_XY_INF_RETAIN 0xFFFFFDFF 7267#define S_028820_VS_Z_NAN_TO_INF(x) (((unsigned)(x) & 0x1) << 10) 7268#define G_028820_VS_Z_NAN_TO_INF(x) (((x) >> 10) & 0x1) 7269#define C_028820_VS_Z_NAN_TO_INF 0xFFFFFBFF 7270#define S_028820_VS_Z_INF_RETAIN(x) (((unsigned)(x) & 0x1) << 11) 7271#define G_028820_VS_Z_INF_RETAIN(x) (((x) >> 11) & 0x1) 7272#define C_028820_VS_Z_INF_RETAIN 0xFFFFF7FF 7273#define S_028820_VS_W_NAN_TO_INF(x) (((unsigned)(x) & 0x1) << 12) 7274#define G_028820_VS_W_NAN_TO_INF(x) (((x) >> 12) & 0x1) 7275#define C_028820_VS_W_NAN_TO_INF 0xFFFFEFFF 7276#define S_028820_VS_W_INF_RETAIN(x) (((unsigned)(x) & 0x1) << 13) 7277#define G_028820_VS_W_INF_RETAIN(x) (((x) >> 13) & 0x1) 7278#define C_028820_VS_W_INF_RETAIN 0xFFFFDFFF 7279#define S_028820_VS_CLIP_DIST_INF_DISCARD(x) (((unsigned)(x) & 0x1) << 14) 7280#define G_028820_VS_CLIP_DIST_INF_DISCARD(x) (((x) >> 14) & 0x1) 7281#define C_028820_VS_CLIP_DIST_INF_DISCARD 0xFFFFBFFF 7282#define S_028820_VTE_NO_OUTPUT_NEG_0(x) (((unsigned)(x) & 0x1) << 20) 7283#define G_028820_VTE_NO_OUTPUT_NEG_0(x) (((x) >> 20) & 0x1) 7284#define C_028820_VTE_NO_OUTPUT_NEG_0 0xFFEFFFFF 7285#define R_028824_PA_SU_LINE_STIPPLE_CNTL 0x028824 7286#define S_028824_LINE_STIPPLE_RESET(x) (((unsigned)(x) & 0x03) << 0) 7287#define G_028824_LINE_STIPPLE_RESET(x) (((x) >> 0) & 0x03) 7288#define C_028824_LINE_STIPPLE_RESET 0xFFFFFFFC 7289#define S_028824_EXPAND_FULL_LENGTH(x) (((unsigned)(x) & 0x1) << 2) 7290#define G_028824_EXPAND_FULL_LENGTH(x) (((x) >> 2) & 0x1) 7291#define C_028824_EXPAND_FULL_LENGTH 0xFFFFFFFB 7292#define S_028824_FRACTIONAL_ACCUM(x) (((unsigned)(x) & 0x1) << 3) 7293#define G_028824_FRACTIONAL_ACCUM(x) (((x) >> 3) & 0x1) 7294#define C_028824_FRACTIONAL_ACCUM 0xFFFFFFF7 7295#define S_028824_DIAMOND_ADJUST(x) (((unsigned)(x) & 0x1) << 4) 7296#define G_028824_DIAMOND_ADJUST(x) (((x) >> 4) & 0x1) 7297#define C_028824_DIAMOND_ADJUST 0xFFFFFFEF 7298#define R_028828_PA_SU_LINE_STIPPLE_SCALE 0x028828 7299#define R_02882C_PA_SU_PRIM_FILTER_CNTL 0x02882C 7300#define S_02882C_TRIANGLE_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 0) 7301#define G_02882C_TRIANGLE_FILTER_DISABLE(x) (((x) >> 0) & 0x1) 7302#define C_02882C_TRIANGLE_FILTER_DISABLE 0xFFFFFFFE 7303#define S_02882C_LINE_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 1) 7304#define G_02882C_LINE_FILTER_DISABLE(x) (((x) >> 1) & 0x1) 7305#define C_02882C_LINE_FILTER_DISABLE 0xFFFFFFFD 7306#define S_02882C_POINT_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 2) 7307#define G_02882C_POINT_FILTER_DISABLE(x) (((x) >> 2) & 0x1) 7308#define C_02882C_POINT_FILTER_DISABLE 0xFFFFFFFB 7309#define S_02882C_RECTANGLE_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 3) 7310#define G_02882C_RECTANGLE_FILTER_DISABLE(x) (((x) >> 3) & 0x1) 7311#define C_02882C_RECTANGLE_FILTER_DISABLE 0xFFFFFFF7 7312#define S_02882C_TRIANGLE_EXPAND_ENA(x) (((unsigned)(x) & 0x1) << 4) 7313#define G_02882C_TRIANGLE_EXPAND_ENA(x) (((x) >> 4) & 0x1) 7314#define C_02882C_TRIANGLE_EXPAND_ENA 0xFFFFFFEF 7315#define S_02882C_LINE_EXPAND_ENA(x) (((unsigned)(x) & 0x1) << 5) 7316#define G_02882C_LINE_EXPAND_ENA(x) (((x) >> 5) & 0x1) 7317#define C_02882C_LINE_EXPAND_ENA 0xFFFFFFDF 7318#define S_02882C_POINT_EXPAND_ENA(x) (((unsigned)(x) & 0x1) << 6) 7319#define G_02882C_POINT_EXPAND_ENA(x) (((x) >> 6) & 0x1) 7320#define C_02882C_POINT_EXPAND_ENA 0xFFFFFFBF 7321#define S_02882C_RECTANGLE_EXPAND_ENA(x) (((unsigned)(x) & 0x1) << 7) 7322#define G_02882C_RECTANGLE_EXPAND_ENA(x) (((x) >> 7) & 0x1) 7323#define C_02882C_RECTANGLE_EXPAND_ENA 0xFFFFFF7F 7324#define S_02882C_PRIM_EXPAND_CONSTANT(x) (((unsigned)(x) & 0xFF) << 8) 7325#define G_02882C_PRIM_EXPAND_CONSTANT(x) (((x) >> 8) & 0xFF) 7326#define C_02882C_PRIM_EXPAND_CONSTANT 0xFFFF00FF 7327/* CIK */ 7328#define S_02882C_XMAX_RIGHT_EXCLUSION(x) (((unsigned)(x) & 0x1) << 30) 7329#define G_02882C_XMAX_RIGHT_EXCLUSION(x) (((x) >> 30) & 0x1) 7330#define C_02882C_XMAX_RIGHT_EXCLUSION 0xBFFFFFFF 7331#define S_02882C_YMAX_BOTTOM_EXCLUSION(x) (((unsigned)(x) & 0x1) << 31) 7332#define G_02882C_YMAX_BOTTOM_EXCLUSION(x) (((x) >> 31) & 0x1) 7333#define C_02882C_YMAX_BOTTOM_EXCLUSION 0x7FFFFFFF 7334/* */ 7335#define R_028830_PA_SU_SMALL_PRIM_FILTER_CNTL 0x028830 /* Polaris */ 7336#define S_028830_SMALL_PRIM_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 7337#define G_028830_SMALL_PRIM_FILTER_ENABLE(x) (((x) >> 0) & 0x1) 7338#define C_028830_SMALL_PRIM_FILTER_ENABLE 0xFFFFFFFE 7339#define S_028830_TRIANGLE_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 1) 7340#define G_028830_TRIANGLE_FILTER_DISABLE(x) (((x) >> 1) & 0x1) 7341#define C_028830_TRIANGLE_FILTER_DISABLE 0xFFFFFFFD 7342#define S_028830_LINE_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 2) 7343#define G_028830_LINE_FILTER_DISABLE(x) (((x) >> 2) & 0x1) 7344#define C_028830_LINE_FILTER_DISABLE 0xFFFFFFFB 7345#define S_028830_POINT_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 3) 7346#define G_028830_POINT_FILTER_DISABLE(x) (((x) >> 3) & 0x1) 7347#define C_028830_POINT_FILTER_DISABLE 0xFFFFFFF7 7348#define S_028830_RECTANGLE_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 4) 7349#define G_028830_RECTANGLE_FILTER_DISABLE(x) (((x) >> 4) & 0x1) 7350#define C_028830_RECTANGLE_FILTER_DISABLE 0xFFFFFFEF 7351#define R_028A00_PA_SU_POINT_SIZE 0x028A00 7352#define S_028A00_HEIGHT(x) (((unsigned)(x) & 0xFFFF) << 0) 7353#define G_028A00_HEIGHT(x) (((x) >> 0) & 0xFFFF) 7354#define C_028A00_HEIGHT 0xFFFF0000 7355#define S_028A00_WIDTH(x) (((unsigned)(x) & 0xFFFF) << 16) 7356#define G_028A00_WIDTH(x) (((x) >> 16) & 0xFFFF) 7357#define C_028A00_WIDTH 0x0000FFFF 7358#define R_028A04_PA_SU_POINT_MINMAX 0x028A04 7359#define S_028A04_MIN_SIZE(x) (((unsigned)(x) & 0xFFFF) << 0) 7360#define G_028A04_MIN_SIZE(x) (((x) >> 0) & 0xFFFF) 7361#define C_028A04_MIN_SIZE 0xFFFF0000 7362#define S_028A04_MAX_SIZE(x) (((unsigned)(x) & 0xFFFF) << 16) 7363#define G_028A04_MAX_SIZE(x) (((x) >> 16) & 0xFFFF) 7364#define C_028A04_MAX_SIZE 0x0000FFFF 7365#define R_028A08_PA_SU_LINE_CNTL 0x028A08 7366#define S_028A08_WIDTH(x) (((unsigned)(x) & 0xFFFF) << 0) 7367#define G_028A08_WIDTH(x) (((x) >> 0) & 0xFFFF) 7368#define C_028A08_WIDTH 0xFFFF0000 7369#define R_028A0C_PA_SC_LINE_STIPPLE 0x028A0C 7370#define S_028A0C_LINE_PATTERN(x) (((unsigned)(x) & 0xFFFF) << 0) 7371#define G_028A0C_LINE_PATTERN(x) (((x) >> 0) & 0xFFFF) 7372#define C_028A0C_LINE_PATTERN 0xFFFF0000 7373#define S_028A0C_REPEAT_COUNT(x) (((unsigned)(x) & 0xFF) << 16) 7374#define G_028A0C_REPEAT_COUNT(x) (((x) >> 16) & 0xFF) 7375#define C_028A0C_REPEAT_COUNT 0xFF00FFFF 7376#define S_028A0C_PATTERN_BIT_ORDER(x) (((unsigned)(x) & 0x1) << 28) 7377#define G_028A0C_PATTERN_BIT_ORDER(x) (((x) >> 28) & 0x1) 7378#define C_028A0C_PATTERN_BIT_ORDER 0xEFFFFFFF 7379#define S_028A0C_AUTO_RESET_CNTL(x) (((unsigned)(x) & 0x03) << 29) 7380#define G_028A0C_AUTO_RESET_CNTL(x) (((x) >> 29) & 0x03) 7381#define C_028A0C_AUTO_RESET_CNTL 0x9FFFFFFF 7382#define R_028A10_VGT_OUTPUT_PATH_CNTL 0x028A10 7383#define S_028A10_PATH_SELECT(x) (((unsigned)(x) & 0x07) << 0) 7384#define G_028A10_PATH_SELECT(x) (((x) >> 0) & 0x07) 7385#define C_028A10_PATH_SELECT 0xFFFFFFF8 7386#define V_028A10_VGT_OUTPATH_VTX_REUSE 0x00 7387#define V_028A10_VGT_OUTPATH_TESS_EN 0x01 7388#define V_028A10_VGT_OUTPATH_PASSTHRU 0x02 7389#define V_028A10_VGT_OUTPATH_GS_BLOCK 0x03 7390#define V_028A10_VGT_OUTPATH_HS_BLOCK 0x04 7391#define R_028A14_VGT_HOS_CNTL 0x028A14 7392#define S_028A14_TESS_MODE(x) (((unsigned)(x) & 0x03) << 0) 7393#define G_028A14_TESS_MODE(x) (((x) >> 0) & 0x03) 7394#define C_028A14_TESS_MODE 0xFFFFFFFC 7395#define R_028A18_VGT_HOS_MAX_TESS_LEVEL 0x028A18 7396#define R_028A1C_VGT_HOS_MIN_TESS_LEVEL 0x028A1C 7397#define R_028A20_VGT_HOS_REUSE_DEPTH 0x028A20 7398#define S_028A20_REUSE_DEPTH(x) (((unsigned)(x) & 0xFF) << 0) 7399#define G_028A20_REUSE_DEPTH(x) (((x) >> 0) & 0xFF) 7400#define C_028A20_REUSE_DEPTH 0xFFFFFF00 7401#define R_028A24_VGT_GROUP_PRIM_TYPE 0x028A24 7402#define S_028A24_PRIM_TYPE(x) (((unsigned)(x) & 0x1F) << 0) 7403#define G_028A24_PRIM_TYPE(x) (((x) >> 0) & 0x1F) 7404#define C_028A24_PRIM_TYPE 0xFFFFFFE0 7405#define V_028A24_VGT_GRP_3D_POINT 0x00 7406#define V_028A24_VGT_GRP_3D_LINE 0x01 7407#define V_028A24_VGT_GRP_3D_TRI 0x02 7408#define V_028A24_VGT_GRP_3D_RECT 0x03 7409#define V_028A24_VGT_GRP_3D_QUAD 0x04 7410#define V_028A24_VGT_GRP_2D_COPY_RECT_V0 0x05 7411#define V_028A24_VGT_GRP_2D_COPY_RECT_V1 0x06 7412#define V_028A24_VGT_GRP_2D_COPY_RECT_V2 0x07 7413#define V_028A24_VGT_GRP_2D_COPY_RECT_V3 0x08 7414#define V_028A24_VGT_GRP_2D_FILL_RECT 0x09 7415#define V_028A24_VGT_GRP_2D_LINE 0x0A 7416#define V_028A24_VGT_GRP_2D_TRI 0x0B 7417#define V_028A24_VGT_GRP_PRIM_INDEX_LINE 0x0C 7418#define V_028A24_VGT_GRP_PRIM_INDEX_TRI 0x0D 7419#define V_028A24_VGT_GRP_PRIM_INDEX_QUAD 0x0E 7420#define V_028A24_VGT_GRP_3D_LINE_ADJ 0x0F 7421#define V_028A24_VGT_GRP_3D_TRI_ADJ 0x10 7422#define V_028A24_VGT_GRP_3D_PATCH 0x11 7423#define S_028A24_RETAIN_ORDER(x) (((unsigned)(x) & 0x1) << 14) 7424#define G_028A24_RETAIN_ORDER(x) (((x) >> 14) & 0x1) 7425#define C_028A24_RETAIN_ORDER 0xFFFFBFFF 7426#define S_028A24_RETAIN_QUADS(x) (((unsigned)(x) & 0x1) << 15) 7427#define G_028A24_RETAIN_QUADS(x) (((x) >> 15) & 0x1) 7428#define C_028A24_RETAIN_QUADS 0xFFFF7FFF 7429#define S_028A24_PRIM_ORDER(x) (((unsigned)(x) & 0x07) << 16) 7430#define G_028A24_PRIM_ORDER(x) (((x) >> 16) & 0x07) 7431#define C_028A24_PRIM_ORDER 0xFFF8FFFF 7432#define V_028A24_VGT_GRP_LIST 0x00 7433#define V_028A24_VGT_GRP_STRIP 0x01 7434#define V_028A24_VGT_GRP_FAN 0x02 7435#define V_028A24_VGT_GRP_LOOP 0x03 7436#define V_028A24_VGT_GRP_POLYGON 0x04 7437#define R_028A28_VGT_GROUP_FIRST_DECR 0x028A28 7438#define S_028A28_FIRST_DECR(x) (((unsigned)(x) & 0x0F) << 0) 7439#define G_028A28_FIRST_DECR(x) (((x) >> 0) & 0x0F) 7440#define C_028A28_FIRST_DECR 0xFFFFFFF0 7441#define R_028A2C_VGT_GROUP_DECR 0x028A2C 7442#define S_028A2C_DECR(x) (((unsigned)(x) & 0x0F) << 0) 7443#define G_028A2C_DECR(x) (((x) >> 0) & 0x0F) 7444#define C_028A2C_DECR 0xFFFFFFF0 7445#define R_028A30_VGT_GROUP_VECT_0_CNTL 0x028A30 7446#define S_028A30_COMP_X_EN(x) (((unsigned)(x) & 0x1) << 0) 7447#define G_028A30_COMP_X_EN(x) (((x) >> 0) & 0x1) 7448#define C_028A30_COMP_X_EN 0xFFFFFFFE 7449#define S_028A30_COMP_Y_EN(x) (((unsigned)(x) & 0x1) << 1) 7450#define G_028A30_COMP_Y_EN(x) (((x) >> 1) & 0x1) 7451#define C_028A30_COMP_Y_EN 0xFFFFFFFD 7452#define S_028A30_COMP_Z_EN(x) (((unsigned)(x) & 0x1) << 2) 7453#define G_028A30_COMP_Z_EN(x) (((x) >> 2) & 0x1) 7454#define C_028A30_COMP_Z_EN 0xFFFFFFFB 7455#define S_028A30_COMP_W_EN(x) (((unsigned)(x) & 0x1) << 3) 7456#define G_028A30_COMP_W_EN(x) (((x) >> 3) & 0x1) 7457#define C_028A30_COMP_W_EN 0xFFFFFFF7 7458#define S_028A30_STRIDE(x) (((unsigned)(x) & 0xFF) << 8) 7459#define G_028A30_STRIDE(x) (((x) >> 8) & 0xFF) 7460#define C_028A30_STRIDE 0xFFFF00FF 7461#define S_028A30_SHIFT(x) (((unsigned)(x) & 0xFF) << 16) 7462#define G_028A30_SHIFT(x) (((x) >> 16) & 0xFF) 7463#define C_028A30_SHIFT 0xFF00FFFF 7464#define R_028A34_VGT_GROUP_VECT_1_CNTL 0x028A34 7465#define S_028A34_COMP_X_EN(x) (((unsigned)(x) & 0x1) << 0) 7466#define G_028A34_COMP_X_EN(x) (((x) >> 0) & 0x1) 7467#define C_028A34_COMP_X_EN 0xFFFFFFFE 7468#define S_028A34_COMP_Y_EN(x) (((unsigned)(x) & 0x1) << 1) 7469#define G_028A34_COMP_Y_EN(x) (((x) >> 1) & 0x1) 7470#define C_028A34_COMP_Y_EN 0xFFFFFFFD 7471#define S_028A34_COMP_Z_EN(x) (((unsigned)(x) & 0x1) << 2) 7472#define G_028A34_COMP_Z_EN(x) (((x) >> 2) & 0x1) 7473#define C_028A34_COMP_Z_EN 0xFFFFFFFB 7474#define S_028A34_COMP_W_EN(x) (((unsigned)(x) & 0x1) << 3) 7475#define G_028A34_COMP_W_EN(x) (((x) >> 3) & 0x1) 7476#define C_028A34_COMP_W_EN 0xFFFFFFF7 7477#define S_028A34_STRIDE(x) (((unsigned)(x) & 0xFF) << 8) 7478#define G_028A34_STRIDE(x) (((x) >> 8) & 0xFF) 7479#define C_028A34_STRIDE 0xFFFF00FF 7480#define S_028A34_SHIFT(x) (((unsigned)(x) & 0xFF) << 16) 7481#define G_028A34_SHIFT(x) (((x) >> 16) & 0xFF) 7482#define C_028A34_SHIFT 0xFF00FFFF 7483#define R_028A38_VGT_GROUP_VECT_0_FMT_CNTL 0x028A38 7484#define S_028A38_X_CONV(x) (((unsigned)(x) & 0x0F) << 0) 7485#define G_028A38_X_CONV(x) (((x) >> 0) & 0x0F) 7486#define C_028A38_X_CONV 0xFFFFFFF0 7487#define V_028A38_VGT_GRP_INDEX_16 0x00 7488#define V_028A38_VGT_GRP_INDEX_32 0x01 7489#define V_028A38_VGT_GRP_UINT_16 0x02 7490#define V_028A38_VGT_GRP_UINT_32 0x03 7491#define V_028A38_VGT_GRP_SINT_16 0x04 7492#define V_028A38_VGT_GRP_SINT_32 0x05 7493#define V_028A38_VGT_GRP_FLOAT_32 0x06 7494#define V_028A38_VGT_GRP_AUTO_PRIM 0x07 7495#define V_028A38_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 7496#define S_028A38_X_OFFSET(x) (((unsigned)(x) & 0x0F) << 4) 7497#define G_028A38_X_OFFSET(x) (((x) >> 4) & 0x0F) 7498#define C_028A38_X_OFFSET 0xFFFFFF0F 7499#define S_028A38_Y_CONV(x) (((unsigned)(x) & 0x0F) << 8) 7500#define G_028A38_Y_CONV(x) (((x) >> 8) & 0x0F) 7501#define C_028A38_Y_CONV 0xFFFFF0FF 7502#define V_028A38_VGT_GRP_INDEX_16 0x00 7503#define V_028A38_VGT_GRP_INDEX_32 0x01 7504#define V_028A38_VGT_GRP_UINT_16 0x02 7505#define V_028A38_VGT_GRP_UINT_32 0x03 7506#define V_028A38_VGT_GRP_SINT_16 0x04 7507#define V_028A38_VGT_GRP_SINT_32 0x05 7508#define V_028A38_VGT_GRP_FLOAT_32 0x06 7509#define V_028A38_VGT_GRP_AUTO_PRIM 0x07 7510#define V_028A38_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 7511#define S_028A38_Y_OFFSET(x) (((unsigned)(x) & 0x0F) << 12) 7512#define G_028A38_Y_OFFSET(x) (((x) >> 12) & 0x0F) 7513#define C_028A38_Y_OFFSET 0xFFFF0FFF 7514#define S_028A38_Z_CONV(x) (((unsigned)(x) & 0x0F) << 16) 7515#define G_028A38_Z_CONV(x) (((x) >> 16) & 0x0F) 7516#define C_028A38_Z_CONV 0xFFF0FFFF 7517#define V_028A38_VGT_GRP_INDEX_16 0x00 7518#define V_028A38_VGT_GRP_INDEX_32 0x01 7519#define V_028A38_VGT_GRP_UINT_16 0x02 7520#define V_028A38_VGT_GRP_UINT_32 0x03 7521#define V_028A38_VGT_GRP_SINT_16 0x04 7522#define V_028A38_VGT_GRP_SINT_32 0x05 7523#define V_028A38_VGT_GRP_FLOAT_32 0x06 7524#define V_028A38_VGT_GRP_AUTO_PRIM 0x07 7525#define V_028A38_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 7526#define S_028A38_Z_OFFSET(x) (((unsigned)(x) & 0x0F) << 20) 7527#define G_028A38_Z_OFFSET(x) (((x) >> 20) & 0x0F) 7528#define C_028A38_Z_OFFSET 0xFF0FFFFF 7529#define S_028A38_W_CONV(x) (((unsigned)(x) & 0x0F) << 24) 7530#define G_028A38_W_CONV(x) (((x) >> 24) & 0x0F) 7531#define C_028A38_W_CONV 0xF0FFFFFF 7532#define V_028A38_VGT_GRP_INDEX_16 0x00 7533#define V_028A38_VGT_GRP_INDEX_32 0x01 7534#define V_028A38_VGT_GRP_UINT_16 0x02 7535#define V_028A38_VGT_GRP_UINT_32 0x03 7536#define V_028A38_VGT_GRP_SINT_16 0x04 7537#define V_028A38_VGT_GRP_SINT_32 0x05 7538#define V_028A38_VGT_GRP_FLOAT_32 0x06 7539#define V_028A38_VGT_GRP_AUTO_PRIM 0x07 7540#define V_028A38_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 7541#define S_028A38_W_OFFSET(x) (((unsigned)(x) & 0x0F) << 28) 7542#define G_028A38_W_OFFSET(x) (((x) >> 28) & 0x0F) 7543#define C_028A38_W_OFFSET 0x0FFFFFFF 7544#define R_028A3C_VGT_GROUP_VECT_1_FMT_CNTL 0x028A3C 7545#define S_028A3C_X_CONV(x) (((unsigned)(x) & 0x0F) << 0) 7546#define G_028A3C_X_CONV(x) (((x) >> 0) & 0x0F) 7547#define C_028A3C_X_CONV 0xFFFFFFF0 7548#define V_028A3C_VGT_GRP_INDEX_16 0x00 7549#define V_028A3C_VGT_GRP_INDEX_32 0x01 7550#define V_028A3C_VGT_GRP_UINT_16 0x02 7551#define V_028A3C_VGT_GRP_UINT_32 0x03 7552#define V_028A3C_VGT_GRP_SINT_16 0x04 7553#define V_028A3C_VGT_GRP_SINT_32 0x05 7554#define V_028A3C_VGT_GRP_FLOAT_32 0x06 7555#define V_028A3C_VGT_GRP_AUTO_PRIM 0x07 7556#define V_028A3C_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 7557#define S_028A3C_X_OFFSET(x) (((unsigned)(x) & 0x0F) << 4) 7558#define G_028A3C_X_OFFSET(x) (((x) >> 4) & 0x0F) 7559#define C_028A3C_X_OFFSET 0xFFFFFF0F 7560#define S_028A3C_Y_CONV(x) (((unsigned)(x) & 0x0F) << 8) 7561#define G_028A3C_Y_CONV(x) (((x) >> 8) & 0x0F) 7562#define C_028A3C_Y_CONV 0xFFFFF0FF 7563#define V_028A3C_VGT_GRP_INDEX_16 0x00 7564#define V_028A3C_VGT_GRP_INDEX_32 0x01 7565#define V_028A3C_VGT_GRP_UINT_16 0x02 7566#define V_028A3C_VGT_GRP_UINT_32 0x03 7567#define V_028A3C_VGT_GRP_SINT_16 0x04 7568#define V_028A3C_VGT_GRP_SINT_32 0x05 7569#define V_028A3C_VGT_GRP_FLOAT_32 0x06 7570#define V_028A3C_VGT_GRP_AUTO_PRIM 0x07 7571#define V_028A3C_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 7572#define S_028A3C_Y_OFFSET(x) (((unsigned)(x) & 0x0F) << 12) 7573#define G_028A3C_Y_OFFSET(x) (((x) >> 12) & 0x0F) 7574#define C_028A3C_Y_OFFSET 0xFFFF0FFF 7575#define S_028A3C_Z_CONV(x) (((unsigned)(x) & 0x0F) << 16) 7576#define G_028A3C_Z_CONV(x) (((x) >> 16) & 0x0F) 7577#define C_028A3C_Z_CONV 0xFFF0FFFF 7578#define V_028A3C_VGT_GRP_INDEX_16 0x00 7579#define V_028A3C_VGT_GRP_INDEX_32 0x01 7580#define V_028A3C_VGT_GRP_UINT_16 0x02 7581#define V_028A3C_VGT_GRP_UINT_32 0x03 7582#define V_028A3C_VGT_GRP_SINT_16 0x04 7583#define V_028A3C_VGT_GRP_SINT_32 0x05 7584#define V_028A3C_VGT_GRP_FLOAT_32 0x06 7585#define V_028A3C_VGT_GRP_AUTO_PRIM 0x07 7586#define V_028A3C_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 7587#define S_028A3C_Z_OFFSET(x) (((unsigned)(x) & 0x0F) << 20) 7588#define G_028A3C_Z_OFFSET(x) (((x) >> 20) & 0x0F) 7589#define C_028A3C_Z_OFFSET 0xFF0FFFFF 7590#define S_028A3C_W_CONV(x) (((unsigned)(x) & 0x0F) << 24) 7591#define G_028A3C_W_CONV(x) (((x) >> 24) & 0x0F) 7592#define C_028A3C_W_CONV 0xF0FFFFFF 7593#define V_028A3C_VGT_GRP_INDEX_16 0x00 7594#define V_028A3C_VGT_GRP_INDEX_32 0x01 7595#define V_028A3C_VGT_GRP_UINT_16 0x02 7596#define V_028A3C_VGT_GRP_UINT_32 0x03 7597#define V_028A3C_VGT_GRP_SINT_16 0x04 7598#define V_028A3C_VGT_GRP_SINT_32 0x05 7599#define V_028A3C_VGT_GRP_FLOAT_32 0x06 7600#define V_028A3C_VGT_GRP_AUTO_PRIM 0x07 7601#define V_028A3C_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 7602#define S_028A3C_W_OFFSET(x) (((unsigned)(x) & 0x0F) << 28) 7603#define G_028A3C_W_OFFSET(x) (((x) >> 28) & 0x0F) 7604#define C_028A3C_W_OFFSET 0x0FFFFFFF 7605#define R_028A40_VGT_GS_MODE 0x028A40 7606#define S_028A40_MODE(x) (((unsigned)(x) & 0x07) << 0) 7607#define G_028A40_MODE(x) (((x) >> 0) & 0x07) 7608#define C_028A40_MODE 0xFFFFFFF8 7609#define V_028A40_GS_OFF 0x00 7610#define V_028A40_GS_SCENARIO_A 0x01 7611#define V_028A40_GS_SCENARIO_B 0x02 7612#define V_028A40_GS_SCENARIO_G 0x03 7613#define V_028A40_GS_SCENARIO_C 0x04 7614#define V_028A40_SPRITE_EN 0x05 7615#define S_028A40_RESERVED_0(x) (((unsigned)(x) & 0x1) << 3) 7616#define G_028A40_RESERVED_0(x) (((x) >> 3) & 0x1) 7617#define C_028A40_RESERVED_0 0xFFFFFFF7 7618#define S_028A40_CUT_MODE(x) (((unsigned)(x) & 0x03) << 4) 7619#define G_028A40_CUT_MODE(x) (((x) >> 4) & 0x03) 7620#define C_028A40_CUT_MODE 0xFFFFFFCF 7621#define V_028A40_GS_CUT_1024 0x00 7622#define V_028A40_GS_CUT_512 0x01 7623#define V_028A40_GS_CUT_256 0x02 7624#define V_028A40_GS_CUT_128 0x03 7625#define S_028A40_RESERVED_1(x) (((unsigned)(x) & 0x1F) << 6) 7626#define G_028A40_RESERVED_1(x) (((x) >> 6) & 0x1F) 7627#define C_028A40_RESERVED_1 0xFFFFF83F 7628#define S_028A40_GS_C_PACK_EN(x) (((unsigned)(x) & 0x1) << 11) 7629#define G_028A40_GS_C_PACK_EN(x) (((x) >> 11) & 0x1) 7630#define C_028A40_GS_C_PACK_EN 0xFFFFF7FF 7631#define S_028A40_RESERVED_2(x) (((unsigned)(x) & 0x1) << 12) 7632#define G_028A40_RESERVED_2(x) (((x) >> 12) & 0x1) 7633#define C_028A40_RESERVED_2 0xFFFFEFFF 7634#define S_028A40_ES_PASSTHRU(x) (((unsigned)(x) & 0x1) << 13) 7635#define G_028A40_ES_PASSTHRU(x) (((x) >> 13) & 0x1) 7636#define C_028A40_ES_PASSTHRU 0xFFFFDFFF 7637/* SI-CIK */ 7638#define S_028A40_COMPUTE_MODE(x) (((unsigned)(x) & 0x1) << 14) 7639#define G_028A40_COMPUTE_MODE(x) (((x) >> 14) & 0x1) 7640#define C_028A40_COMPUTE_MODE 0xFFFFBFFF 7641#define S_028A40_FAST_COMPUTE_MODE(x) (((unsigned)(x) & 0x1) << 15) 7642#define G_028A40_FAST_COMPUTE_MODE(x) (((x) >> 15) & 0x1) 7643#define C_028A40_FAST_COMPUTE_MODE 0xFFFF7FFF 7644#define S_028A40_ELEMENT_INFO_EN(x) (((unsigned)(x) & 0x1) << 16) 7645#define G_028A40_ELEMENT_INFO_EN(x) (((x) >> 16) & 0x1) 7646#define C_028A40_ELEMENT_INFO_EN 0xFFFEFFFF 7647/* */ 7648#define S_028A40_PARTIAL_THD_AT_EOI(x) (((unsigned)(x) & 0x1) << 17) 7649#define G_028A40_PARTIAL_THD_AT_EOI(x) (((x) >> 17) & 0x1) 7650#define C_028A40_PARTIAL_THD_AT_EOI 0xFFFDFFFF 7651#define S_028A40_SUPPRESS_CUTS(x) (((unsigned)(x) & 0x1) << 18) 7652#define G_028A40_SUPPRESS_CUTS(x) (((x) >> 18) & 0x1) 7653#define C_028A40_SUPPRESS_CUTS 0xFFFBFFFF 7654#define S_028A40_ES_WRITE_OPTIMIZE(x) (((unsigned)(x) & 0x1) << 19) 7655#define G_028A40_ES_WRITE_OPTIMIZE(x) (((x) >> 19) & 0x1) 7656#define C_028A40_ES_WRITE_OPTIMIZE 0xFFF7FFFF 7657#define S_028A40_GS_WRITE_OPTIMIZE(x) (((unsigned)(x) & 0x1) << 20) 7658#define G_028A40_GS_WRITE_OPTIMIZE(x) (((x) >> 20) & 0x1) 7659#define C_028A40_GS_WRITE_OPTIMIZE 0xFFEFFFFF 7660/* CIK */ 7661#define S_028A40_ONCHIP(x) (((unsigned)(x) & 0x03) << 21) 7662#define G_028A40_ONCHIP(x) (((x) >> 21) & 0x03) 7663#define C_028A40_ONCHIP 0xFF9FFFFF 7664#define V_028A40_X_0_OFFCHIP_GS 0x00 7665#define V_028A40_X_3_ES_AND_GS_ARE_ONCHIP 0x03 7666#define R_028A44_VGT_GS_ONCHIP_CNTL 0x028A44 7667#define S_028A44_ES_VERTS_PER_SUBGRP(x) (((unsigned)(x) & 0x7FF) << 0) 7668#define G_028A44_ES_VERTS_PER_SUBGRP(x) (((x) >> 0) & 0x7FF) 7669#define C_028A44_ES_VERTS_PER_SUBGRP 0xFFFFF800 7670#define S_028A44_GS_PRIMS_PER_SUBGRP(x) (((unsigned)(x) & 0x7FF) << 11) 7671#define G_028A44_GS_PRIMS_PER_SUBGRP(x) (((x) >> 11) & 0x7FF) 7672#define C_028A44_GS_PRIMS_PER_SUBGRP 0xFFC007FF 7673/* */ 7674#define R_028A48_PA_SC_MODE_CNTL_0 0x028A48 7675#define S_028A48_MSAA_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 7676#define G_028A48_MSAA_ENABLE(x) (((x) >> 0) & 0x1) 7677#define C_028A48_MSAA_ENABLE 0xFFFFFFFE 7678#define S_028A48_VPORT_SCISSOR_ENABLE(x) (((unsigned)(x) & 0x1) << 1) 7679#define G_028A48_VPORT_SCISSOR_ENABLE(x) (((x) >> 1) & 0x1) 7680#define C_028A48_VPORT_SCISSOR_ENABLE 0xFFFFFFFD 7681#define S_028A48_LINE_STIPPLE_ENABLE(x) (((unsigned)(x) & 0x1) << 2) 7682#define G_028A48_LINE_STIPPLE_ENABLE(x) (((x) >> 2) & 0x1) 7683#define C_028A48_LINE_STIPPLE_ENABLE 0xFFFFFFFB 7684#define S_028A48_SEND_UNLIT_STILES_TO_PKR(x) (((unsigned)(x) & 0x1) << 3) 7685#define G_028A48_SEND_UNLIT_STILES_TO_PKR(x) (((x) >> 3) & 0x1) 7686#define C_028A48_SEND_UNLIT_STILES_TO_PKR 0xFFFFFFF7 7687#define R_028A4C_PA_SC_MODE_CNTL_1 0x028A4C 7688#define S_028A4C_WALK_SIZE(x) (((unsigned)(x) & 0x1) << 0) 7689#define G_028A4C_WALK_SIZE(x) (((x) >> 0) & 0x1) 7690#define C_028A4C_WALK_SIZE 0xFFFFFFFE 7691#define S_028A4C_WALK_ALIGNMENT(x) (((unsigned)(x) & 0x1) << 1) 7692#define G_028A4C_WALK_ALIGNMENT(x) (((x) >> 1) & 0x1) 7693#define C_028A4C_WALK_ALIGNMENT 0xFFFFFFFD 7694#define S_028A4C_WALK_ALIGN8_PRIM_FITS_ST(x) (((unsigned)(x) & 0x1) << 2) 7695#define G_028A4C_WALK_ALIGN8_PRIM_FITS_ST(x) (((x) >> 2) & 0x1) 7696#define C_028A4C_WALK_ALIGN8_PRIM_FITS_ST 0xFFFFFFFB 7697#define S_028A4C_WALK_FENCE_ENABLE(x) (((unsigned)(x) & 0x1) << 3) 7698#define G_028A4C_WALK_FENCE_ENABLE(x) (((x) >> 3) & 0x1) 7699#define C_028A4C_WALK_FENCE_ENABLE 0xFFFFFFF7 7700#define S_028A4C_WALK_FENCE_SIZE(x) (((unsigned)(x) & 0x07) << 4) 7701#define G_028A4C_WALK_FENCE_SIZE(x) (((x) >> 4) & 0x07) 7702#define C_028A4C_WALK_FENCE_SIZE 0xFFFFFF8F 7703#define S_028A4C_SUPERTILE_WALK_ORDER_ENABLE(x) (((unsigned)(x) & 0x1) << 7) 7704#define G_028A4C_SUPERTILE_WALK_ORDER_ENABLE(x) (((x) >> 7) & 0x1) 7705#define C_028A4C_SUPERTILE_WALK_ORDER_ENABLE 0xFFFFFF7F 7706#define S_028A4C_TILE_WALK_ORDER_ENABLE(x) (((unsigned)(x) & 0x1) << 8) 7707#define G_028A4C_TILE_WALK_ORDER_ENABLE(x) (((x) >> 8) & 0x1) 7708#define C_028A4C_TILE_WALK_ORDER_ENABLE 0xFFFFFEFF 7709#define S_028A4C_TILE_COVER_DISABLE(x) (((unsigned)(x) & 0x1) << 9) 7710#define G_028A4C_TILE_COVER_DISABLE(x) (((x) >> 9) & 0x1) 7711#define C_028A4C_TILE_COVER_DISABLE 0xFFFFFDFF 7712#define S_028A4C_TILE_COVER_NO_SCISSOR(x) (((unsigned)(x) & 0x1) << 10) 7713#define G_028A4C_TILE_COVER_NO_SCISSOR(x) (((x) >> 10) & 0x1) 7714#define C_028A4C_TILE_COVER_NO_SCISSOR 0xFFFFFBFF 7715#define S_028A4C_ZMM_LINE_EXTENT(x) (((unsigned)(x) & 0x1) << 11) 7716#define G_028A4C_ZMM_LINE_EXTENT(x) (((x) >> 11) & 0x1) 7717#define C_028A4C_ZMM_LINE_EXTENT 0xFFFFF7FF 7718#define S_028A4C_ZMM_LINE_OFFSET(x) (((unsigned)(x) & 0x1) << 12) 7719#define G_028A4C_ZMM_LINE_OFFSET(x) (((x) >> 12) & 0x1) 7720#define C_028A4C_ZMM_LINE_OFFSET 0xFFFFEFFF 7721#define S_028A4C_ZMM_RECT_EXTENT(x) (((unsigned)(x) & 0x1) << 13) 7722#define G_028A4C_ZMM_RECT_EXTENT(x) (((x) >> 13) & 0x1) 7723#define C_028A4C_ZMM_RECT_EXTENT 0xFFFFDFFF 7724#define S_028A4C_KILL_PIX_POST_HI_Z(x) (((unsigned)(x) & 0x1) << 14) 7725#define G_028A4C_KILL_PIX_POST_HI_Z(x) (((x) >> 14) & 0x1) 7726#define C_028A4C_KILL_PIX_POST_HI_Z 0xFFFFBFFF 7727#define S_028A4C_KILL_PIX_POST_DETAIL_MASK(x) (((unsigned)(x) & 0x1) << 15) 7728#define G_028A4C_KILL_PIX_POST_DETAIL_MASK(x) (((x) >> 15) & 0x1) 7729#define C_028A4C_KILL_PIX_POST_DETAIL_MASK 0xFFFF7FFF 7730#define S_028A4C_PS_ITER_SAMPLE(x) (((unsigned)(x) & 0x1) << 16) 7731#define G_028A4C_PS_ITER_SAMPLE(x) (((x) >> 16) & 0x1) 7732#define C_028A4C_PS_ITER_SAMPLE 0xFFFEFFFF 7733#define S_028A4C_MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE(x) (((unsigned)(x) & 0x1) << 17) 7734#define G_028A4C_MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE(x) (((x) >> 17) & 0x1) 7735#define C_028A4C_MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE 0xFFFDFFFF 7736#define S_028A4C_MULTI_GPU_SUPERTILE_ENABLE(x) (((unsigned)(x) & 0x1) << 18) 7737#define G_028A4C_MULTI_GPU_SUPERTILE_ENABLE(x) (((x) >> 18) & 0x1) 7738#define C_028A4C_MULTI_GPU_SUPERTILE_ENABLE 0xFFFBFFFF 7739#define S_028A4C_GPU_ID_OVERRIDE_ENABLE(x) (((unsigned)(x) & 0x1) << 19) 7740#define G_028A4C_GPU_ID_OVERRIDE_ENABLE(x) (((x) >> 19) & 0x1) 7741#define C_028A4C_GPU_ID_OVERRIDE_ENABLE 0xFFF7FFFF 7742#define S_028A4C_GPU_ID_OVERRIDE(x) (((unsigned)(x) & 0x0F) << 20) 7743#define G_028A4C_GPU_ID_OVERRIDE(x) (((x) >> 20) & 0x0F) 7744#define C_028A4C_GPU_ID_OVERRIDE 0xFF0FFFFF 7745#define S_028A4C_MULTI_GPU_PRIM_DISCARD_ENABLE(x) (((unsigned)(x) & 0x1) << 24) 7746#define G_028A4C_MULTI_GPU_PRIM_DISCARD_ENABLE(x) (((x) >> 24) & 0x1) 7747#define C_028A4C_MULTI_GPU_PRIM_DISCARD_ENABLE 0xFEFFFFFF 7748#define S_028A4C_FORCE_EOV_CNTDWN_ENABLE(x) (((unsigned)(x) & 0x1) << 25) 7749#define G_028A4C_FORCE_EOV_CNTDWN_ENABLE(x) (((x) >> 25) & 0x1) 7750#define C_028A4C_FORCE_EOV_CNTDWN_ENABLE 0xFDFFFFFF 7751#define S_028A4C_FORCE_EOV_REZ_ENABLE(x) (((unsigned)(x) & 0x1) << 26) 7752#define G_028A4C_FORCE_EOV_REZ_ENABLE(x) (((x) >> 26) & 0x1) 7753#define C_028A4C_FORCE_EOV_REZ_ENABLE 0xFBFFFFFF 7754#define S_028A4C_OUT_OF_ORDER_PRIMITIVE_ENABLE(x) (((unsigned)(x) & 0x1) << 27) 7755#define G_028A4C_OUT_OF_ORDER_PRIMITIVE_ENABLE(x) (((x) >> 27) & 0x1) 7756#define C_028A4C_OUT_OF_ORDER_PRIMITIVE_ENABLE 0xF7FFFFFF 7757#define S_028A4C_OUT_OF_ORDER_WATER_MARK(x) (((unsigned)(x) & 0x07) << 28) 7758#define G_028A4C_OUT_OF_ORDER_WATER_MARK(x) (((x) >> 28) & 0x07) 7759#define C_028A4C_OUT_OF_ORDER_WATER_MARK 0x8FFFFFFF 7760#define R_028A50_VGT_ENHANCE 0x028A50 7761#define R_028A54_VGT_GS_PER_ES 0x028A54 7762#define S_028A54_GS_PER_ES(x) (((unsigned)(x) & 0x7FF) << 0) 7763#define G_028A54_GS_PER_ES(x) (((x) >> 0) & 0x7FF) 7764#define C_028A54_GS_PER_ES 0xFFFFF800 7765#define R_028A58_VGT_ES_PER_GS 0x028A58 7766#define S_028A58_ES_PER_GS(x) (((unsigned)(x) & 0x7FF) << 0) 7767#define G_028A58_ES_PER_GS(x) (((x) >> 0) & 0x7FF) 7768#define C_028A58_ES_PER_GS 0xFFFFF800 7769#define R_028A5C_VGT_GS_PER_VS 0x028A5C 7770#define S_028A5C_GS_PER_VS(x) (((unsigned)(x) & 0x0F) << 0) 7771#define G_028A5C_GS_PER_VS(x) (((x) >> 0) & 0x0F) 7772#define C_028A5C_GS_PER_VS 0xFFFFFFF0 7773#define R_028A60_VGT_GSVS_RING_OFFSET_1 0x028A60 7774#define S_028A60_OFFSET(x) (((unsigned)(x) & 0x7FFF) << 0) 7775#define G_028A60_OFFSET(x) (((x) >> 0) & 0x7FFF) 7776#define C_028A60_OFFSET 0xFFFF8000 7777#define R_028A64_VGT_GSVS_RING_OFFSET_2 0x028A64 7778#define S_028A64_OFFSET(x) (((unsigned)(x) & 0x7FFF) << 0) 7779#define G_028A64_OFFSET(x) (((x) >> 0) & 0x7FFF) 7780#define C_028A64_OFFSET 0xFFFF8000 7781#define R_028A68_VGT_GSVS_RING_OFFSET_3 0x028A68 7782#define S_028A68_OFFSET(x) (((unsigned)(x) & 0x7FFF) << 0) 7783#define G_028A68_OFFSET(x) (((x) >> 0) & 0x7FFF) 7784#define C_028A68_OFFSET 0xFFFF8000 7785#define R_028A6C_VGT_GS_OUT_PRIM_TYPE 0x028A6C 7786#define S_028A6C_OUTPRIM_TYPE(x) (((unsigned)(x) & 0x3F) << 0) 7787#define G_028A6C_OUTPRIM_TYPE(x) (((x) >> 0) & 0x3F) 7788#define C_028A6C_OUTPRIM_TYPE 0xFFFFFFC0 7789#define V_028A6C_OUTPRIM_TYPE_POINTLIST 0 7790#define V_028A6C_OUTPRIM_TYPE_LINESTRIP 1 7791#define V_028A6C_OUTPRIM_TYPE_TRISTRIP 2 7792#define S_028A6C_OUTPRIM_TYPE_1(x) (((unsigned)(x) & 0x3F) << 8) 7793#define G_028A6C_OUTPRIM_TYPE_1(x) (((x) >> 8) & 0x3F) 7794#define C_028A6C_OUTPRIM_TYPE_1 0xFFFFC0FF 7795#define S_028A6C_OUTPRIM_TYPE_2(x) (((unsigned)(x) & 0x3F) << 16) 7796#define G_028A6C_OUTPRIM_TYPE_2(x) (((x) >> 16) & 0x3F) 7797#define C_028A6C_OUTPRIM_TYPE_2 0xFFC0FFFF 7798#define S_028A6C_OUTPRIM_TYPE_3(x) (((unsigned)(x) & 0x3F) << 22) 7799#define G_028A6C_OUTPRIM_TYPE_3(x) (((x) >> 22) & 0x3F) 7800#define C_028A6C_OUTPRIM_TYPE_3 0xF03FFFFF 7801#define S_028A6C_UNIQUE_TYPE_PER_STREAM(x) (((unsigned)(x) & 0x1) << 31) 7802#define G_028A6C_UNIQUE_TYPE_PER_STREAM(x) (((x) >> 31) & 0x1) 7803#define C_028A6C_UNIQUE_TYPE_PER_STREAM 0x7FFFFFFF 7804#define R_028A70_IA_ENHANCE 0x028A70 7805#define R_028A74_VGT_DMA_SIZE 0x028A74 7806#define R_028A78_VGT_DMA_MAX_SIZE 0x028A78 7807#define R_028A7C_VGT_DMA_INDEX_TYPE 0x028A7C 7808#define S_028A7C_INDEX_TYPE(x) (((unsigned)(x) & 0x03) << 0) 7809#define G_028A7C_INDEX_TYPE(x) (((x) >> 0) & 0x03) 7810#define C_028A7C_INDEX_TYPE 0xFFFFFFFC 7811#define V_028A7C_VGT_INDEX_16 0x00 7812#define V_028A7C_VGT_INDEX_32 0x01 7813#define V_028A7C_VGT_INDEX_8 0x02 /* VI */ 7814#define S_028A7C_SWAP_MODE(x) (((unsigned)(x) & 0x03) << 2) 7815#define G_028A7C_SWAP_MODE(x) (((x) >> 2) & 0x03) 7816#define C_028A7C_SWAP_MODE 0xFFFFFFF3 7817#define V_028A7C_VGT_DMA_SWAP_NONE 0x00 7818#define V_028A7C_VGT_DMA_SWAP_16_BIT 0x01 7819#define V_028A7C_VGT_DMA_SWAP_32_BIT 0x02 7820#define V_028A7C_VGT_DMA_SWAP_WORD 0x03 7821/* CIK */ 7822#define S_028A7C_BUF_TYPE(x) (((unsigned)(x) & 0x03) << 4) 7823#define G_028A7C_BUF_TYPE(x) (((x) >> 4) & 0x03) 7824#define C_028A7C_BUF_TYPE 0xFFFFFFCF 7825#define V_028A7C_VGT_DMA_BUF_MEM 0x00 7826#define V_028A7C_VGT_DMA_BUF_RING 0x01 7827#define V_028A7C_VGT_DMA_BUF_SETUP 0x02 7828#define S_028A7C_RDREQ_POLICY_CIK(x) (((unsigned)(x) & 0x03) << 6) 7829#define G_028A7C_RDREQ_POLICY_CIK(x) (((x) >> 6) & 0x03) 7830#define C_028A7C_RDREQ_POLICY_CIK 0xFFFFFF3F 7831#define V_028A7C_VGT_POLICY_LRU 0x00 7832#define V_028A7C_VGT_POLICY_STREAM 0x01 7833#define S_028A7C_RDREQ_POLICY(x) (((unsigned)(x) & 0x1) << 6) /* VI+ */ 7834#define G_028A7C_RDREQ_POLICY(x) (((x) >> 6) & 0x1) 7835#define C_028A7C_RDREQ_POLICY 0xFFFFFFBF 7836#define S_028A7C_ATC(x) (((unsigned)(x) & 0x1) << 8) 7837#define G_028A7C_ATC(x) (((x) >> 8) & 0x1) 7838#define C_028A7C_ATC 0xFFFFFEFF 7839#define S_028A7C_NOT_EOP(x) (((unsigned)(x) & 0x1) << 9) 7840#define G_028A7C_NOT_EOP(x) (((x) >> 9) & 0x1) 7841#define C_028A7C_NOT_EOP 0xFFFFFDFF 7842#define S_028A7C_REQ_PATH(x) (((unsigned)(x) & 0x1) << 10) 7843#define G_028A7C_REQ_PATH(x) (((x) >> 10) & 0x1) 7844#define C_028A7C_REQ_PATH 0xFFFFFBFF 7845/* */ 7846/* VI */ 7847#define S_028A7C_MTYPE(x) (((unsigned)(x) & 0x03) << 11) 7848#define G_028A7C_MTYPE(x) (((x) >> 11) & 0x03) 7849#define C_028A7C_MTYPE 0xFFFFE7FF 7850/* */ 7851#define R_028A80_WD_ENHANCE 0x028A80 7852/* not on CIK */ 7853#define R_028A84_VGT_PRIMITIVEID_EN 0x028A84 7854#define S_028A84_PRIMITIVEID_EN(x) (((unsigned)(x) & 0x1) << 0) 7855#define G_028A84_PRIMITIVEID_EN(x) (((x) >> 0) & 0x1) 7856#define C_028A84_PRIMITIVEID_EN 0xFFFFFFFE 7857#define S_028A84_DISABLE_RESET_ON_EOI(x) (((unsigned)(x) & 0x1) << 1) /* not on CIK */ 7858#define G_028A84_DISABLE_RESET_ON_EOI(x) (((x) >> 1) & 0x1) /* not on CIK */ 7859#define C_028A84_DISABLE_RESET_ON_EOI 0xFFFFFFFD /* not on CIK */ 7860#define R_028A88_VGT_DMA_NUM_INSTANCES 0x028A88 7861#define R_028A8C_VGT_PRIMITIVEID_RESET 0x028A8C 7862#define R_028A90_VGT_EVENT_INITIATOR 0x028A90 7863#define S_028A90_EVENT_TYPE(x) (((unsigned)(x) & 0x3F) << 0) 7864#define G_028A90_EVENT_TYPE(x) (((x) >> 0) & 0x3F) 7865#define C_028A90_EVENT_TYPE 0xFFFFFFC0 7866#define V_028A90_SAMPLE_STREAMOUTSTATS1 0x01 7867#define V_028A90_SAMPLE_STREAMOUTSTATS2 0x02 7868#define V_028A90_SAMPLE_STREAMOUTSTATS3 0x03 7869#define V_028A90_CACHE_FLUSH_TS 0x04 7870#define V_028A90_CONTEXT_DONE 0x05 7871#define V_028A90_CACHE_FLUSH 0x06 7872#define V_028A90_CS_PARTIAL_FLUSH 0x07 7873#define V_028A90_VGT_STREAMOUT_SYNC 0x08 7874#define V_028A90_VGT_STREAMOUT_RESET 0x0A 7875#define V_028A90_END_OF_PIPE_INCR_DE 0x0B 7876#define V_028A90_END_OF_PIPE_IB_END 0x0C 7877#define V_028A90_RST_PIX_CNT 0x0D 7878#define V_028A90_VS_PARTIAL_FLUSH 0x0F 7879#define V_028A90_PS_PARTIAL_FLUSH 0x10 7880#define V_028A90_FLUSH_HS_OUTPUT 0x11 7881#define V_028A90_FLUSH_LS_OUTPUT 0x12 7882#define V_028A90_CACHE_FLUSH_AND_INV_TS_EVENT 0x14 7883#define V_028A90_ZPASS_DONE 0x15 7884#define V_028A90_CACHE_FLUSH_AND_INV_EVENT 0x16 7885#define V_028A90_PERFCOUNTER_START 0x17 7886#define V_028A90_PERFCOUNTER_STOP 0x18 7887#define V_028A90_PIPELINESTAT_START 0x19 7888#define V_028A90_PIPELINESTAT_STOP 0x1A 7889#define V_028A90_PERFCOUNTER_SAMPLE 0x1B 7890#define V_028A90_FLUSH_ES_OUTPUT 0x1C 7891#define V_028A90_FLUSH_GS_OUTPUT 0x1D 7892#define V_028A90_SAMPLE_PIPELINESTAT 0x1E 7893#define V_028A90_SO_VGTSTREAMOUT_FLUSH 0x1F 7894#define V_028A90_SAMPLE_STREAMOUTSTATS 0x20 7895#define V_028A90_RESET_VTX_CNT 0x21 7896#define V_028A90_BLOCK_CONTEXT_DONE 0x22 7897#define V_028A90_CS_CONTEXT_DONE 0x23 7898#define V_028A90_VGT_FLUSH 0x24 7899#define V_028A90_SC_SEND_DB_VPZ 0x27 7900#define V_028A90_BOTTOM_OF_PIPE_TS 0x28 7901#define V_028A90_DB_CACHE_FLUSH_AND_INV 0x2A 7902#define V_028A90_FLUSH_AND_INV_DB_DATA_TS 0x2B 7903#define V_028A90_FLUSH_AND_INV_DB_META 0x2C 7904#define V_028A90_FLUSH_AND_INV_CB_DATA_TS 0x2D 7905#define V_028A90_FLUSH_AND_INV_CB_META 0x2E 7906#define V_028A90_CS_DONE 0x2F 7907#define V_028A90_PS_DONE 0x30 7908#define V_028A90_FLUSH_AND_INV_CB_PIXEL_DATA 0x31 7909#define V_028A90_THREAD_TRACE_START 0x33 7910#define V_028A90_THREAD_TRACE_STOP 0x34 7911#define V_028A90_THREAD_TRACE_MARKER 0x35 7912#define V_028A90_THREAD_TRACE_FLUSH 0x36 7913#define V_028A90_THREAD_TRACE_FINISH 0x37 7914/* CIK */ 7915#define V_028A90_PIXEL_PIPE_STAT_CONTROL 0x38 7916#define V_028A90_PIXEL_PIPE_STAT_DUMP 0x39 7917#define V_028A90_PIXEL_PIPE_STAT_RESET 0x3A 7918/* */ 7919#define S_028A90_ADDRESS_HI_GFX6(x) (((unsigned)(x) & 0x1FF) << 18) 7920#define G_028A90_ADDRESS_HI_GFX6(x) (((x) >> 18) & 0x1FF) 7921#define C_028A90_ADDRESS_HI_GFX6 0xF803FFFF 7922#define S_028A90_EXTENDED_EVENT(x) (((unsigned)(x) & 0x1) << 27) 7923#define G_028A90_EXTENDED_EVENT(x) (((x) >> 27) & 0x1) 7924#define C_028A90_EXTENDED_EVENT 0xF7FFFFFF 7925#define R_028A94_VGT_MULTI_PRIM_IB_RESET_EN 0x028A94 7926#define S_028A94_RESET_EN(x) (((unsigned)(x) & 0x1) << 0) 7927#define G_028A94_RESET_EN(x) (((x) >> 0) & 0x1) 7928#define C_028A94_RESET_EN 0xFFFFFFFE 7929#define R_028AA0_VGT_INSTANCE_STEP_RATE_0 0x028AA0 7930#define R_028AA4_VGT_INSTANCE_STEP_RATE_1 0x028AA4 7931#define R_028AA8_IA_MULTI_VGT_PARAM 0x028AA8 7932#define S_028AA8_PRIMGROUP_SIZE(x) (((unsigned)(x) & 0xFFFF) << 0) 7933#define G_028AA8_PRIMGROUP_SIZE(x) (((x) >> 0) & 0xFFFF) 7934#define C_028AA8_PRIMGROUP_SIZE 0xFFFF0000 7935#define S_028AA8_PARTIAL_VS_WAVE_ON(x) (((unsigned)(x) & 0x1) << 16) 7936#define G_028AA8_PARTIAL_VS_WAVE_ON(x) (((x) >> 16) & 0x1) 7937#define C_028AA8_PARTIAL_VS_WAVE_ON 0xFFFEFFFF 7938#define S_028AA8_SWITCH_ON_EOP(x) (((unsigned)(x) & 0x1) << 17) 7939#define G_028AA8_SWITCH_ON_EOP(x) (((x) >> 17) & 0x1) 7940#define C_028AA8_SWITCH_ON_EOP 0xFFFDFFFF 7941#define S_028AA8_PARTIAL_ES_WAVE_ON(x) (((unsigned)(x) & 0x1) << 18) 7942#define G_028AA8_PARTIAL_ES_WAVE_ON(x) (((x) >> 18) & 0x1) 7943#define C_028AA8_PARTIAL_ES_WAVE_ON 0xFFFBFFFF 7944#define S_028AA8_SWITCH_ON_EOI(x) (((unsigned)(x) & 0x1) << 19) 7945#define G_028AA8_SWITCH_ON_EOI(x) (((x) >> 19) & 0x1) 7946#define C_028AA8_SWITCH_ON_EOI 0xFFF7FFFF 7947/* CIK */ 7948#define S_028AA8_WD_SWITCH_ON_EOP(x) (((unsigned)(x) & 0x1) << 20) 7949#define G_028AA8_WD_SWITCH_ON_EOP(x) (((x) >> 20) & 0x1) 7950#define C_028AA8_WD_SWITCH_ON_EOP 0xFFEFFFFF 7951/* VI */ 7952#define S_028AA8_MAX_PRIMGRP_IN_WAVE(x) (((unsigned)(x) & 0x0F) << 28) 7953#define G_028AA8_MAX_PRIMGRP_IN_WAVE(x) (((x) >> 28) & 0x0F) 7954#define C_028AA8_MAX_PRIMGRP_IN_WAVE 0x0FFFFFFF 7955/* */ 7956#define R_028AAC_VGT_ESGS_RING_ITEMSIZE 0x028AAC 7957#define S_028AAC_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) 7958#define G_028AAC_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) 7959#define C_028AAC_ITEMSIZE 0xFFFF8000 7960#define R_028AB0_VGT_GSVS_RING_ITEMSIZE 0x028AB0 7961#define S_028AB0_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) 7962#define G_028AB0_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) 7963#define C_028AB0_ITEMSIZE 0xFFFF8000 7964#define R_028AB4_VGT_REUSE_OFF 0x028AB4 7965#define S_028AB4_REUSE_OFF(x) (((unsigned)(x) & 0x1) << 0) 7966#define G_028AB4_REUSE_OFF(x) (((x) >> 0) & 0x1) 7967#define C_028AB4_REUSE_OFF 0xFFFFFFFE 7968#define R_028AB8_VGT_VTX_CNT_EN 0x028AB8 7969#define S_028AB8_VTX_CNT_EN(x) (((unsigned)(x) & 0x1) << 0) 7970#define G_028AB8_VTX_CNT_EN(x) (((x) >> 0) & 0x1) 7971#define C_028AB8_VTX_CNT_EN 0xFFFFFFFE 7972#define R_028ABC_DB_HTILE_SURFACE 0x028ABC 7973#define S_028ABC_LINEAR(x) (((unsigned)(x) & 0x1) << 0) 7974#define G_028ABC_LINEAR(x) (((x) >> 0) & 0x1) 7975#define C_028ABC_LINEAR 0xFFFFFFFE 7976#define S_028ABC_FULL_CACHE(x) (((unsigned)(x) & 0x1) << 1) 7977#define G_028ABC_FULL_CACHE(x) (((x) >> 1) & 0x1) 7978#define C_028ABC_FULL_CACHE 0xFFFFFFFD 7979#define S_028ABC_HTILE_USES_PRELOAD_WIN(x) (((unsigned)(x) & 0x1) << 2) 7980#define G_028ABC_HTILE_USES_PRELOAD_WIN(x) (((x) >> 2) & 0x1) 7981#define C_028ABC_HTILE_USES_PRELOAD_WIN 0xFFFFFFFB 7982#define S_028ABC_PRELOAD(x) (((unsigned)(x) & 0x1) << 3) 7983#define G_028ABC_PRELOAD(x) (((x) >> 3) & 0x1) 7984#define C_028ABC_PRELOAD 0xFFFFFFF7 7985#define S_028ABC_PREFETCH_WIDTH(x) (((unsigned)(x) & 0x3F) << 4) 7986#define G_028ABC_PREFETCH_WIDTH(x) (((x) >> 4) & 0x3F) 7987#define C_028ABC_PREFETCH_WIDTH 0xFFFFFC0F 7988#define S_028ABC_PREFETCH_HEIGHT(x) (((unsigned)(x) & 0x3F) << 10) 7989#define G_028ABC_PREFETCH_HEIGHT(x) (((x) >> 10) & 0x3F) 7990#define C_028ABC_PREFETCH_HEIGHT 0xFFFF03FF 7991#define S_028ABC_DST_OUTSIDE_ZERO_TO_ONE(x) (((unsigned)(x) & 0x1) << 16) 7992#define G_028ABC_DST_OUTSIDE_ZERO_TO_ONE(x) (((x) >> 16) & 0x1) 7993#define C_028ABC_DST_OUTSIDE_ZERO_TO_ONE 0xFFFEFFFF 7994/* VI */ 7995#define S_028ABC_TC_COMPATIBLE(x) (((unsigned)(x) & 0x1) << 17) 7996#define G_028ABC_TC_COMPATIBLE(x) (((x) >> 17) & 0x1) 7997#define C_028ABC_TC_COMPATIBLE 0xFFFDFFFF 7998/* */ 7999#define R_028AC0_DB_SRESULTS_COMPARE_STATE0 0x028AC0 8000#define S_028AC0_COMPAREFUNC0(x) (((unsigned)(x) & 0x07) << 0) 8001#define G_028AC0_COMPAREFUNC0(x) (((x) >> 0) & 0x07) 8002#define C_028AC0_COMPAREFUNC0 0xFFFFFFF8 8003#define V_028AC0_REF_NEVER 0x00 8004#define V_028AC0_REF_LESS 0x01 8005#define V_028AC0_REF_EQUAL 0x02 8006#define V_028AC0_REF_LEQUAL 0x03 8007#define V_028AC0_REF_GREATER 0x04 8008#define V_028AC0_REF_NOTEQUAL 0x05 8009#define V_028AC0_REF_GEQUAL 0x06 8010#define V_028AC0_REF_ALWAYS 0x07 8011#define S_028AC0_COMPAREVALUE0(x) (((unsigned)(x) & 0xFF) << 4) 8012#define G_028AC0_COMPAREVALUE0(x) (((x) >> 4) & 0xFF) 8013#define C_028AC0_COMPAREVALUE0 0xFFFFF00F 8014#define S_028AC0_COMPAREMASK0(x) (((unsigned)(x) & 0xFF) << 12) 8015#define G_028AC0_COMPAREMASK0(x) (((x) >> 12) & 0xFF) 8016#define C_028AC0_COMPAREMASK0 0xFFF00FFF 8017#define S_028AC0_ENABLE0(x) (((unsigned)(x) & 0x1) << 24) 8018#define G_028AC0_ENABLE0(x) (((x) >> 24) & 0x1) 8019#define C_028AC0_ENABLE0 0xFEFFFFFF 8020#define R_028AC4_DB_SRESULTS_COMPARE_STATE1 0x028AC4 8021#define S_028AC4_COMPAREFUNC1(x) (((unsigned)(x) & 0x07) << 0) 8022#define G_028AC4_COMPAREFUNC1(x) (((x) >> 0) & 0x07) 8023#define C_028AC4_COMPAREFUNC1 0xFFFFFFF8 8024#define V_028AC4_REF_NEVER 0x00 8025#define V_028AC4_REF_LESS 0x01 8026#define V_028AC4_REF_EQUAL 0x02 8027#define V_028AC4_REF_LEQUAL 0x03 8028#define V_028AC4_REF_GREATER 0x04 8029#define V_028AC4_REF_NOTEQUAL 0x05 8030#define V_028AC4_REF_GEQUAL 0x06 8031#define V_028AC4_REF_ALWAYS 0x07 8032#define S_028AC4_COMPAREVALUE1(x) (((unsigned)(x) & 0xFF) << 4) 8033#define G_028AC4_COMPAREVALUE1(x) (((x) >> 4) & 0xFF) 8034#define C_028AC4_COMPAREVALUE1 0xFFFFF00F 8035#define S_028AC4_COMPAREMASK1(x) (((unsigned)(x) & 0xFF) << 12) 8036#define G_028AC4_COMPAREMASK1(x) (((x) >> 12) & 0xFF) 8037#define C_028AC4_COMPAREMASK1 0xFFF00FFF 8038#define S_028AC4_ENABLE1(x) (((unsigned)(x) & 0x1) << 24) 8039#define G_028AC4_ENABLE1(x) (((x) >> 24) & 0x1) 8040#define C_028AC4_ENABLE1 0xFEFFFFFF 8041#define R_028AC8_DB_PRELOAD_CONTROL 0x028AC8 8042#define S_028AC8_START_X(x) (((unsigned)(x) & 0xFF) << 0) 8043#define G_028AC8_START_X(x) (((x) >> 0) & 0xFF) 8044#define C_028AC8_START_X 0xFFFFFF00 8045#define S_028AC8_START_Y(x) (((unsigned)(x) & 0xFF) << 8) 8046#define G_028AC8_START_Y(x) (((x) >> 8) & 0xFF) 8047#define C_028AC8_START_Y 0xFFFF00FF 8048#define S_028AC8_MAX_X(x) (((unsigned)(x) & 0xFF) << 16) 8049#define G_028AC8_MAX_X(x) (((x) >> 16) & 0xFF) 8050#define C_028AC8_MAX_X 0xFF00FFFF 8051#define S_028AC8_MAX_Y(x) (((unsigned)(x) & 0xFF) << 24) 8052#define G_028AC8_MAX_Y(x) (((x) >> 24) & 0xFF) 8053#define C_028AC8_MAX_Y 0x00FFFFFF 8054#define R_028AD0_VGT_STRMOUT_BUFFER_SIZE_0 0x028AD0 8055#define R_028AD4_VGT_STRMOUT_VTX_STRIDE_0 0x028AD4 8056#define S_028AD4_STRIDE(x) (((unsigned)(x) & 0x3FF) << 0) 8057#define G_028AD4_STRIDE(x) (((x) >> 0) & 0x3FF) 8058#define C_028AD4_STRIDE 0xFFFFFC00 8059#define R_028ADC_VGT_STRMOUT_BUFFER_OFFSET_0 0x028ADC 8060#define R_028AE0_VGT_STRMOUT_BUFFER_SIZE_1 0x028AE0 8061#define R_028AE4_VGT_STRMOUT_VTX_STRIDE_1 0x028AE4 8062#define S_028AE4_STRIDE(x) (((unsigned)(x) & 0x3FF) << 0) 8063#define G_028AE4_STRIDE(x) (((x) >> 0) & 0x3FF) 8064#define C_028AE4_STRIDE 0xFFFFFC00 8065#define R_028AEC_VGT_STRMOUT_BUFFER_OFFSET_1 0x028AEC 8066#define R_028AF0_VGT_STRMOUT_BUFFER_SIZE_2 0x028AF0 8067#define R_028AF4_VGT_STRMOUT_VTX_STRIDE_2 0x028AF4 8068#define S_028AF4_STRIDE(x) (((unsigned)(x) & 0x3FF) << 0) 8069#define G_028AF4_STRIDE(x) (((x) >> 0) & 0x3FF) 8070#define C_028AF4_STRIDE 0xFFFFFC00 8071#define R_028AFC_VGT_STRMOUT_BUFFER_OFFSET_2 0x028AFC 8072#define R_028B00_VGT_STRMOUT_BUFFER_SIZE_3 0x028B00 8073#define R_028B04_VGT_STRMOUT_VTX_STRIDE_3 0x028B04 8074#define S_028B04_STRIDE(x) (((unsigned)(x) & 0x3FF) << 0) 8075#define G_028B04_STRIDE(x) (((x) >> 0) & 0x3FF) 8076#define C_028B04_STRIDE 0xFFFFFC00 8077#define R_028B0C_VGT_STRMOUT_BUFFER_OFFSET_3 0x028B0C 8078#define R_028B28_VGT_STRMOUT_DRAW_OPAQUE_OFFSET 0x028B28 8079#define R_028B2C_VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE 0x028B2C 8080#define R_028B30_VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE 0x028B30 8081#define S_028B30_VERTEX_STRIDE(x) (((unsigned)(x) & 0x1FF) << 0) 8082#define G_028B30_VERTEX_STRIDE(x) (((x) >> 0) & 0x1FF) 8083#define C_028B30_VERTEX_STRIDE 0xFFFFFE00 8084#define R_028B38_VGT_GS_MAX_VERT_OUT 0x028B38 8085#define S_028B38_MAX_VERT_OUT(x) (((unsigned)(x) & 0x7FF) << 0) 8086#define G_028B38_MAX_VERT_OUT(x) (((x) >> 0) & 0x7FF) 8087#define C_028B38_MAX_VERT_OUT 0xFFFFF800 8088/* VI */ 8089#define R_028B50_VGT_TESS_DISTRIBUTION 0x028B50 8090#define S_028B50_ACCUM_ISOLINE(x) (((unsigned)(x) & 0xFF) << 0) 8091#define G_028B50_ACCUM_ISOLINE(x) (((x) >> 0) & 0xFF) 8092#define C_028B50_ACCUM_ISOLINE 0xFFFFFF00 8093#define S_028B50_ACCUM_TRI(x) (((unsigned)(x) & 0xFF) << 8) 8094#define G_028B50_ACCUM_TRI(x) (((x) >> 8) & 0xFF) 8095#define C_028B50_ACCUM_TRI 0xFFFF00FF 8096#define S_028B50_ACCUM_QUAD(x) (((unsigned)(x) & 0xFF) << 16) 8097#define G_028B50_ACCUM_QUAD(x) (((x) >> 16) & 0xFF) 8098#define C_028B50_ACCUM_QUAD 0xFF00FFFF 8099#define S_028B50_DONUT_SPLIT(x) (((unsigned)(x) & 0x1F) << 24) 8100#define G_028B50_DONUT_SPLIT(x) (((x) >> 24) & 0x1F) 8101#define C_028B50_DONUT_SPLIT 0xE0FFFFFF 8102#define S_028B50_TRAP_SPLIT(x) (((unsigned)(x) & 0x07) << 29) /* Fiji+ */ 8103#define G_028B50_TRAP_SPLIT(x) (((x) >> 29) & 0x07) 8104#define C_028B50_TRAP_SPLIT 0x1FFFFFFF 8105/* */ 8106#define R_028B54_VGT_SHADER_STAGES_EN 0x028B54 8107#define S_028B54_LS_EN(x) (((unsigned)(x) & 0x03) << 0) 8108#define G_028B54_LS_EN(x) (((x) >> 0) & 0x03) 8109#define C_028B54_LS_EN 0xFFFFFFFC 8110#define V_028B54_LS_STAGE_OFF 0x00 8111#define V_028B54_LS_STAGE_ON 0x01 8112#define V_028B54_CS_STAGE_ON 0x02 8113#define S_028B54_HS_EN(x) (((unsigned)(x) & 0x1) << 2) 8114#define G_028B54_HS_EN(x) (((x) >> 2) & 0x1) 8115#define C_028B54_HS_EN 0xFFFFFFFB 8116#define S_028B54_ES_EN(x) (((unsigned)(x) & 0x03) << 3) 8117#define G_028B54_ES_EN(x) (((x) >> 3) & 0x03) 8118#define C_028B54_ES_EN 0xFFFFFFE7 8119#define V_028B54_ES_STAGE_OFF 0x00 8120#define V_028B54_ES_STAGE_DS 0x01 8121#define V_028B54_ES_STAGE_REAL 0x02 8122#define S_028B54_GS_EN(x) (((unsigned)(x) & 0x1) << 5) 8123#define G_028B54_GS_EN(x) (((x) >> 5) & 0x1) 8124#define C_028B54_GS_EN 0xFFFFFFDF 8125#define S_028B54_VS_EN(x) (((unsigned)(x) & 0x03) << 6) 8126#define G_028B54_VS_EN(x) (((x) >> 6) & 0x03) 8127#define C_028B54_VS_EN 0xFFFFFF3F 8128#define V_028B54_VS_STAGE_REAL 0x00 8129#define V_028B54_VS_STAGE_DS 0x01 8130#define V_028B54_VS_STAGE_COPY_SHADER 0x02 8131#define S_028B54_DYNAMIC_HS(x) (((unsigned)(x) & 0x1) << 8) 8132#define G_028B54_DYNAMIC_HS(x) (((x) >> 8) & 0x1) 8133#define C_028B54_DYNAMIC_HS 0xFFFFFEFF 8134/* VI */ 8135#define S_028B54_DISPATCH_DRAW_EN(x) (((unsigned)(x) & 0x1) << 9) 8136#define G_028B54_DISPATCH_DRAW_EN(x) (((x) >> 9) & 0x1) 8137#define C_028B54_DISPATCH_DRAW_EN 0xFFFFFDFF 8138#define S_028B54_DIS_DEALLOC_ACCUM_0(x) (((unsigned)(x) & 0x1) << 10) 8139#define G_028B54_DIS_DEALLOC_ACCUM_0(x) (((x) >> 10) & 0x1) 8140#define C_028B54_DIS_DEALLOC_ACCUM_0 0xFFFFFBFF 8141#define S_028B54_DIS_DEALLOC_ACCUM_1(x) (((unsigned)(x) & 0x1) << 11) 8142#define G_028B54_DIS_DEALLOC_ACCUM_1(x) (((x) >> 11) & 0x1) 8143#define C_028B54_DIS_DEALLOC_ACCUM_1 0xFFFFF7FF 8144#define S_028B54_VS_WAVE_ID_EN(x) (((unsigned)(x) & 0x1) << 12) 8145#define G_028B54_VS_WAVE_ID_EN(x) (((x) >> 12) & 0x1) 8146#define C_028B54_VS_WAVE_ID_EN 0xFFFFEFFF 8147/* */ 8148#define R_028B58_VGT_LS_HS_CONFIG 0x028B58 8149#define S_028B58_NUM_PATCHES(x) (((unsigned)(x) & 0xFF) << 0) 8150#define G_028B58_NUM_PATCHES(x) (((x) >> 0) & 0xFF) 8151#define C_028B58_NUM_PATCHES 0xFFFFFF00 8152#define S_028B58_HS_NUM_INPUT_CP(x) (((unsigned)(x) & 0x3F) << 8) 8153#define G_028B58_HS_NUM_INPUT_CP(x) (((x) >> 8) & 0x3F) 8154#define C_028B58_HS_NUM_INPUT_CP 0xFFFFC0FF 8155#define S_028B58_HS_NUM_OUTPUT_CP(x) (((unsigned)(x) & 0x3F) << 14) 8156#define G_028B58_HS_NUM_OUTPUT_CP(x) (((x) >> 14) & 0x3F) 8157#define C_028B58_HS_NUM_OUTPUT_CP 0xFFF03FFF 8158#define R_028B5C_VGT_GS_VERT_ITEMSIZE 0x028B5C 8159#define S_028B5C_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) 8160#define G_028B5C_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) 8161#define C_028B5C_ITEMSIZE 0xFFFF8000 8162#define R_028B60_VGT_GS_VERT_ITEMSIZE_1 0x028B60 8163#define S_028B60_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) 8164#define G_028B60_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) 8165#define C_028B60_ITEMSIZE 0xFFFF8000 8166#define R_028B64_VGT_GS_VERT_ITEMSIZE_2 0x028B64 8167#define S_028B64_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) 8168#define G_028B64_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) 8169#define C_028B64_ITEMSIZE 0xFFFF8000 8170#define R_028B68_VGT_GS_VERT_ITEMSIZE_3 0x028B68 8171#define S_028B68_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) 8172#define G_028B68_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) 8173#define C_028B68_ITEMSIZE 0xFFFF8000 8174#define R_028B6C_VGT_TF_PARAM 0x028B6C 8175#define S_028B6C_TYPE(x) (((unsigned)(x) & 0x03) << 0) 8176#define G_028B6C_TYPE(x) (((x) >> 0) & 0x03) 8177#define C_028B6C_TYPE 0xFFFFFFFC 8178#define V_028B6C_TESS_ISOLINE 0x00 8179#define V_028B6C_TESS_TRIANGLE 0x01 8180#define V_028B6C_TESS_QUAD 0x02 8181#define S_028B6C_PARTITIONING(x) (((unsigned)(x) & 0x07) << 2) 8182#define G_028B6C_PARTITIONING(x) (((x) >> 2) & 0x07) 8183#define C_028B6C_PARTITIONING 0xFFFFFFE3 8184#define V_028B6C_PART_INTEGER 0x00 8185#define V_028B6C_PART_POW2 0x01 8186#define V_028B6C_PART_FRAC_ODD 0x02 8187#define V_028B6C_PART_FRAC_EVEN 0x03 8188#define S_028B6C_TOPOLOGY(x) (((unsigned)(x) & 0x07) << 5) 8189#define G_028B6C_TOPOLOGY(x) (((x) >> 5) & 0x07) 8190#define C_028B6C_TOPOLOGY 0xFFFFFF1F 8191#define V_028B6C_OUTPUT_POINT 0x00 8192#define V_028B6C_OUTPUT_LINE 0x01 8193#define V_028B6C_OUTPUT_TRIANGLE_CW 0x02 8194#define V_028B6C_OUTPUT_TRIANGLE_CCW 0x03 8195#define S_028B6C_RESERVED_REDUC_AXIS(x) (((unsigned)(x) & 0x1) << 8) /* not on CIK */ 8196#define G_028B6C_RESERVED_REDUC_AXIS(x) (((x) >> 8) & 0x1) /* not on CIK */ 8197#define C_028B6C_RESERVED_REDUC_AXIS 0xFFFFFEFF /* not on CIK */ 8198#define S_028B6C_DEPRECATED(x) (((unsigned)(x) & 0x1) << 9) 8199#define G_028B6C_DEPRECATED(x) (((x) >> 9) & 0x1) 8200#define C_028B6C_DEPRECATED 0xFFFFFDFF 8201#define S_028B6C_NUM_DS_WAVES_PER_SIMD(x) (((unsigned)(x) & 0x0F) << 10) 8202#define G_028B6C_NUM_DS_WAVES_PER_SIMD(x) (((x) >> 10) & 0x0F) 8203#define C_028B6C_NUM_DS_WAVES_PER_SIMD 0xFFFFC3FF 8204#define S_028B6C_DISABLE_DONUTS(x) (((unsigned)(x) & 0x1) << 14) 8205#define G_028B6C_DISABLE_DONUTS(x) (((x) >> 14) & 0x1) 8206#define C_028B6C_DISABLE_DONUTS 0xFFFFBFFF 8207/* CIK */ 8208#define S_028B6C_RDREQ_POLICY_CIK(x) (((unsigned)(x) & 0x03) << 15) 8209#define G_028B6C_RDREQ_POLICY_CIK(x) (((x) >> 15) & 0x03) 8210#define C_028B6C_RDREQ_POLICY_CIK 0xFFFE7FFF 8211#define V_028B6C_VGT_POLICY_LRU 0x00 8212#define V_028B6C_VGT_POLICY_STREAM 0x01 8213#define V_028B6C_VGT_POLICY_BYPASS 0x02 8214/* */ 8215/* VI */ 8216#define S_028B6C_RDREQ_POLICY(x) (((unsigned)(x) & 0x1) << 15) /* VI+ */ 8217#define G_028B6C_RDREQ_POLICY(x) (((x) >> 15) & 0x1) 8218#define C_028B6C_RDREQ_POLICY 0xFFFF7FFF 8219#define S_028B6C_DISTRIBUTION_MODE(x) (((unsigned)(x) & 0x03) << 17) 8220#define G_028B6C_DISTRIBUTION_MODE(x) (((x) >> 17) & 0x03) 8221#define C_028B6C_DISTRIBUTION_MODE 0xFFF9FFFF 8222#define V_028B6C_DISTRIBUTION_MODE_NO_DIST 0x00 8223#define V_028B6C_DISTRIBUTION_MODE_PATCHES 0x01 8224#define V_028B6C_DISTRIBUTION_MODE_DONUTS 0x02 8225#define V_028B6C_DISTRIBUTION_MODE_TRAPEZOIDS 0x03 /* Fiji+ */ 8226#define S_028B6C_MTYPE(x) (((unsigned)(x) & 0x03) << 19) 8227#define G_028B6C_MTYPE(x) (((x) >> 19) & 0x03) 8228#define C_028B6C_MTYPE 0xFFE7FFFF 8229/* */ 8230#define R_028B70_DB_ALPHA_TO_MASK 0x028B70 8231#define S_028B70_ALPHA_TO_MASK_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 8232#define G_028B70_ALPHA_TO_MASK_ENABLE(x) (((x) >> 0) & 0x1) 8233#define C_028B70_ALPHA_TO_MASK_ENABLE 0xFFFFFFFE 8234#define S_028B70_ALPHA_TO_MASK_OFFSET0(x) (((unsigned)(x) & 0x03) << 8) 8235#define G_028B70_ALPHA_TO_MASK_OFFSET0(x) (((x) >> 8) & 0x03) 8236#define C_028B70_ALPHA_TO_MASK_OFFSET0 0xFFFFFCFF 8237#define S_028B70_ALPHA_TO_MASK_OFFSET1(x) (((unsigned)(x) & 0x03) << 10) 8238#define G_028B70_ALPHA_TO_MASK_OFFSET1(x) (((x) >> 10) & 0x03) 8239#define C_028B70_ALPHA_TO_MASK_OFFSET1 0xFFFFF3FF 8240#define S_028B70_ALPHA_TO_MASK_OFFSET2(x) (((unsigned)(x) & 0x03) << 12) 8241#define G_028B70_ALPHA_TO_MASK_OFFSET2(x) (((x) >> 12) & 0x03) 8242#define C_028B70_ALPHA_TO_MASK_OFFSET2 0xFFFFCFFF 8243#define S_028B70_ALPHA_TO_MASK_OFFSET3(x) (((unsigned)(x) & 0x03) << 14) 8244#define G_028B70_ALPHA_TO_MASK_OFFSET3(x) (((x) >> 14) & 0x03) 8245#define C_028B70_ALPHA_TO_MASK_OFFSET3 0xFFFF3FFF 8246#define S_028B70_OFFSET_ROUND(x) (((unsigned)(x) & 0x1) << 16) 8247#define G_028B70_OFFSET_ROUND(x) (((x) >> 16) & 0x1) 8248#define C_028B70_OFFSET_ROUND 0xFFFEFFFF 8249/* CIK */ 8250#define R_028B74_VGT_DISPATCH_DRAW_INDEX 0x028B74 8251/* */ 8252#define R_028B78_PA_SU_POLY_OFFSET_DB_FMT_CNTL 0x028B78 8253#define S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(x) (((unsigned)(x) & 0xFF) << 0) 8254#define G_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(x) (((x) >> 0) & 0xFF) 8255#define C_028B78_POLY_OFFSET_NEG_NUM_DB_BITS 0xFFFFFF00 8256#define S_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(x) (((unsigned)(x) & 0x1) << 8) 8257#define G_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(x) (((x) >> 8) & 0x1) 8258#define C_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT 0xFFFFFEFF 8259#define R_028B7C_PA_SU_POLY_OFFSET_CLAMP 0x028B7C 8260#define R_028B80_PA_SU_POLY_OFFSET_FRONT_SCALE 0x028B80 8261#define R_028B84_PA_SU_POLY_OFFSET_FRONT_OFFSET 0x028B84 8262#define R_028B88_PA_SU_POLY_OFFSET_BACK_SCALE 0x028B88 8263#define R_028B8C_PA_SU_POLY_OFFSET_BACK_OFFSET 0x028B8C 8264#define R_028B90_VGT_GS_INSTANCE_CNT 0x028B90 8265#define S_028B90_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 8266#define G_028B90_ENABLE(x) (((x) >> 0) & 0x1) 8267#define C_028B90_ENABLE 0xFFFFFFFE 8268#define S_028B90_CNT(x) (((unsigned)(x) & 0x7F) << 2) 8269#define G_028B90_CNT(x) (((x) >> 2) & 0x7F) 8270#define C_028B90_CNT 0xFFFFFE03 8271#define R_028B94_VGT_STRMOUT_CONFIG 0x028B94 8272#define S_028B94_STREAMOUT_0_EN(x) (((unsigned)(x) & 0x1) << 0) 8273#define G_028B94_STREAMOUT_0_EN(x) (((x) >> 0) & 0x1) 8274#define C_028B94_STREAMOUT_0_EN 0xFFFFFFFE 8275#define S_028B94_STREAMOUT_1_EN(x) (((unsigned)(x) & 0x1) << 1) 8276#define G_028B94_STREAMOUT_1_EN(x) (((x) >> 1) & 0x1) 8277#define C_028B94_STREAMOUT_1_EN 0xFFFFFFFD 8278#define S_028B94_STREAMOUT_2_EN(x) (((unsigned)(x) & 0x1) << 2) 8279#define G_028B94_STREAMOUT_2_EN(x) (((x) >> 2) & 0x1) 8280#define C_028B94_STREAMOUT_2_EN 0xFFFFFFFB 8281#define S_028B94_STREAMOUT_3_EN(x) (((unsigned)(x) & 0x1) << 3) 8282#define G_028B94_STREAMOUT_3_EN(x) (((x) >> 3) & 0x1) 8283#define C_028B94_STREAMOUT_3_EN 0xFFFFFFF7 8284#define S_028B94_RAST_STREAM(x) (((unsigned)(x) & 0x07) << 4) 8285#define G_028B94_RAST_STREAM(x) (((x) >> 4) & 0x07) 8286#define C_028B94_RAST_STREAM 0xFFFFFF8F 8287#define S_028B94_RAST_STREAM_MASK(x) (((unsigned)(x) & 0x0F) << 8) 8288#define G_028B94_RAST_STREAM_MASK(x) (((x) >> 8) & 0x0F) 8289#define C_028B94_RAST_STREAM_MASK 0xFFFFF0FF 8290#define S_028B94_USE_RAST_STREAM_MASK(x) (((unsigned)(x) & 0x1) << 31) 8291#define G_028B94_USE_RAST_STREAM_MASK(x) (((x) >> 31) & 0x1) 8292#define C_028B94_USE_RAST_STREAM_MASK 0x7FFFFFFF 8293#define R_028B98_VGT_STRMOUT_BUFFER_CONFIG 0x028B98 8294#define S_028B98_STREAM_0_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 0) 8295#define G_028B98_STREAM_0_BUFFER_EN(x) (((x) >> 0) & 0x0F) 8296#define C_028B98_STREAM_0_BUFFER_EN 0xFFFFFFF0 8297#define S_028B98_STREAM_1_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 4) 8298#define G_028B98_STREAM_1_BUFFER_EN(x) (((x) >> 4) & 0x0F) 8299#define C_028B98_STREAM_1_BUFFER_EN 0xFFFFFF0F 8300#define S_028B98_STREAM_2_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 8) 8301#define G_028B98_STREAM_2_BUFFER_EN(x) (((x) >> 8) & 0x0F) 8302#define C_028B98_STREAM_2_BUFFER_EN 0xFFFFF0FF 8303#define S_028B98_STREAM_3_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 12) 8304#define G_028B98_STREAM_3_BUFFER_EN(x) (((x) >> 12) & 0x0F) 8305#define C_028B98_STREAM_3_BUFFER_EN 0xFFFF0FFF 8306#define R_028BD4_PA_SC_CENTROID_PRIORITY_0 0x028BD4 8307#define S_028BD4_DISTANCE_0(x) (((unsigned)(x) & 0x0F) << 0) 8308#define G_028BD4_DISTANCE_0(x) (((x) >> 0) & 0x0F) 8309#define C_028BD4_DISTANCE_0 0xFFFFFFF0 8310#define S_028BD4_DISTANCE_1(x) (((unsigned)(x) & 0x0F) << 4) 8311#define G_028BD4_DISTANCE_1(x) (((x) >> 4) & 0x0F) 8312#define C_028BD4_DISTANCE_1 0xFFFFFF0F 8313#define S_028BD4_DISTANCE_2(x) (((unsigned)(x) & 0x0F) << 8) 8314#define G_028BD4_DISTANCE_2(x) (((x) >> 8) & 0x0F) 8315#define C_028BD4_DISTANCE_2 0xFFFFF0FF 8316#define S_028BD4_DISTANCE_3(x) (((unsigned)(x) & 0x0F) << 12) 8317#define G_028BD4_DISTANCE_3(x) (((x) >> 12) & 0x0F) 8318#define C_028BD4_DISTANCE_3 0xFFFF0FFF 8319#define S_028BD4_DISTANCE_4(x) (((unsigned)(x) & 0x0F) << 16) 8320#define G_028BD4_DISTANCE_4(x) (((x) >> 16) & 0x0F) 8321#define C_028BD4_DISTANCE_4 0xFFF0FFFF 8322#define S_028BD4_DISTANCE_5(x) (((unsigned)(x) & 0x0F) << 20) 8323#define G_028BD4_DISTANCE_5(x) (((x) >> 20) & 0x0F) 8324#define C_028BD4_DISTANCE_5 0xFF0FFFFF 8325#define S_028BD4_DISTANCE_6(x) (((unsigned)(x) & 0x0F) << 24) 8326#define G_028BD4_DISTANCE_6(x) (((x) >> 24) & 0x0F) 8327#define C_028BD4_DISTANCE_6 0xF0FFFFFF 8328#define S_028BD4_DISTANCE_7(x) (((unsigned)(x) & 0x0F) << 28) 8329#define G_028BD4_DISTANCE_7(x) (((x) >> 28) & 0x0F) 8330#define C_028BD4_DISTANCE_7 0x0FFFFFFF 8331#define R_028BD8_PA_SC_CENTROID_PRIORITY_1 0x028BD8 8332#define S_028BD8_DISTANCE_8(x) (((unsigned)(x) & 0x0F) << 0) 8333#define G_028BD8_DISTANCE_8(x) (((x) >> 0) & 0x0F) 8334#define C_028BD8_DISTANCE_8 0xFFFFFFF0 8335#define S_028BD8_DISTANCE_9(x) (((unsigned)(x) & 0x0F) << 4) 8336#define G_028BD8_DISTANCE_9(x) (((x) >> 4) & 0x0F) 8337#define C_028BD8_DISTANCE_9 0xFFFFFF0F 8338#define S_028BD8_DISTANCE_10(x) (((unsigned)(x) & 0x0F) << 8) 8339#define G_028BD8_DISTANCE_10(x) (((x) >> 8) & 0x0F) 8340#define C_028BD8_DISTANCE_10 0xFFFFF0FF 8341#define S_028BD8_DISTANCE_11(x) (((unsigned)(x) & 0x0F) << 12) 8342#define G_028BD8_DISTANCE_11(x) (((x) >> 12) & 0x0F) 8343#define C_028BD8_DISTANCE_11 0xFFFF0FFF 8344#define S_028BD8_DISTANCE_12(x) (((unsigned)(x) & 0x0F) << 16) 8345#define G_028BD8_DISTANCE_12(x) (((x) >> 16) & 0x0F) 8346#define C_028BD8_DISTANCE_12 0xFFF0FFFF 8347#define S_028BD8_DISTANCE_13(x) (((unsigned)(x) & 0x0F) << 20) 8348#define G_028BD8_DISTANCE_13(x) (((x) >> 20) & 0x0F) 8349#define C_028BD8_DISTANCE_13 0xFF0FFFFF 8350#define S_028BD8_DISTANCE_14(x) (((unsigned)(x) & 0x0F) << 24) 8351#define G_028BD8_DISTANCE_14(x) (((x) >> 24) & 0x0F) 8352#define C_028BD8_DISTANCE_14 0xF0FFFFFF 8353#define S_028BD8_DISTANCE_15(x) (((unsigned)(x) & 0x0F) << 28) 8354#define G_028BD8_DISTANCE_15(x) (((x) >> 28) & 0x0F) 8355#define C_028BD8_DISTANCE_15 0x0FFFFFFF 8356#define R_028BDC_PA_SC_LINE_CNTL 0x028BDC 8357#define S_028BDC_EXPAND_LINE_WIDTH(x) (((unsigned)(x) & 0x1) << 9) 8358#define G_028BDC_EXPAND_LINE_WIDTH(x) (((x) >> 9) & 0x1) 8359#define C_028BDC_EXPAND_LINE_WIDTH 0xFFFFFDFF 8360#define S_028BDC_LAST_PIXEL(x) (((unsigned)(x) & 0x1) << 10) 8361#define G_028BDC_LAST_PIXEL(x) (((x) >> 10) & 0x1) 8362#define C_028BDC_LAST_PIXEL 0xFFFFFBFF 8363#define S_028BDC_PERPENDICULAR_ENDCAP_ENA(x) (((unsigned)(x) & 0x1) << 11) 8364#define G_028BDC_PERPENDICULAR_ENDCAP_ENA(x) (((x) >> 11) & 0x1) 8365#define C_028BDC_PERPENDICULAR_ENDCAP_ENA 0xFFFFF7FF 8366#define S_028BDC_DX10_DIAMOND_TEST_ENA(x) (((unsigned)(x) & 0x1) << 12) 8367#define G_028BDC_DX10_DIAMOND_TEST_ENA(x) (((x) >> 12) & 0x1) 8368#define C_028BDC_DX10_DIAMOND_TEST_ENA 0xFFFFEFFF 8369#define R_028BE0_PA_SC_AA_CONFIG 0x028BE0 8370#define S_028BE0_MSAA_NUM_SAMPLES(x) (((unsigned)(x) & 0x07) << 0) 8371#define G_028BE0_MSAA_NUM_SAMPLES(x) (((x) >> 0) & 0x07) 8372#define C_028BE0_MSAA_NUM_SAMPLES 0xFFFFFFF8 8373#define S_028BE0_AA_MASK_CENTROID_DTMN(x) (((unsigned)(x) & 0x1) << 4) 8374#define G_028BE0_AA_MASK_CENTROID_DTMN(x) (((x) >> 4) & 0x1) 8375#define C_028BE0_AA_MASK_CENTROID_DTMN 0xFFFFFFEF 8376#define S_028BE0_MAX_SAMPLE_DIST(x) (((unsigned)(x) & 0x0F) << 13) 8377#define G_028BE0_MAX_SAMPLE_DIST(x) (((x) >> 13) & 0x0F) 8378#define C_028BE0_MAX_SAMPLE_DIST 0xFFFE1FFF 8379#define S_028BE0_MSAA_EXPOSED_SAMPLES(x) (((unsigned)(x) & 0x07) << 20) 8380#define G_028BE0_MSAA_EXPOSED_SAMPLES(x) (((x) >> 20) & 0x07) 8381#define C_028BE0_MSAA_EXPOSED_SAMPLES 0xFF8FFFFF 8382#define S_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((unsigned)(x) & 0x03) << 24) 8383#define G_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((x) >> 24) & 0x03) 8384#define C_028BE0_DETAIL_TO_EXPOSED_MODE 0xFCFFFFFF 8385#define R_028BE4_PA_SU_VTX_CNTL 0x028BE4 8386#define S_028BE4_PIX_CENTER(x) (((unsigned)(x) & 0x1) << 0) 8387#define G_028BE4_PIX_CENTER(x) (((x) >> 0) & 0x1) 8388#define C_028BE4_PIX_CENTER 0xFFFFFFFE 8389#define S_028BE4_ROUND_MODE(x) (((unsigned)(x) & 0x03) << 1) 8390#define G_028BE4_ROUND_MODE(x) (((x) >> 1) & 0x03) 8391#define C_028BE4_ROUND_MODE 0xFFFFFFF9 8392#define V_028BE4_X_TRUNCATE 0x00 8393#define V_028BE4_X_ROUND 0x01 8394#define V_028BE4_X_ROUND_TO_EVEN 0x02 8395#define V_028BE4_X_ROUND_TO_ODD 0x03 8396#define S_028BE4_QUANT_MODE(x) (((unsigned)(x) & 0x07) << 3) 8397#define G_028BE4_QUANT_MODE(x) (((x) >> 3) & 0x07) 8398#define C_028BE4_QUANT_MODE 0xFFFFFFC7 8399#define V_028BE4_X_16_8_FIXED_POINT_1_16TH 0x00 8400#define V_028BE4_X_16_8_FIXED_POINT_1_8TH 0x01 8401#define V_028BE4_X_16_8_FIXED_POINT_1_4TH 0x02 8402#define V_028BE4_X_16_8_FIXED_POINT_1_2 0x03 8403#define V_028BE4_X_16_8_FIXED_POINT_1 0x04 8404#define V_028BE4_X_16_8_FIXED_POINT_1_256TH 0x05 8405#define V_028BE4_X_14_10_FIXED_POINT_1_1024TH 0x06 8406#define V_028BE4_X_12_12_FIXED_POINT_1_4096TH 0x07 8407#define R_028BE8_PA_CL_GB_VERT_CLIP_ADJ 0x028BE8 8408#define R_028BEC_PA_CL_GB_VERT_DISC_ADJ 0x028BEC 8409#define R_028BF0_PA_CL_GB_HORZ_CLIP_ADJ 0x028BF0 8410#define R_028BF4_PA_CL_GB_HORZ_DISC_ADJ 0x028BF4 8411#define R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 0x028BF8 8412#define S_028BF8_S0_X(x) (((unsigned)(x) & 0x0F) << 0) 8413#define G_028BF8_S0_X(x) (((x) >> 0) & 0x0F) 8414#define C_028BF8_S0_X 0xFFFFFFF0 8415#define S_028BF8_S0_Y(x) (((unsigned)(x) & 0x0F) << 4) 8416#define G_028BF8_S0_Y(x) (((x) >> 4) & 0x0F) 8417#define C_028BF8_S0_Y 0xFFFFFF0F 8418#define S_028BF8_S1_X(x) (((unsigned)(x) & 0x0F) << 8) 8419#define G_028BF8_S1_X(x) (((x) >> 8) & 0x0F) 8420#define C_028BF8_S1_X 0xFFFFF0FF 8421#define S_028BF8_S1_Y(x) (((unsigned)(x) & 0x0F) << 12) 8422#define G_028BF8_S1_Y(x) (((x) >> 12) & 0x0F) 8423#define C_028BF8_S1_Y 0xFFFF0FFF 8424#define S_028BF8_S2_X(x) (((unsigned)(x) & 0x0F) << 16) 8425#define G_028BF8_S2_X(x) (((x) >> 16) & 0x0F) 8426#define C_028BF8_S2_X 0xFFF0FFFF 8427#define S_028BF8_S2_Y(x) (((unsigned)(x) & 0x0F) << 20) 8428#define G_028BF8_S2_Y(x) (((x) >> 20) & 0x0F) 8429#define C_028BF8_S2_Y 0xFF0FFFFF 8430#define S_028BF8_S3_X(x) (((unsigned)(x) & 0x0F) << 24) 8431#define G_028BF8_S3_X(x) (((x) >> 24) & 0x0F) 8432#define C_028BF8_S3_X 0xF0FFFFFF 8433#define S_028BF8_S3_Y(x) (((unsigned)(x) & 0x0F) << 28) 8434#define G_028BF8_S3_Y(x) (((x) >> 28) & 0x0F) 8435#define C_028BF8_S3_Y 0x0FFFFFFF 8436#define R_028BFC_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1 0x028BFC 8437#define S_028BFC_S4_X(x) (((unsigned)(x) & 0x0F) << 0) 8438#define G_028BFC_S4_X(x) (((x) >> 0) & 0x0F) 8439#define C_028BFC_S4_X 0xFFFFFFF0 8440#define S_028BFC_S4_Y(x) (((unsigned)(x) & 0x0F) << 4) 8441#define G_028BFC_S4_Y(x) (((x) >> 4) & 0x0F) 8442#define C_028BFC_S4_Y 0xFFFFFF0F 8443#define S_028BFC_S5_X(x) (((unsigned)(x) & 0x0F) << 8) 8444#define G_028BFC_S5_X(x) (((x) >> 8) & 0x0F) 8445#define C_028BFC_S5_X 0xFFFFF0FF 8446#define S_028BFC_S5_Y(x) (((unsigned)(x) & 0x0F) << 12) 8447#define G_028BFC_S5_Y(x) (((x) >> 12) & 0x0F) 8448#define C_028BFC_S5_Y 0xFFFF0FFF 8449#define S_028BFC_S6_X(x) (((unsigned)(x) & 0x0F) << 16) 8450#define G_028BFC_S6_X(x) (((x) >> 16) & 0x0F) 8451#define C_028BFC_S6_X 0xFFF0FFFF 8452#define S_028BFC_S6_Y(x) (((unsigned)(x) & 0x0F) << 20) 8453#define G_028BFC_S6_Y(x) (((x) >> 20) & 0x0F) 8454#define C_028BFC_S6_Y 0xFF0FFFFF 8455#define S_028BFC_S7_X(x) (((unsigned)(x) & 0x0F) << 24) 8456#define G_028BFC_S7_X(x) (((x) >> 24) & 0x0F) 8457#define C_028BFC_S7_X 0xF0FFFFFF 8458#define S_028BFC_S7_Y(x) (((unsigned)(x) & 0x0F) << 28) 8459#define G_028BFC_S7_Y(x) (((x) >> 28) & 0x0F) 8460#define C_028BFC_S7_Y 0x0FFFFFFF 8461#define R_028C00_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2 0x028C00 8462#define S_028C00_S8_X(x) (((unsigned)(x) & 0x0F) << 0) 8463#define G_028C00_S8_X(x) (((x) >> 0) & 0x0F) 8464#define C_028C00_S8_X 0xFFFFFFF0 8465#define S_028C00_S8_Y(x) (((unsigned)(x) & 0x0F) << 4) 8466#define G_028C00_S8_Y(x) (((x) >> 4) & 0x0F) 8467#define C_028C00_S8_Y 0xFFFFFF0F 8468#define S_028C00_S9_X(x) (((unsigned)(x) & 0x0F) << 8) 8469#define G_028C00_S9_X(x) (((x) >> 8) & 0x0F) 8470#define C_028C00_S9_X 0xFFFFF0FF 8471#define S_028C00_S9_Y(x) (((unsigned)(x) & 0x0F) << 12) 8472#define G_028C00_S9_Y(x) (((x) >> 12) & 0x0F) 8473#define C_028C00_S9_Y 0xFFFF0FFF 8474#define S_028C00_S10_X(x) (((unsigned)(x) & 0x0F) << 16) 8475#define G_028C00_S10_X(x) (((x) >> 16) & 0x0F) 8476#define C_028C00_S10_X 0xFFF0FFFF 8477#define S_028C00_S10_Y(x) (((unsigned)(x) & 0x0F) << 20) 8478#define G_028C00_S10_Y(x) (((x) >> 20) & 0x0F) 8479#define C_028C00_S10_Y 0xFF0FFFFF 8480#define S_028C00_S11_X(x) (((unsigned)(x) & 0x0F) << 24) 8481#define G_028C00_S11_X(x) (((x) >> 24) & 0x0F) 8482#define C_028C00_S11_X 0xF0FFFFFF 8483#define S_028C00_S11_Y(x) (((unsigned)(x) & 0x0F) << 28) 8484#define G_028C00_S11_Y(x) (((x) >> 28) & 0x0F) 8485#define C_028C00_S11_Y 0x0FFFFFFF 8486#define R_028C04_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3 0x028C04 8487#define S_028C04_S12_X(x) (((unsigned)(x) & 0x0F) << 0) 8488#define G_028C04_S12_X(x) (((x) >> 0) & 0x0F) 8489#define C_028C04_S12_X 0xFFFFFFF0 8490#define S_028C04_S12_Y(x) (((unsigned)(x) & 0x0F) << 4) 8491#define G_028C04_S12_Y(x) (((x) >> 4) & 0x0F) 8492#define C_028C04_S12_Y 0xFFFFFF0F 8493#define S_028C04_S13_X(x) (((unsigned)(x) & 0x0F) << 8) 8494#define G_028C04_S13_X(x) (((x) >> 8) & 0x0F) 8495#define C_028C04_S13_X 0xFFFFF0FF 8496#define S_028C04_S13_Y(x) (((unsigned)(x) & 0x0F) << 12) 8497#define G_028C04_S13_Y(x) (((x) >> 12) & 0x0F) 8498#define C_028C04_S13_Y 0xFFFF0FFF 8499#define S_028C04_S14_X(x) (((unsigned)(x) & 0x0F) << 16) 8500#define G_028C04_S14_X(x) (((x) >> 16) & 0x0F) 8501#define C_028C04_S14_X 0xFFF0FFFF 8502#define S_028C04_S14_Y(x) (((unsigned)(x) & 0x0F) << 20) 8503#define G_028C04_S14_Y(x) (((x) >> 20) & 0x0F) 8504#define C_028C04_S14_Y 0xFF0FFFFF 8505#define S_028C04_S15_X(x) (((unsigned)(x) & 0x0F) << 24) 8506#define G_028C04_S15_X(x) (((x) >> 24) & 0x0F) 8507#define C_028C04_S15_X 0xF0FFFFFF 8508#define S_028C04_S15_Y(x) (((unsigned)(x) & 0x0F) << 28) 8509#define G_028C04_S15_Y(x) (((x) >> 28) & 0x0F) 8510#define C_028C04_S15_Y 0x0FFFFFFF 8511#define R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0 0x028C08 8512#define S_028C08_S0_X(x) (((unsigned)(x) & 0x0F) << 0) 8513#define G_028C08_S0_X(x) (((x) >> 0) & 0x0F) 8514#define C_028C08_S0_X 0xFFFFFFF0 8515#define S_028C08_S0_Y(x) (((unsigned)(x) & 0x0F) << 4) 8516#define G_028C08_S0_Y(x) (((x) >> 4) & 0x0F) 8517#define C_028C08_S0_Y 0xFFFFFF0F 8518#define S_028C08_S1_X(x) (((unsigned)(x) & 0x0F) << 8) 8519#define G_028C08_S1_X(x) (((x) >> 8) & 0x0F) 8520#define C_028C08_S1_X 0xFFFFF0FF 8521#define S_028C08_S1_Y(x) (((unsigned)(x) & 0x0F) << 12) 8522#define G_028C08_S1_Y(x) (((x) >> 12) & 0x0F) 8523#define C_028C08_S1_Y 0xFFFF0FFF 8524#define S_028C08_S2_X(x) (((unsigned)(x) & 0x0F) << 16) 8525#define G_028C08_S2_X(x) (((x) >> 16) & 0x0F) 8526#define C_028C08_S2_X 0xFFF0FFFF 8527#define S_028C08_S2_Y(x) (((unsigned)(x) & 0x0F) << 20) 8528#define G_028C08_S2_Y(x) (((x) >> 20) & 0x0F) 8529#define C_028C08_S2_Y 0xFF0FFFFF 8530#define S_028C08_S3_X(x) (((unsigned)(x) & 0x0F) << 24) 8531#define G_028C08_S3_X(x) (((x) >> 24) & 0x0F) 8532#define C_028C08_S3_X 0xF0FFFFFF 8533#define S_028C08_S3_Y(x) (((unsigned)(x) & 0x0F) << 28) 8534#define G_028C08_S3_Y(x) (((x) >> 28) & 0x0F) 8535#define C_028C08_S3_Y 0x0FFFFFFF 8536#define R_028C0C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1 0x028C0C 8537#define S_028C0C_S4_X(x) (((unsigned)(x) & 0x0F) << 0) 8538#define G_028C0C_S4_X(x) (((x) >> 0) & 0x0F) 8539#define C_028C0C_S4_X 0xFFFFFFF0 8540#define S_028C0C_S4_Y(x) (((unsigned)(x) & 0x0F) << 4) 8541#define G_028C0C_S4_Y(x) (((x) >> 4) & 0x0F) 8542#define C_028C0C_S4_Y 0xFFFFFF0F 8543#define S_028C0C_S5_X(x) (((unsigned)(x) & 0x0F) << 8) 8544#define G_028C0C_S5_X(x) (((x) >> 8) & 0x0F) 8545#define C_028C0C_S5_X 0xFFFFF0FF 8546#define S_028C0C_S5_Y(x) (((unsigned)(x) & 0x0F) << 12) 8547#define G_028C0C_S5_Y(x) (((x) >> 12) & 0x0F) 8548#define C_028C0C_S5_Y 0xFFFF0FFF 8549#define S_028C0C_S6_X(x) (((unsigned)(x) & 0x0F) << 16) 8550#define G_028C0C_S6_X(x) (((x) >> 16) & 0x0F) 8551#define C_028C0C_S6_X 0xFFF0FFFF 8552#define S_028C0C_S6_Y(x) (((unsigned)(x) & 0x0F) << 20) 8553#define G_028C0C_S6_Y(x) (((x) >> 20) & 0x0F) 8554#define C_028C0C_S6_Y 0xFF0FFFFF 8555#define S_028C0C_S7_X(x) (((unsigned)(x) & 0x0F) << 24) 8556#define G_028C0C_S7_X(x) (((x) >> 24) & 0x0F) 8557#define C_028C0C_S7_X 0xF0FFFFFF 8558#define S_028C0C_S7_Y(x) (((unsigned)(x) & 0x0F) << 28) 8559#define G_028C0C_S7_Y(x) (((x) >> 28) & 0x0F) 8560#define C_028C0C_S7_Y 0x0FFFFFFF 8561#define R_028C10_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2 0x028C10 8562#define S_028C10_S8_X(x) (((unsigned)(x) & 0x0F) << 0) 8563#define G_028C10_S8_X(x) (((x) >> 0) & 0x0F) 8564#define C_028C10_S8_X 0xFFFFFFF0 8565#define S_028C10_S8_Y(x) (((unsigned)(x) & 0x0F) << 4) 8566#define G_028C10_S8_Y(x) (((x) >> 4) & 0x0F) 8567#define C_028C10_S8_Y 0xFFFFFF0F 8568#define S_028C10_S9_X(x) (((unsigned)(x) & 0x0F) << 8) 8569#define G_028C10_S9_X(x) (((x) >> 8) & 0x0F) 8570#define C_028C10_S9_X 0xFFFFF0FF 8571#define S_028C10_S9_Y(x) (((unsigned)(x) & 0x0F) << 12) 8572#define G_028C10_S9_Y(x) (((x) >> 12) & 0x0F) 8573#define C_028C10_S9_Y 0xFFFF0FFF 8574#define S_028C10_S10_X(x) (((unsigned)(x) & 0x0F) << 16) 8575#define G_028C10_S10_X(x) (((x) >> 16) & 0x0F) 8576#define C_028C10_S10_X 0xFFF0FFFF 8577#define S_028C10_S10_Y(x) (((unsigned)(x) & 0x0F) << 20) 8578#define G_028C10_S10_Y(x) (((x) >> 20) & 0x0F) 8579#define C_028C10_S10_Y 0xFF0FFFFF 8580#define S_028C10_S11_X(x) (((unsigned)(x) & 0x0F) << 24) 8581#define G_028C10_S11_X(x) (((x) >> 24) & 0x0F) 8582#define C_028C10_S11_X 0xF0FFFFFF 8583#define S_028C10_S11_Y(x) (((unsigned)(x) & 0x0F) << 28) 8584#define G_028C10_S11_Y(x) (((x) >> 28) & 0x0F) 8585#define C_028C10_S11_Y 0x0FFFFFFF 8586#define R_028C14_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3 0x028C14 8587#define S_028C14_S12_X(x) (((unsigned)(x) & 0x0F) << 0) 8588#define G_028C14_S12_X(x) (((x) >> 0) & 0x0F) 8589#define C_028C14_S12_X 0xFFFFFFF0 8590#define S_028C14_S12_Y(x) (((unsigned)(x) & 0x0F) << 4) 8591#define G_028C14_S12_Y(x) (((x) >> 4) & 0x0F) 8592#define C_028C14_S12_Y 0xFFFFFF0F 8593#define S_028C14_S13_X(x) (((unsigned)(x) & 0x0F) << 8) 8594#define G_028C14_S13_X(x) (((x) >> 8) & 0x0F) 8595#define C_028C14_S13_X 0xFFFFF0FF 8596#define S_028C14_S13_Y(x) (((unsigned)(x) & 0x0F) << 12) 8597#define G_028C14_S13_Y(x) (((x) >> 12) & 0x0F) 8598#define C_028C14_S13_Y 0xFFFF0FFF 8599#define S_028C14_S14_X(x) (((unsigned)(x) & 0x0F) << 16) 8600#define G_028C14_S14_X(x) (((x) >> 16) & 0x0F) 8601#define C_028C14_S14_X 0xFFF0FFFF 8602#define S_028C14_S14_Y(x) (((unsigned)(x) & 0x0F) << 20) 8603#define G_028C14_S14_Y(x) (((x) >> 20) & 0x0F) 8604#define C_028C14_S14_Y 0xFF0FFFFF 8605#define S_028C14_S15_X(x) (((unsigned)(x) & 0x0F) << 24) 8606#define G_028C14_S15_X(x) (((x) >> 24) & 0x0F) 8607#define C_028C14_S15_X 0xF0FFFFFF 8608#define S_028C14_S15_Y(x) (((unsigned)(x) & 0x0F) << 28) 8609#define G_028C14_S15_Y(x) (((x) >> 28) & 0x0F) 8610#define C_028C14_S15_Y 0x0FFFFFFF 8611#define R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0 0x028C18 8612#define S_028C18_S0_X(x) (((unsigned)(x) & 0x0F) << 0) 8613#define G_028C18_S0_X(x) (((x) >> 0) & 0x0F) 8614#define C_028C18_S0_X 0xFFFFFFF0 8615#define S_028C18_S0_Y(x) (((unsigned)(x) & 0x0F) << 4) 8616#define G_028C18_S0_Y(x) (((x) >> 4) & 0x0F) 8617#define C_028C18_S0_Y 0xFFFFFF0F 8618#define S_028C18_S1_X(x) (((unsigned)(x) & 0x0F) << 8) 8619#define G_028C18_S1_X(x) (((x) >> 8) & 0x0F) 8620#define C_028C18_S1_X 0xFFFFF0FF 8621#define S_028C18_S1_Y(x) (((unsigned)(x) & 0x0F) << 12) 8622#define G_028C18_S1_Y(x) (((x) >> 12) & 0x0F) 8623#define C_028C18_S1_Y 0xFFFF0FFF 8624#define S_028C18_S2_X(x) (((unsigned)(x) & 0x0F) << 16) 8625#define G_028C18_S2_X(x) (((x) >> 16) & 0x0F) 8626#define C_028C18_S2_X 0xFFF0FFFF 8627#define S_028C18_S2_Y(x) (((unsigned)(x) & 0x0F) << 20) 8628#define G_028C18_S2_Y(x) (((x) >> 20) & 0x0F) 8629#define C_028C18_S2_Y 0xFF0FFFFF 8630#define S_028C18_S3_X(x) (((unsigned)(x) & 0x0F) << 24) 8631#define G_028C18_S3_X(x) (((x) >> 24) & 0x0F) 8632#define C_028C18_S3_X 0xF0FFFFFF 8633#define S_028C18_S3_Y(x) (((unsigned)(x) & 0x0F) << 28) 8634#define G_028C18_S3_Y(x) (((x) >> 28) & 0x0F) 8635#define C_028C18_S3_Y 0x0FFFFFFF 8636#define R_028C1C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1 0x028C1C 8637#define S_028C1C_S4_X(x) (((unsigned)(x) & 0x0F) << 0) 8638#define G_028C1C_S4_X(x) (((x) >> 0) & 0x0F) 8639#define C_028C1C_S4_X 0xFFFFFFF0 8640#define S_028C1C_S4_Y(x) (((unsigned)(x) & 0x0F) << 4) 8641#define G_028C1C_S4_Y(x) (((x) >> 4) & 0x0F) 8642#define C_028C1C_S4_Y 0xFFFFFF0F 8643#define S_028C1C_S5_X(x) (((unsigned)(x) & 0x0F) << 8) 8644#define G_028C1C_S5_X(x) (((x) >> 8) & 0x0F) 8645#define C_028C1C_S5_X 0xFFFFF0FF 8646#define S_028C1C_S5_Y(x) (((unsigned)(x) & 0x0F) << 12) 8647#define G_028C1C_S5_Y(x) (((x) >> 12) & 0x0F) 8648#define C_028C1C_S5_Y 0xFFFF0FFF 8649#define S_028C1C_S6_X(x) (((unsigned)(x) & 0x0F) << 16) 8650#define G_028C1C_S6_X(x) (((x) >> 16) & 0x0F) 8651#define C_028C1C_S6_X 0xFFF0FFFF 8652#define S_028C1C_S6_Y(x) (((unsigned)(x) & 0x0F) << 20) 8653#define G_028C1C_S6_Y(x) (((x) >> 20) & 0x0F) 8654#define C_028C1C_S6_Y 0xFF0FFFFF 8655#define S_028C1C_S7_X(x) (((unsigned)(x) & 0x0F) << 24) 8656#define G_028C1C_S7_X(x) (((x) >> 24) & 0x0F) 8657#define C_028C1C_S7_X 0xF0FFFFFF 8658#define S_028C1C_S7_Y(x) (((unsigned)(x) & 0x0F) << 28) 8659#define G_028C1C_S7_Y(x) (((x) >> 28) & 0x0F) 8660#define C_028C1C_S7_Y 0x0FFFFFFF 8661#define R_028C20_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2 0x028C20 8662#define S_028C20_S8_X(x) (((unsigned)(x) & 0x0F) << 0) 8663#define G_028C20_S8_X(x) (((x) >> 0) & 0x0F) 8664#define C_028C20_S8_X 0xFFFFFFF0 8665#define S_028C20_S8_Y(x) (((unsigned)(x) & 0x0F) << 4) 8666#define G_028C20_S8_Y(x) (((x) >> 4) & 0x0F) 8667#define C_028C20_S8_Y 0xFFFFFF0F 8668#define S_028C20_S9_X(x) (((unsigned)(x) & 0x0F) << 8) 8669#define G_028C20_S9_X(x) (((x) >> 8) & 0x0F) 8670#define C_028C20_S9_X 0xFFFFF0FF 8671#define S_028C20_S9_Y(x) (((unsigned)(x) & 0x0F) << 12) 8672#define G_028C20_S9_Y(x) (((x) >> 12) & 0x0F) 8673#define C_028C20_S9_Y 0xFFFF0FFF 8674#define S_028C20_S10_X(x) (((unsigned)(x) & 0x0F) << 16) 8675#define G_028C20_S10_X(x) (((x) >> 16) & 0x0F) 8676#define C_028C20_S10_X 0xFFF0FFFF 8677#define S_028C20_S10_Y(x) (((unsigned)(x) & 0x0F) << 20) 8678#define G_028C20_S10_Y(x) (((x) >> 20) & 0x0F) 8679#define C_028C20_S10_Y 0xFF0FFFFF 8680#define S_028C20_S11_X(x) (((unsigned)(x) & 0x0F) << 24) 8681#define G_028C20_S11_X(x) (((x) >> 24) & 0x0F) 8682#define C_028C20_S11_X 0xF0FFFFFF 8683#define S_028C20_S11_Y(x) (((unsigned)(x) & 0x0F) << 28) 8684#define G_028C20_S11_Y(x) (((x) >> 28) & 0x0F) 8685#define C_028C20_S11_Y 0x0FFFFFFF 8686#define R_028C24_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3 0x028C24 8687#define S_028C24_S12_X(x) (((unsigned)(x) & 0x0F) << 0) 8688#define G_028C24_S12_X(x) (((x) >> 0) & 0x0F) 8689#define C_028C24_S12_X 0xFFFFFFF0 8690#define S_028C24_S12_Y(x) (((unsigned)(x) & 0x0F) << 4) 8691#define G_028C24_S12_Y(x) (((x) >> 4) & 0x0F) 8692#define C_028C24_S12_Y 0xFFFFFF0F 8693#define S_028C24_S13_X(x) (((unsigned)(x) & 0x0F) << 8) 8694#define G_028C24_S13_X(x) (((x) >> 8) & 0x0F) 8695#define C_028C24_S13_X 0xFFFFF0FF 8696#define S_028C24_S13_Y(x) (((unsigned)(x) & 0x0F) << 12) 8697#define G_028C24_S13_Y(x) (((x) >> 12) & 0x0F) 8698#define C_028C24_S13_Y 0xFFFF0FFF 8699#define S_028C24_S14_X(x) (((unsigned)(x) & 0x0F) << 16) 8700#define G_028C24_S14_X(x) (((x) >> 16) & 0x0F) 8701#define C_028C24_S14_X 0xFFF0FFFF 8702#define S_028C24_S14_Y(x) (((unsigned)(x) & 0x0F) << 20) 8703#define G_028C24_S14_Y(x) (((x) >> 20) & 0x0F) 8704#define C_028C24_S14_Y 0xFF0FFFFF 8705#define S_028C24_S15_X(x) (((unsigned)(x) & 0x0F) << 24) 8706#define G_028C24_S15_X(x) (((x) >> 24) & 0x0F) 8707#define C_028C24_S15_X 0xF0FFFFFF 8708#define S_028C24_S15_Y(x) (((unsigned)(x) & 0x0F) << 28) 8709#define G_028C24_S15_Y(x) (((x) >> 28) & 0x0F) 8710#define C_028C24_S15_Y 0x0FFFFFFF 8711#define R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0 0x028C28 8712#define S_028C28_S0_X(x) (((unsigned)(x) & 0x0F) << 0) 8713#define G_028C28_S0_X(x) (((x) >> 0) & 0x0F) 8714#define C_028C28_S0_X 0xFFFFFFF0 8715#define S_028C28_S0_Y(x) (((unsigned)(x) & 0x0F) << 4) 8716#define G_028C28_S0_Y(x) (((x) >> 4) & 0x0F) 8717#define C_028C28_S0_Y 0xFFFFFF0F 8718#define S_028C28_S1_X(x) (((unsigned)(x) & 0x0F) << 8) 8719#define G_028C28_S1_X(x) (((x) >> 8) & 0x0F) 8720#define C_028C28_S1_X 0xFFFFF0FF 8721#define S_028C28_S1_Y(x) (((unsigned)(x) & 0x0F) << 12) 8722#define G_028C28_S1_Y(x) (((x) >> 12) & 0x0F) 8723#define C_028C28_S1_Y 0xFFFF0FFF 8724#define S_028C28_S2_X(x) (((unsigned)(x) & 0x0F) << 16) 8725#define G_028C28_S2_X(x) (((x) >> 16) & 0x0F) 8726#define C_028C28_S2_X 0xFFF0FFFF 8727#define S_028C28_S2_Y(x) (((unsigned)(x) & 0x0F) << 20) 8728#define G_028C28_S2_Y(x) (((x) >> 20) & 0x0F) 8729#define C_028C28_S2_Y 0xFF0FFFFF 8730#define S_028C28_S3_X(x) (((unsigned)(x) & 0x0F) << 24) 8731#define G_028C28_S3_X(x) (((x) >> 24) & 0x0F) 8732#define C_028C28_S3_X 0xF0FFFFFF 8733#define S_028C28_S3_Y(x) (((unsigned)(x) & 0x0F) << 28) 8734#define G_028C28_S3_Y(x) (((x) >> 28) & 0x0F) 8735#define C_028C28_S3_Y 0x0FFFFFFF 8736#define R_028C2C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1 0x028C2C 8737#define S_028C2C_S4_X(x) (((unsigned)(x) & 0x0F) << 0) 8738#define G_028C2C_S4_X(x) (((x) >> 0) & 0x0F) 8739#define C_028C2C_S4_X 0xFFFFFFF0 8740#define S_028C2C_S4_Y(x) (((unsigned)(x) & 0x0F) << 4) 8741#define G_028C2C_S4_Y(x) (((x) >> 4) & 0x0F) 8742#define C_028C2C_S4_Y 0xFFFFFF0F 8743#define S_028C2C_S5_X(x) (((unsigned)(x) & 0x0F) << 8) 8744#define G_028C2C_S5_X(x) (((x) >> 8) & 0x0F) 8745#define C_028C2C_S5_X 0xFFFFF0FF 8746#define S_028C2C_S5_Y(x) (((unsigned)(x) & 0x0F) << 12) 8747#define G_028C2C_S5_Y(x) (((x) >> 12) & 0x0F) 8748#define C_028C2C_S5_Y 0xFFFF0FFF 8749#define S_028C2C_S6_X(x) (((unsigned)(x) & 0x0F) << 16) 8750#define G_028C2C_S6_X(x) (((x) >> 16) & 0x0F) 8751#define C_028C2C_S6_X 0xFFF0FFFF 8752#define S_028C2C_S6_Y(x) (((unsigned)(x) & 0x0F) << 20) 8753#define G_028C2C_S6_Y(x) (((x) >> 20) & 0x0F) 8754#define C_028C2C_S6_Y 0xFF0FFFFF 8755#define S_028C2C_S7_X(x) (((unsigned)(x) & 0x0F) << 24) 8756#define G_028C2C_S7_X(x) (((x) >> 24) & 0x0F) 8757#define C_028C2C_S7_X 0xF0FFFFFF 8758#define S_028C2C_S7_Y(x) (((unsigned)(x) & 0x0F) << 28) 8759#define G_028C2C_S7_Y(x) (((x) >> 28) & 0x0F) 8760#define C_028C2C_S7_Y 0x0FFFFFFF 8761#define R_028C30_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2 0x028C30 8762#define S_028C30_S8_X(x) (((unsigned)(x) & 0x0F) << 0) 8763#define G_028C30_S8_X(x) (((x) >> 0) & 0x0F) 8764#define C_028C30_S8_X 0xFFFFFFF0 8765#define S_028C30_S8_Y(x) (((unsigned)(x) & 0x0F) << 4) 8766#define G_028C30_S8_Y(x) (((x) >> 4) & 0x0F) 8767#define C_028C30_S8_Y 0xFFFFFF0F 8768#define S_028C30_S9_X(x) (((unsigned)(x) & 0x0F) << 8) 8769#define G_028C30_S9_X(x) (((x) >> 8) & 0x0F) 8770#define C_028C30_S9_X 0xFFFFF0FF 8771#define S_028C30_S9_Y(x) (((unsigned)(x) & 0x0F) << 12) 8772#define G_028C30_S9_Y(x) (((x) >> 12) & 0x0F) 8773#define C_028C30_S9_Y 0xFFFF0FFF 8774#define S_028C30_S10_X(x) (((unsigned)(x) & 0x0F) << 16) 8775#define G_028C30_S10_X(x) (((x) >> 16) & 0x0F) 8776#define C_028C30_S10_X 0xFFF0FFFF 8777#define S_028C30_S10_Y(x) (((unsigned)(x) & 0x0F) << 20) 8778#define G_028C30_S10_Y(x) (((x) >> 20) & 0x0F) 8779#define C_028C30_S10_Y 0xFF0FFFFF 8780#define S_028C30_S11_X(x) (((unsigned)(x) & 0x0F) << 24) 8781#define G_028C30_S11_X(x) (((x) >> 24) & 0x0F) 8782#define C_028C30_S11_X 0xF0FFFFFF 8783#define S_028C30_S11_Y(x) (((unsigned)(x) & 0x0F) << 28) 8784#define G_028C30_S11_Y(x) (((x) >> 28) & 0x0F) 8785#define C_028C30_S11_Y 0x0FFFFFFF 8786#define R_028C34_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3 0x028C34 8787#define S_028C34_S12_X(x) (((unsigned)(x) & 0x0F) << 0) 8788#define G_028C34_S12_X(x) (((x) >> 0) & 0x0F) 8789#define C_028C34_S12_X 0xFFFFFFF0 8790#define S_028C34_S12_Y(x) (((unsigned)(x) & 0x0F) << 4) 8791#define G_028C34_S12_Y(x) (((x) >> 4) & 0x0F) 8792#define C_028C34_S12_Y 0xFFFFFF0F 8793#define S_028C34_S13_X(x) (((unsigned)(x) & 0x0F) << 8) 8794#define G_028C34_S13_X(x) (((x) >> 8) & 0x0F) 8795#define C_028C34_S13_X 0xFFFFF0FF 8796#define S_028C34_S13_Y(x) (((unsigned)(x) & 0x0F) << 12) 8797#define G_028C34_S13_Y(x) (((x) >> 12) & 0x0F) 8798#define C_028C34_S13_Y 0xFFFF0FFF 8799#define S_028C34_S14_X(x) (((unsigned)(x) & 0x0F) << 16) 8800#define G_028C34_S14_X(x) (((x) >> 16) & 0x0F) 8801#define C_028C34_S14_X 0xFFF0FFFF 8802#define S_028C34_S14_Y(x) (((unsigned)(x) & 0x0F) << 20) 8803#define G_028C34_S14_Y(x) (((x) >> 20) & 0x0F) 8804#define C_028C34_S14_Y 0xFF0FFFFF 8805#define S_028C34_S15_X(x) (((unsigned)(x) & 0x0F) << 24) 8806#define G_028C34_S15_X(x) (((x) >> 24) & 0x0F) 8807#define C_028C34_S15_X 0xF0FFFFFF 8808#define S_028C34_S15_Y(x) (((unsigned)(x) & 0x0F) << 28) 8809#define G_028C34_S15_Y(x) (((x) >> 28) & 0x0F) 8810#define C_028C34_S15_Y 0x0FFFFFFF 8811#define R_028C38_PA_SC_AA_MASK_X0Y0_X1Y0 0x028C38 8812#define S_028C38_AA_MASK_X0Y0(x) (((unsigned)(x) & 0xFFFF) << 0) 8813#define G_028C38_AA_MASK_X0Y0(x) (((x) >> 0) & 0xFFFF) 8814#define C_028C38_AA_MASK_X0Y0 0xFFFF0000 8815#define S_028C38_AA_MASK_X1Y0(x) (((unsigned)(x) & 0xFFFF) << 16) 8816#define G_028C38_AA_MASK_X1Y0(x) (((x) >> 16) & 0xFFFF) 8817#define C_028C38_AA_MASK_X1Y0 0x0000FFFF 8818#define R_028C3C_PA_SC_AA_MASK_X0Y1_X1Y1 0x028C3C 8819#define S_028C3C_AA_MASK_X0Y1(x) (((unsigned)(x) & 0xFFFF) << 0) 8820#define G_028C3C_AA_MASK_X0Y1(x) (((x) >> 0) & 0xFFFF) 8821#define C_028C3C_AA_MASK_X0Y1 0xFFFF0000 8822#define S_028C3C_AA_MASK_X1Y1(x) (((unsigned)(x) & 0xFFFF) << 16) 8823#define G_028C3C_AA_MASK_X1Y1(x) (((x) >> 16) & 0xFFFF) 8824#define C_028C3C_AA_MASK_X1Y1 0x0000FFFF 8825/* Stoney */ 8826#define R_028C40_PA_SC_SHADER_CONTROL 0x028C40 8827#define S_028C40_REALIGN_DQUADS_AFTER_N_WAVES(x) (((unsigned)(x) & 0x03) << 0) 8828#define G_028C40_REALIGN_DQUADS_AFTER_N_WAVES(x) (((x) >> 0) & 0x03) 8829#define C_028C40_REALIGN_DQUADS_AFTER_N_WAVES 0xFFFFFFFC 8830/* */ 8831#define R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL 0x028C58 8832#define S_028C58_VTX_REUSE_DEPTH(x) (((unsigned)(x) & 0xFF) << 0) 8833#define G_028C58_VTX_REUSE_DEPTH(x) (((x) >> 0) & 0xFF) 8834#define C_028C58_VTX_REUSE_DEPTH 0xFFFFFF00 8835#define R_028C5C_VGT_OUT_DEALLOC_CNTL 0x028C5C 8836#define S_028C5C_DEALLOC_DIST(x) (((unsigned)(x) & 0x7F) << 0) 8837#define G_028C5C_DEALLOC_DIST(x) (((x) >> 0) & 0x7F) 8838#define C_028C5C_DEALLOC_DIST 0xFFFFFF80 8839#define R_028C60_CB_COLOR0_BASE 0x028C60 8840#define R_028C64_CB_COLOR0_PITCH 0x028C64 8841#define S_028C64_TILE_MAX(x) (((unsigned)(x) & 0x7FF) << 0) 8842#define G_028C64_TILE_MAX(x) (((x) >> 0) & 0x7FF) 8843#define C_028C64_TILE_MAX 0xFFFFF800 8844/* CIK */ 8845#define S_028C64_FMASK_TILE_MAX(x) (((unsigned)(x) & 0x7FF) << 20) 8846#define G_028C64_FMASK_TILE_MAX(x) (((x) >> 20) & 0x7FF) 8847#define C_028C64_FMASK_TILE_MAX 0x800FFFFF 8848/* */ 8849#define R_028C68_CB_COLOR0_SLICE 0x028C68 8850#define S_028C68_TILE_MAX(x) (((unsigned)(x) & 0x3FFFFF) << 0) 8851#define G_028C68_TILE_MAX(x) (((x) >> 0) & 0x3FFFFF) 8852#define C_028C68_TILE_MAX 0xFFC00000 8853#define R_028C6C_CB_COLOR0_VIEW 0x028C6C 8854#define S_028C6C_SLICE_START(x) (((unsigned)(x) & 0x7FF) << 0) 8855#define G_028C6C_SLICE_START(x) (((x) >> 0) & 0x7FF) 8856#define C_028C6C_SLICE_START 0xFFFFF800 8857#define S_028C6C_SLICE_MAX(x) (((unsigned)(x) & 0x7FF) << 13) 8858#define G_028C6C_SLICE_MAX(x) (((x) >> 13) & 0x7FF) 8859#define C_028C6C_SLICE_MAX 0xFF001FFF 8860#define R_028C70_CB_COLOR0_INFO 0x028C70 8861#define S_028C70_ENDIAN(x) (((unsigned)(x) & 0x03) << 0) 8862#define G_028C70_ENDIAN(x) (((x) >> 0) & 0x03) 8863#define C_028C70_ENDIAN 0xFFFFFFFC 8864#define V_028C70_ENDIAN_NONE 0x00 8865#define V_028C70_ENDIAN_8IN16 0x01 8866#define V_028C70_ENDIAN_8IN32 0x02 8867#define V_028C70_ENDIAN_8IN64 0x03 8868#define S_028C70_FORMAT(x) (((unsigned)(x) & 0x1F) << 2) 8869#define G_028C70_FORMAT(x) (((x) >> 2) & 0x1F) 8870#define C_028C70_FORMAT 0xFFFFFF83 8871#define V_028C70_COLOR_INVALID 0x00 8872#define V_028C70_COLOR_8 0x01 8873#define V_028C70_COLOR_16 0x02 8874#define V_028C70_COLOR_8_8 0x03 8875#define V_028C70_COLOR_32 0x04 8876#define V_028C70_COLOR_16_16 0x05 8877#define V_028C70_COLOR_10_11_11 0x06 8878#define V_028C70_COLOR_11_11_10 0x07 8879#define V_028C70_COLOR_10_10_10_2 0x08 8880#define V_028C70_COLOR_2_10_10_10 0x09 8881#define V_028C70_COLOR_8_8_8_8 0x0A 8882#define V_028C70_COLOR_32_32 0x0B 8883#define V_028C70_COLOR_16_16_16_16 0x0C 8884#define V_028C70_COLOR_32_32_32_32 0x0E 8885#define V_028C70_COLOR_5_6_5 0x10 8886#define V_028C70_COLOR_1_5_5_5 0x11 8887#define V_028C70_COLOR_5_5_5_1 0x12 8888#define V_028C70_COLOR_4_4_4_4 0x13 8889#define V_028C70_COLOR_8_24 0x14 8890#define V_028C70_COLOR_24_8 0x15 8891#define V_028C70_COLOR_X24_8_32_FLOAT 0x16 8892#define S_028C70_LINEAR_GENERAL(x) (((unsigned)(x) & 0x1) << 7) 8893#define G_028C70_LINEAR_GENERAL(x) (((x) >> 7) & 0x1) 8894#define C_028C70_LINEAR_GENERAL 0xFFFFFF7F 8895#define S_028C70_NUMBER_TYPE(x) (((unsigned)(x) & 0x07) << 8) 8896#define G_028C70_NUMBER_TYPE(x) (((x) >> 8) & 0x07) 8897#define C_028C70_NUMBER_TYPE 0xFFFFF8FF 8898#define V_028C70_NUMBER_UNORM 0x00 8899#define V_028C70_NUMBER_SNORM 0x01 8900#define V_028C70_NUMBER_UINT 0x04 8901#define V_028C70_NUMBER_SINT 0x05 8902#define V_028C70_NUMBER_SRGB 0x06 8903#define V_028C70_NUMBER_FLOAT 0x07 8904#define S_028C70_COMP_SWAP(x) (((unsigned)(x) & 0x03) << 11) 8905#define G_028C70_COMP_SWAP(x) (((x) >> 11) & 0x03) 8906#define C_028C70_COMP_SWAP 0xFFFFE7FF 8907#define V_028C70_SWAP_STD 0x00 8908#define V_028C70_SWAP_ALT 0x01 8909#define V_028C70_SWAP_STD_REV 0x02 8910#define V_028C70_SWAP_ALT_REV 0x03 8911#define S_028C70_FAST_CLEAR(x) (((unsigned)(x) & 0x1) << 13) 8912#define G_028C70_FAST_CLEAR(x) (((x) >> 13) & 0x1) 8913#define C_028C70_FAST_CLEAR 0xFFFFDFFF 8914#define S_028C70_COMPRESSION(x) (((unsigned)(x) & 0x1) << 14) 8915#define G_028C70_COMPRESSION(x) (((x) >> 14) & 0x1) 8916#define C_028C70_COMPRESSION 0xFFFFBFFF 8917#define S_028C70_BLEND_CLAMP(x) (((unsigned)(x) & 0x1) << 15) 8918#define G_028C70_BLEND_CLAMP(x) (((x) >> 15) & 0x1) 8919#define C_028C70_BLEND_CLAMP 0xFFFF7FFF 8920#define S_028C70_BLEND_BYPASS(x) (((unsigned)(x) & 0x1) << 16) 8921#define G_028C70_BLEND_BYPASS(x) (((x) >> 16) & 0x1) 8922#define C_028C70_BLEND_BYPASS 0xFFFEFFFF 8923#define S_028C70_SIMPLE_FLOAT(x) (((unsigned)(x) & 0x1) << 17) 8924#define G_028C70_SIMPLE_FLOAT(x) (((x) >> 17) & 0x1) 8925#define C_028C70_SIMPLE_FLOAT 0xFFFDFFFF 8926#define S_028C70_ROUND_MODE(x) (((unsigned)(x) & 0x1) << 18) 8927#define G_028C70_ROUND_MODE(x) (((x) >> 18) & 0x1) 8928#define C_028C70_ROUND_MODE 0xFFFBFFFF 8929#define S_028C70_CMASK_IS_LINEAR(x) (((unsigned)(x) & 0x1) << 19) 8930#define G_028C70_CMASK_IS_LINEAR(x) (((x) >> 19) & 0x1) 8931#define C_028C70_CMASK_IS_LINEAR 0xFFF7FFFF 8932#define S_028C70_BLEND_OPT_DONT_RD_DST(x) (((unsigned)(x) & 0x07) << 20) 8933#define G_028C70_BLEND_OPT_DONT_RD_DST(x) (((x) >> 20) & 0x07) 8934#define C_028C70_BLEND_OPT_DONT_RD_DST 0xFF8FFFFF 8935#define V_028C70_FORCE_OPT_AUTO 0x00 8936#define V_028C70_FORCE_OPT_DISABLE 0x01 8937#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_A_0 0x02 8938#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_RGB_0 0x03 8939#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_ARGB_0 0x04 8940#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_A_1 0x05 8941#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_RGB_1 0x06 8942#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_ARGB_1 0x07 8943#define S_028C70_BLEND_OPT_DISCARD_PIXEL(x) (((unsigned)(x) & 0x07) << 23) 8944#define G_028C70_BLEND_OPT_DISCARD_PIXEL(x) (((x) >> 23) & 0x07) 8945#define C_028C70_BLEND_OPT_DISCARD_PIXEL 0xFC7FFFFF 8946#define V_028C70_FORCE_OPT_AUTO 0x00 8947#define V_028C70_FORCE_OPT_DISABLE 0x01 8948#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_A_0 0x02 8949#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_RGB_0 0x03 8950#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_ARGB_0 0x04 8951#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_A_1 0x05 8952#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_RGB_1 0x06 8953#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_ARGB_1 0x07 8954/* CIK */ 8955#define S_028C70_FMASK_COMPRESSION_DISABLE(x) (((unsigned)(x) & 0x1) << 26) 8956#define G_028C70_FMASK_COMPRESSION_DISABLE(x) (((x) >> 26) & 0x1) 8957#define C_028C70_FMASK_COMPRESSION_DISABLE 0xFBFFFFFF 8958/* */ 8959/* VI */ 8960#define S_028C70_FMASK_COMPRESS_1FRAG_ONLY(x) (((unsigned)(x) & 0x1) << 27) 8961#define G_028C70_FMASK_COMPRESS_1FRAG_ONLY(x) (((x) >> 27) & 0x1) 8962#define C_028C70_FMASK_COMPRESS_1FRAG_ONLY 0xF7FFFFFF 8963#define S_028C70_DCC_ENABLE(x) (((unsigned)(x) & 0x1) << 28) 8964#define G_028C70_DCC_ENABLE(x) (((x) >> 28) & 0x1) 8965#define C_028C70_DCC_ENABLE 0xEFFFFFFF 8966#define S_028C70_CMASK_ADDR_TYPE(x) (((unsigned)(x) & 0x03) << 29) 8967#define G_028C70_CMASK_ADDR_TYPE(x) (((x) >> 29) & 0x03) 8968#define C_028C70_CMASK_ADDR_TYPE 0x9FFFFFFF 8969/* */ 8970#define R_028C74_CB_COLOR0_ATTRIB 0x028C74 8971#define S_028C74_TILE_MODE_INDEX(x) (((unsigned)(x) & 0x1F) << 0) 8972#define G_028C74_TILE_MODE_INDEX(x) (((x) >> 0) & 0x1F) 8973#define C_028C74_TILE_MODE_INDEX 0xFFFFFFE0 8974#define S_028C74_FMASK_TILE_MODE_INDEX(x) (((unsigned)(x) & 0x1F) << 5) 8975#define G_028C74_FMASK_TILE_MODE_INDEX(x) (((x) >> 5) & 0x1F) 8976#define C_028C74_FMASK_TILE_MODE_INDEX 0xFFFFFC1F 8977#define S_028C74_FMASK_BANK_HEIGHT(x) (((unsigned)(x) & 0x03) << 10) 8978#define G_028C74_FMASK_BANK_HEIGHT(x) (((x) >> 10) & 0x03) 8979#define C_028C74_FMASK_BANK_HEIGHT 0xFFFFF3FF 8980#define S_028C74_NUM_SAMPLES(x) (((unsigned)(x) & 0x07) << 12) 8981#define G_028C74_NUM_SAMPLES(x) (((x) >> 12) & 0x07) 8982#define C_028C74_NUM_SAMPLES 0xFFFF8FFF 8983#define S_028C74_NUM_FRAGMENTS(x) (((unsigned)(x) & 0x03) << 15) 8984#define G_028C74_NUM_FRAGMENTS(x) (((x) >> 15) & 0x03) 8985#define C_028C74_NUM_FRAGMENTS 0xFFFE7FFF 8986#define S_028C74_FORCE_DST_ALPHA_1(x) (((unsigned)(x) & 0x1) << 17) 8987#define G_028C74_FORCE_DST_ALPHA_1(x) (((x) >> 17) & 0x1) 8988#define C_028C74_FORCE_DST_ALPHA_1 0xFFFDFFFF 8989/* VI */ 8990#define R_028C78_CB_COLOR0_DCC_CONTROL 0x028C78 8991#define S_028C78_OVERWRITE_COMBINER_DISABLE(x) (((unsigned)(x) & 0x1) << 0) 8992#define G_028C78_OVERWRITE_COMBINER_DISABLE(x) (((x) >> 0) & 0x1) 8993#define C_028C78_OVERWRITE_COMBINER_DISABLE 0xFFFFFFFE 8994#define S_028C78_KEY_CLEAR_ENABLE(x) (((unsigned)(x) & 0x1) << 1) 8995#define G_028C78_KEY_CLEAR_ENABLE(x) (((x) >> 1) & 0x1) 8996#define C_028C78_KEY_CLEAR_ENABLE 0xFFFFFFFD 8997#define S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(x) (((unsigned)(x) & 0x03) << 2) 8998#define G_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(x) (((x) >> 2) & 0x03) 8999#define C_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE 0xFFFFFFF3 9000#define V_028C78_MAX_BLOCK_SIZE_64B 0 9001#define V_028C78_MAX_BLOCK_SIZE_128B 1 9002#define V_028C78_MAX_BLOCK_SIZE_256B 2 9003 9004#define S_028C78_MIN_COMPRESSED_BLOCK_SIZE(x) (((unsigned)(x) & 0x1) << 4) 9005#define G_028C78_MIN_COMPRESSED_BLOCK_SIZE(x) (((x) >> 4) & 0x1) 9006#define C_028C78_MIN_COMPRESSED_BLOCK_SIZE 0xFFFFFFEF 9007#define V_028C78_MIN_BLOCK_SIZE_32B 0 9008#define V_028C78_MIN_BLOCK_SIZE_64B 1 9009#define S_028C78_MAX_COMPRESSED_BLOCK_SIZE(x) (((unsigned)(x) & 0x03) << 5) 9010#define G_028C78_MAX_COMPRESSED_BLOCK_SIZE(x) (((x) >> 5) & 0x03) 9011#define C_028C78_MAX_COMPRESSED_BLOCK_SIZE 0xFFFFFF9F 9012#define S_028C78_COLOR_TRANSFORM(x) (((unsigned)(x) & 0x03) << 7) 9013#define G_028C78_COLOR_TRANSFORM(x) (((x) >> 7) & 0x03) 9014#define C_028C78_COLOR_TRANSFORM 0xFFFFFE7F 9015#define S_028C78_INDEPENDENT_64B_BLOCKS(x) (((unsigned)(x) & 0x1) << 9) 9016#define G_028C78_INDEPENDENT_64B_BLOCKS(x) (((x) >> 9) & 0x1) 9017#define C_028C78_INDEPENDENT_64B_BLOCKS 0xFFFFFDFF 9018#define S_028C78_LOSSY_RGB_PRECISION(x) (((unsigned)(x) & 0x0F) << 10) 9019#define G_028C78_LOSSY_RGB_PRECISION(x) (((x) >> 10) & 0x0F) 9020#define C_028C78_LOSSY_RGB_PRECISION 0xFFFFC3FF 9021#define S_028C78_LOSSY_ALPHA_PRECISION(x) (((unsigned)(x) & 0x0F) << 14) 9022#define G_028C78_LOSSY_ALPHA_PRECISION(x) (((x) >> 14) & 0x0F) 9023#define C_028C78_LOSSY_ALPHA_PRECISION 0xFFFC3FFF 9024/* */ 9025#define R_028C7C_CB_COLOR0_CMASK 0x028C7C 9026#define R_028C80_CB_COLOR0_CMASK_SLICE 0x028C80 9027#define S_028C80_TILE_MAX(x) (((unsigned)(x) & 0x3FFF) << 0) 9028#define G_028C80_TILE_MAX(x) (((x) >> 0) & 0x3FFF) 9029#define C_028C80_TILE_MAX 0xFFFFC000 9030#define R_028C84_CB_COLOR0_FMASK 0x028C84 9031#define R_028C88_CB_COLOR0_FMASK_SLICE 0x028C88 9032#define S_028C88_TILE_MAX(x) (((unsigned)(x) & 0x3FFFFF) << 0) 9033#define G_028C88_TILE_MAX(x) (((x) >> 0) & 0x3FFFFF) 9034#define C_028C88_TILE_MAX 0xFFC00000 9035#define R_028C8C_CB_COLOR0_CLEAR_WORD0 0x028C8C 9036#define R_028C90_CB_COLOR0_CLEAR_WORD1 0x028C90 9037#define R_028C94_CB_COLOR0_DCC_BASE 0x028C94 /* VI */ 9038#define R_028C9C_CB_COLOR1_BASE 0x028C9C 9039#define R_028CA0_CB_COLOR1_PITCH 0x028CA0 9040#define R_028CA4_CB_COLOR1_SLICE 0x028CA4 9041#define R_028CA8_CB_COLOR1_VIEW 0x028CA8 9042#define R_028CAC_CB_COLOR1_INFO 0x028CAC 9043#define R_028CB0_CB_COLOR1_ATTRIB 0x028CB0 9044#define R_028CB4_CB_COLOR1_DCC_CONTROL 0x028CB4 /* VI */ 9045#define R_028CB8_CB_COLOR1_CMASK 0x028CB8 9046#define R_028CBC_CB_COLOR1_CMASK_SLICE 0x028CBC 9047#define R_028CC0_CB_COLOR1_FMASK 0x028CC0 9048#define R_028CC4_CB_COLOR1_FMASK_SLICE 0x028CC4 9049#define R_028CC8_CB_COLOR1_CLEAR_WORD0 0x028CC8 9050#define R_028CCC_CB_COLOR1_CLEAR_WORD1 0x028CCC 9051#define R_028CD0_CB_COLOR1_DCC_BASE 0x028CD0 /* VI */ 9052#define R_028CD8_CB_COLOR2_BASE 0x028CD8 9053#define R_028CDC_CB_COLOR2_PITCH 0x028CDC 9054#define R_028CE0_CB_COLOR2_SLICE 0x028CE0 9055#define R_028CE4_CB_COLOR2_VIEW 0x028CE4 9056#define R_028CE8_CB_COLOR2_INFO 0x028CE8 9057#define R_028CEC_CB_COLOR2_ATTRIB 0x028CEC 9058#define R_028CF0_CB_COLOR2_DCC_CONTROL 0x028CF0 /* VI */ 9059#define R_028CF4_CB_COLOR2_CMASK 0x028CF4 9060#define R_028CF8_CB_COLOR2_CMASK_SLICE 0x028CF8 9061#define R_028CFC_CB_COLOR2_FMASK 0x028CFC 9062#define R_028D00_CB_COLOR2_FMASK_SLICE 0x028D00 9063#define R_028D04_CB_COLOR2_CLEAR_WORD0 0x028D04 9064#define R_028D08_CB_COLOR2_CLEAR_WORD1 0x028D08 9065#define R_028D0C_CB_COLOR2_DCC_BASE 0x028D0C /* VI */ 9066#define R_028D14_CB_COLOR3_BASE 0x028D14 9067#define R_028D18_CB_COLOR3_PITCH 0x028D18 9068#define R_028D1C_CB_COLOR3_SLICE 0x028D1C 9069#define R_028D20_CB_COLOR3_VIEW 0x028D20 9070#define R_028D24_CB_COLOR3_INFO 0x028D24 9071#define R_028D28_CB_COLOR3_ATTRIB 0x028D28 9072#define R_028D2C_CB_COLOR3_DCC_CONTROL 0x028D2C /* VI */ 9073#define R_028D30_CB_COLOR3_CMASK 0x028D30 9074#define R_028D34_CB_COLOR3_CMASK_SLICE 0x028D34 9075#define R_028D38_CB_COLOR3_FMASK 0x028D38 9076#define R_028D3C_CB_COLOR3_FMASK_SLICE 0x028D3C 9077#define R_028D40_CB_COLOR3_CLEAR_WORD0 0x028D40 9078#define R_028D44_CB_COLOR3_CLEAR_WORD1 0x028D44 9079#define R_028D48_CB_COLOR3_DCC_BASE 0x028D48 /* VI */ 9080#define R_028D50_CB_COLOR4_BASE 0x028D50 9081#define R_028D54_CB_COLOR4_PITCH 0x028D54 9082#define R_028D58_CB_COLOR4_SLICE 0x028D58 9083#define R_028D5C_CB_COLOR4_VIEW 0x028D5C 9084#define R_028D60_CB_COLOR4_INFO 0x028D60 9085#define R_028D64_CB_COLOR4_ATTRIB 0x028D64 9086#define R_028D68_CB_COLOR4_DCC_CONTROL 0x028D68 /* VI */ 9087#define R_028D6C_CB_COLOR4_CMASK 0x028D6C 9088#define R_028D70_CB_COLOR4_CMASK_SLICE 0x028D70 9089#define R_028D74_CB_COLOR4_FMASK 0x028D74 9090#define R_028D78_CB_COLOR4_FMASK_SLICE 0x028D78 9091#define R_028D7C_CB_COLOR4_CLEAR_WORD0 0x028D7C 9092#define R_028D80_CB_COLOR4_CLEAR_WORD1 0x028D80 9093#define R_028D84_CB_COLOR4_DCC_BASE 0x028D84 /* VI */ 9094#define R_028D8C_CB_COLOR5_BASE 0x028D8C 9095#define R_028D90_CB_COLOR5_PITCH 0x028D90 9096#define R_028D94_CB_COLOR5_SLICE 0x028D94 9097#define R_028D98_CB_COLOR5_VIEW 0x028D98 9098#define R_028D9C_CB_COLOR5_INFO 0x028D9C 9099#define R_028DA0_CB_COLOR5_ATTRIB 0x028DA0 9100#define R_028DA4_CB_COLOR5_DCC_CONTROL 0x028DA4 /* VI */ 9101#define R_028DA8_CB_COLOR5_CMASK 0x028DA8 9102#define R_028DAC_CB_COLOR5_CMASK_SLICE 0x028DAC 9103#define R_028DB0_CB_COLOR5_FMASK 0x028DB0 9104#define R_028DB4_CB_COLOR5_FMASK_SLICE 0x028DB4 9105#define R_028DB8_CB_COLOR5_CLEAR_WORD0 0x028DB8 9106#define R_028DBC_CB_COLOR5_CLEAR_WORD1 0x028DBC 9107#define R_028DC0_CB_COLOR5_DCC_BASE 0x028DC0 /* VI */ 9108#define R_028DC8_CB_COLOR6_BASE 0x028DC8 9109#define R_028DCC_CB_COLOR6_PITCH 0x028DCC 9110#define R_028DD0_CB_COLOR6_SLICE 0x028DD0 9111#define R_028DD4_CB_COLOR6_VIEW 0x028DD4 9112#define R_028DD8_CB_COLOR6_INFO 0x028DD8 9113#define R_028DDC_CB_COLOR6_ATTRIB 0x028DDC 9114#define R_028DE0_CB_COLOR6_DCC_CONTROL 0x028DE0 /* VI */ 9115#define R_028DE4_CB_COLOR6_CMASK 0x028DE4 9116#define R_028DE8_CB_COLOR6_CMASK_SLICE 0x028DE8 9117#define R_028DEC_CB_COLOR6_FMASK 0x028DEC 9118#define R_028DF0_CB_COLOR6_FMASK_SLICE 0x028DF0 9119#define R_028DF4_CB_COLOR6_CLEAR_WORD0 0x028DF4 9120#define R_028DF8_CB_COLOR6_CLEAR_WORD1 0x028DF8 9121#define R_028DFC_CB_COLOR6_DCC_BASE 0x028DFC /* VI */ 9122#define R_028E04_CB_COLOR7_BASE 0x028E04 9123#define R_028E08_CB_COLOR7_PITCH 0x028E08 9124#define R_028E0C_CB_COLOR7_SLICE 0x028E0C 9125#define R_028E10_CB_COLOR7_VIEW 0x028E10 9126#define R_028E14_CB_COLOR7_INFO 0x028E14 9127#define R_028E18_CB_COLOR7_ATTRIB 0x028E18 9128#define R_028E1C_CB_COLOR7_DCC_CONTROL 0x028E1C /* VI */ 9129#define R_028E20_CB_COLOR7_CMASK 0x028E20 9130#define R_028E24_CB_COLOR7_CMASK_SLICE 0x028E24 9131#define R_028E28_CB_COLOR7_FMASK 0x028E28 9132#define R_028E2C_CB_COLOR7_FMASK_SLICE 0x028E2C 9133#define R_028E30_CB_COLOR7_CLEAR_WORD0 0x028E30 9134#define R_028E34_CB_COLOR7_CLEAR_WORD1 0x028E34 9135#define R_028E38_CB_COLOR7_DCC_BASE 0x028E38 /* VI */ 9136 9137/* SI async DMA packets */ 9138#define SI_DMA_PACKET(cmd, sub_cmd, n) ((((unsigned)(cmd) & 0xF) << 28) | \ 9139 (((unsigned)(sub_cmd) & 0xFF) << 20) |\ 9140 (((unsigned)(n) & 0xFFFFF) << 0)) 9141/* SI async DMA Packet types */ 9142#define SI_DMA_PACKET_WRITE 0x2 9143#define SI_DMA_PACKET_COPY 0x3 9144#define SI_DMA_COPY_MAX_BYTE_ALIGNED_SIZE 0xfffe0 9145/* The documentation says 0xffff8 is the maximum size in dwords, which is 9146 * 0x3fffe0 in bytes. */ 9147#define SI_DMA_COPY_MAX_DWORD_ALIGNED_SIZE 0x3fffe0 9148#define SI_DMA_COPY_DWORD_ALIGNED 0x00 9149#define SI_DMA_COPY_BYTE_ALIGNED 0x40 9150#define SI_DMA_COPY_TILED 0x8 9151#define SI_DMA_PACKET_INDIRECT_BUFFER 0x4 9152#define SI_DMA_PACKET_SEMAPHORE 0x5 9153#define SI_DMA_PACKET_FENCE 0x6 9154#define SI_DMA_PACKET_TRAP 0x7 9155#define SI_DMA_PACKET_SRBM_WRITE 0x9 9156#define SI_DMA_PACKET_CONSTANT_FILL 0xd 9157#define SI_DMA_PACKET_NOP 0xf 9158 9159/* CIK async DMA packets */ 9160#define CIK_SDMA_PACKET(op, sub_op, n) ((((unsigned)(n) & 0xFFFF) << 16) | \ 9161 (((unsigned)(sub_op) & 0xFF) << 8) | \ 9162 (((unsigned)(op) & 0xFF) << 0)) 9163/* CIK async DMA packet types */ 9164#define CIK_SDMA_OPCODE_NOP 0x0 9165#define CIK_SDMA_OPCODE_COPY 0x1 9166#define CIK_SDMA_COPY_SUB_OPCODE_LINEAR 0x0 9167#define CIK_SDMA_COPY_SUB_OPCODE_TILED 0x1 9168#define CIK_SDMA_COPY_SUB_OPCODE_SOA 0x3 9169#define CIK_SDMA_COPY_SUB_OPCODE_LINEAR_SUB_WINDOW 0x4 9170#define CIK_SDMA_COPY_SUB_OPCODE_TILED_SUB_WINDOW 0x5 9171#define CIK_SDMA_COPY_SUB_OPCODE_T2T_SUB_WINDOW 0x6 9172#define CIK_SDMA_OPCODE_WRITE 0x2 9173#define SDMA_WRITE_SUB_OPCODE_LINEAR 0x0 9174#define SDMA_WRTIE_SUB_OPCODE_TILED 0x1 9175#define CIK_SDMA_OPCODE_INDIRECT_BUFFER 0x4 9176#define CIK_SDMA_PACKET_FENCE 0x5 9177#define CIK_SDMA_PACKET_TRAP 0x6 9178#define CIK_SDMA_PACKET_SEMAPHORE 0x7 9179#define CIK_SDMA_PACKET_CONSTANT_FILL 0xb 9180#define CIK_SDMA_OPCODE_TIMESTAMP 0xd 9181#define SDMA_TS_SUB_OPCODE_SET_LOCAL_TIMESTAMP 0x0 9182#define SDMA_TS_SUB_OPCODE_GET_LOCAL_TIMESTAMP 0x1 9183#define SDMA_TS_SUB_OPCODE_GET_GLOBAL_TIMESTAMP 0x2 9184#define CIK_SDMA_PACKET_SRBM_WRITE 0xe 9185/* There is apparently an undocumented HW "feature" that 9186 prevents the HW from copying past 256 bytes of (1 << 22) */ 9187#define CIK_SDMA_COPY_MAX_SIZE 0x3fff00 9188 9189enum amd_cmp_class_flags { 9190 S_NAN = 1 << 0, // Signaling NaN 9191 Q_NAN = 1 << 1, // Quiet NaN 9192 N_INFINITY = 1 << 2, // Negative infinity 9193 N_NORMAL = 1 << 3, // Negative normal 9194 N_SUBNORMAL = 1 << 4, // Negative subnormal 9195 N_ZERO = 1 << 5, // Negative zero 9196 P_ZERO = 1 << 6, // Positive zero 9197 P_SUBNORMAL = 1 << 7, // Positive subnormal 9198 P_NORMAL = 1 << 8, // Positive normal 9199 P_INFINITY = 1 << 9 // Positive infinity 9200}; 9201 9202#endif /* _SID_H */ 9203 9204