1b8e80941Smrg/* 2b8e80941Smrg * Copyright (c) 2012-2015 Etnaviv Project 3b8e80941Smrg * 4b8e80941Smrg * Permission is hereby granted, free of charge, to any person obtaining a 5b8e80941Smrg * copy of this software and associated documentation files (the "Software"), 6b8e80941Smrg * to deal in the Software without restriction, including without limitation 7b8e80941Smrg * the rights to use, copy, modify, merge, publish, distribute, sub license, 8b8e80941Smrg * and/or sell copies of the Software, and to permit persons to whom the 9b8e80941Smrg * Software is furnished to do so, subject to the following conditions: 10b8e80941Smrg * 11b8e80941Smrg * The above copyright notice and this permission notice (including the 12b8e80941Smrg * next paragraph) shall be included in all copies or substantial portions 13b8e80941Smrg * of the Software. 14b8e80941Smrg * 15b8e80941Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16b8e80941Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17b8e80941Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18b8e80941Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19b8e80941Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20b8e80941Smrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21b8e80941Smrg * DEALINGS IN THE SOFTWARE. 22b8e80941Smrg * 23b8e80941Smrg * Authors: 24b8e80941Smrg * Wladimir J. van der Laan <laanwj@gmail.com> 25b8e80941Smrg */ 26b8e80941Smrg 27b8e80941Smrg#include "etnaviv_blend.h" 28b8e80941Smrg 29b8e80941Smrg#include "etnaviv_context.h" 30b8e80941Smrg#include "etnaviv_screen.h" 31b8e80941Smrg#include "etnaviv_translate.h" 32b8e80941Smrg#include "hw/common.xml.h" 33b8e80941Smrg#include "pipe/p_defines.h" 34b8e80941Smrg#include "util/u_memory.h" 35b8e80941Smrg 36b8e80941Smrgvoid * 37b8e80941Smrgetna_blend_state_create(struct pipe_context *pctx, 38b8e80941Smrg const struct pipe_blend_state *so) 39b8e80941Smrg{ 40b8e80941Smrg struct etna_context *ctx = etna_context(pctx); 41b8e80941Smrg const struct pipe_rt_blend_state *rt0 = &so->rt[0]; 42b8e80941Smrg struct etna_blend_state *co = CALLOC_STRUCT(etna_blend_state); 43b8e80941Smrg bool alpha_enable, logicop_enable; 44b8e80941Smrg 45b8e80941Smrg if (!co) 46b8e80941Smrg return NULL; 47b8e80941Smrg 48b8e80941Smrg co->base = *so; 49b8e80941Smrg 50b8e80941Smrg /* Enable blending if 51b8e80941Smrg * - blend enabled in blend state 52b8e80941Smrg * - NOT source factor is ONE and destination factor ZERO for both rgb and 53b8e80941Smrg * alpha (which would mean that blending is effectively disabled) 54b8e80941Smrg */ 55b8e80941Smrg alpha_enable = rt0->blend_enable && 56b8e80941Smrg !(rt0->rgb_src_factor == PIPE_BLENDFACTOR_ONE && 57b8e80941Smrg rt0->rgb_dst_factor == PIPE_BLENDFACTOR_ZERO && 58b8e80941Smrg rt0->alpha_src_factor == PIPE_BLENDFACTOR_ONE && 59b8e80941Smrg rt0->alpha_dst_factor == PIPE_BLENDFACTOR_ZERO); 60b8e80941Smrg 61b8e80941Smrg /* Enable separate alpha if 62b8e80941Smrg * - Blending enabled (see above) 63b8e80941Smrg * - NOT source factor is equal to destination factor for both rgb abd 64b8e80941Smrg * alpha (which would effectively that mean alpha is not separate) 65b8e80941Smrg */ 66b8e80941Smrg bool separate_alpha = alpha_enable && 67b8e80941Smrg !(rt0->rgb_src_factor == rt0->alpha_src_factor && 68b8e80941Smrg rt0->rgb_dst_factor == rt0->alpha_dst_factor); 69b8e80941Smrg 70b8e80941Smrg if (alpha_enable) { 71b8e80941Smrg co->PE_ALPHA_CONFIG = 72b8e80941Smrg VIVS_PE_ALPHA_CONFIG_BLEND_ENABLE_COLOR | 73b8e80941Smrg COND(separate_alpha, VIVS_PE_ALPHA_CONFIG_BLEND_SEPARATE_ALPHA) | 74b8e80941Smrg VIVS_PE_ALPHA_CONFIG_SRC_FUNC_COLOR(translate_blend_factor(rt0->rgb_src_factor)) | 75b8e80941Smrg VIVS_PE_ALPHA_CONFIG_SRC_FUNC_ALPHA(translate_blend_factor(rt0->alpha_src_factor)) | 76b8e80941Smrg VIVS_PE_ALPHA_CONFIG_DST_FUNC_COLOR(translate_blend_factor(rt0->rgb_dst_factor)) | 77b8e80941Smrg VIVS_PE_ALPHA_CONFIG_DST_FUNC_ALPHA(translate_blend_factor(rt0->alpha_dst_factor)) | 78b8e80941Smrg VIVS_PE_ALPHA_CONFIG_EQ_COLOR(translate_blend(rt0->rgb_func)) | 79b8e80941Smrg VIVS_PE_ALPHA_CONFIG_EQ_ALPHA(translate_blend(rt0->alpha_func)); 80b8e80941Smrg } else { 81b8e80941Smrg co->PE_ALPHA_CONFIG = 0; 82b8e80941Smrg } 83b8e80941Smrg 84b8e80941Smrg logicop_enable = so->logicop_enable && 85b8e80941Smrg VIV_FEATURE(ctx->screen, chipMinorFeatures2, LOGIC_OP); 86b8e80941Smrg 87b8e80941Smrg co->PE_LOGIC_OP = 88b8e80941Smrg VIVS_PE_LOGIC_OP_OP(logicop_enable ? so->logicop_func : LOGIC_OP_COPY) | 89b8e80941Smrg 0x000E4000 /* ??? */; 90b8e80941Smrg 91b8e80941Smrg co->fo_allowed = !alpha_enable && !logicop_enable; 92b8e80941Smrg 93b8e80941Smrg /* independent_blend_enable not needed: only one rt supported */ 94b8e80941Smrg /* XXX alpha_to_coverage / alpha_to_one? */ 95b8e80941Smrg /* Set dither registers based on dither status. These registers set the 96b8e80941Smrg * dither pattern, 97b8e80941Smrg * for now, set the same values as the blob. 98b8e80941Smrg */ 99b8e80941Smrg if (so->dither) { 100b8e80941Smrg co->PE_DITHER[0] = 0x6e4ca280; 101b8e80941Smrg co->PE_DITHER[1] = 0x5d7f91b3; 102b8e80941Smrg } else { 103b8e80941Smrg co->PE_DITHER[0] = 0xffffffff; 104b8e80941Smrg co->PE_DITHER[1] = 0xffffffff; 105b8e80941Smrg } 106b8e80941Smrg 107b8e80941Smrg return co; 108b8e80941Smrg} 109b8e80941Smrg 110b8e80941Smrgbool 111b8e80941Smrgetna_update_blend(struct etna_context *ctx) 112b8e80941Smrg{ 113b8e80941Smrg struct pipe_framebuffer_state *pfb = &ctx->framebuffer_s; 114b8e80941Smrg struct pipe_blend_state *pblend = ctx->blend; 115b8e80941Smrg struct etna_blend_state *blend = etna_blend_state(pblend); 116b8e80941Smrg const struct pipe_rt_blend_state *rt0 = &pblend->rt[0]; 117b8e80941Smrg const struct util_format_description *desc; 118b8e80941Smrg uint32_t colormask; 119b8e80941Smrg 120b8e80941Smrg if (pfb->cbufs[0] && 121b8e80941Smrg translate_rs_format_rb_swap(pfb->cbufs[0]->format)) { 122b8e80941Smrg colormask = rt0->colormask & (PIPE_MASK_A | PIPE_MASK_G); 123b8e80941Smrg if (rt0->colormask & PIPE_MASK_R) 124b8e80941Smrg colormask |= PIPE_MASK_B; 125b8e80941Smrg if (rt0->colormask & PIPE_MASK_B) 126b8e80941Smrg colormask |= PIPE_MASK_R; 127b8e80941Smrg } else { 128b8e80941Smrg colormask = rt0->colormask; 129b8e80941Smrg } 130b8e80941Smrg 131b8e80941Smrg /* If the complete render target is written, set full_overwrite: 132b8e80941Smrg * - The color mask covers all channels of the render target 133b8e80941Smrg * - No blending or logicop is used 134b8e80941Smrg */ 135b8e80941Smrg if (pfb->cbufs[0]) 136b8e80941Smrg desc = util_format_description(pfb->cbufs[0]->format); 137b8e80941Smrg bool full_overwrite = !pfb->cbufs[0] || ((blend->fo_allowed && 138b8e80941Smrg util_format_colormask_full(desc, colormask))); 139b8e80941Smrg blend->PE_COLOR_FORMAT = 140b8e80941Smrg VIVS_PE_COLOR_FORMAT_COMPONENTS(colormask) | 141b8e80941Smrg COND(full_overwrite, VIVS_PE_COLOR_FORMAT_OVERWRITE); 142b8e80941Smrg 143b8e80941Smrg return true; 144b8e80941Smrg} 145b8e80941Smrg 146b8e80941Smrgvoid 147b8e80941Smrgetna_set_blend_color(struct pipe_context *pctx, const struct pipe_blend_color *bc) 148b8e80941Smrg{ 149b8e80941Smrg struct etna_context *ctx = etna_context(pctx); 150b8e80941Smrg struct compiled_blend_color *cs = &ctx->blend_color; 151b8e80941Smrg 152b8e80941Smrg memcpy(cs->color, bc->color, sizeof(float) * 4); 153b8e80941Smrg 154b8e80941Smrg ctx->dirty |= ETNA_DIRTY_BLEND_COLOR; 155b8e80941Smrg} 156b8e80941Smrg 157b8e80941Smrgbool 158b8e80941Smrgetna_update_blend_color(struct etna_context *ctx) 159b8e80941Smrg{ 160b8e80941Smrg struct pipe_framebuffer_state *pfb = &ctx->framebuffer_s; 161b8e80941Smrg struct compiled_blend_color *cs = &ctx->blend_color; 162b8e80941Smrg 163b8e80941Smrg if (pfb->cbufs[0] && 164b8e80941Smrg translate_rs_format_rb_swap(pfb->cbufs[0]->format)) { 165b8e80941Smrg cs->PE_ALPHA_BLEND_COLOR = 166b8e80941Smrg VIVS_PE_ALPHA_BLEND_COLOR_R(etna_cfloat_to_uint8(cs->color[2])) | 167b8e80941Smrg VIVS_PE_ALPHA_BLEND_COLOR_G(etna_cfloat_to_uint8(cs->color[1])) | 168b8e80941Smrg VIVS_PE_ALPHA_BLEND_COLOR_B(etna_cfloat_to_uint8(cs->color[0])) | 169b8e80941Smrg VIVS_PE_ALPHA_BLEND_COLOR_A(etna_cfloat_to_uint8(cs->color[3])); 170b8e80941Smrg } else { 171b8e80941Smrg cs->PE_ALPHA_BLEND_COLOR = 172b8e80941Smrg VIVS_PE_ALPHA_BLEND_COLOR_R(etna_cfloat_to_uint8(cs->color[0])) | 173b8e80941Smrg VIVS_PE_ALPHA_BLEND_COLOR_G(etna_cfloat_to_uint8(cs->color[1])) | 174b8e80941Smrg VIVS_PE_ALPHA_BLEND_COLOR_B(etna_cfloat_to_uint8(cs->color[2])) | 175b8e80941Smrg VIVS_PE_ALPHA_BLEND_COLOR_A(etna_cfloat_to_uint8(cs->color[3])); 176b8e80941Smrg } 177b8e80941Smrg 178b8e80941Smrg return true; 179b8e80941Smrg} 180