1b8e80941Smrg#ifndef COMMON_XML
2b8e80941Smrg#define COMMON_XML
3b8e80941Smrg
4b8e80941Smrg/* Autogenerated file, DO NOT EDIT manually!
5b8e80941Smrg
6b8e80941SmrgThis file was generated by the rules-ng-ng headergen tool in this git repository:
7b8e80941Smrghttp://0x04.net/cgit/index.cgi/rules-ng-ng
8b8e80941Smrggit clone git://0x04.net/rules-ng-ng
9b8e80941Smrg
10b8e80941SmrgThe rules-ng-ng source files this header was generated from are:
11b8e80941Smrg- texdesc_3d.xml (   3183 bytes, from 2018-02-10 13:09:26)
12b8e80941Smrg- copyright.xml  (   1597 bytes, from 2018-02-10 13:09:26)
13b8e80941Smrg- common.xml     (  35468 bytes, from 2018-02-10 13:09:26)
14b8e80941Smrg- common_3d.xml  (  14843 bytes, from 2019-01-18 10:13:41)
15b8e80941Smrg
16b8e80941SmrgCopyright (C) 2012-2018 by the following authors:
17b8e80941Smrg- Wladimir J. van der Laan <laanwj@gmail.com>
18b8e80941Smrg- Christian Gmeiner <christian.gmeiner@gmail.com>
19b8e80941Smrg- Lucas Stach <l.stach@pengutronix.de>
20b8e80941Smrg- Russell King <rmk@arm.linux.org.uk>
21b8e80941Smrg
22b8e80941SmrgPermission is hereby granted, free of charge, to any person obtaining a
23b8e80941Smrgcopy of this software and associated documentation files (the "Software"),
24b8e80941Smrgto deal in the Software without restriction, including without limitation
25b8e80941Smrgthe rights to use, copy, modify, merge, publish, distribute, sub license,
26b8e80941Smrgand/or sell copies of the Software, and to permit persons to whom the
27b8e80941SmrgSoftware is furnished to do so, subject to the following conditions:
28b8e80941Smrg
29b8e80941SmrgThe above copyright notice and this permission notice (including the
30b8e80941Smrgnext paragraph) shall be included in all copies or substantial portions
31b8e80941Smrgof the Software.
32b8e80941Smrg
33b8e80941SmrgTHE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34b8e80941SmrgIMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35b8e80941SmrgFITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
36b8e80941SmrgTHE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
37b8e80941SmrgLIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38b8e80941SmrgFROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39b8e80941SmrgDEALINGS IN THE SOFTWARE.
40b8e80941Smrg*/
41b8e80941Smrg
42b8e80941Smrg
43b8e80941Smrg#define PIPE_ID_PIPE_3D						0x00000000
44b8e80941Smrg#define PIPE_ID_PIPE_2D						0x00000001
45b8e80941Smrg#define SYNC_RECIPIENT_FE					0x00000001
46b8e80941Smrg#define SYNC_RECIPIENT_RA					0x00000005
47b8e80941Smrg#define SYNC_RECIPIENT_PE					0x00000007
48b8e80941Smrg#define SYNC_RECIPIENT_DE					0x0000000b
49b8e80941Smrg#define SYNC_RECIPIENT_BLT					0x00000010
50b8e80941Smrg#define ENDIAN_MODE_NO_SWAP					0x00000000
51b8e80941Smrg#define ENDIAN_MODE_SWAP_16					0x00000001
52b8e80941Smrg#define ENDIAN_MODE_SWAP_32					0x00000002
53b8e80941Smrg#define chipModel_GC200						0x00000200
54b8e80941Smrg#define chipModel_GC300						0x00000300
55b8e80941Smrg#define chipModel_GC320						0x00000320
56b8e80941Smrg#define chipModel_GC328						0x00000328
57b8e80941Smrg#define chipModel_GC350						0x00000350
58b8e80941Smrg#define chipModel_GC355						0x00000355
59b8e80941Smrg#define chipModel_GC400						0x00000400
60b8e80941Smrg#define chipModel_GC410						0x00000410
61b8e80941Smrg#define chipModel_GC420						0x00000420
62b8e80941Smrg#define chipModel_GC428						0x00000428
63b8e80941Smrg#define chipModel_GC450						0x00000450
64b8e80941Smrg#define chipModel_GC500						0x00000500
65b8e80941Smrg#define chipModel_GC520						0x00000520
66b8e80941Smrg#define chipModel_GC530						0x00000530
67b8e80941Smrg#define chipModel_GC600						0x00000600
68b8e80941Smrg#define chipModel_GC700						0x00000700
69b8e80941Smrg#define chipModel_GC800						0x00000800
70b8e80941Smrg#define chipModel_GC860						0x00000860
71b8e80941Smrg#define chipModel_GC880						0x00000880
72b8e80941Smrg#define chipModel_GC900						0x00000900
73b8e80941Smrg#define chipModel_GC1000					0x00001000
74b8e80941Smrg#define chipModel_GC1500					0x00001500
75b8e80941Smrg#define chipModel_GC2000					0x00002000
76b8e80941Smrg#define chipModel_GC2100					0x00002100
77b8e80941Smrg#define chipModel_GC2200					0x00002200
78b8e80941Smrg#define chipModel_GC2500					0x00002500
79b8e80941Smrg#define chipModel_GC3000					0x00003000
80b8e80941Smrg#define chipModel_GC4000					0x00004000
81b8e80941Smrg#define chipModel_GC5000					0x00005000
82b8e80941Smrg#define chipModel_GC5200					0x00005200
83b8e80941Smrg#define chipModel_GC6400					0x00006400
84b8e80941Smrg#define chipModel_GC7000					0x00007000
85b8e80941Smrg#define chipModel_GC7400					0x00007400
86b8e80941Smrg#define chipModel_GC8000					0x00008000
87b8e80941Smrg#define chipModel_GC8100					0x00008100
88b8e80941Smrg#define chipModel_GC8200					0x00008200
89b8e80941Smrg#define chipModel_GC8400					0x00008400
90b8e80941Smrg#define RGBA_BITS_R						0x00000001
91b8e80941Smrg#define RGBA_BITS_G						0x00000002
92b8e80941Smrg#define RGBA_BITS_B						0x00000004
93b8e80941Smrg#define RGBA_BITS_A						0x00000008
94b8e80941Smrg#define chipFeatures_FAST_CLEAR					0x00000001
95b8e80941Smrg#define chipFeatures_SPECIAL_ANTI_ALIASING			0x00000002
96b8e80941Smrg#define chipFeatures_PIPE_3D					0x00000004
97b8e80941Smrg#define chipFeatures_DXT_TEXTURE_COMPRESSION			0x00000008
98b8e80941Smrg#define chipFeatures_DEBUG_MODE					0x00000010
99b8e80941Smrg#define chipFeatures_Z_COMPRESSION				0x00000020
100b8e80941Smrg#define chipFeatures_YUV420_SCALER				0x00000040
101b8e80941Smrg#define chipFeatures_MSAA					0x00000080
102b8e80941Smrg#define chipFeatures_DC						0x00000100
103b8e80941Smrg#define chipFeatures_PIPE_2D					0x00000200
104b8e80941Smrg#define chipFeatures_ETC1_TEXTURE_COMPRESSION			0x00000400
105b8e80941Smrg#define chipFeatures_FAST_SCALER				0x00000800
106b8e80941Smrg#define chipFeatures_HIGH_DYNAMIC_RANGE				0x00001000
107b8e80941Smrg#define chipFeatures_YUV420_TILER				0x00002000
108b8e80941Smrg#define chipFeatures_MODULE_CG					0x00004000
109b8e80941Smrg#define chipFeatures_MIN_AREA					0x00008000
110b8e80941Smrg#define chipFeatures_NO_EARLY_Z					0x00010000
111b8e80941Smrg#define chipFeatures_NO_422_TEXTURE				0x00020000
112b8e80941Smrg#define chipFeatures_BUFFER_INTERLEAVING			0x00040000
113b8e80941Smrg#define chipFeatures_BYTE_WRITE_2D				0x00080000
114b8e80941Smrg#define chipFeatures_NO_SCALER					0x00100000
115b8e80941Smrg#define chipFeatures_YUY2_AVERAGING				0x00200000
116b8e80941Smrg#define chipFeatures_HALF_PE_CACHE				0x00400000
117b8e80941Smrg#define chipFeatures_HALF_TX_CACHE				0x00800000
118b8e80941Smrg#define chipFeatures_YUY2_RENDER_TARGET				0x01000000
119b8e80941Smrg#define chipFeatures_MEM32					0x02000000
120b8e80941Smrg#define chipFeatures_PIPE_VG					0x04000000
121b8e80941Smrg#define chipFeatures_VGTS					0x08000000
122b8e80941Smrg#define chipFeatures_FE20					0x10000000
123b8e80941Smrg#define chipFeatures_BYTE_WRITE_3D				0x20000000
124b8e80941Smrg#define chipFeatures_RS_YUV_TARGET				0x40000000
125b8e80941Smrg#define chipFeatures_32_BIT_INDICES				0x80000000
126b8e80941Smrg#define chipMinorFeatures0_FLIP_Y				0x00000001
127b8e80941Smrg#define chipMinorFeatures0_DUAL_RETURN_BUS			0x00000002
128b8e80941Smrg#define chipMinorFeatures0_ENDIANNESS_CONFIG			0x00000004
129b8e80941Smrg#define chipMinorFeatures0_TEXTURE_8K				0x00000008
130b8e80941Smrg#define chipMinorFeatures0_CORRECT_TEXTURE_CONVERTER		0x00000010
131b8e80941Smrg#define chipMinorFeatures0_SPECIAL_MSAA_LOD			0x00000020
132b8e80941Smrg#define chipMinorFeatures0_FAST_CLEAR_FLUSH			0x00000040
133b8e80941Smrg#define chipMinorFeatures0_2DPE20				0x00000080
134b8e80941Smrg#define chipMinorFeatures0_CORRECT_AUTO_DISABLE			0x00000100
135b8e80941Smrg#define chipMinorFeatures0_RENDERTARGET_8K			0x00000200
136b8e80941Smrg#define chipMinorFeatures0_2BITPERTILE				0x00000400
137b8e80941Smrg#define chipMinorFeatures0_SEPARATE_TILE_STATUS_WHEN_INTERLEAVED	0x00000800
138b8e80941Smrg#define chipMinorFeatures0_SUPER_TILED				0x00001000
139b8e80941Smrg#define chipMinorFeatures0_VG_20				0x00002000
140b8e80941Smrg#define chipMinorFeatures0_TS_EXTENDED_COMMANDS			0x00004000
141b8e80941Smrg#define chipMinorFeatures0_COMPRESSION_FIFO_FIXED		0x00008000
142b8e80941Smrg#define chipMinorFeatures0_HAS_SIGN_FLOOR_CEIL			0x00010000
143b8e80941Smrg#define chipMinorFeatures0_VG_FILTER				0x00020000
144b8e80941Smrg#define chipMinorFeatures0_VG_21				0x00040000
145b8e80941Smrg#define chipMinorFeatures0_SHADER_HAS_W				0x00080000
146b8e80941Smrg#define chipMinorFeatures0_HAS_SQRT_TRIG			0x00100000
147b8e80941Smrg#define chipMinorFeatures0_MORE_MINOR_FEATURES			0x00200000
148b8e80941Smrg#define chipMinorFeatures0_MC20					0x00400000
149b8e80941Smrg#define chipMinorFeatures0_MSAA_SIDEBAND			0x00800000
150b8e80941Smrg#define chipMinorFeatures0_BUG_FIXES0				0x01000000
151b8e80941Smrg#define chipMinorFeatures0_VAA					0x02000000
152b8e80941Smrg#define chipMinorFeatures0_BYPASS_IN_MSAA			0x04000000
153b8e80941Smrg#define chipMinorFeatures0_HZ					0x08000000
154b8e80941Smrg#define chipMinorFeatures0_NEW_TEXTURE				0x10000000
155b8e80941Smrg#define chipMinorFeatures0_2D_A8_TARGET				0x20000000
156b8e80941Smrg#define chipMinorFeatures0_CORRECT_STENCIL			0x40000000
157b8e80941Smrg#define chipMinorFeatures0_ENHANCE_VR				0x80000000
158b8e80941Smrg#define chipMinorFeatures1_RSUV_SWIZZLE				0x00000001
159b8e80941Smrg#define chipMinorFeatures1_V2_COMPRESSION			0x00000002
160b8e80941Smrg#define chipMinorFeatures1_VG_DOUBLE_BUFFER			0x00000004
161b8e80941Smrg#define chipMinorFeatures1_EXTRA_EVENT_STATES			0x00000008
162b8e80941Smrg#define chipMinorFeatures1_NO_STRIPING_NEEDED			0x00000010
163b8e80941Smrg#define chipMinorFeatures1_TEXTURE_STRIDE			0x00000020
164b8e80941Smrg#define chipMinorFeatures1_BUG_FIXES3				0x00000040
165b8e80941Smrg#define chipMinorFeatures1_AUTO_DISABLE				0x00000080
166b8e80941Smrg#define chipMinorFeatures1_AUTO_RESTART_TS			0x00000100
167b8e80941Smrg#define chipMinorFeatures1_DISABLE_PE_GATING			0x00000200
168b8e80941Smrg#define chipMinorFeatures1_L2_WINDOWING				0x00000400
169b8e80941Smrg#define chipMinorFeatures1_HALF_FLOAT				0x00000800
170b8e80941Smrg#define chipMinorFeatures1_PIXEL_DITHER				0x00001000
171b8e80941Smrg#define chipMinorFeatures1_TWO_STENCIL_REFERENCE		0x00002000
172b8e80941Smrg#define chipMinorFeatures1_EXTENDED_PIXEL_FORMAT		0x00004000
173b8e80941Smrg#define chipMinorFeatures1_CORRECT_MIN_MAX_DEPTH		0x00008000
174b8e80941Smrg#define chipMinorFeatures1_2D_DITHER				0x00010000
175b8e80941Smrg#define chipMinorFeatures1_BUG_FIXES5				0x00020000
176b8e80941Smrg#define chipMinorFeatures1_NEW_2D				0x00040000
177b8e80941Smrg#define chipMinorFeatures1_NEW_FP				0x00080000
178b8e80941Smrg#define chipMinorFeatures1_TEXTURE_HALIGN			0x00100000
179b8e80941Smrg#define chipMinorFeatures1_NON_POWER_OF_TWO			0x00200000
180b8e80941Smrg#define chipMinorFeatures1_LINEAR_TEXTURE_SUPPORT		0x00400000
181b8e80941Smrg#define chipMinorFeatures1_HALTI0				0x00800000
182b8e80941Smrg#define chipMinorFeatures1_CORRECT_OVERFLOW_VG			0x01000000
183b8e80941Smrg#define chipMinorFeatures1_NEGATIVE_LOG_FIX			0x02000000
184b8e80941Smrg#define chipMinorFeatures1_RESOLVE_OFFSET			0x04000000
185b8e80941Smrg#define chipMinorFeatures1_OK_TO_GATE_AXI_CLOCK			0x08000000
186b8e80941Smrg#define chipMinorFeatures1_MMU_VERSION				0x10000000
187b8e80941Smrg#define chipMinorFeatures1_WIDE_LINE				0x20000000
188b8e80941Smrg#define chipMinorFeatures1_BUG_FIXES6				0x40000000
189b8e80941Smrg#define chipMinorFeatures1_FC_FLUSH_STALL			0x80000000
190b8e80941Smrg#define chipMinorFeatures2_LINE_LOOP				0x00000001
191b8e80941Smrg#define chipMinorFeatures2_LOGIC_OP				0x00000002
192b8e80941Smrg#define chipMinorFeatures2_SEAMLESS_CUBE_MAP			0x00000004
193b8e80941Smrg#define chipMinorFeatures2_SUPERTILED_TEXTURE			0x00000008
194b8e80941Smrg#define chipMinorFeatures2_LINEAR_PE				0x00000010
195b8e80941Smrg#define chipMinorFeatures2_RECT_PRIMITIVE			0x00000020
196b8e80941Smrg#define chipMinorFeatures2_COMPOSITION				0x00000040
197b8e80941Smrg#define chipMinorFeatures2_CORRECT_AUTO_DISABLE_COUNT		0x00000080
198b8e80941Smrg#define chipMinorFeatures2_PE_SWIZZLE				0x00000100
199b8e80941Smrg#define chipMinorFeatures2_END_EVENT				0x00000200
200b8e80941Smrg#define chipMinorFeatures2_S1S8					0x00000400
201b8e80941Smrg#define chipMinorFeatures2_HALTI1				0x00000800
202b8e80941Smrg#define chipMinorFeatures2_RGB888				0x00001000
203b8e80941Smrg#define chipMinorFeatures2_TX__YUV_ASSEMBLER			0x00002000
204b8e80941Smrg#define chipMinorFeatures2_DYNAMIC_FREQUENCY_SCALING		0x00004000
205b8e80941Smrg#define chipMinorFeatures2_TX_FILTER				0x00008000
206b8e80941Smrg#define chipMinorFeatures2_FULL_DIRECTFB			0x00010000
207b8e80941Smrg#define chipMinorFeatures2_2D_TILING				0x00020000
208b8e80941Smrg#define chipMinorFeatures2_THREAD_WALKER_IN_PS			0x00040000
209b8e80941Smrg#define chipMinorFeatures2_TILE_FILLER				0x00080000
210b8e80941Smrg#define chipMinorFeatures2_YUV_STANDARD				0x00100000
211b8e80941Smrg#define chipMinorFeatures2_2D_MULTI_SOURCE_BLIT			0x00200000
212b8e80941Smrg#define chipMinorFeatures2_YUV_CONVERSION			0x00400000
213b8e80941Smrg#define chipMinorFeatures2_FLUSH_FIXED_2D			0x00800000
214b8e80941Smrg#define chipMinorFeatures2_INTERLEAVER				0x01000000
215b8e80941Smrg#define chipMinorFeatures2_MIXED_STREAMS			0x02000000
216b8e80941Smrg#define chipMinorFeatures2_2D_420_L2CACHE			0x04000000
217b8e80941Smrg#define chipMinorFeatures2_BUG_FIXES7				0x08000000
218b8e80941Smrg#define chipMinorFeatures2_2D_NO_INDEX8_BRUSH			0x10000000
219b8e80941Smrg#define chipMinorFeatures2_TEXTURE_TILED_READ			0x20000000
220b8e80941Smrg#define chipMinorFeatures2_DECOMPRESS_Z16			0x40000000
221b8e80941Smrg#define chipMinorFeatures2_BUG_FIXES8				0x80000000
222b8e80941Smrg#define chipMinorFeatures3_ROTATION_STALL_FIX			0x00000001
223b8e80941Smrg#define chipMinorFeatures3_OCL_ONLY				0x00000002
224b8e80941Smrg#define chipMinorFeatures3_2D_MULTI_SOURCE_BLT_EX		0x00000004
225b8e80941Smrg#define chipMinorFeatures3_INSTRUCTION_CACHE			0x00000008
226b8e80941Smrg#define chipMinorFeatures3_GEOMETRY_SHADER			0x00000010
227b8e80941Smrg#define chipMinorFeatures3_TEX_COMPRESSION_SUPERTILED		0x00000020
228b8e80941Smrg#define chipMinorFeatures3_GENERICS				0x00000040
229b8e80941Smrg#define chipMinorFeatures3_BUG_FIXES9				0x00000080
230b8e80941Smrg#define chipMinorFeatures3_FAST_MSAA				0x00000100
231b8e80941Smrg#define chipMinorFeatures3_WCLIP				0x00000200
232b8e80941Smrg#define chipMinorFeatures3_BUG_FIXES10				0x00000400
233b8e80941Smrg#define chipMinorFeatures3_UNIFIED_SAMPLERS			0x00000800
234b8e80941Smrg#define chipMinorFeatures3_BUG_FIXES11				0x00001000
235b8e80941Smrg#define chipMinorFeatures3_PERFORMANCE_COUNTERS			0x00002000
236b8e80941Smrg#define chipMinorFeatures3_HAS_FAST_TRANSCENDENTALS		0x00004000
237b8e80941Smrg#define chipMinorFeatures3_BUG_FIXES12				0x00008000
238b8e80941Smrg#define chipMinorFeatures3_BUG_FIXES13				0x00010000
239b8e80941Smrg#define chipMinorFeatures3_DE_ENHANCEMENTS1			0x00020000
240b8e80941Smrg#define chipMinorFeatures3_ACE					0x00040000
241b8e80941Smrg#define chipMinorFeatures3_TX_ENHANCEMENTS1			0x00080000
242b8e80941Smrg#define chipMinorFeatures3_SH_ENHANCEMENTS1			0x00100000
243b8e80941Smrg#define chipMinorFeatures3_SH_ENHANCEMENTS2			0x00200000
244b8e80941Smrg#define chipMinorFeatures3_PE_ENHANCEMENTS1			0x00400000
245b8e80941Smrg#define chipMinorFeatures3_2D_FC_SOURCE				0x00800000
246b8e80941Smrg#define chipMinorFeatures3_BUG_FIXES_14				0x01000000
247b8e80941Smrg#define chipMinorFeatures3_POWER_OPTIMIZATIONS_0		0x02000000
248b8e80941Smrg#define chipMinorFeatures3_NEW_HZ				0x04000000
249b8e80941Smrg#define chipMinorFeatures3_PE_DITHER_FIX			0x08000000
250b8e80941Smrg#define chipMinorFeatures3_DE_ENHANCEMENTS3			0x10000000
251b8e80941Smrg#define chipMinorFeatures3_SH_ENHANCEMENTS3			0x20000000
252b8e80941Smrg#define chipMinorFeatures3_SH_ENHANCEMENTS4			0x40000000
253b8e80941Smrg#define chipMinorFeatures3_TX_ENHANCEMENTS2			0x80000000
254b8e80941Smrg#define chipMinorFeatures4_FE_ENHANCEMENTS1			0x00000001
255b8e80941Smrg#define chipMinorFeatures4_PE_ENHANCEMENTS2			0x00000002
256b8e80941Smrg#define chipMinorFeatures4_FRUSTUM_CLIP_FIX			0x00000004
257b8e80941Smrg#define chipMinorFeatures4_DE_NO_GAMMA				0x00000008
258b8e80941Smrg#define chipMinorFeatures4_PA_ENHANCEMENTS_2			0x00000010
259b8e80941Smrg#define chipMinorFeatures4_2D_GAMMA				0x00000020
260b8e80941Smrg#define chipMinorFeatures4_SINGLE_BUFFER			0x00000040
261b8e80941Smrg#define chipMinorFeatures4_HI_ENHANCEMENTS_1			0x00000080
262b8e80941Smrg#define chipMinorFeatures4_TX_ENHANCEMENTS_3			0x00000100
263b8e80941Smrg#define chipMinorFeatures4_SH_ENHANCEMENTS_5			0x00000200
264b8e80941Smrg#define chipMinorFeatures4_FE_ENHANCEMENTS_2			0x00000400
265b8e80941Smrg#define chipMinorFeatures4_TX_LERP_PRECISION_FIX		0x00000800
266b8e80941Smrg#define chipMinorFeatures4_2D_COLOR_SPACE_CONVERSION		0x00001000
267b8e80941Smrg#define chipMinorFeatures4_TEXTURE_ASTC				0x00002000
268b8e80941Smrg#define chipMinorFeatures4_PE_ENHANCEMENTS_4			0x00004000
269b8e80941Smrg#define chipMinorFeatures4_MC_ENHANCEMENTS_1			0x00008000
270b8e80941Smrg#define chipMinorFeatures4_HALTI2				0x00010000
271b8e80941Smrg#define chipMinorFeatures4_2D_MIRROR_EXTENSION			0x00020000
272b8e80941Smrg#define chipMinorFeatures4_SMALL_MSAA				0x00040000
273b8e80941Smrg#define chipMinorFeatures4_BUG_FIXES_17				0x00080000
274b8e80941Smrg#define chipMinorFeatures4_NEW_RA				0x00100000
275b8e80941Smrg#define chipMinorFeatures4_2D_OPF_YUV_OUTPUT			0x00200000
276b8e80941Smrg#define chipMinorFeatures4_2D_MULTI_SOURCE_BLT_EX2		0x00400000
277b8e80941Smrg#define chipMinorFeatures4_NO_USER_CSC				0x00800000
278b8e80941Smrg#define chipMinorFeatures4_ZFIXES				0x01000000
279b8e80941Smrg#define chipMinorFeatures4_BUG_FIXES18				0x02000000
280b8e80941Smrg#define chipMinorFeatures4_2D_COMPRESSION			0x04000000
281b8e80941Smrg#define chipMinorFeatures4_PROBE				0x08000000
282b8e80941Smrg#define chipMinorFeatures4_MEDIUM_PRECISION			0x10000000
283b8e80941Smrg#define chipMinorFeatures4_2D_SUPER_TILE_VERSION		0x20000000
284b8e80941Smrg#define chipMinorFeatures4_BUG_FIXES19				0x40000000
285b8e80941Smrg#define chipMinorFeatures4_SH_ENHANCEMENTS6			0x80000000
286b8e80941Smrg#define chipMinorFeatures5_SH_ENHANCEMENTS7			0x00000001
287b8e80941Smrg#define chipMinorFeatures5_BUG_FIXES20				0x00000002
288b8e80941Smrg#define chipMinorFeatures5_DE_ADDRESS_40			0x00000004
289b8e80941Smrg#define chipMinorFeatures5_MINI_MMU_FIX				0x00000008
290b8e80941Smrg#define chipMinorFeatures5_EEZ					0x00000010
291b8e80941Smrg#define chipMinorFeatures5_BUG_FIXES21				0x00000020
292b8e80941Smrg#define chipMinorFeatures5_EXTRA_VG_CAPS			0x00000040
293b8e80941Smrg#define chipMinorFeatures5_MULTI_SRC_V15			0x00000080
294b8e80941Smrg#define chipMinorFeatures5_BUG_FIXES22				0x00000100
295b8e80941Smrg#define chipMinorFeatures5_HALTI3				0x00000200
296b8e80941Smrg#define chipMinorFeatures5_TESSELATION_SHADERS			0x00000400
297b8e80941Smrg#define chipMinorFeatures5_2D_ONE_PASS_FILTER_TAP		0x00000800
298b8e80941Smrg#define chipMinorFeatures5_MULTI_SRC_V2_STR_QUAD		0x00001000
299b8e80941Smrg#define chipMinorFeatures5_SEPARATE_SRC_DST			0x00002000
300b8e80941Smrg#define chipMinorFeatures5_HALTI4				0x00004000
301b8e80941Smrg#define chipMinorFeatures5_RA_WRITE_DEPTH			0x00008000
302b8e80941Smrg#define chipMinorFeatures5_ANDROID_ONLY				0x00010000
303b8e80941Smrg#define chipMinorFeatures5_HAS_PRODUCTID			0x00020000
304b8e80941Smrg#define chipMinorFeatures5_TX_SUPPORT_DEC			0x00040000
305b8e80941Smrg#define chipMinorFeatures5_S8_MSAA_COMPRESSION			0x00080000
306b8e80941Smrg#define chipMinorFeatures5_PE_DITHER_FIX2			0x00100000
307b8e80941Smrg#define chipMinorFeatures5_L2_CACHE_REMOVE			0x00200000
308b8e80941Smrg#define chipMinorFeatures5_FE_ALLOW_RND_VTX_CNT			0x00400000
309b8e80941Smrg#define chipMinorFeatures5_CUBE_MAP_FL28			0x00800000
310b8e80941Smrg#define chipMinorFeatures5_TX_6BIT_FRAC				0x01000000
311b8e80941Smrg#define chipMinorFeatures5_FE_ALLOW_STALL_PREFETCH_ENG		0x02000000
312b8e80941Smrg#define chipMinorFeatures5_THIRD_PARTY_COMPRESSION		0x04000000
313b8e80941Smrg#define chipMinorFeatures5_RS_DEPTHSTENCIL_NATIVE_SUPPORT	0x08000000
314b8e80941Smrg#define chipMinorFeatures5_V2_MSAA_COMP_FIX			0x10000000
315b8e80941Smrg#define chipMinorFeatures5_HALTI5				0x20000000
316b8e80941Smrg#define chipMinorFeatures5_EVIS					0x40000000
317b8e80941Smrg#define chipMinorFeatures5_BLT_ENGINE				0x80000000
318b8e80941Smrg#define chipMinorFeatures6_BUG_FIXES_23				0x00000001
319b8e80941Smrg#define chipMinorFeatures6_BUG_FIXES_24				0x00000002
320b8e80941Smrg#define chipMinorFeatures6_DEC					0x00000004
321b8e80941Smrg#define chipMinorFeatures6_VS_TILE_NV12				0x00000008
322b8e80941Smrg#define chipMinorFeatures6_VS_TILE_NV12_10BIT			0x00000010
323b8e80941Smrg#define chipMinorFeatures6_RENDER_TARGET_8			0x00000020
324b8e80941Smrg#define chipMinorFeatures6_TEX_LOD_FLOW_CORR			0x00000040
325b8e80941Smrg#define chipMinorFeatures6_FACE_LOD				0x00000080
326b8e80941Smrg#define chipMinorFeatures6_MULTI_CORE_SEMAPHORE_STALL_V2	0x00000100
327b8e80941Smrg#define chipMinorFeatures6_VMSAA				0x00000200
328b8e80941Smrg#define chipMinorFeatures6_CHIP_ENABLE_LINK			0x00000400
329b8e80941Smrg#define chipMinorFeatures6_MULTI_SRC_BLT_1_5_ENHANCEMENT	0x00000800
330b8e80941Smrg#define chipMinorFeatures6_MULTI_SRC_BLT_BILINEAR_FILTER	0x00001000
331b8e80941Smrg#define chipMinorFeatures6_RA_HZEZ_CLOCK_CONTROL		0x00002000
332b8e80941Smrg#define chipMinorFeatures6_CACHE128B256BPERLINE			0x00004000
333b8e80941Smrg#define chipMinorFeatures6_V4_COMPRESSION			0x00008000
334b8e80941Smrg#define chipMinorFeatures6_PE2D_MAJOR_SUPER_TILE		0x00010000
335b8e80941Smrg#define chipMinorFeatures6_PE_32BPC_COLORMASK_FIX		0x00020000
336b8e80941Smrg#define chipMinorFeatures6_ALPHA_BLENDING_OPT			0x00040000
337b8e80941Smrg#define chipMinorFeatures6_NEW_GPIPE				0x00080000
338b8e80941Smrg#define chipMinorFeatures6_PIPELINE_32_ATTRIBUTES		0x00100000
339b8e80941Smrg#define chipMinorFeatures6_MSAA_SHADING				0x00200000
340b8e80941Smrg#define chipMinorFeatures6_NO_ANISTRO_FILTER			0x00400000
341b8e80941Smrg#define chipMinorFeatures6_NO_ASTC				0x00800000
342b8e80941Smrg#define chipMinorFeatures6_NO_DXT				0x01000000
343b8e80941Smrg#define chipMinorFeatures6_HWTFB				0x02000000
344b8e80941Smrg#define chipMinorFeatures6_RA_DEPTH_WRITE_MSAA1X_FIX		0x04000000
345b8e80941Smrg#define chipMinorFeatures6_EZHZ_CLOCKGATE_FIX			0x08000000
346b8e80941Smrg#define chipMinorFeatures6_SH_SNAP2PAGE_FIX			0x10000000
347b8e80941Smrg#define chipMinorFeatures6_SH_HALFDEPENDENCY_FIX		0x20000000
348b8e80941Smrg#define chipMinorFeatures6_USC_MCFILL_FIX			0x40000000
349b8e80941Smrg#define chipMinorFeatures6_TPG_TCPERF_FIX			0x80000000
350b8e80941Smrg#define chipMinorFeatures7_USC_MDFIFO_OVERFLOW_FIX		0x00000001
351b8e80941Smrg#define chipMinorFeatures7_SH_TEXLD_BARRIER_IN_CS_FIX		0x00000002
352b8e80941Smrg#define chipMinorFeatures7_RS_NEW_BASEADDR			0x00000004
353b8e80941Smrg#define chipMinorFeatures7_PE_8BPP_DUALPIPE_FIX			0x00000008
354b8e80941Smrg#define chipMinorFeatures7_SH_ADVANCED_INSTR			0x00000010
355b8e80941Smrg#define chipMinorFeatures7_SH_FLAT_INTERPOLATION_DUAL16_FIX	0x00000020
356b8e80941Smrg#define chipMinorFeatures7_USC_CONTINUOUS_FLUS_FIX		0x00000040
357b8e80941Smrg#define chipMinorFeatures7_SH_SUPPORT_V4			0x00000080
358b8e80941Smrg#define chipMinorFeatures7_SH_SUPPORT_ALPHA_KILL		0x00000100
359b8e80941Smrg#define chipMinorFeatures7_PE_NO_ALPHA_TEST			0x00000200
360b8e80941Smrg#define chipMinorFeatures7_TX_LOD_NEAREST_SELECT		0x00000400
361b8e80941Smrg#define chipMinorFeatures7_SH_FIX_LDEXP				0x00000800
362b8e80941Smrg#define chipMinorFeatures7_SUPPORT_MOVAI			0x00001000
363b8e80941Smrg#define chipMinorFeatures7_SH_SNAP2PAGE_MAXPAGES_FIX		0x00002000
364b8e80941Smrg#define chipMinorFeatures7_PE_RGBA16I_FIX			0x00004000
365b8e80941Smrg#define chipMinorFeatures7_BLT_8bpp_256TILE_FC_FIX		0x00008000
366b8e80941Smrg#define chipMinorFeatures7_PE_64BIT_FENCE_FIX			0x00010000
367b8e80941Smrg#define chipMinorFeatures7_USC_FULL_CACHE_FIX			0x00020000
368b8e80941Smrg#define chipMinorFeatures7_TX_YUV_ASSEMBLER_10BIT		0x00040000
369b8e80941Smrg#define chipMinorFeatures7_FE_32BIT_INDEX_FIX			0x00080000
370b8e80941Smrg#define chipMinorFeatures7_BLT_64BPP_MASKED_CLEAR_FIX		0x00100000
371b8e80941Smrg#define chipMinorFeatures7_BIT_SECURITY				0x00200000
372b8e80941Smrg#define chipMinorFeatures7_BIT_ROBUSTNESS			0x00400000
373b8e80941Smrg#define chipMinorFeatures7_USC_ATOMIC_FIX			0x00800000
374b8e80941Smrg#define chipMinorFeatures7_SH_PSO_MSAA1x_FIX			0x01000000
375b8e80941Smrg#define chipMinorFeatures7_BIT_USC_VX_PERF_FIX			0x02000000
376b8e80941Smrg#define chipMinorFeatures7_EVIS_NO_ABSDIFF			0x04000000
377b8e80941Smrg#define chipMinorFeatures7_EVIS_NO_BITREPLACE			0x08000000
378b8e80941Smrg#define chipMinorFeatures7_EVIS_NO_BOXFILTER			0x10000000
379b8e80941Smrg#define chipMinorFeatures7_EVIS_NO_CORDIAC			0x20000000
380b8e80941Smrg#define chipMinorFeatures7_EVIS_NO_DP32				0x40000000
381b8e80941Smrg#define chipMinorFeatures7_EVIS_NO_FILTER			0x80000000
382b8e80941Smrg#define chipMinorFeatures8_EVIS_NO_IADD				0x00000001
383b8e80941Smrg#define chipMinorFeatures8_EVIS_NO_SELECTADD			0x00000002
384b8e80941Smrg#define chipMinorFeatures8_EVIS_LERP_7OUTPUT			0x00000004
385b8e80941Smrg#define chipMinorFeatures8_EVIS_ACCSQ_8OUTPUT			0x00000008
386b8e80941Smrg#define chipMinorFeatures8_USC_GOS_ADDR_FIX			0x00000010
387b8e80941Smrg#define chipMinorFeatures8_TX_8BIT_UVFRAC			0x00000020
388b8e80941Smrg#define chipMinorFeatures8_TX_DESC_CACHE_CLOCKGATE_FIX		0x00000040
389b8e80941Smrg#define chipMinorFeatures8_RSBLT_MSAA_DECOMPRESSION		0x00000080
390b8e80941Smrg#define chipMinorFeatures8_TX_INTEGER_COORDINATE		0x00000100
391b8e80941Smrg#define chipMinorFeatures8_DRAWID				0x00000200
392b8e80941Smrg#define chipMinorFeatures8_PSIO_SAMPLEMASK_IN_R0ZW_FIX		0x00000400
393b8e80941Smrg#define chipMinorFeatures8_TX_INTEGER_COORDINATE_V2		0x00000800
394b8e80941Smrg#define chipMinorFeatures8_MULTI_CORE_BLOCK_SET_CONFIG		0x00001000
395b8e80941Smrg#define chipMinorFeatures8_VG_RESOLVE_ENGINE			0x00002000
396b8e80941Smrg#define chipMinorFeatures8_VG_PE_COLOR_KEY			0x00004000
397b8e80941Smrg#define chipMinorFeatures8_VG_IM_INDEX_FORMAT			0x00008000
398b8e80941Smrg#define chipMinorFeatures8_SNAPPAGE_CMD				0x00010000
399b8e80941Smrg#define chipMinorFeatures8_SH_NO_INDEX_CONST_ON_A0		0x00020000
400b8e80941Smrg#define chipMinorFeatures8_SH_NO_ONECONST_LIMIT			0x00040000
401b8e80941Smrg#define chipMinorFeatures8_SH_IMG_LDST_ON_TEMP			0x00080000
402b8e80941Smrg#define chipMinorFeatures8_COMPUTE_ONLY				0x00100000
403b8e80941Smrg#define chipMinorFeatures8_SH_IMG_LDST_CLAMP			0x00200000
404b8e80941Smrg#define chipMinorFeatures8_SH_ICACHE_ALLOC_COUNT_FIX		0x00400000
405b8e80941Smrg#define chipMinorFeatures8_SH_ICACHE_PREFETCH			0x00800000
406b8e80941Smrg#define chipMinorFeatures8_PE2D_SEPARATE_CACHE			0x01000000
407b8e80941Smrg#define chipMinorFeatures8_VG_AYUV_INPUT_OUTPUT			0x02000000
408b8e80941Smrg#define chipMinorFeatures8_VG_DOUBLE_IMAGE			0x04000000
409b8e80941Smrg#define chipMinorFeatures8_VG_RECTANGLE_STRIPE_MODE		0x08000000
410b8e80941Smrg#define chipMinorFeatures8_VG_MMU				0x10000000
411b8e80941Smrg#define chipMinorFeatures8_VG_IM_FILTER				0x20000000
412b8e80941Smrg#define chipMinorFeatures8_VG_IM_YUV_PACKET			0x40000000
413b8e80941Smrg#define chipMinorFeatures8_VG_IM_YUV_PLANAR			0x80000000
414b8e80941Smrg#define chipMinorFeatures9_VG_PE_YUV_PACKET			0x00000001
415b8e80941Smrg#define chipMinorFeatures9_VG_COLOR_PRECISION_8_BIT		0x00000002
416b8e80941Smrg#define chipMinorFeatures9_PE_MSAA_OQ_FIX			0x00000004
417b8e80941Smrg#define chipMinorFeatures9_PSIO_MSAA_CL_FIX			0x00000008
418b8e80941Smrg#define chipMinorFeatures9_USC_DEFER_FILL_FIX			0x00000010
419b8e80941Smrg#define chipMinorFeatures9_SH_CLOCK_GATE_FIX			0x00000020
420b8e80941Smrg#define chipMinorFeatures9_FE_NEED_DUMMYDRAW			0x00000040
421b8e80941Smrg#define chipMinorFeatures9_PE2D_LINEAR_YUV420_OUTPUT		0x00000080
422b8e80941Smrg#define chipMinorFeatures9_PE2D_LINEAR_YUV420_10BIT		0x00000100
423b8e80941Smrg#define chipMinorFeatures9_MULTI_CLUSTER			0x00000200
424b8e80941Smrg#define chipMinorFeatures9_VG_TS_CULLING			0x00000400
425b8e80941Smrg#define chipMinorFeatures9_VG_FP25				0x00000800
426b8e80941Smrg#define chipMinorFeatures9_SH_MULTI_WG_PACK			0x00001000
427b8e80941Smrg#define chipMinorFeatures9_SH_DUAL16_SAMPLEMASK_ZW		0x00002000
428b8e80941Smrg#define chipMinorFeatures9_TPG_TRIVIAL_MODE_FIX			0x00004000
429b8e80941Smrg#define chipMinorFeatures9_TX_ASTC_MULTISLICE_FIX		0x00008000
430b8e80941Smrg#define chipMinorFeatures9_FE_ROBUST_FIX			0x00010000
431b8e80941Smrg#define chipMinorFeatures9_SH_GPIPE_ACCESS_FULLTEMPS		0x00020000
432b8e80941Smrg#define chipMinorFeatures9_PSIO_INTERLOCK			0x00040000
433b8e80941Smrg#define chipMinorFeatures9_PA_WIDELINE_FIX			0x00080000
434b8e80941Smrg#define chipMinorFeatures9_WIDELINE_HELPER_FIX			0x00100000
435b8e80941Smrg#define chipMinorFeatures9_G2D_3RD_PARTY_COMPRESSION_1_1	0x00200000
436b8e80941Smrg#define chipMinorFeatures9_TX_FLUSH_L1CACHE			0x00400000
437b8e80941Smrg#define chipMinorFeatures9_PE_DITHER_FIX2			0x00800000
438b8e80941Smrg#define chipMinorFeatures9_G2D_DEC400				0x01000000
439b8e80941Smrg#define chipMinorFeatures9_SH_TEXLD_U_FIX			0x02000000
440b8e80941Smrg#define chipMinorFeatures9_MC_FCCACHE_BYTEMASK			0x04000000
441b8e80941Smrg#define chipMinorFeatures9_SH_MULTI_WG_PACK_FIX			0x08000000
442b8e80941Smrg#define chipMinorFeatures9_DC_OVERLAY_SCALING			0x10000000
443b8e80941Smrg#define chipMinorFeatures9_DC_SOURCE_ROTATION			0x20000000
444b8e80941Smrg#define chipMinorFeatures9_DC_TILED				0x40000000
445b8e80941Smrg#define chipMinorFeatures9_DC_YUV_L1				0x80000000
446b8e80941Smrg#define chipMinorFeatures10_DC_D30_OUTPUT			0x00000001
447b8e80941Smrg#define chipMinorFeatures10_DC_MMU				0x00000002
448b8e80941Smrg#define chipMinorFeatures10_DC_COMPRESSION			0x00000004
449b8e80941Smrg#define chipMinorFeatures10_DC_QOS				0x00000008
450b8e80941Smrg#define chipMinorFeatures10_PE_ADVANCE_BLEND_PART0		0x00000010
451b8e80941Smrg#define chipMinorFeatures10_FE_PATCHLIST_FETCH_FIX		0x00000020
452b8e80941Smrg#define chipMinorFeatures10_RA_CG_FIX				0x00000040
453b8e80941Smrg#define chipMinorFeatures10_EVIS_VX2				0x00000080
454b8e80941Smrg#define chipMinorFeatures10_NN_FLOAT				0x00000100
455b8e80941Smrg#define chipMinorFeatures10_DEC400				0x00000200
456b8e80941Smrg#define chipMinorFeatures10_LS_SUPPORT_PERCOMP_DEPENDENCY	0x00000400
457b8e80941Smrg#define chipMinorFeatures10_TP_ENGINE				0x00000800
458b8e80941Smrg#define chipMinorFeatures10_MULTI_CORE_BLOCK_SET_CONFIG2	0x00001000
459b8e80941Smrg#define chipMinorFeatures10_PE_VMSAA_COVERAGE_CACHE_FIX		0x00002000
460b8e80941Smrg#define chipMinorFeatures10_SECURITY_AHB			0x00004000
461b8e80941Smrg#define chipMinorFeatures10_MULTICORE_SEMAPHORESTALL_V3		0x00008000
462b8e80941Smrg#define chipMinorFeatures10_SMALLBATCH				0x00010000
463b8e80941Smrg#define chipMinorFeatures10_SH_CMPLX				0x00020000
464b8e80941Smrg#define chipMinorFeatures10_SH_IDIV0_SWZL_EHS			0x00040000
465b8e80941Smrg#define chipMinorFeatures10_TX_LERP_LESS_BIT			0x00080000
466b8e80941Smrg#define chipMinorFeatures10_SH_GM_ENDIAN			0x00100000
467b8e80941Smrg#define chipMinorFeatures10_SH_GM_USC_UNALLOC			0x00200000
468b8e80941Smrg#define chipMinorFeatures10_SH_END_OF_BB			0x00400000
469b8e80941Smrg#define chipMinorFeatures10_VIP_V7				0x00800000
470b8e80941Smrg#define chipMinorFeatures10_TX_BORDER_CLAMP_FIX			0x01000000
471b8e80941Smrg#define chipMinorFeatures10_SH_IMG_LD_LASTPIXEL_FIX		0x02000000
472b8e80941Smrg#define chipMinorFeatures10_ASYNC_BLT				0x04000000
473b8e80941Smrg#define chipMinorFeatures10_ASYNC_FE_FENCE_FIX			0x08000000
474b8e80941Smrg#define chipMinorFeatures10_PSCS_THROTTLE			0x10000000
475b8e80941Smrg#define chipMinorFeatures10_SEPARATE_LS				0x20000000
476b8e80941Smrg#define chipMinorFeatures10_MCFE				0x40000000
477b8e80941Smrg#define chipMinorFeatures10_WIDELINE_TRIANGLE_EMU		0x80000000
478b8e80941Smrg#define chipMinorFeatures11_VG_RESOLUTION_8K			0x00000001
479b8e80941Smrg#define chipMinorFeatures11_FENCE_32BIT				0x00000002
480b8e80941Smrg#define chipMinorFeatures11_FENCE_64BIT				0x00000004
481b8e80941Smrg#define chipMinorFeatures11_NN_INTERLEVE8			0x00000008
482b8e80941Smrg#define chipMinorFeatures11_TP_REORDER				0x00000010
483b8e80941Smrg#define chipMinorFeatures11_PE_DEPTH_ONLY_OQFIX			0x00000020
484b8e80941Smrg
485b8e80941Smrg#endif /* COMMON_XML */
486