1848b8605Smrg/*
2848b8605Smrg * Copyright (c) 2012 Rob Clark <robdclark@gmail.com>
3848b8605Smrg *
4848b8605Smrg * Permission is hereby granted, free of charge, to any person obtaining a
5848b8605Smrg * copy of this software and associated documentation files (the "Software"),
6848b8605Smrg * to deal in the Software without restriction, including without limitation
7848b8605Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8848b8605Smrg * and/or sell copies of the Software, and to permit persons to whom the
9848b8605Smrg * Software is furnished to do so, subject to the following conditions:
10848b8605Smrg *
11848b8605Smrg * The above copyright notice and this permission notice (including the next
12848b8605Smrg * paragraph) shall be included in all copies or substantial portions of the
13848b8605Smrg * Software.
14848b8605Smrg *
15848b8605Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16848b8605Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17848b8605Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18848b8605Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19848b8605Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20848b8605Smrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21848b8605Smrg * SOFTWARE.
22848b8605Smrg */
23848b8605Smrg
24848b8605Smrg#ifndef INSTR_A2XX_H_
25848b8605Smrg#define INSTR_A2XX_H_
26848b8605Smrg
27848b8605Smrg#define PACKED __attribute__((__packed__))
28848b8605Smrg
29848b8605Smrg#include "util/u_math.h"
30848b8605Smrg#include "adreno_common.xml.h"
31848b8605Smrg#include "adreno_pm4.xml.h"
32848b8605Smrg#include "a2xx.xml.h"
33848b8605Smrg
34848b8605Smrg
35848b8605Smrg/*
36848b8605Smrg * ALU instructions:
37848b8605Smrg */
38848b8605Smrg
39848b8605Smrgtypedef enum {
40848b8605Smrg	ADDs = 0,
41848b8605Smrg	ADD_PREVs = 1,
42848b8605Smrg	MULs = 2,
43848b8605Smrg	MUL_PREVs = 3,
44848b8605Smrg	MUL_PREV2s = 4,
45848b8605Smrg	MAXs = 5,
46848b8605Smrg	MINs = 6,
47848b8605Smrg	SETEs = 7,
48848b8605Smrg	SETGTs = 8,
49848b8605Smrg	SETGTEs = 9,
50848b8605Smrg	SETNEs = 10,
51848b8605Smrg	FRACs = 11,
52848b8605Smrg	TRUNCs = 12,
53848b8605Smrg	FLOORs = 13,
54848b8605Smrg	EXP_IEEE = 14,
55848b8605Smrg	LOG_CLAMP = 15,
56848b8605Smrg	LOG_IEEE = 16,
57848b8605Smrg	RECIP_CLAMP = 17,
58848b8605Smrg	RECIP_FF = 18,
59848b8605Smrg	RECIP_IEEE = 19,
60848b8605Smrg	RECIPSQ_CLAMP = 20,
61848b8605Smrg	RECIPSQ_FF = 21,
62848b8605Smrg	RECIPSQ_IEEE = 22,
63848b8605Smrg	MOVAs = 23,
64848b8605Smrg	MOVA_FLOORs = 24,
65848b8605Smrg	SUBs = 25,
66848b8605Smrg	SUB_PREVs = 26,
67848b8605Smrg	PRED_SETEs = 27,
68848b8605Smrg	PRED_SETNEs = 28,
69848b8605Smrg	PRED_SETGTs = 29,
70848b8605Smrg	PRED_SETGTEs = 30,
71848b8605Smrg	PRED_SET_INVs = 31,
72848b8605Smrg	PRED_SET_POPs = 32,
73848b8605Smrg	PRED_SET_CLRs = 33,
74848b8605Smrg	PRED_SET_RESTOREs = 34,
75848b8605Smrg	KILLEs = 35,
76848b8605Smrg	KILLGTs = 36,
77848b8605Smrg	KILLGTEs = 37,
78848b8605Smrg	KILLNEs = 38,
79848b8605Smrg	KILLONEs = 39,
80848b8605Smrg	SQRT_IEEE = 40,
81848b8605Smrg	MUL_CONST_0 = 42,
82848b8605Smrg	MUL_CONST_1 = 43,
83848b8605Smrg	ADD_CONST_0 = 44,
84848b8605Smrg	ADD_CONST_1 = 45,
85848b8605Smrg	SUB_CONST_0 = 46,
86848b8605Smrg	SUB_CONST_1 = 47,
87848b8605Smrg	SIN = 48,
88848b8605Smrg	COS = 49,
89848b8605Smrg	RETAIN_PREV = 50,
90b8e80941Smrg	SCALAR_NONE = 63,
91848b8605Smrg} instr_scalar_opc_t;
92848b8605Smrg
93848b8605Smrgtypedef enum {
94848b8605Smrg	ADDv = 0,
95848b8605Smrg	MULv = 1,
96848b8605Smrg	MAXv = 2,
97848b8605Smrg	MINv = 3,
98848b8605Smrg	SETEv = 4,
99848b8605Smrg	SETGTv = 5,
100848b8605Smrg	SETGTEv = 6,
101848b8605Smrg	SETNEv = 7,
102848b8605Smrg	FRACv = 8,
103848b8605Smrg	TRUNCv = 9,
104848b8605Smrg	FLOORv = 10,
105848b8605Smrg	MULADDv = 11,
106848b8605Smrg	CNDEv = 12,
107848b8605Smrg	CNDGTEv = 13,
108848b8605Smrg	CNDGTv = 14,
109848b8605Smrg	DOT4v = 15,
110848b8605Smrg	DOT3v = 16,
111848b8605Smrg	DOT2ADDv = 17,
112848b8605Smrg	CUBEv = 18,
113848b8605Smrg	MAX4v = 19,
114848b8605Smrg	PRED_SETE_PUSHv = 20,
115848b8605Smrg	PRED_SETNE_PUSHv = 21,
116848b8605Smrg	PRED_SETGT_PUSHv = 22,
117848b8605Smrg	PRED_SETGTE_PUSHv = 23,
118848b8605Smrg	KILLEv = 24,
119848b8605Smrg	KILLGTv = 25,
120848b8605Smrg	KILLGTEv = 26,
121848b8605Smrg	KILLNEv = 27,
122848b8605Smrg	DSTv = 28,
123848b8605Smrg	MOVAv = 29,
124b8e80941Smrg	VECTOR_NONE = 31,
125848b8605Smrg} instr_vector_opc_t;
126848b8605Smrg
127848b8605Smrgtypedef struct PACKED {
128848b8605Smrg	/* dword0: */
129848b8605Smrg	uint8_t             vector_dest              : 6;
130848b8605Smrg	uint8_t             vector_dest_rel          : 1;
131848b8605Smrg	uint8_t             low_precision_16b_fp     : 1;
132848b8605Smrg	uint8_t             scalar_dest              : 6;
133848b8605Smrg	uint8_t             scalar_dest_rel          : 1;
134848b8605Smrg	uint8_t             export_data              : 1;
135848b8605Smrg	uint8_t             vector_write_mask        : 4;
136848b8605Smrg	uint8_t             scalar_write_mask        : 4;
137848b8605Smrg	uint8_t             vector_clamp             : 1;
138848b8605Smrg	uint8_t             scalar_clamp             : 1;
139848b8605Smrg	instr_scalar_opc_t  scalar_opc               : 6;
140848b8605Smrg	/* dword1: */
141848b8605Smrg	uint8_t             src3_swiz                : 8;
142848b8605Smrg	uint8_t             src2_swiz                : 8;
143848b8605Smrg	uint8_t             src1_swiz                : 8;
144848b8605Smrg	uint8_t             src3_reg_negate          : 1;
145848b8605Smrg	uint8_t             src2_reg_negate          : 1;
146848b8605Smrg	uint8_t             src1_reg_negate          : 1;
147848b8605Smrg	uint8_t             pred_select              : 2;
148848b8605Smrg	uint8_t             relative_addr            : 1;
149848b8605Smrg	uint8_t             const_1_rel_abs          : 1;
150848b8605Smrg	uint8_t             const_0_rel_abs          : 1;
151848b8605Smrg	/* dword2: */
152b8e80941Smrg	union {
153b8e80941Smrg		struct {
154b8e80941Smrg			uint8_t             src3_reg         : 6;
155b8e80941Smrg			uint8_t             src3_reg_select  : 1;
156b8e80941Smrg			uint8_t             src3_reg_abs     : 1;
157b8e80941Smrg			uint8_t             src2_reg         : 6;
158b8e80941Smrg			uint8_t             src2_reg_select  : 1;
159b8e80941Smrg			uint8_t             src2_reg_abs     : 1;
160b8e80941Smrg			uint8_t             src1_reg         : 6;
161b8e80941Smrg			uint8_t             src1_reg_select  : 1;
162b8e80941Smrg			uint8_t             src1_reg_abs     : 1;
163b8e80941Smrg		};
164b8e80941Smrg		/* constants have full 8-bit index */
165b8e80941Smrg		struct {
166b8e80941Smrg			uint8_t             src3_reg_byte    : 8;
167b8e80941Smrg			uint8_t             src2_reg_byte    : 8;
168b8e80941Smrg			uint8_t             src1_reg_byte    : 8;
169b8e80941Smrg		};
170b8e80941Smrg	};
171848b8605Smrg	instr_vector_opc_t  vector_opc               : 5;
172848b8605Smrg	uint8_t             src3_sel                 : 1;
173848b8605Smrg	uint8_t             src2_sel                 : 1;
174848b8605Smrg	uint8_t             src1_sel                 : 1;
175848b8605Smrg} instr_alu_t;
176848b8605Smrg
177848b8605Smrg
178848b8605Smrg
179848b8605Smrg/*
180848b8605Smrg * CF instructions:
181848b8605Smrg */
182848b8605Smrg
183848b8605Smrgtypedef enum {
184848b8605Smrg	NOP = 0,
185848b8605Smrg	EXEC = 1,
186848b8605Smrg	EXEC_END = 2,
187848b8605Smrg	COND_EXEC = 3,
188848b8605Smrg	COND_EXEC_END = 4,
189848b8605Smrg	COND_PRED_EXEC = 5,
190848b8605Smrg	COND_PRED_EXEC_END = 6,
191848b8605Smrg	LOOP_START = 7,
192848b8605Smrg	LOOP_END = 8,
193848b8605Smrg	COND_CALL = 9,
194848b8605Smrg	RETURN = 10,
195848b8605Smrg	COND_JMP = 11,
196848b8605Smrg	ALLOC = 12,
197848b8605Smrg	COND_EXEC_PRED_CLEAN = 13,
198848b8605Smrg	COND_EXEC_PRED_CLEAN_END = 14,
199848b8605Smrg	MARK_VS_FETCH_DONE = 15,
200848b8605Smrg} instr_cf_opc_t;
201848b8605Smrg
202848b8605Smrgtypedef enum {
203848b8605Smrg	RELATIVE_ADDR = 0,
204848b8605Smrg	ABSOLUTE_ADDR = 1,
205848b8605Smrg} instr_addr_mode_t;
206848b8605Smrg
207848b8605Smrgtypedef enum {
208848b8605Smrg	SQ_NO_ALLOC = 0,
209848b8605Smrg	SQ_POSITION = 1,
210848b8605Smrg	SQ_PARAMETER_PIXEL = 2,
211848b8605Smrg	SQ_MEMORY = 3,
212848b8605Smrg} instr_alloc_type_t;
213848b8605Smrg
214848b8605Smrgtypedef struct PACKED {
215848b8605Smrg	uint16_t            address                  : 9;
216848b8605Smrg	uint8_t             reserved0                : 3;
217848b8605Smrg	uint8_t             count                    : 3;
218848b8605Smrg	uint8_t             yeild                    : 1;
219848b8605Smrg	uint16_t            serialize                : 12;
220848b8605Smrg	uint8_t             vc                       : 6;   /* vertex cache? */
221848b8605Smrg	uint8_t             bool_addr                : 8;
222848b8605Smrg	uint8_t             condition                : 1;
223848b8605Smrg	instr_addr_mode_t   address_mode             : 1;
224848b8605Smrg	instr_cf_opc_t      opc                      : 4;
225848b8605Smrg} instr_cf_exec_t;
226848b8605Smrg
227848b8605Smrgtypedef struct PACKED {
228848b8605Smrg	uint16_t            address                  : 10;
229848b8605Smrg	uint8_t             reserved0                : 6;
230848b8605Smrg	uint8_t             loop_id                  : 5;
231848b8605Smrg	uint32_t            reserved1                : 22;
232848b8605Smrg	instr_addr_mode_t   address_mode             : 1;
233848b8605Smrg	instr_cf_opc_t      opc                      : 4;
234848b8605Smrg} instr_cf_loop_t;
235848b8605Smrg
236848b8605Smrgtypedef struct PACKED {
237848b8605Smrg	uint16_t            address                  : 10;
238848b8605Smrg	uint8_t             reserved0                : 3;
239848b8605Smrg	uint8_t             force_call               : 1;
240848b8605Smrg	uint8_t             predicated_jmp           : 1;
241848b8605Smrg	uint32_t            reserved1                : 18;
242848b8605Smrg	uint8_t             direction                : 1;
243848b8605Smrg	uint8_t             bool_addr                : 8;
244848b8605Smrg	uint8_t             condition                : 1;
245848b8605Smrg	instr_addr_mode_t   address_mode             : 1;
246848b8605Smrg	instr_cf_opc_t      opc                      : 4;
247848b8605Smrg} instr_cf_jmp_call_t;
248848b8605Smrg
249848b8605Smrgtypedef struct PACKED {
250848b8605Smrg	uint8_t             size                     : 4;
251848b8605Smrg	uint64_t            reserved0                : 36;
252848b8605Smrg	uint8_t             no_serial                : 1;
253848b8605Smrg	instr_alloc_type_t  buffer_select            : 2;
254848b8605Smrg	uint8_t             alloc_mode               : 1;
255848b8605Smrg	instr_cf_opc_t      opc                      : 4;
256848b8605Smrg} instr_cf_alloc_t;
257848b8605Smrg
258848b8605Smrgtypedef union PACKED {
259848b8605Smrg	instr_cf_exec_t     exec;
260848b8605Smrg	instr_cf_loop_t     loop;
261848b8605Smrg	instr_cf_jmp_call_t jmp_call;
262848b8605Smrg	instr_cf_alloc_t    alloc;
263848b8605Smrg	struct PACKED {
264848b8605Smrg		uint64_t        dummy                    : 44;
265848b8605Smrg		instr_cf_opc_t  opc                      : 4;
266848b8605Smrg	};
267848b8605Smrg} instr_cf_t;
268848b8605Smrg
269848b8605Smrg
270848b8605Smrg
271848b8605Smrg/*
272848b8605Smrg * FETCH instructions:
273848b8605Smrg */
274848b8605Smrg
275848b8605Smrgtypedef enum {
276848b8605Smrg	VTX_FETCH = 0,
277848b8605Smrg	TEX_FETCH = 1,
278848b8605Smrg	TEX_GET_BORDER_COLOR_FRAC = 16,
279848b8605Smrg	TEX_GET_COMP_TEX_LOD = 17,
280848b8605Smrg	TEX_GET_GRADIENTS = 18,
281848b8605Smrg	TEX_GET_WEIGHTS = 19,
282848b8605Smrg	TEX_SET_TEX_LOD = 24,
283848b8605Smrg	TEX_SET_GRADIENTS_H = 25,
284848b8605Smrg	TEX_SET_GRADIENTS_V = 26,
285848b8605Smrg	TEX_RESERVED_4 = 27,
286848b8605Smrg} instr_fetch_opc_t;
287848b8605Smrg
288848b8605Smrgtypedef enum {
289848b8605Smrg	TEX_FILTER_POINT = 0,
290848b8605Smrg	TEX_FILTER_LINEAR = 1,
291848b8605Smrg	TEX_FILTER_BASEMAP = 2,            /* only applicable for mip-filter */
292848b8605Smrg	TEX_FILTER_USE_FETCH_CONST = 3,
293848b8605Smrg} instr_tex_filter_t;
294848b8605Smrg
295848b8605Smrgtypedef enum {
296848b8605Smrg	ANISO_FILTER_DISABLED = 0,
297848b8605Smrg	ANISO_FILTER_MAX_1_1 = 1,
298848b8605Smrg	ANISO_FILTER_MAX_2_1 = 2,
299848b8605Smrg	ANISO_FILTER_MAX_4_1 = 3,
300848b8605Smrg	ANISO_FILTER_MAX_8_1 = 4,
301848b8605Smrg	ANISO_FILTER_MAX_16_1 = 5,
302848b8605Smrg	ANISO_FILTER_USE_FETCH_CONST = 7,
303848b8605Smrg} instr_aniso_filter_t;
304848b8605Smrg
305848b8605Smrgtypedef enum {
306848b8605Smrg	ARBITRARY_FILTER_2X4_SYM = 0,
307848b8605Smrg	ARBITRARY_FILTER_2X4_ASYM = 1,
308848b8605Smrg	ARBITRARY_FILTER_4X2_SYM = 2,
309848b8605Smrg	ARBITRARY_FILTER_4X2_ASYM = 3,
310848b8605Smrg	ARBITRARY_FILTER_4X4_SYM = 4,
311848b8605Smrg	ARBITRARY_FILTER_4X4_ASYM = 5,
312848b8605Smrg	ARBITRARY_FILTER_USE_FETCH_CONST = 7,
313848b8605Smrg} instr_arbitrary_filter_t;
314848b8605Smrg
315848b8605Smrgtypedef enum {
316848b8605Smrg	SAMPLE_CENTROID = 0,
317848b8605Smrg	SAMPLE_CENTER = 1,
318848b8605Smrg} instr_sample_loc_t;
319848b8605Smrg
320848b8605Smrgtypedef enum a2xx_sq_surfaceformat instr_surf_fmt_t;
321848b8605Smrg
322848b8605Smrgtypedef struct PACKED {
323848b8605Smrg	/* dword0: */
324848b8605Smrg	instr_fetch_opc_t   opc                      : 5;
325848b8605Smrg	uint8_t             src_reg                  : 6;
326848b8605Smrg	uint8_t             src_reg_am               : 1;
327848b8605Smrg	uint8_t             dst_reg                  : 6;
328848b8605Smrg	uint8_t             dst_reg_am               : 1;
329848b8605Smrg	uint8_t             fetch_valid_only         : 1;
330848b8605Smrg	uint8_t             const_idx                : 5;
331848b8605Smrg	uint8_t             tx_coord_denorm          : 1;
332848b8605Smrg	uint8_t             src_swiz                 : 6;
333848b8605Smrg	/* dword1: */
334848b8605Smrg	uint16_t            dst_swiz                 : 12;
335848b8605Smrg	instr_tex_filter_t  mag_filter               : 2;
336848b8605Smrg	instr_tex_filter_t  min_filter               : 2;
337848b8605Smrg	instr_tex_filter_t  mip_filter               : 2;
338848b8605Smrg	instr_aniso_filter_t aniso_filter            : 3;
339848b8605Smrg	instr_arbitrary_filter_t arbitrary_filter    : 3;
340848b8605Smrg	instr_tex_filter_t  vol_mag_filter           : 2;
341848b8605Smrg	instr_tex_filter_t  vol_min_filter           : 2;
342848b8605Smrg	uint8_t             use_comp_lod             : 1;
343848b8605Smrg	uint8_t             use_reg_lod              : 2;  /* 0 for cube, 1 for 2d */
344848b8605Smrg	uint8_t             pred_select              : 1;
345848b8605Smrg	/* dword2: */
346848b8605Smrg	uint8_t             use_reg_gradients        : 1;
347848b8605Smrg	instr_sample_loc_t  sample_location          : 1;
348848b8605Smrg	uint8_t             lod_bias                 : 7;
349848b8605Smrg	uint8_t             unused                   : 7;
350848b8605Smrg	uint8_t             offset_x                 : 5;
351848b8605Smrg	uint8_t             offset_y                 : 5;
352848b8605Smrg	uint8_t             offset_z                 : 5;
353848b8605Smrg	uint8_t             pred_condition           : 1;
354848b8605Smrg} instr_fetch_tex_t;
355848b8605Smrg
356848b8605Smrgtypedef struct PACKED {
357848b8605Smrg	/* dword0: */
358848b8605Smrg	instr_fetch_opc_t   opc                      : 5;
359848b8605Smrg	uint8_t             src_reg                  : 6;
360848b8605Smrg	uint8_t             src_reg_am               : 1;
361848b8605Smrg	uint8_t             dst_reg                  : 6;
362848b8605Smrg	uint8_t             dst_reg_am               : 1;
363848b8605Smrg	uint8_t             must_be_one              : 1;
364848b8605Smrg	uint8_t             const_index              : 5;
365848b8605Smrg	uint8_t             const_index_sel          : 2;
366848b8605Smrg	uint8_t             reserved0                : 3;
367848b8605Smrg	uint8_t             src_swiz                 : 2;
368848b8605Smrg	/* dword1: */
369848b8605Smrg	uint16_t            dst_swiz                 : 12;
370848b8605Smrg	uint8_t             format_comp_all          : 1;   /* '1' for signed, '0' for unsigned? */
371848b8605Smrg	uint8_t             num_format_all           : 1;   /* '0' for normalized, '1' for unnormalized */
372848b8605Smrg	uint8_t             signed_rf_mode_all       : 1;
373848b8605Smrg	uint8_t             reserved1                : 1;
374848b8605Smrg	instr_surf_fmt_t    format                   : 6;
375848b8605Smrg	uint8_t             reserved2                : 1;
376848b8605Smrg	uint8_t             exp_adjust_all           : 7;
377848b8605Smrg	uint8_t             reserved3                : 1;
378848b8605Smrg	uint8_t             pred_select              : 1;
379848b8605Smrg	/* dword2: */
380848b8605Smrg	uint8_t             stride                   : 8;
381b8e80941Smrg	uint32_t            offset                   : 22;
382b8e80941Smrg	uint8_t             reserved4                : 1;
383848b8605Smrg	uint8_t             pred_condition           : 1;
384848b8605Smrg} instr_fetch_vtx_t;
385848b8605Smrg
386848b8605Smrgtypedef union PACKED {
387848b8605Smrg	instr_fetch_tex_t   tex;
388848b8605Smrg	instr_fetch_vtx_t   vtx;
389848b8605Smrg	struct PACKED {
390848b8605Smrg		/* dword0: */
391848b8605Smrg		instr_fetch_opc_t opc                    : 5;
392848b8605Smrg		uint32_t        dummy0                   : 27;
393848b8605Smrg		/* dword1: */
394b8e80941Smrg		uint32_t        dummy1                   : 31;
395b8e80941Smrg		uint8_t         pred_select              : 1;
396848b8605Smrg		/* dword2: */
397b8e80941Smrg		uint32_t        dummy2                   : 31;
398b8e80941Smrg		uint8_t         pred_condition           : 1;
399848b8605Smrg	};
400848b8605Smrg} instr_fetch_t;
401848b8605Smrg
402b8e80941Smrgtypedef union PACKED {
403b8e80941Smrg	instr_alu_t alu;
404b8e80941Smrg	instr_fetch_t fetch;
405b8e80941Smrg} instr_t;
406b8e80941Smrg
407848b8605Smrg#endif /* INSTR_H_ */
408