1b8e80941Smrg/*
2b8e80941Smrg * Copyright (C) 2017 Rob Clark <robclark@freedesktop.org>
3b8e80941Smrg *
4b8e80941Smrg * Permission is hereby granted, free of charge, to any person obtaining a
5b8e80941Smrg * copy of this software and associated documentation files (the "Software"),
6b8e80941Smrg * to deal in the Software without restriction, including without limitation
7b8e80941Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8b8e80941Smrg * and/or sell copies of the Software, and to permit persons to whom the
9b8e80941Smrg * Software is furnished to do so, subject to the following conditions:
10b8e80941Smrg *
11b8e80941Smrg * The above copyright notice and this permission notice (including the next
12b8e80941Smrg * paragraph) shall be included in all copies or substantial portions of the
13b8e80941Smrg * Software.
14b8e80941Smrg *
15b8e80941Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16b8e80941Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17b8e80941Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18b8e80941Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19b8e80941Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20b8e80941Smrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21b8e80941Smrg * SOFTWARE.
22b8e80941Smrg *
23b8e80941Smrg * Authors:
24b8e80941Smrg *    Rob Clark <robclark@freedesktop.org>
25b8e80941Smrg */
26b8e80941Smrg
27b8e80941Smrg#include "util/u_blitter.h"
28b8e80941Smrg#include "util/u_surface.h"
29b8e80941Smrg
30b8e80941Smrg#include "freedreno_blitter.h"
31b8e80941Smrg#include "freedreno_context.h"
32b8e80941Smrg#include "freedreno_resource.h"
33b8e80941Smrg#include "freedreno_fence.h"
34b8e80941Smrg
35b8e80941Smrg/* generic blit using u_blitter.. slightly modified version of util_blitter_blit
36b8e80941Smrg * which also handles PIPE_BUFFER:
37b8e80941Smrg */
38b8e80941Smrg
39b8e80941Smrgstatic void
40b8e80941Smrgdefault_dst_texture(struct pipe_surface *dst_templ, struct pipe_resource *dst,
41b8e80941Smrg		unsigned dstlevel, unsigned dstz)
42b8e80941Smrg{
43b8e80941Smrg	memset(dst_templ, 0, sizeof(*dst_templ));
44b8e80941Smrg	if (dst->target == PIPE_BUFFER)
45b8e80941Smrg		dst_templ->format = PIPE_FORMAT_R8_UINT;
46b8e80941Smrg	else
47b8e80941Smrg		dst_templ->format = util_format_linear(dst->format);
48b8e80941Smrg	dst_templ->u.tex.level = dstlevel;
49b8e80941Smrg	dst_templ->u.tex.first_layer = dstz;
50b8e80941Smrg	dst_templ->u.tex.last_layer = dstz;
51b8e80941Smrg}
52b8e80941Smrg
53b8e80941Smrgstatic void
54b8e80941Smrgdefault_src_texture(struct pipe_sampler_view *src_templ,
55b8e80941Smrg		struct pipe_resource *src, unsigned srclevel)
56b8e80941Smrg{
57b8e80941Smrg	bool cube_as_2darray = src->screen->get_param(src->screen,
58b8e80941Smrg			PIPE_CAP_SAMPLER_VIEW_TARGET);
59b8e80941Smrg
60b8e80941Smrg	memset(src_templ, 0, sizeof(*src_templ));
61b8e80941Smrg
62b8e80941Smrg	if (cube_as_2darray && (src->target == PIPE_TEXTURE_CUBE ||
63b8e80941Smrg			src->target == PIPE_TEXTURE_CUBE_ARRAY))
64b8e80941Smrg		src_templ->target = PIPE_TEXTURE_2D_ARRAY;
65b8e80941Smrg	else
66b8e80941Smrg		src_templ->target = src->target;
67b8e80941Smrg
68b8e80941Smrg	if (src->target  == PIPE_BUFFER) {
69b8e80941Smrg		src_templ->target = PIPE_TEXTURE_1D;
70b8e80941Smrg		src_templ->format = PIPE_FORMAT_R8_UINT;
71b8e80941Smrg	} else {
72b8e80941Smrg		src_templ->format = util_format_linear(src->format);
73b8e80941Smrg	}
74b8e80941Smrg	src_templ->u.tex.first_level = srclevel;
75b8e80941Smrg	src_templ->u.tex.last_level = srclevel;
76b8e80941Smrg	src_templ->u.tex.first_layer = 0;
77b8e80941Smrg	src_templ->u.tex.last_layer =
78b8e80941Smrg			src->target == PIPE_TEXTURE_3D ? u_minify(src->depth0, srclevel) - 1
79b8e80941Smrg					: (unsigned)(src->array_size - 1);
80b8e80941Smrg	src_templ->swizzle_r = PIPE_SWIZZLE_X;
81b8e80941Smrg	src_templ->swizzle_g = PIPE_SWIZZLE_Y;
82b8e80941Smrg	src_templ->swizzle_b = PIPE_SWIZZLE_Z;
83b8e80941Smrg	src_templ->swizzle_a = PIPE_SWIZZLE_W;
84b8e80941Smrg}
85b8e80941Smrg
86b8e80941Smrgstatic void
87b8e80941Smrgfd_blitter_pipe_begin(struct fd_context *ctx, bool render_cond, bool discard,
88b8e80941Smrg		enum fd_render_stage stage)
89b8e80941Smrg{
90b8e80941Smrg	fd_fence_ref(ctx->base.screen, &ctx->last_fence, NULL);
91b8e80941Smrg
92b8e80941Smrg	util_blitter_save_fragment_constant_buffer_slot(ctx->blitter,
93b8e80941Smrg			ctx->constbuf[PIPE_SHADER_FRAGMENT].cb);
94b8e80941Smrg	util_blitter_save_vertex_buffer_slot(ctx->blitter, ctx->vtx.vertexbuf.vb);
95b8e80941Smrg	util_blitter_save_vertex_elements(ctx->blitter, ctx->vtx.vtx);
96b8e80941Smrg	util_blitter_save_vertex_shader(ctx->blitter, ctx->prog.vp);
97b8e80941Smrg	util_blitter_save_so_targets(ctx->blitter, ctx->streamout.num_targets,
98b8e80941Smrg			ctx->streamout.targets);
99b8e80941Smrg	util_blitter_save_rasterizer(ctx->blitter, ctx->rasterizer);
100b8e80941Smrg	util_blitter_save_viewport(ctx->blitter, &ctx->viewport);
101b8e80941Smrg	util_blitter_save_scissor(ctx->blitter, &ctx->scissor);
102b8e80941Smrg	util_blitter_save_fragment_shader(ctx->blitter, ctx->prog.fp);
103b8e80941Smrg	util_blitter_save_blend(ctx->blitter, ctx->blend);
104b8e80941Smrg	util_blitter_save_depth_stencil_alpha(ctx->blitter, ctx->zsa);
105b8e80941Smrg	util_blitter_save_stencil_ref(ctx->blitter, &ctx->stencil_ref);
106b8e80941Smrg	util_blitter_save_sample_mask(ctx->blitter, ctx->sample_mask);
107b8e80941Smrg	util_blitter_save_framebuffer(ctx->blitter, &ctx->framebuffer);
108b8e80941Smrg	util_blitter_save_fragment_sampler_states(ctx->blitter,
109b8e80941Smrg			ctx->tex[PIPE_SHADER_FRAGMENT].num_samplers,
110b8e80941Smrg			(void **)ctx->tex[PIPE_SHADER_FRAGMENT].samplers);
111b8e80941Smrg	util_blitter_save_fragment_sampler_views(ctx->blitter,
112b8e80941Smrg			ctx->tex[PIPE_SHADER_FRAGMENT].num_textures,
113b8e80941Smrg			ctx->tex[PIPE_SHADER_FRAGMENT].textures);
114b8e80941Smrg	if (!render_cond)
115b8e80941Smrg		util_blitter_save_render_condition(ctx->blitter,
116b8e80941Smrg			ctx->cond_query, ctx->cond_cond, ctx->cond_mode);
117b8e80941Smrg
118b8e80941Smrg	if (ctx->batch)
119b8e80941Smrg		fd_batch_set_stage(ctx->batch, stage);
120b8e80941Smrg
121b8e80941Smrg	ctx->in_blit = discard;
122b8e80941Smrg}
123b8e80941Smrg
124b8e80941Smrgstatic void
125b8e80941Smrgfd_blitter_pipe_end(struct fd_context *ctx)
126b8e80941Smrg{
127b8e80941Smrg	if (ctx->batch)
128b8e80941Smrg		fd_batch_set_stage(ctx->batch, FD_STAGE_NULL);
129b8e80941Smrg	ctx->in_blit = false;
130b8e80941Smrg}
131b8e80941Smrg
132b8e80941Smrgbool
133b8e80941Smrgfd_blitter_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
134b8e80941Smrg{
135b8e80941Smrg	struct pipe_resource *dst = info->dst.resource;
136b8e80941Smrg	struct pipe_resource *src = info->src.resource;
137b8e80941Smrg	struct pipe_context *pipe = &ctx->base;
138b8e80941Smrg	struct pipe_surface *dst_view, dst_templ;
139b8e80941Smrg	struct pipe_sampler_view src_templ, *src_view;
140b8e80941Smrg	bool discard = false;
141b8e80941Smrg
142b8e80941Smrg	if (!info->scissor_enable && !info->alpha_blend) {
143b8e80941Smrg		discard = util_texrange_covers_whole_level(info->dst.resource,
144b8e80941Smrg				info->dst.level, info->dst.box.x, info->dst.box.y,
145b8e80941Smrg				info->dst.box.z, info->dst.box.width,
146b8e80941Smrg				info->dst.box.height, info->dst.box.depth);
147b8e80941Smrg	}
148b8e80941Smrg
149b8e80941Smrg	fd_blitter_pipe_begin(ctx, info->render_condition_enable, discard, FD_STAGE_BLIT);
150b8e80941Smrg
151b8e80941Smrg	/* Initialize the surface. */
152b8e80941Smrg	default_dst_texture(&dst_templ, dst, info->dst.level,
153b8e80941Smrg			info->dst.box.z);
154b8e80941Smrg	dst_templ.format = info->dst.format;
155b8e80941Smrg	dst_view = pipe->create_surface(pipe, dst, &dst_templ);
156b8e80941Smrg
157b8e80941Smrg	/* Initialize the sampler view. */
158b8e80941Smrg	default_src_texture(&src_templ, src, info->src.level);
159b8e80941Smrg	src_templ.format = info->src.format;
160b8e80941Smrg	src_view = pipe->create_sampler_view(pipe, src, &src_templ);
161b8e80941Smrg
162b8e80941Smrg	/* Copy. */
163b8e80941Smrg	util_blitter_blit_generic(ctx->blitter, dst_view, &info->dst.box,
164b8e80941Smrg			src_view, &info->src.box, src->width0, src->height0,
165b8e80941Smrg			info->mask, info->filter,
166b8e80941Smrg			info->scissor_enable ? &info->scissor : NULL,
167b8e80941Smrg			info->alpha_blend);
168b8e80941Smrg
169b8e80941Smrg	pipe_surface_reference(&dst_view, NULL);
170b8e80941Smrg	pipe_sampler_view_reference(&src_view, NULL);
171b8e80941Smrg
172b8e80941Smrg	fd_blitter_pipe_end(ctx);
173b8e80941Smrg
174b8e80941Smrg	/* The fallback blitter must never fail: */
175b8e80941Smrg	return true;
176b8e80941Smrg}
177b8e80941Smrg
178b8e80941Smrg/* Generic clear implementation (partially) using u_blitter: */
179b8e80941Smrgvoid
180b8e80941Smrgfd_blitter_clear(struct pipe_context *pctx, unsigned buffers,
181b8e80941Smrg		const union pipe_color_union *color, double depth, unsigned stencil)
182b8e80941Smrg{
183b8e80941Smrg	struct fd_context *ctx = fd_context(pctx);
184b8e80941Smrg	struct pipe_framebuffer_state *pfb = &ctx->batch->framebuffer;
185b8e80941Smrg	struct blitter_context *blitter = ctx->blitter;
186b8e80941Smrg
187b8e80941Smrg	fd_blitter_pipe_begin(ctx, false, true, FD_STAGE_CLEAR);
188b8e80941Smrg
189b8e80941Smrg	util_blitter_common_clear_setup(blitter, pfb->width, pfb->height,
190b8e80941Smrg			buffers, NULL, NULL);
191b8e80941Smrg
192b8e80941Smrg	struct pipe_stencil_ref sr = {
193b8e80941Smrg		.ref_value = { stencil & 0xff }
194b8e80941Smrg	};
195b8e80941Smrg	pctx->set_stencil_ref(pctx, &sr);
196b8e80941Smrg
197b8e80941Smrg	struct pipe_constant_buffer cb = {
198b8e80941Smrg		.buffer_size = 16,
199b8e80941Smrg		.user_buffer = &color->ui,
200b8e80941Smrg	};
201b8e80941Smrg	pctx->set_constant_buffer(pctx, PIPE_SHADER_FRAGMENT, 0, &cb);
202b8e80941Smrg
203b8e80941Smrg	if (!ctx->clear_rs_state) {
204b8e80941Smrg		const struct pipe_rasterizer_state tmpl = {
205b8e80941Smrg			.cull_face = PIPE_FACE_NONE,
206b8e80941Smrg			.half_pixel_center = 1,
207b8e80941Smrg			.bottom_edge_rule = 1,
208b8e80941Smrg			.flatshade = 1,
209b8e80941Smrg			.depth_clip_near = 1,
210b8e80941Smrg			.depth_clip_far = 1,
211b8e80941Smrg		};
212b8e80941Smrg		ctx->clear_rs_state = pctx->create_rasterizer_state(pctx, &tmpl);
213b8e80941Smrg	}
214b8e80941Smrg	pctx->bind_rasterizer_state(pctx, ctx->clear_rs_state);
215b8e80941Smrg
216b8e80941Smrg	struct pipe_viewport_state vp = {
217b8e80941Smrg		.scale     = { 0.5f * pfb->width, -0.5f * pfb->height, depth },
218b8e80941Smrg		.translate = { 0.5f * pfb->width,  0.5f * pfb->height, 0.0f },
219b8e80941Smrg	};
220b8e80941Smrg	pctx->set_viewport_states(pctx, 0, 1, &vp);
221b8e80941Smrg
222b8e80941Smrg	pctx->bind_vertex_elements_state(pctx, ctx->solid_vbuf_state.vtx);
223b8e80941Smrg	pctx->set_vertex_buffers(pctx, blitter->vb_slot, 1,
224b8e80941Smrg			&ctx->solid_vbuf_state.vertexbuf.vb[0]);
225b8e80941Smrg	pctx->set_stream_output_targets(pctx, 0, NULL, NULL);
226b8e80941Smrg	pctx->bind_vs_state(pctx, ctx->solid_prog.vp);
227b8e80941Smrg	pctx->bind_fs_state(pctx, ctx->solid_prog.fp);
228b8e80941Smrg
229b8e80941Smrg	struct pipe_draw_info info = {
230b8e80941Smrg		.mode = PIPE_PRIM_MAX,    /* maps to DI_PT_RECTLIST */
231b8e80941Smrg		.count = 2,
232b8e80941Smrg		.max_index = 1,
233b8e80941Smrg		.instance_count = 1,
234b8e80941Smrg	};
235b8e80941Smrg	ctx->draw_vbo(ctx, &info, 0);
236b8e80941Smrg
237b8e80941Smrg	util_blitter_restore_constant_buffer_state(blitter);
238b8e80941Smrg	util_blitter_restore_vertex_states(blitter);
239b8e80941Smrg	util_blitter_restore_fragment_states(blitter);
240b8e80941Smrg	util_blitter_restore_textures(blitter);
241b8e80941Smrg	util_blitter_restore_fb_state(blitter);
242b8e80941Smrg	util_blitter_restore_render_cond(blitter);
243b8e80941Smrg	util_blitter_unset_running_flag(blitter);
244b8e80941Smrg
245b8e80941Smrg	fd_blitter_pipe_end(ctx);
246b8e80941Smrg}
247b8e80941Smrg
248b8e80941Smrg/**
249b8e80941Smrg * Optimal hardware path for blitting pixels.
250b8e80941Smrg * Scaling, format conversion, up- and downsampling (resolve) are allowed.
251b8e80941Smrg */
252b8e80941Smrgbool
253b8e80941Smrgfd_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info)
254b8e80941Smrg{
255b8e80941Smrg	struct fd_context *ctx = fd_context(pctx);
256b8e80941Smrg	struct pipe_blit_info info = *blit_info;
257b8e80941Smrg
258b8e80941Smrg	if (info.render_condition_enable && !fd_render_condition_check(pctx))
259b8e80941Smrg		return true;
260b8e80941Smrg
261b8e80941Smrg	if (ctx->blit && ctx->blit(ctx, &info))
262b8e80941Smrg		return true;
263b8e80941Smrg
264b8e80941Smrg	if (info.mask & PIPE_MASK_S) {
265b8e80941Smrg		DBG("cannot blit stencil, skipping");
266b8e80941Smrg		info.mask &= ~PIPE_MASK_S;
267b8e80941Smrg	}
268b8e80941Smrg
269b8e80941Smrg	if (!util_blitter_is_blit_supported(ctx->blitter, &info)) {
270b8e80941Smrg		DBG("blit unsupported %s -> %s",
271b8e80941Smrg				util_format_short_name(info.src.resource->format),
272b8e80941Smrg				util_format_short_name(info.dst.resource->format));
273b8e80941Smrg		return false;
274b8e80941Smrg	}
275b8e80941Smrg
276b8e80941Smrg	return fd_blitter_blit(ctx, &info);
277b8e80941Smrg}
278b8e80941Smrg
279b8e80941Smrg/**
280b8e80941Smrg * _copy_region using pipe (3d engine)
281b8e80941Smrg */
282b8e80941Smrgstatic bool
283b8e80941Smrgfd_blitter_pipe_copy_region(struct fd_context *ctx,
284b8e80941Smrg		struct pipe_resource *dst,
285b8e80941Smrg		unsigned dst_level,
286b8e80941Smrg		unsigned dstx, unsigned dsty, unsigned dstz,
287b8e80941Smrg		struct pipe_resource *src,
288b8e80941Smrg		unsigned src_level,
289b8e80941Smrg		const struct pipe_box *src_box)
290b8e80941Smrg{
291b8e80941Smrg	/* not until we allow rendertargets to be buffers */
292b8e80941Smrg	if (dst->target == PIPE_BUFFER || src->target == PIPE_BUFFER)
293b8e80941Smrg		return false;
294b8e80941Smrg
295b8e80941Smrg	if (!util_blitter_is_copy_supported(ctx->blitter, dst, src))
296b8e80941Smrg		return false;
297b8e80941Smrg
298b8e80941Smrg	/* TODO we could discard if dst box covers dst level fully.. */
299b8e80941Smrg	fd_blitter_pipe_begin(ctx, false, false, FD_STAGE_BLIT);
300b8e80941Smrg	util_blitter_copy_texture(ctx->blitter,
301b8e80941Smrg			dst, dst_level, dstx, dsty, dstz,
302b8e80941Smrg			src, src_level, src_box);
303b8e80941Smrg	fd_blitter_pipe_end(ctx);
304b8e80941Smrg
305b8e80941Smrg	return true;
306b8e80941Smrg}
307b8e80941Smrg
308b8e80941Smrg/**
309b8e80941Smrg * Copy a block of pixels from one resource to another.
310b8e80941Smrg * The resource must be of the same format.
311b8e80941Smrg */
312b8e80941Smrgvoid
313b8e80941Smrgfd_resource_copy_region(struct pipe_context *pctx,
314b8e80941Smrg		struct pipe_resource *dst,
315b8e80941Smrg		unsigned dst_level,
316b8e80941Smrg		unsigned dstx, unsigned dsty, unsigned dstz,
317b8e80941Smrg		struct pipe_resource *src,
318b8e80941Smrg		unsigned src_level,
319b8e80941Smrg		const struct pipe_box *src_box)
320b8e80941Smrg{
321b8e80941Smrg	struct fd_context *ctx = fd_context(pctx);
322b8e80941Smrg
323b8e80941Smrg	if (ctx->blit) {
324b8e80941Smrg		struct pipe_blit_info info;
325b8e80941Smrg
326b8e80941Smrg		memset(&info, 0, sizeof info);
327b8e80941Smrg		info.dst.resource = dst;
328b8e80941Smrg		info.dst.level = dst_level;
329b8e80941Smrg		info.dst.box.x = dstx;
330b8e80941Smrg		info.dst.box.y = dsty;
331b8e80941Smrg		info.dst.box.z = dstz;
332b8e80941Smrg		info.dst.box.width = src_box->width;
333b8e80941Smrg		info.dst.box.height = src_box->height;
334b8e80941Smrg		assert(info.dst.box.width >= 0);
335b8e80941Smrg		assert(info.dst.box.height >= 0);
336b8e80941Smrg		info.dst.box.depth = 1;
337b8e80941Smrg		info.dst.format = dst->format;
338b8e80941Smrg		info.src.resource = src;
339b8e80941Smrg		info.src.level = src_level;
340b8e80941Smrg		info.src.box = *src_box;
341b8e80941Smrg		info.src.format = src->format;
342b8e80941Smrg		info.mask = util_format_get_mask(src->format);
343b8e80941Smrg		info.filter = PIPE_TEX_FILTER_NEAREST;
344b8e80941Smrg		info.scissor_enable = 0;
345b8e80941Smrg
346b8e80941Smrg		if (ctx->blit(ctx, &info))
347b8e80941Smrg			return;
348b8e80941Smrg	}
349b8e80941Smrg
350b8e80941Smrg	/* TODO if we have 2d core, or other DMA engine that could be used
351b8e80941Smrg	 * for simple copies and reasonably easily synchronized with the 3d
352b8e80941Smrg	 * core, this is where we'd plug it in..
353b8e80941Smrg	 */
354b8e80941Smrg
355b8e80941Smrg	/* try blit on 3d pipe: */
356b8e80941Smrg	if (fd_blitter_pipe_copy_region(ctx,
357b8e80941Smrg			dst, dst_level, dstx, dsty, dstz,
358b8e80941Smrg			src, src_level, src_box))
359b8e80941Smrg		return;
360b8e80941Smrg
361b8e80941Smrg	/* else fallback to pure sw: */
362b8e80941Smrg	util_resource_copy_region(pctx,
363b8e80941Smrg			dst, dst_level, dstx, dsty, dstz,
364b8e80941Smrg			src, src_level, src_box);
365b8e80941Smrg}
366