1848b8605Smrg/* 2848b8605Smrg * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org> 3848b8605Smrg * 4848b8605Smrg * Permission is hereby granted, free of charge, to any person obtaining a 5848b8605Smrg * copy of this software and associated documentation files (the "Software"), 6848b8605Smrg * to deal in the Software without restriction, including without limitation 7848b8605Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8848b8605Smrg * and/or sell copies of the Software, and to permit persons to whom the 9848b8605Smrg * Software is furnished to do so, subject to the following conditions: 10848b8605Smrg * 11848b8605Smrg * The above copyright notice and this permission notice (including the next 12848b8605Smrg * paragraph) shall be included in all copies or substantial portions of the 13848b8605Smrg * Software. 14848b8605Smrg * 15848b8605Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16848b8605Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17848b8605Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18848b8605Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19848b8605Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20848b8605Smrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21848b8605Smrg * SOFTWARE. 22848b8605Smrg * 23848b8605Smrg * Authors: 24848b8605Smrg * Rob Clark <robclark@freedesktop.org> 25848b8605Smrg */ 26848b8605Smrg 27848b8605Smrg#ifndef FREEDRENO_GMEM_H_ 28848b8605Smrg#define FREEDRENO_GMEM_H_ 29848b8605Smrg 30848b8605Smrg#include "pipe/p_context.h" 31848b8605Smrg 32b8e80941Smrg#include "freedreno_util.h" 33b8e80941Smrg 34848b8605Smrg/* per-pipe configuration for hw binning: */ 35848b8605Smrgstruct fd_vsc_pipe { 36b8e80941Smrg // TODO a3xx/a4xx/a5xx could probably move to single bo for vsc stream, like a6xx does 37848b8605Smrg struct fd_bo *bo; 38848b8605Smrg uint8_t x, y, w, h; /* VSC_PIPE[p].CONFIG */ 39848b8605Smrg}; 40848b8605Smrg 41848b8605Smrg/* per-tile configuration for hw binning: */ 42848b8605Smrgstruct fd_tile { 43848b8605Smrg uint8_t p; /* index into vsc_pipe[]s */ 44848b8605Smrg uint8_t n; /* slot within pipe */ 45848b8605Smrg uint16_t bin_w, bin_h; 46848b8605Smrg uint16_t xoff, yoff; 47848b8605Smrg}; 48848b8605Smrg 49848b8605Smrgstruct fd_gmem_stateobj { 50848b8605Smrg struct pipe_scissor_state scissor; 51b8e80941Smrg uint32_t cbuf_base[MAX_RENDER_TARGETS]; 52b8e80941Smrg uint32_t zsbuf_base[2]; 53b8e80941Smrg uint8_t cbuf_cpp[MAX_RENDER_TARGETS]; 54b8e80941Smrg uint8_t zsbuf_cpp[2]; 55848b8605Smrg uint16_t bin_h, nbins_y; 56848b8605Smrg uint16_t bin_w, nbins_x; 57848b8605Smrg uint16_t minx, miny; 58848b8605Smrg uint16_t width, height; 59b8e80941Smrg uint16_t maxpw, maxph; /* maximum pipe width/height */ 60b8e80941Smrg uint8_t num_vsc_pipes; /* number of pipes for a20x */ 61848b8605Smrg}; 62848b8605Smrg 63b8e80941Smrgstruct fd_batch; 64848b8605Smrg 65b8e80941Smrgvoid fd_gmem_render_tiles(struct fd_batch *batch); 66848b8605Smrg 67b8e80941Smrgbool fd_gmem_needs_restore(struct fd_batch *batch, struct fd_tile *tile, 68848b8605Smrg uint32_t buffers); 69848b8605Smrg 70848b8605Smrg#endif /* FREEDRENO_GMEM_H_ */ 71