freedreno_resource.c revision b8e80941
1/*
2 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 *    Rob Clark <robclark@freedesktop.org>
25 */
26
27#include "util/u_format.h"
28#include "util/u_format_rgtc.h"
29#include "util/u_format_zs.h"
30#include "util/u_inlines.h"
31#include "util/u_transfer.h"
32#include "util/u_string.h"
33#include "util/u_surface.h"
34#include "util/set.h"
35#include "util/u_drm.h"
36
37#include "freedreno_resource.h"
38#include "freedreno_batch_cache.h"
39#include "freedreno_blitter.h"
40#include "freedreno_fence.h"
41#include "freedreno_screen.h"
42#include "freedreno_surface.h"
43#include "freedreno_context.h"
44#include "freedreno_query_hw.h"
45#include "freedreno_util.h"
46
47#include "drm-uapi/drm_fourcc.h"
48#include <errno.h>
49
50/* XXX this should go away, needed for 'struct winsys_handle' */
51#include "state_tracker/drm_driver.h"
52
53/**
54 * Go through the entire state and see if the resource is bound
55 * anywhere. If it is, mark the relevant state as dirty. This is
56 * called on realloc_bo to ensure the neccessary state is re-
57 * emitted so the GPU looks at the new backing bo.
58 */
59static void
60rebind_resource(struct fd_context *ctx, struct pipe_resource *prsc)
61{
62	/* VBOs */
63	for (unsigned i = 0; i < ctx->vtx.vertexbuf.count && !(ctx->dirty & FD_DIRTY_VTXBUF); i++) {
64		if (ctx->vtx.vertexbuf.vb[i].buffer.resource == prsc)
65			ctx->dirty |= FD_DIRTY_VTXBUF;
66	}
67
68	/* per-shader-stage resources: */
69	for (unsigned stage = 0; stage < PIPE_SHADER_TYPES; stage++) {
70		/* Constbufs.. note that constbuf[0] is normal uniforms emitted in
71		 * cmdstream rather than by pointer..
72		 */
73		const unsigned num_ubos = util_last_bit(ctx->constbuf[stage].enabled_mask);
74		for (unsigned i = 1; i < num_ubos; i++) {
75			if (ctx->dirty_shader[stage] & FD_DIRTY_SHADER_CONST)
76				break;
77			if (ctx->constbuf[stage].cb[i].buffer == prsc)
78				ctx->dirty_shader[stage] |= FD_DIRTY_SHADER_CONST;
79		}
80
81		/* Textures */
82		for (unsigned i = 0; i < ctx->tex[stage].num_textures; i++) {
83			if (ctx->dirty_shader[stage] & FD_DIRTY_SHADER_TEX)
84				break;
85			if (ctx->tex[stage].textures[i] && (ctx->tex[stage].textures[i]->texture == prsc))
86				ctx->dirty_shader[stage] |= FD_DIRTY_SHADER_TEX;
87		}
88
89		/* SSBOs */
90		const unsigned num_ssbos = util_last_bit(ctx->shaderbuf[stage].enabled_mask);
91		for (unsigned i = 0; i < num_ssbos; i++) {
92			if (ctx->dirty_shader[stage] & FD_DIRTY_SHADER_SSBO)
93				break;
94			if (ctx->shaderbuf[stage].sb[i].buffer == prsc)
95				ctx->dirty_shader[stage] |= FD_DIRTY_SHADER_SSBO;
96		}
97	}
98}
99
100static void
101realloc_bo(struct fd_resource *rsc, uint32_t size)
102{
103	struct pipe_resource *prsc = &rsc->base;
104	struct fd_screen *screen = fd_screen(rsc->base.screen);
105	uint32_t flags = DRM_FREEDRENO_GEM_CACHE_WCOMBINE |
106			DRM_FREEDRENO_GEM_TYPE_KMEM |
107			COND(prsc->bind & PIPE_BIND_SCANOUT, DRM_FREEDRENO_GEM_SCANOUT);
108			/* TODO other flags? */
109
110	/* if we start using things other than write-combine,
111	 * be sure to check for PIPE_RESOURCE_FLAG_MAP_COHERENT
112	 */
113
114	if (rsc->bo)
115		fd_bo_del(rsc->bo);
116
117	rsc->bo = fd_bo_new(screen->dev, size, flags, "%ux%ux%u@%u:%x",
118			prsc->width0, prsc->height0, prsc->depth0, rsc->cpp, prsc->bind);
119	rsc->seqno = p_atomic_inc_return(&screen->rsc_seqno);
120	util_range_set_empty(&rsc->valid_buffer_range);
121	fd_bc_invalidate_resource(rsc, true);
122}
123
124static void
125do_blit(struct fd_context *ctx, const struct pipe_blit_info *blit, bool fallback)
126{
127	struct pipe_context *pctx = &ctx->base;
128
129	/* TODO size threshold too?? */
130	if (fallback || !fd_blit(pctx, blit)) {
131		/* do blit on cpu: */
132		util_resource_copy_region(pctx,
133				blit->dst.resource, blit->dst.level, blit->dst.box.x,
134				blit->dst.box.y, blit->dst.box.z,
135				blit->src.resource, blit->src.level, &blit->src.box);
136	}
137}
138
139static bool
140fd_try_shadow_resource(struct fd_context *ctx, struct fd_resource *rsc,
141		unsigned level, const struct pipe_box *box)
142{
143	struct pipe_context *pctx = &ctx->base;
144	struct pipe_resource *prsc = &rsc->base;
145	bool fallback = false;
146
147	if (prsc->next)
148		return false;
149
150	/* TODO: somehow munge dimensions and format to copy unsupported
151	 * render target format to something that is supported?
152	 */
153	if (!pctx->screen->is_format_supported(pctx->screen,
154			prsc->format, prsc->target, prsc->nr_samples,
155			prsc->nr_storage_samples,
156			PIPE_BIND_RENDER_TARGET))
157		fallback = true;
158
159	/* do shadowing back-blits on the cpu for buffers: */
160	if (prsc->target == PIPE_BUFFER)
161		fallback = true;
162
163	bool whole_level = util_texrange_covers_whole_level(prsc, level,
164		box->x, box->y, box->z, box->width, box->height, box->depth);
165
166	/* TODO need to be more clever about current level */
167	if ((prsc->target >= PIPE_TEXTURE_2D) && !whole_level)
168		return false;
169
170	struct pipe_resource *pshadow =
171		pctx->screen->resource_create(pctx->screen, prsc);
172
173	if (!pshadow)
174		return false;
175
176	assert(!ctx->in_shadow);
177	ctx->in_shadow = true;
178
179	/* get rid of any references that batch-cache might have to us (which
180	 * should empty/destroy rsc->batches hashset)
181	 */
182	fd_bc_invalidate_resource(rsc, false);
183
184	mtx_lock(&ctx->screen->lock);
185
186	/* Swap the backing bo's, so shadow becomes the old buffer,
187	 * blit from shadow to new buffer.  From here on out, we
188	 * cannot fail.
189	 *
190	 * Note that we need to do it in this order, otherwise if
191	 * we go down cpu blit path, the recursive transfer_map()
192	 * sees the wrong status..
193	 */
194	struct fd_resource *shadow = fd_resource(pshadow);
195
196	DBG("shadow: %p (%d) -> %p (%d)\n", rsc, rsc->base.reference.count,
197			shadow, shadow->base.reference.count);
198
199	/* TODO valid_buffer_range?? */
200	swap(rsc->bo,        shadow->bo);
201	swap(rsc->write_batch,   shadow->write_batch);
202	rsc->seqno = p_atomic_inc_return(&ctx->screen->rsc_seqno);
203
204	/* at this point, the newly created shadow buffer is not referenced
205	 * by any batches, but the existing rsc (probably) is.  We need to
206	 * transfer those references over:
207	 */
208	debug_assert(shadow->batch_mask == 0);
209	struct fd_batch *batch;
210	foreach_batch(batch, &ctx->screen->batch_cache, rsc->batch_mask) {
211		struct set_entry *entry = _mesa_set_search(batch->resources, rsc);
212		_mesa_set_remove(batch->resources, entry);
213		_mesa_set_add(batch->resources, shadow);
214	}
215	swap(rsc->batch_mask, shadow->batch_mask);
216
217	mtx_unlock(&ctx->screen->lock);
218
219	struct pipe_blit_info blit = {};
220	blit.dst.resource = prsc;
221	blit.dst.format   = prsc->format;
222	blit.src.resource = pshadow;
223	blit.src.format   = pshadow->format;
224	blit.mask = util_format_get_mask(prsc->format);
225	blit.filter = PIPE_TEX_FILTER_NEAREST;
226
227#define set_box(field, val) do {     \
228		blit.dst.field = (val);      \
229		blit.src.field = (val);      \
230	} while (0)
231
232	/* blit the other levels in their entirety: */
233	for (unsigned l = 0; l <= prsc->last_level; l++) {
234		if (l == level)
235			continue;
236
237		/* just blit whole level: */
238		set_box(level, l);
239		set_box(box.width,  u_minify(prsc->width0, l));
240		set_box(box.height, u_minify(prsc->height0, l));
241		set_box(box.depth,  u_minify(prsc->depth0, l));
242
243		do_blit(ctx, &blit, fallback);
244	}
245
246	/* deal w/ current level specially, since we might need to split
247	 * it up into a couple blits:
248	 */
249	if (!whole_level) {
250		set_box(level, level);
251
252		switch (prsc->target) {
253		case PIPE_BUFFER:
254		case PIPE_TEXTURE_1D:
255			set_box(box.y, 0);
256			set_box(box.z, 0);
257			set_box(box.height, 1);
258			set_box(box.depth, 1);
259
260			if (box->x > 0) {
261				set_box(box.x, 0);
262				set_box(box.width, box->x);
263
264				do_blit(ctx, &blit, fallback);
265			}
266			if ((box->x + box->width) < u_minify(prsc->width0, level)) {
267				set_box(box.x, box->x + box->width);
268				set_box(box.width, u_minify(prsc->width0, level) - (box->x + box->width));
269
270				do_blit(ctx, &blit, fallback);
271			}
272			break;
273		case PIPE_TEXTURE_2D:
274			/* TODO */
275		default:
276			unreachable("TODO");
277		}
278	}
279
280	ctx->in_shadow = false;
281
282	pipe_resource_reference(&pshadow, NULL);
283
284	return true;
285}
286
287static struct fd_resource *
288fd_alloc_staging(struct fd_context *ctx, struct fd_resource *rsc,
289		unsigned level, const struct pipe_box *box)
290{
291	struct pipe_context *pctx = &ctx->base;
292	struct pipe_resource tmpl = rsc->base;
293
294	tmpl.width0  = box->width;
295	tmpl.height0 = box->height;
296	/* for array textures, box->depth is the array_size, otherwise
297	 * for 3d textures, it is the depth:
298	 */
299	if (tmpl.array_size > 1) {
300		tmpl.array_size = box->depth;
301		tmpl.depth0 = 1;
302	} else {
303		tmpl.array_size = 1;
304		tmpl.depth0 = box->depth;
305	}
306	tmpl.last_level = 0;
307	tmpl.bind |= PIPE_BIND_LINEAR;
308
309	struct pipe_resource *pstaging =
310		pctx->screen->resource_create(pctx->screen, &tmpl);
311	if (!pstaging)
312		return NULL;
313
314	return fd_resource(pstaging);
315}
316
317static void
318fd_blit_from_staging(struct fd_context *ctx, struct fd_transfer *trans)
319{
320	struct pipe_resource *dst = trans->base.resource;
321	struct pipe_blit_info blit = {};
322
323	blit.dst.resource = dst;
324	blit.dst.format   = dst->format;
325	blit.dst.level    = trans->base.level;
326	blit.dst.box      = trans->base.box;
327	blit.src.resource = trans->staging_prsc;
328	blit.src.format   = trans->staging_prsc->format;
329	blit.src.level    = 0;
330	blit.src.box      = trans->staging_box;
331	blit.mask = util_format_get_mask(trans->staging_prsc->format);
332	blit.filter = PIPE_TEX_FILTER_NEAREST;
333
334	do_blit(ctx, &blit, false);
335}
336
337static void
338fd_blit_to_staging(struct fd_context *ctx, struct fd_transfer *trans)
339{
340	struct pipe_resource *src = trans->base.resource;
341	struct pipe_blit_info blit = {};
342
343	blit.src.resource = src;
344	blit.src.format   = src->format;
345	blit.src.level    = trans->base.level;
346	blit.src.box      = trans->base.box;
347	blit.dst.resource = trans->staging_prsc;
348	blit.dst.format   = trans->staging_prsc->format;
349	blit.dst.level    = 0;
350	blit.dst.box      = trans->staging_box;
351	blit.mask = util_format_get_mask(trans->staging_prsc->format);
352	blit.filter = PIPE_TEX_FILTER_NEAREST;
353
354	do_blit(ctx, &blit, false);
355}
356
357static void fd_resource_transfer_flush_region(struct pipe_context *pctx,
358		struct pipe_transfer *ptrans,
359		const struct pipe_box *box)
360{
361	struct fd_resource *rsc = fd_resource(ptrans->resource);
362
363	if (ptrans->resource->target == PIPE_BUFFER)
364		util_range_add(&rsc->valid_buffer_range,
365					   ptrans->box.x + box->x,
366					   ptrans->box.x + box->x + box->width);
367}
368
369static void
370flush_resource(struct fd_context *ctx, struct fd_resource *rsc, unsigned usage)
371{
372	struct fd_batch *write_batch = NULL;
373
374	mtx_lock(&ctx->screen->lock);
375	fd_batch_reference_locked(&write_batch, rsc->write_batch);
376	mtx_unlock(&ctx->screen->lock);
377
378	if (usage & PIPE_TRANSFER_WRITE) {
379		struct fd_batch *batch, *batches[32] = {};
380		uint32_t batch_mask;
381
382		/* This is a bit awkward, probably a fd_batch_flush_locked()
383		 * would make things simpler.. but we need to hold the lock
384		 * to iterate the batches which reference this resource.  So
385		 * we must first grab references under a lock, then flush.
386		 */
387		mtx_lock(&ctx->screen->lock);
388		batch_mask = rsc->batch_mask;
389		foreach_batch(batch, &ctx->screen->batch_cache, batch_mask)
390			fd_batch_reference_locked(&batches[batch->idx], batch);
391		mtx_unlock(&ctx->screen->lock);
392
393		foreach_batch(batch, &ctx->screen->batch_cache, batch_mask)
394			fd_batch_flush(batch, false, false);
395
396		foreach_batch(batch, &ctx->screen->batch_cache, batch_mask) {
397			fd_batch_sync(batch);
398			fd_batch_reference(&batches[batch->idx], NULL);
399		}
400		assert(rsc->batch_mask == 0);
401	} else if (write_batch) {
402		fd_batch_flush(write_batch, true, false);
403	}
404
405	fd_batch_reference(&write_batch, NULL);
406
407	assert(!rsc->write_batch);
408}
409
410static void
411fd_flush_resource(struct pipe_context *pctx, struct pipe_resource *prsc)
412{
413	flush_resource(fd_context(pctx), fd_resource(prsc), PIPE_TRANSFER_READ);
414}
415
416static void
417fd_resource_transfer_unmap(struct pipe_context *pctx,
418		struct pipe_transfer *ptrans)
419{
420	struct fd_context *ctx = fd_context(pctx);
421	struct fd_resource *rsc = fd_resource(ptrans->resource);
422	struct fd_transfer *trans = fd_transfer(ptrans);
423
424	if (trans->staging_prsc) {
425		if (ptrans->usage & PIPE_TRANSFER_WRITE)
426			fd_blit_from_staging(ctx, trans);
427		pipe_resource_reference(&trans->staging_prsc, NULL);
428	}
429
430	if (!(ptrans->usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
431		fd_bo_cpu_fini(rsc->bo);
432	}
433
434	util_range_add(&rsc->valid_buffer_range,
435				   ptrans->box.x,
436				   ptrans->box.x + ptrans->box.width);
437
438	pipe_resource_reference(&ptrans->resource, NULL);
439	slab_free(&ctx->transfer_pool, ptrans);
440}
441
442static void *
443fd_resource_transfer_map(struct pipe_context *pctx,
444		struct pipe_resource *prsc,
445		unsigned level, unsigned usage,
446		const struct pipe_box *box,
447		struct pipe_transfer **pptrans)
448{
449	struct fd_context *ctx = fd_context(pctx);
450	struct fd_resource *rsc = fd_resource(prsc);
451	struct fd_resource_slice *slice = fd_resource_slice(rsc, level);
452	struct fd_transfer *trans;
453	struct pipe_transfer *ptrans;
454	enum pipe_format format = prsc->format;
455	uint32_t op = 0;
456	uint32_t offset;
457	char *buf;
458	int ret = 0;
459
460	DBG("prsc=%p, level=%u, usage=%x, box=%dx%d+%d,%d", prsc, level, usage,
461		box->width, box->height, box->x, box->y);
462
463	ptrans = slab_alloc(&ctx->transfer_pool);
464	if (!ptrans)
465		return NULL;
466
467	/* slab_alloc_st() doesn't zero: */
468	trans = fd_transfer(ptrans);
469	memset(trans, 0, sizeof(*trans));
470
471	pipe_resource_reference(&ptrans->resource, prsc);
472	ptrans->level = level;
473	ptrans->usage = usage;
474	ptrans->box = *box;
475	ptrans->stride = util_format_get_nblocksx(format, slice->pitch) * rsc->cpp;
476	ptrans->layer_stride = rsc->layer_first ? rsc->layer_size : slice->size0;
477
478	/* we always need a staging texture for tiled buffers:
479	 *
480	 * TODO we might sometimes want to *also* shadow the resource to avoid
481	 * splitting a batch.. for ex, mid-frame texture uploads to a tiled
482	 * texture.
483	 */
484	if (rsc->tile_mode) {
485		struct fd_resource *staging_rsc;
486
487		staging_rsc = fd_alloc_staging(ctx, rsc, level, box);
488		if (staging_rsc) {
489			// TODO for PIPE_TRANSFER_READ, need to do untiling blit..
490			trans->staging_prsc = &staging_rsc->base;
491			trans->base.stride = util_format_get_nblocksx(format,
492				staging_rsc->slices[0].pitch) * staging_rsc->cpp;
493			trans->base.layer_stride = staging_rsc->layer_first ?
494				staging_rsc->layer_size : staging_rsc->slices[0].size0;
495			trans->staging_box = *box;
496			trans->staging_box.x = 0;
497			trans->staging_box.y = 0;
498			trans->staging_box.z = 0;
499
500			if (usage & PIPE_TRANSFER_READ) {
501				fd_blit_to_staging(ctx, trans);
502
503				struct fd_batch *batch = NULL;
504
505				fd_context_lock(ctx);
506				fd_batch_reference_locked(&batch, staging_rsc->write_batch);
507				fd_context_unlock(ctx);
508
509				/* we can't fd_bo_cpu_prep() until the blit to staging
510				 * is submitted to kernel.. in that case write_batch
511				 * wouldn't be NULL yet:
512				 */
513				if (batch) {
514					fd_batch_sync(batch);
515					fd_batch_reference(&batch, NULL);
516				}
517
518				fd_bo_cpu_prep(staging_rsc->bo, ctx->pipe,
519						DRM_FREEDRENO_PREP_READ);
520			}
521
522			buf = fd_bo_map(staging_rsc->bo);
523			offset = 0;
524
525			*pptrans = ptrans;
526
527			ctx->stats.staging_uploads++;
528
529			return buf;
530		}
531	}
532
533	if (ctx->in_shadow && !(usage & PIPE_TRANSFER_READ))
534		usage |= PIPE_TRANSFER_UNSYNCHRONIZED;
535
536	if (usage & PIPE_TRANSFER_READ)
537		op |= DRM_FREEDRENO_PREP_READ;
538
539	if (usage & PIPE_TRANSFER_WRITE)
540		op |= DRM_FREEDRENO_PREP_WRITE;
541
542	if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
543		realloc_bo(rsc, fd_bo_size(rsc->bo));
544		rebind_resource(ctx, prsc);
545	} else if ((usage & PIPE_TRANSFER_WRITE) &&
546			   prsc->target == PIPE_BUFFER &&
547			   !util_ranges_intersect(&rsc->valid_buffer_range,
548									  box->x, box->x + box->width)) {
549		/* We are trying to write to a previously uninitialized range. No need
550		 * to wait.
551		 */
552	} else if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
553		struct fd_batch *write_batch = NULL;
554
555		/* hold a reference, so it doesn't disappear under us: */
556		fd_context_lock(ctx);
557		fd_batch_reference_locked(&write_batch, rsc->write_batch);
558		fd_context_unlock(ctx);
559
560		if ((usage & PIPE_TRANSFER_WRITE) && write_batch &&
561				write_batch->back_blit) {
562			/* if only thing pending is a back-blit, we can discard it: */
563			fd_batch_reset(write_batch);
564		}
565
566		/* If the GPU is writing to the resource, or if it is reading from the
567		 * resource and we're trying to write to it, flush the renders.
568		 */
569		bool needs_flush = pending(rsc, !!(usage & PIPE_TRANSFER_WRITE));
570		bool busy = needs_flush || (0 != fd_bo_cpu_prep(rsc->bo,
571				ctx->pipe, op | DRM_FREEDRENO_PREP_NOSYNC));
572
573		/* if we need to flush/stall, see if we can make a shadow buffer
574		 * to avoid this:
575		 *
576		 * TODO we could go down this path !reorder && !busy_for_read
577		 * ie. we only *don't* want to go down this path if the blit
578		 * will trigger a flush!
579		 */
580		if (ctx->screen->reorder && busy && !(usage & PIPE_TRANSFER_READ) &&
581				(usage & PIPE_TRANSFER_DISCARD_RANGE)) {
582			/* try shadowing only if it avoids a flush, otherwise staging would
583			 * be better:
584			 */
585			if (needs_flush && fd_try_shadow_resource(ctx, rsc, level, box)) {
586				needs_flush = busy = false;
587				rebind_resource(ctx, prsc);
588				ctx->stats.shadow_uploads++;
589			} else {
590				struct fd_resource *staging_rsc;
591
592				if (needs_flush) {
593					flush_resource(ctx, rsc, usage);
594					needs_flush = false;
595				}
596
597				/* in this case, we don't need to shadow the whole resource,
598				 * since any draw that references the previous contents has
599				 * already had rendering flushed for all tiles.  So we can
600				 * use a staging buffer to do the upload.
601				 */
602				staging_rsc = fd_alloc_staging(ctx, rsc, level, box);
603				if (staging_rsc) {
604					trans->staging_prsc = &staging_rsc->base;
605					trans->base.stride = util_format_get_nblocksx(format,
606						staging_rsc->slices[0].pitch) * staging_rsc->cpp;
607					trans->base.layer_stride = staging_rsc->layer_first ?
608						staging_rsc->layer_size : staging_rsc->slices[0].size0;
609					trans->staging_box = *box;
610					trans->staging_box.x = 0;
611					trans->staging_box.y = 0;
612					trans->staging_box.z = 0;
613					buf = fd_bo_map(staging_rsc->bo);
614					offset = 0;
615
616					*pptrans = ptrans;
617
618					fd_batch_reference(&write_batch, NULL);
619
620					ctx->stats.staging_uploads++;
621
622					return buf;
623				}
624			}
625		}
626
627		if (needs_flush) {
628			flush_resource(ctx, rsc, usage);
629			needs_flush = false;
630		}
631
632		fd_batch_reference(&write_batch, NULL);
633
634		/* The GPU keeps track of how the various bo's are being used, and
635		 * will wait if necessary for the proper operation to have
636		 * completed.
637		 */
638		if (busy) {
639			ret = fd_bo_cpu_prep(rsc->bo, ctx->pipe, op);
640			if (ret)
641				goto fail;
642		}
643	}
644
645	buf = fd_bo_map(rsc->bo);
646	offset =
647		box->y / util_format_get_blockheight(format) * ptrans->stride +
648		box->x / util_format_get_blockwidth(format) * rsc->cpp +
649		fd_resource_offset(rsc, level, box->z);
650
651	if (usage & PIPE_TRANSFER_WRITE)
652		rsc->valid = true;
653
654	*pptrans = ptrans;
655
656	return buf + offset;
657
658fail:
659	fd_resource_transfer_unmap(pctx, ptrans);
660	return NULL;
661}
662
663static void
664fd_resource_destroy(struct pipe_screen *pscreen,
665		struct pipe_resource *prsc)
666{
667	struct fd_resource *rsc = fd_resource(prsc);
668	fd_bc_invalidate_resource(rsc, true);
669	if (rsc->bo)
670		fd_bo_del(rsc->bo);
671	if (rsc->scanout)
672		renderonly_scanout_destroy(rsc->scanout, fd_screen(pscreen)->ro);
673
674	util_range_destroy(&rsc->valid_buffer_range);
675	FREE(rsc);
676}
677
678static uint64_t
679fd_resource_modifier(struct fd_resource *rsc)
680{
681	if (!rsc->tile_mode)
682		return DRM_FORMAT_MOD_LINEAR;
683
684	/* TODO invent a modifier for tiled but not UBWC buffers: */
685	return DRM_FORMAT_MOD_INVALID;
686}
687
688static boolean
689fd_resource_get_handle(struct pipe_screen *pscreen,
690		struct pipe_context *pctx,
691		struct pipe_resource *prsc,
692		struct winsys_handle *handle,
693		unsigned usage)
694{
695	struct fd_resource *rsc = fd_resource(prsc);
696
697	handle->modifier = fd_resource_modifier(rsc);
698
699	return fd_screen_bo_get_handle(pscreen, rsc->bo, rsc->scanout,
700			rsc->slices[0].pitch * rsc->cpp, handle);
701}
702
703static uint32_t
704setup_slices(struct fd_resource *rsc, uint32_t alignment, enum pipe_format format)
705{
706	struct pipe_resource *prsc = &rsc->base;
707	struct fd_screen *screen = fd_screen(prsc->screen);
708	enum util_format_layout layout = util_format_description(format)->layout;
709	uint32_t pitchalign = screen->gmem_alignw;
710	uint32_t level, size = 0;
711	uint32_t width = prsc->width0;
712	uint32_t height = prsc->height0;
713	uint32_t depth = prsc->depth0;
714	/* in layer_first layout, the level (slice) contains just one
715	 * layer (since in fact the layer contains the slices)
716	 */
717	uint32_t layers_in_level = rsc->layer_first ? 1 : prsc->array_size;
718
719	for (level = 0; level <= prsc->last_level; level++) {
720		struct fd_resource_slice *slice = fd_resource_slice(rsc, level);
721		uint32_t blocks;
722
723		if (layout == UTIL_FORMAT_LAYOUT_ASTC)
724			slice->pitch = width =
725				util_align_npot(width, pitchalign * util_format_get_blockwidth(format));
726		else
727			slice->pitch = width = align(width, pitchalign);
728		slice->offset = size;
729		blocks = util_format_get_nblocks(format, width, height);
730		/* 1d array and 2d array textures must all have the same layer size
731		 * for each miplevel on a3xx. 3d textures can have different layer
732		 * sizes for high levels, but the hw auto-sizer is buggy (or at least
733		 * different than what this code does), so as soon as the layer size
734		 * range gets into range, we stop reducing it.
735		 */
736		if (prsc->target == PIPE_TEXTURE_3D && (
737					level == 1 ||
738					(level > 1 && rsc->slices[level - 1].size0 > 0xf000)))
739			slice->size0 = align(blocks * rsc->cpp, alignment);
740		else if (level == 0 || rsc->layer_first || alignment == 1)
741			slice->size0 = align(blocks * rsc->cpp, alignment);
742		else
743			slice->size0 = rsc->slices[level - 1].size0;
744
745		size += slice->size0 * depth * layers_in_level;
746
747		width = u_minify(width, 1);
748		height = u_minify(height, 1);
749		depth = u_minify(depth, 1);
750	}
751
752	return size;
753}
754
755static uint32_t
756slice_alignment(enum pipe_texture_target target)
757{
758	/* on a3xx, 2d array and 3d textures seem to want their
759	 * layers aligned to page boundaries:
760	 */
761	switch (target) {
762	case PIPE_TEXTURE_3D:
763	case PIPE_TEXTURE_1D_ARRAY:
764	case PIPE_TEXTURE_2D_ARRAY:
765		return 4096;
766	default:
767		return 1;
768	}
769}
770
771/* cross generation texture layout to plug in to screen->setup_slices()..
772 * replace with generation specific one as-needed.
773 *
774 * TODO for a4xx probably can extract out the a4xx specific logic int
775 * a small fd4_setup_slices() wrapper that sets up layer_first, and then
776 * calls this.
777 */
778uint32_t
779fd_setup_slices(struct fd_resource *rsc)
780{
781	uint32_t alignment;
782
783	alignment = slice_alignment(rsc->base.target);
784
785	struct fd_screen *screen = fd_screen(rsc->base.screen);
786	if (is_a4xx(screen)) {
787		switch (rsc->base.target) {
788		case PIPE_TEXTURE_3D:
789			rsc->layer_first = false;
790			break;
791		default:
792			rsc->layer_first = true;
793			alignment = 1;
794			break;
795		}
796	}
797
798	return setup_slices(rsc, alignment, rsc->base.format);
799}
800
801/* special case to resize query buf after allocated.. */
802void
803fd_resource_resize(struct pipe_resource *prsc, uint32_t sz)
804{
805	struct fd_resource *rsc = fd_resource(prsc);
806
807	debug_assert(prsc->width0 == 0);
808	debug_assert(prsc->target == PIPE_BUFFER);
809	debug_assert(prsc->bind == PIPE_BIND_QUERY_BUFFER);
810
811	prsc->width0 = sz;
812	realloc_bo(rsc, fd_screen(prsc->screen)->setup_slices(rsc));
813}
814
815// TODO common helper?
816static bool
817has_depth(enum pipe_format format)
818{
819	switch (format) {
820	case PIPE_FORMAT_Z16_UNORM:
821	case PIPE_FORMAT_Z32_UNORM:
822	case PIPE_FORMAT_Z32_FLOAT:
823	case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
824	case PIPE_FORMAT_Z24_UNORM_S8_UINT:
825	case PIPE_FORMAT_S8_UINT_Z24_UNORM:
826	case PIPE_FORMAT_Z24X8_UNORM:
827	case PIPE_FORMAT_X8Z24_UNORM:
828		return true;
829	default:
830		return false;
831	}
832}
833
834/**
835 * Create a new texture object, using the given template info.
836 */
837static struct pipe_resource *
838fd_resource_create_with_modifiers(struct pipe_screen *pscreen,
839		const struct pipe_resource *tmpl,
840		const uint64_t *modifiers, int count)
841{
842	struct fd_screen *screen = fd_screen(pscreen);
843	struct fd_resource *rsc;
844	struct pipe_resource *prsc;
845	enum pipe_format format = tmpl->format;
846	uint32_t size;
847
848	/* when using kmsro, scanout buffers are allocated on the display device
849	 * create_with_modifiers() doesn't give us usage flags, so we have to
850	 * assume that all calls with modifiers are scanout-possible
851	 */
852	if (screen->ro &&
853		((tmpl->bind & PIPE_BIND_SCANOUT) ||
854		 !(count == 1 && modifiers[0] == DRM_FORMAT_MOD_INVALID))) {
855		struct pipe_resource scanout_templat = *tmpl;
856		struct renderonly_scanout *scanout;
857		struct winsys_handle handle;
858
859		scanout = renderonly_scanout_for_resource(&scanout_templat,
860												  screen->ro, &handle);
861		if (!scanout)
862			return NULL;
863
864		renderonly_scanout_destroy(scanout, screen->ro);
865
866		assert(handle.type == WINSYS_HANDLE_TYPE_FD);
867		rsc = fd_resource(pscreen->resource_from_handle(pscreen, tmpl,
868														&handle,
869														PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE));
870		close(handle.handle);
871		if (!rsc)
872			return NULL;
873
874		return &rsc->base;
875	}
876
877	rsc = CALLOC_STRUCT(fd_resource);
878	prsc = &rsc->base;
879
880	DBG("%p: target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
881			"nr_samples=%u, usage=%u, bind=%x, flags=%x", prsc,
882			tmpl->target, util_format_name(format),
883			tmpl->width0, tmpl->height0, tmpl->depth0,
884			tmpl->array_size, tmpl->last_level, tmpl->nr_samples,
885			tmpl->usage, tmpl->bind, tmpl->flags);
886
887	if (!rsc)
888		return NULL;
889
890	*prsc = *tmpl;
891
892#define LINEAR \
893	(PIPE_BIND_SCANOUT | \
894	 PIPE_BIND_LINEAR  | \
895	 PIPE_BIND_DISPLAY_TARGET)
896
897	bool linear = drm_find_modifier(DRM_FORMAT_MOD_LINEAR, modifiers, count);
898	if (tmpl->bind & LINEAR)
899		linear = true;
900
901	/* Normally, for non-shared buffers, allow buffer compression if
902	 * not shared, otherwise only allow if QCOM_COMPRESSED modifier
903	 * is requested:
904	 *
905	 * TODO we should probably also limit tiled in a similar way,
906	 * except we don't have a format modifier for tiled.  (We probably
907	 * should.)
908	 */
909	bool allow_ubwc = drm_find_modifier(DRM_FORMAT_MOD_INVALID, modifiers, count);
910	if (tmpl->bind & PIPE_BIND_SHARED)
911		allow_ubwc = drm_find_modifier(DRM_FORMAT_MOD_QCOM_COMPRESSED, modifiers, count);
912
913	/* TODO turn on UBWC for all internal buffers
914	 *
915	 * There are still some regressions in deqp with UBWC enabled.  I
916	 * think it is mostly related to sampler/image views using a format
917	 * that doesn't support compression with a resource created with
918	 * a format that does.  We need to track the compression state of
919	 * a buffer and do an (in-place, hopefully?) resolve if it is re-
920	 * interpreted with a format that does not support compression.
921	 *
922	 * It is possible (likely?) that we can't do atomic ops on a
923	 * compressed buffer as well, so this would also require transition
924	 * to a compressed state.
925	 */
926	allow_ubwc &= !!(fd_mesa_debug & FD_DBG_UBWC);
927
928	if (screen->tile_mode &&
929			(tmpl->target != PIPE_BUFFER) &&
930			!linear) {
931		rsc->tile_mode = screen->tile_mode(tmpl);
932	}
933
934	pipe_reference_init(&prsc->reference, 1);
935
936	prsc->screen = pscreen;
937
938	util_range_init(&rsc->valid_buffer_range);
939
940	rsc->internal_format = format;
941	rsc->cpp = util_format_get_blocksize(format);
942	rsc->cpp *= fd_resource_nr_samples(prsc);
943
944	assert(rsc->cpp);
945
946	// XXX probably need some extra work if we hit rsc shadowing path w/ lrz..
947	if ((is_a5xx(screen) || is_a6xx(screen)) &&
948		 (fd_mesa_debug & FD_DBG_LRZ) && has_depth(format)) {
949		const uint32_t flags = DRM_FREEDRENO_GEM_CACHE_WCOMBINE |
950				DRM_FREEDRENO_GEM_TYPE_KMEM; /* TODO */
951		unsigned lrz_pitch  = align(DIV_ROUND_UP(tmpl->width0, 8), 64);
952		unsigned lrz_height = DIV_ROUND_UP(tmpl->height0, 8);
953
954		/* LRZ buffer is super-sampled: */
955		switch (prsc->nr_samples) {
956		case 4:
957			lrz_pitch *= 2;
958		case 2:
959			lrz_height *= 2;
960		}
961
962		unsigned size = lrz_pitch * lrz_height * 2;
963
964		size += 0x1000; /* for GRAS_LRZ_FAST_CLEAR_BUFFER */
965
966		rsc->lrz_height = lrz_height;
967		rsc->lrz_width = lrz_pitch;
968		rsc->lrz_pitch = lrz_pitch;
969		rsc->lrz = fd_bo_new(screen->dev, size, flags, "lrz");
970	}
971
972	size = screen->setup_slices(rsc);
973
974	if (allow_ubwc && screen->fill_ubwc_buffer_sizes && rsc->tile_mode)
975		size += screen->fill_ubwc_buffer_sizes(rsc);
976
977	/* special case for hw-query buffer, which we need to allocate before we
978	 * know the size:
979	 */
980	if (size == 0) {
981		/* note, semi-intention == instead of & */
982		debug_assert(prsc->bind == PIPE_BIND_QUERY_BUFFER);
983		return prsc;
984	}
985
986	if (rsc->layer_first) {
987		rsc->layer_size = align(size, 4096);
988		size = rsc->layer_size * prsc->array_size;
989	}
990
991	realloc_bo(rsc, size);
992	if (!rsc->bo)
993		goto fail;
994
995	return prsc;
996fail:
997	fd_resource_destroy(pscreen, prsc);
998	return NULL;
999}
1000
1001static struct pipe_resource *
1002fd_resource_create(struct pipe_screen *pscreen,
1003		const struct pipe_resource *tmpl)
1004{
1005	const uint64_t mod = DRM_FORMAT_MOD_INVALID;
1006	return fd_resource_create_with_modifiers(pscreen, tmpl, &mod, 1);
1007}
1008
1009static bool
1010is_supported_modifier(struct pipe_screen *pscreen, enum pipe_format pfmt,
1011		uint64_t mod)
1012{
1013	int count;
1014
1015	/* Get the count of supported modifiers: */
1016	pscreen->query_dmabuf_modifiers(pscreen, pfmt, 0, NULL, NULL, &count);
1017
1018	/* Get the supported modifiers: */
1019	uint64_t modifiers[count];
1020	pscreen->query_dmabuf_modifiers(pscreen, pfmt, count, modifiers, NULL, &count);
1021
1022	for (int i = 0; i < count; i++)
1023		if (modifiers[i] == mod)
1024			return true;
1025
1026	return false;
1027}
1028
1029/**
1030 * Create a texture from a winsys_handle. The handle is often created in
1031 * another process by first creating a pipe texture and then calling
1032 * resource_get_handle.
1033 */
1034static struct pipe_resource *
1035fd_resource_from_handle(struct pipe_screen *pscreen,
1036		const struct pipe_resource *tmpl,
1037		struct winsys_handle *handle, unsigned usage)
1038{
1039	struct fd_screen *screen = fd_screen(pscreen);
1040	struct fd_resource *rsc = CALLOC_STRUCT(fd_resource);
1041	struct fd_resource_slice *slice = &rsc->slices[0];
1042	struct pipe_resource *prsc = &rsc->base;
1043	uint32_t pitchalign = fd_screen(pscreen)->gmem_alignw;
1044
1045	DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
1046			"nr_samples=%u, usage=%u, bind=%x, flags=%x",
1047			tmpl->target, util_format_name(tmpl->format),
1048			tmpl->width0, tmpl->height0, tmpl->depth0,
1049			tmpl->array_size, tmpl->last_level, tmpl->nr_samples,
1050			tmpl->usage, tmpl->bind, tmpl->flags);
1051
1052	if (!rsc)
1053		return NULL;
1054
1055	*prsc = *tmpl;
1056
1057	pipe_reference_init(&prsc->reference, 1);
1058
1059	prsc->screen = pscreen;
1060
1061	util_range_init(&rsc->valid_buffer_range);
1062
1063	rsc->bo = fd_screen_bo_from_handle(pscreen, handle);
1064	if (!rsc->bo)
1065		goto fail;
1066
1067	rsc->internal_format = tmpl->format;
1068	rsc->cpp = util_format_get_blocksize(tmpl->format);
1069	rsc->cpp *= fd_resource_nr_samples(prsc);
1070	slice->pitch = handle->stride / rsc->cpp;
1071	slice->offset = handle->offset;
1072	slice->size0 = handle->stride * prsc->height0;
1073
1074	if ((slice->pitch < align(prsc->width0, pitchalign)) ||
1075			(slice->pitch & (pitchalign - 1)))
1076		goto fail;
1077
1078	if (handle->modifier == DRM_FORMAT_MOD_QCOM_COMPRESSED) {
1079		if (!is_supported_modifier(pscreen, tmpl->format,
1080				DRM_FORMAT_MOD_QCOM_COMPRESSED)) {
1081			DBG("bad modifier: %llx", handle->modifier);
1082			goto fail;
1083		}
1084		debug_assert(screen->fill_ubwc_buffer_sizes);
1085		screen->fill_ubwc_buffer_sizes(rsc);
1086	} else if (handle->modifier &&
1087			(handle->modifier != DRM_FORMAT_MOD_INVALID)) {
1088		goto fail;
1089	}
1090
1091	assert(rsc->cpp);
1092
1093	if (screen->ro) {
1094		rsc->scanout =
1095			renderonly_create_gpu_import_for_resource(prsc, screen->ro, NULL);
1096		/* failure is expected in some cases.. */
1097	}
1098
1099	rsc->valid = true;
1100
1101	return prsc;
1102
1103fail:
1104	fd_resource_destroy(pscreen, prsc);
1105	return NULL;
1106}
1107
1108bool
1109fd_render_condition_check(struct pipe_context *pctx)
1110{
1111	struct fd_context *ctx = fd_context(pctx);
1112
1113	if (!ctx->cond_query)
1114		return true;
1115
1116	union pipe_query_result res = { 0 };
1117	bool wait =
1118		ctx->cond_mode != PIPE_RENDER_COND_NO_WAIT &&
1119		ctx->cond_mode != PIPE_RENDER_COND_BY_REGION_NO_WAIT;
1120
1121	if (pctx->get_query_result(pctx, ctx->cond_query, wait, &res))
1122			return (bool)res.u64 != ctx->cond_cond;
1123
1124	return true;
1125}
1126
1127static void
1128fd_invalidate_resource(struct pipe_context *pctx, struct pipe_resource *prsc)
1129{
1130	struct fd_context *ctx = fd_context(pctx);
1131	struct fd_resource *rsc = fd_resource(prsc);
1132
1133	/*
1134	 * TODO I guess we could track that the resource is invalidated and
1135	 * use that as a hint to realloc rather than stall in _transfer_map(),
1136	 * even in the non-DISCARD_WHOLE_RESOURCE case?
1137	 *
1138	 * Note: we set dirty bits to trigger invalidate logic fd_draw_vbo
1139	 */
1140
1141	if (rsc->write_batch) {
1142		struct fd_batch *batch = rsc->write_batch;
1143		struct pipe_framebuffer_state *pfb = &batch->framebuffer;
1144
1145		if (pfb->zsbuf && pfb->zsbuf->texture == prsc) {
1146			batch->resolve &= ~(FD_BUFFER_DEPTH | FD_BUFFER_STENCIL);
1147			ctx->dirty |= FD_DIRTY_ZSA;
1148		}
1149
1150		for (unsigned i = 0; i < pfb->nr_cbufs; i++) {
1151			if (pfb->cbufs[i] && pfb->cbufs[i]->texture == prsc) {
1152				batch->resolve &= ~(PIPE_CLEAR_COLOR0 << i);
1153				ctx->dirty |= FD_DIRTY_FRAMEBUFFER;
1154			}
1155		}
1156	}
1157
1158	rsc->valid = false;
1159}
1160
1161static enum pipe_format
1162fd_resource_get_internal_format(struct pipe_resource *prsc)
1163{
1164	return fd_resource(prsc)->internal_format;
1165}
1166
1167static void
1168fd_resource_set_stencil(struct pipe_resource *prsc,
1169		struct pipe_resource *stencil)
1170{
1171	fd_resource(prsc)->stencil = fd_resource(stencil);
1172}
1173
1174static struct pipe_resource *
1175fd_resource_get_stencil(struct pipe_resource *prsc)
1176{
1177	struct fd_resource *rsc = fd_resource(prsc);
1178	if (rsc->stencil)
1179		return &rsc->stencil->base;
1180	return NULL;
1181}
1182
1183static const struct u_transfer_vtbl transfer_vtbl = {
1184		.resource_create          = fd_resource_create,
1185		.resource_destroy         = fd_resource_destroy,
1186		.transfer_map             = fd_resource_transfer_map,
1187		.transfer_flush_region    = fd_resource_transfer_flush_region,
1188		.transfer_unmap           = fd_resource_transfer_unmap,
1189		.get_internal_format      = fd_resource_get_internal_format,
1190		.set_stencil              = fd_resource_set_stencil,
1191		.get_stencil              = fd_resource_get_stencil,
1192};
1193
1194void
1195fd_resource_screen_init(struct pipe_screen *pscreen)
1196{
1197	struct fd_screen *screen = fd_screen(pscreen);
1198	bool fake_rgtc = screen->gpu_id < 400;
1199
1200	pscreen->resource_create = u_transfer_helper_resource_create;
1201	/* NOTE: u_transfer_helper does not yet support the _with_modifiers()
1202	 * variant:
1203	 */
1204	pscreen->resource_create_with_modifiers = fd_resource_create_with_modifiers;
1205	pscreen->resource_from_handle = fd_resource_from_handle;
1206	pscreen->resource_get_handle = fd_resource_get_handle;
1207	pscreen->resource_destroy = u_transfer_helper_resource_destroy;
1208
1209	pscreen->transfer_helper = u_transfer_helper_create(&transfer_vtbl,
1210			true, false, fake_rgtc, true);
1211
1212	if (!screen->setup_slices)
1213		screen->setup_slices = fd_setup_slices;
1214}
1215
1216static void
1217fd_get_sample_position(struct pipe_context *context,
1218                         unsigned sample_count, unsigned sample_index,
1219                         float *pos_out)
1220{
1221	/* The following is copied from nouveau/nv50 except for position
1222	 * values, which are taken from blob driver */
1223	static const uint8_t pos1[1][2] = { { 0x8, 0x8 } };
1224	static const uint8_t pos2[2][2] = {
1225		{ 0xc, 0xc }, { 0x4, 0x4 } };
1226	static const uint8_t pos4[4][2] = {
1227		{ 0x6, 0x2 }, { 0xe, 0x6 },
1228		{ 0x2, 0xa }, { 0xa, 0xe } };
1229	/* TODO needs to be verified on supported hw */
1230	static const uint8_t pos8[8][2] = {
1231		{ 0x9, 0x5 }, { 0x7, 0xb },
1232		{ 0xd, 0x9 }, { 0x5, 0x3 },
1233		{ 0x3, 0xd }, { 0x1, 0x7 },
1234		{ 0xb, 0xf }, { 0xf, 0x1 } };
1235
1236	const uint8_t (*ptr)[2];
1237
1238	switch (sample_count) {
1239	case 1:
1240		ptr = pos1;
1241		break;
1242	case 2:
1243		ptr = pos2;
1244		break;
1245	case 4:
1246		ptr = pos4;
1247		break;
1248	case 8:
1249		ptr = pos8;
1250		break;
1251	default:
1252		assert(0);
1253		return;
1254	}
1255
1256	pos_out[0] = ptr[sample_index][0] / 16.0f;
1257	pos_out[1] = ptr[sample_index][1] / 16.0f;
1258}
1259
1260static void
1261fd_blit_pipe(struct pipe_context *pctx, const struct pipe_blit_info *blit_info)
1262{
1263	/* wrap fd_blit to return void */
1264	fd_blit(pctx, blit_info);
1265}
1266
1267void
1268fd_resource_context_init(struct pipe_context *pctx)
1269{
1270	pctx->transfer_map = u_transfer_helper_transfer_map;
1271	pctx->transfer_flush_region = u_transfer_helper_transfer_flush_region;
1272	pctx->transfer_unmap = u_transfer_helper_transfer_unmap;
1273	pctx->buffer_subdata = u_default_buffer_subdata;
1274	pctx->texture_subdata = u_default_texture_subdata;
1275	pctx->create_surface = fd_create_surface;
1276	pctx->surface_destroy = fd_surface_destroy;
1277	pctx->resource_copy_region = fd_resource_copy_region;
1278	pctx->blit = fd_blit_pipe;
1279	pctx->flush_resource = fd_flush_resource;
1280	pctx->invalidate_resource = fd_invalidate_resource;
1281	pctx->get_sample_position = fd_get_sample_position;
1282}
1283