1848b8605Smrg/************************************************************************** 2848b8605Smrg * 3848b8605Smrg * Copyright 2003 VMware, Inc. 4848b8605Smrg * All Rights Reserved. 5848b8605Smrg * 6848b8605Smrg * Permission is hereby granted, free of charge, to any person obtaining a 7848b8605Smrg * copy of this software and associated documentation files (the 8848b8605Smrg * "Software"), to deal in the Software without restriction, including 9848b8605Smrg * without limitation the rights to use, copy, modify, merge, publish, 10848b8605Smrg * distribute, sub license, and/or sell copies of the Software, and to 11848b8605Smrg * permit persons to whom the Software is furnished to do so, subject to 12848b8605Smrg * the following conditions: 13848b8605Smrg * 14848b8605Smrg * The above copyright notice and this permission notice (including the 15848b8605Smrg * next paragraph) shall be included in all copies or substantial portions 16848b8605Smrg * of the Software. 17848b8605Smrg * 18848b8605Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19848b8605Smrg * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20848b8605Smrg * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21848b8605Smrg * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR 22848b8605Smrg * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23848b8605Smrg * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24848b8605Smrg * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25848b8605Smrg * 26848b8605Smrg **************************************************************************/ 27848b8605Smrg 28848b8605Smrg 29848b8605Smrg#include "i915_blit.h" 30848b8605Smrg#include "i915_reg.h" 31848b8605Smrg#include "i915_batch.h" 32848b8605Smrg#include "i915_debug.h" 33848b8605Smrg 34848b8605Smrg 35848b8605Smrgvoid 36848b8605Smrgi915_fill_blit(struct i915_context *i915, 37848b8605Smrg unsigned cpp, 38848b8605Smrg unsigned rgba_mask, 39848b8605Smrg unsigned short dst_pitch, 40848b8605Smrg struct i915_winsys_buffer *dst_buffer, 41848b8605Smrg unsigned dst_offset, 42848b8605Smrg short x, short y, 43848b8605Smrg short w, short h, 44848b8605Smrg unsigned color) 45848b8605Smrg{ 46848b8605Smrg unsigned BR13, CMD; 47848b8605Smrg 48848b8605Smrg 49848b8605Smrg I915_DBG(DBG_BLIT, "%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n", 50848b8605Smrg __FUNCTION__, dst_buffer, dst_pitch, dst_offset, x, y, w, h); 51848b8605Smrg 52848b8605Smrg if(!i915_winsys_validate_buffers(i915->batch, &dst_buffer, 1)) { 53848b8605Smrg FLUSH_BATCH(NULL, I915_FLUSH_ASYNC); 54848b8605Smrg assert(i915_winsys_validate_buffers(i915->batch, &dst_buffer, 1)); 55848b8605Smrg } 56848b8605Smrg 57848b8605Smrg switch (cpp) { 58848b8605Smrg case 1: 59848b8605Smrg case 2: 60848b8605Smrg case 3: 61848b8605Smrg BR13 = (((int) dst_pitch) & 0xffff) | 62848b8605Smrg (0xF0 << 16) | (1 << 24); 63848b8605Smrg CMD = XY_COLOR_BLT_CMD; 64848b8605Smrg break; 65848b8605Smrg case 4: 66848b8605Smrg BR13 = (((int) dst_pitch) & 0xffff) | 67848b8605Smrg (0xF0 << 16) | (1 << 24) | (1 << 25); 68848b8605Smrg CMD = (XY_COLOR_BLT_CMD | rgba_mask); 69848b8605Smrg break; 70848b8605Smrg default: 71848b8605Smrg return; 72848b8605Smrg } 73848b8605Smrg 74848b8605Smrg if (!BEGIN_BATCH(6)) { 75848b8605Smrg FLUSH_BATCH(NULL, I915_FLUSH_ASYNC); 76848b8605Smrg assert(BEGIN_BATCH(6)); 77848b8605Smrg } 78848b8605Smrg OUT_BATCH(CMD); 79848b8605Smrg OUT_BATCH(BR13); 80848b8605Smrg OUT_BATCH((y << 16) | x); 81848b8605Smrg OUT_BATCH(((y + h) << 16) | (x + w)); 82848b8605Smrg OUT_RELOC_FENCED(dst_buffer, I915_USAGE_2D_TARGET, dst_offset); 83848b8605Smrg OUT_BATCH(color); 84848b8605Smrg 85848b8605Smrg i915_set_flush_dirty(i915, I915_FLUSH_CACHE); 86848b8605Smrg} 87848b8605Smrg 88848b8605Smrgvoid 89848b8605Smrgi915_copy_blit(struct i915_context *i915, 90848b8605Smrg unsigned cpp, 91848b8605Smrg unsigned short src_pitch, 92848b8605Smrg struct i915_winsys_buffer *src_buffer, 93848b8605Smrg unsigned src_offset, 94848b8605Smrg unsigned short dst_pitch, 95848b8605Smrg struct i915_winsys_buffer *dst_buffer, 96848b8605Smrg unsigned dst_offset, 97848b8605Smrg short src_x, short src_y, 98848b8605Smrg short dst_x, short dst_y, 99848b8605Smrg short w, short h) 100848b8605Smrg{ 101848b8605Smrg unsigned CMD, BR13; 102848b8605Smrg int dst_y2 = dst_y + h; 103848b8605Smrg int dst_x2 = dst_x + w; 104848b8605Smrg struct i915_winsys_buffer *buffers[2] = {src_buffer, dst_buffer}; 105848b8605Smrg 106848b8605Smrg 107848b8605Smrg I915_DBG(DBG_BLIT, 108848b8605Smrg "%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n", 109848b8605Smrg __FUNCTION__, 110848b8605Smrg src_buffer, src_pitch, src_offset, src_x, src_y, 111848b8605Smrg dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h); 112848b8605Smrg 113848b8605Smrg if(!i915_winsys_validate_buffers(i915->batch, buffers, 2)) { 114848b8605Smrg FLUSH_BATCH(NULL, I915_FLUSH_ASYNC); 115848b8605Smrg assert(i915_winsys_validate_buffers(i915->batch, buffers, 2)); 116848b8605Smrg } 117848b8605Smrg 118848b8605Smrg switch (cpp) { 119848b8605Smrg case 1: 120848b8605Smrg case 2: 121848b8605Smrg case 3: 122848b8605Smrg BR13 = (((int) dst_pitch) & 0xffff) | 123848b8605Smrg (0xCC << 16) | (1 << 24); 124848b8605Smrg CMD = XY_SRC_COPY_BLT_CMD; 125848b8605Smrg break; 126848b8605Smrg case 4: 127848b8605Smrg BR13 = (((int) dst_pitch) & 0xffff) | 128848b8605Smrg (0xCC << 16) | (1 << 24) | (1 << 25); 129848b8605Smrg CMD = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA | 130848b8605Smrg XY_SRC_COPY_BLT_WRITE_RGB); 131848b8605Smrg break; 132848b8605Smrg default: 133848b8605Smrg return; 134848b8605Smrg } 135848b8605Smrg 136848b8605Smrg if (dst_y2 < dst_y || dst_x2 < dst_x) { 137848b8605Smrg return; 138848b8605Smrg } 139848b8605Smrg 140848b8605Smrg /* Hardware can handle negative pitches but loses the ability to do 141848b8605Smrg * proper overlapping blits in that case. We don't really have a 142848b8605Smrg * need for either at this stage. 143848b8605Smrg */ 144848b8605Smrg assert (dst_pitch > 0 && src_pitch > 0); 145848b8605Smrg 146848b8605Smrg if (!BEGIN_BATCH(8)) { 147848b8605Smrg FLUSH_BATCH(NULL, I915_FLUSH_ASYNC); 148848b8605Smrg assert(BEGIN_BATCH(8)); 149848b8605Smrg } 150848b8605Smrg OUT_BATCH(CMD); 151848b8605Smrg OUT_BATCH(BR13); 152848b8605Smrg OUT_BATCH((dst_y << 16) | dst_x); 153848b8605Smrg OUT_BATCH((dst_y2 << 16) | dst_x2); 154848b8605Smrg OUT_RELOC_FENCED(dst_buffer, I915_USAGE_2D_TARGET, dst_offset); 155848b8605Smrg OUT_BATCH((src_y << 16) | src_x); 156848b8605Smrg OUT_BATCH(((int) src_pitch & 0xffff)); 157848b8605Smrg OUT_RELOC_FENCED(src_buffer, I915_USAGE_2D_SOURCE, src_offset); 158848b8605Smrg 159848b8605Smrg i915_set_flush_dirty(i915, I915_FLUSH_CACHE); 160848b8605Smrg} 161