1b8e80941Smrg/* 2b8e80941Smrg * Copyright © 2017 Intel Corporation 3b8e80941Smrg * 4b8e80941Smrg * Permission is hereby granted, free of charge, to any person obtaining a 5b8e80941Smrg * copy of this software and associated documentation files (the "Software"), 6b8e80941Smrg * to deal in the Software without restriction, including without limitation 7b8e80941Smrg * on the rights to use, copy, modify, merge, publish, distribute, sub 8b8e80941Smrg * license, and/or sell copies of the Software, and to permit persons to whom 9b8e80941Smrg * the Software is furnished to do so, subject to the following conditions: 10b8e80941Smrg * 11b8e80941Smrg * The above copyright notice and this permission notice (including the next 12b8e80941Smrg * paragraph) shall be included in all copies or substantial portions of the 13b8e80941Smrg * Software. 14b8e80941Smrg * 15b8e80941Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16b8e80941Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17b8e80941Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18b8e80941Smrg * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19b8e80941Smrg * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20b8e80941Smrg * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21b8e80941Smrg * USE OR OTHER DEALINGS IN THE SOFTWARE. 22b8e80941Smrg */ 23b8e80941Smrg#ifndef IRIS_PIPE_H 24b8e80941Smrg#define IRIS_PIPE_H 25b8e80941Smrg 26b8e80941Smrg#include "pipe/p_defines.h" 27b8e80941Smrg#include "compiler/shader_enums.h" 28b8e80941Smrg 29b8e80941Smrgstatic inline gl_shader_stage 30b8e80941Smrgstage_from_pipe(enum pipe_shader_type pstage) 31b8e80941Smrg{ 32b8e80941Smrg static const gl_shader_stage stages[PIPE_SHADER_TYPES] = { 33b8e80941Smrg [PIPE_SHADER_VERTEX] = MESA_SHADER_VERTEX, 34b8e80941Smrg [PIPE_SHADER_TESS_CTRL] = MESA_SHADER_TESS_CTRL, 35b8e80941Smrg [PIPE_SHADER_TESS_EVAL] = MESA_SHADER_TESS_EVAL, 36b8e80941Smrg [PIPE_SHADER_GEOMETRY] = MESA_SHADER_GEOMETRY, 37b8e80941Smrg [PIPE_SHADER_FRAGMENT] = MESA_SHADER_FRAGMENT, 38b8e80941Smrg [PIPE_SHADER_COMPUTE] = MESA_SHADER_COMPUTE, 39b8e80941Smrg }; 40b8e80941Smrg return stages[pstage]; 41b8e80941Smrg} 42b8e80941Smrg 43b8e80941Smrgstatic inline enum pipe_shader_type 44b8e80941Smrgstage_to_pipe(gl_shader_stage stage) 45b8e80941Smrg{ 46b8e80941Smrg static const enum pipe_shader_type pstages[MESA_SHADER_STAGES] = { 47b8e80941Smrg [MESA_SHADER_VERTEX] = PIPE_SHADER_VERTEX, 48b8e80941Smrg [MESA_SHADER_TESS_CTRL] = PIPE_SHADER_TESS_CTRL, 49b8e80941Smrg [MESA_SHADER_TESS_EVAL] = PIPE_SHADER_TESS_EVAL, 50b8e80941Smrg [MESA_SHADER_GEOMETRY] = PIPE_SHADER_GEOMETRY, 51b8e80941Smrg [MESA_SHADER_FRAGMENT] = PIPE_SHADER_FRAGMENT, 52b8e80941Smrg [MESA_SHADER_COMPUTE] = PIPE_SHADER_COMPUTE, 53b8e80941Smrg }; 54b8e80941Smrg return pstages[stage]; 55b8e80941Smrg} 56b8e80941Smrg 57b8e80941Smrg/** 58b8e80941Smrg * Convert an swizzle enumeration (i.e. PIPE_SWIZZLE_X) to one of the HW's 59b8e80941Smrg * "Shader Channel Select" enumerations (i.e. SCS_RED). The mappings are 60b8e80941Smrg * 61b8e80941Smrg * SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W, SWIZZLE_ZERO, SWIZZLE_ONE 62b8e80941Smrg * 0 1 2 3 4 5 63b8e80941Smrg * 4 5 6 7 0 1 64b8e80941Smrg * SCS_RED, SCS_GREEN, SCS_BLUE, SCS_ALPHA, SCS_ZERO, SCS_ONE 65b8e80941Smrg * 66b8e80941Smrg * which is simply adding 4 then modding by 8 (or anding with 7). 67b8e80941Smrg */ 68b8e80941Smrgstatic inline enum isl_channel_select 69b8e80941Smrgpipe_swizzle_to_isl_channel(enum pipe_swizzle swizzle) 70b8e80941Smrg{ 71b8e80941Smrg return (swizzle + 4) & 7; 72b8e80941Smrg} 73b8e80941Smrg 74b8e80941Smrg#endif 75