1b8e80941Smrg/* 2b8e80941Smrg * Copyright © 2017 Intel Corporation 3b8e80941Smrg * 4b8e80941Smrg * Permission is hereby granted, free of charge, to any person obtaining a 5b8e80941Smrg * copy of this software and associated documentation files (the "Software"), 6b8e80941Smrg * to deal in the Software without restriction, including without limitation 7b8e80941Smrg * on the rights to use, copy, modify, merge, publish, distribute, sub 8b8e80941Smrg * license, and/or sell copies of the Software, and to permit persons to whom 9b8e80941Smrg * the Software is furnished to do so, subject to the following conditions: 10b8e80941Smrg * 11b8e80941Smrg * The above copyright notice and this permission notice (including the next 12b8e80941Smrg * paragraph) shall be included in all copies or substantial portions of the 13b8e80941Smrg * Software. 14b8e80941Smrg * 15b8e80941Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16b8e80941Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17b8e80941Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18b8e80941Smrg * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19b8e80941Smrg * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20b8e80941Smrg * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21b8e80941Smrg * USE OR OTHER DEALINGS IN THE SOFTWARE. 22b8e80941Smrg */ 23b8e80941Smrg#ifndef IRIS_SCREEN_H 24b8e80941Smrg#define IRIS_SCREEN_H 25b8e80941Smrg 26b8e80941Smrg#include "pipe/p_screen.h" 27b8e80941Smrg#include "state_tracker/drm_driver.h" 28b8e80941Smrg#include "util/slab.h" 29b8e80941Smrg#include "util/u_screen.h" 30b8e80941Smrg#include "intel/dev/gen_device_info.h" 31b8e80941Smrg#include "intel/isl/isl.h" 32b8e80941Smrg#include "iris_bufmgr.h" 33b8e80941Smrg 34b8e80941Smrgstruct iris_bo; 35b8e80941Smrg 36b8e80941Smrg#define READ_ONCE(x) (*(volatile __typeof__(x) *)&(x)) 37b8e80941Smrg#define WRITE_ONCE(x, v) *(volatile __typeof__(x) *)&(x) = (v) 38b8e80941Smrg 39b8e80941Smrg#define IRIS_MAX_TEXTURE_SAMPLERS 32 40b8e80941Smrg#define IRIS_MAX_SOL_BUFFERS 4 41b8e80941Smrg#define IRIS_MAP_BUFFER_ALIGNMENT 64 42b8e80941Smrg 43b8e80941Smrgstruct iris_screen { 44b8e80941Smrg struct pipe_screen base; 45b8e80941Smrg 46b8e80941Smrg /** Global slab allocator for iris_transfer_map objects */ 47b8e80941Smrg struct slab_parent_pool transfer_pool; 48b8e80941Smrg 49b8e80941Smrg /** drm device file descriptor */ 50b8e80941Smrg int fd; 51b8e80941Smrg 52b8e80941Smrg /** PCI ID for our GPU device */ 53b8e80941Smrg int pci_id; 54b8e80941Smrg 55b8e80941Smrg bool no_hw; 56b8e80941Smrg 57b8e80941Smrg /** Global program_string_id counter (see get_program_string_id()) */ 58b8e80941Smrg unsigned program_id; 59b8e80941Smrg 60b8e80941Smrg /** Precompile shaders at link time? (Can be disabled for debugging.) */ 61b8e80941Smrg bool precompile; 62b8e80941Smrg 63b8e80941Smrg /** driconf options and application workarounds */ 64b8e80941Smrg struct { 65b8e80941Smrg /** Dual color blend by location instead of index (for broken apps) */ 66b8e80941Smrg bool dual_color_blend_by_location; 67b8e80941Smrg } driconf; 68b8e80941Smrg 69b8e80941Smrg unsigned subslice_total; 70b8e80941Smrg 71b8e80941Smrg struct gen_device_info devinfo; 72b8e80941Smrg struct isl_device isl_dev; 73b8e80941Smrg struct iris_bufmgr *bufmgr; 74b8e80941Smrg struct brw_compiler *compiler; 75b8e80941Smrg 76b8e80941Smrg /** 77b8e80941Smrg * A buffer containing nothing useful, for hardware workarounds that 78b8e80941Smrg * require scratch writes or reads from some unimportant memory. 79b8e80941Smrg */ 80b8e80941Smrg struct iris_bo *workaround_bo; 81b8e80941Smrg}; 82b8e80941Smrg 83b8e80941Smrgstruct pipe_screen * 84b8e80941Smrgiris_screen_create(int fd, const struct pipe_screen_config *config); 85b8e80941Smrg 86b8e80941Smrgboolean 87b8e80941Smrgiris_is_format_supported(struct pipe_screen *pscreen, 88b8e80941Smrg enum pipe_format format, 89b8e80941Smrg enum pipe_texture_target target, 90b8e80941Smrg unsigned sample_count, 91b8e80941Smrg unsigned storage_sample_count, 92b8e80941Smrg unsigned usage); 93b8e80941Smrg 94b8e80941Smrg#endif 95