1848b8605Smrg/*
2848b8605Smrg * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3848b8605Smrg *
4848b8605Smrg * Permission is hereby granted, free of charge, to any person obtaining a
5848b8605Smrg * copy of this software and associated documentation files (the "Software"),
6848b8605Smrg * to deal in the Software without restriction, including without limitation
7848b8605Smrg * on the rights to use, copy, modify, merge, publish, distribute, sub
8848b8605Smrg * license, and/or sell copies of the Software, and to permit persons to whom
9848b8605Smrg * the Software is furnished to do so, subject to the following conditions:
10848b8605Smrg *
11848b8605Smrg * The above copyright notice and this permission notice (including the next
12848b8605Smrg * paragraph) shall be included in all copies or substantial portions of the
13848b8605Smrg * Software.
14848b8605Smrg *
15848b8605Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16848b8605Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17848b8605Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18848b8605Smrg * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19848b8605Smrg * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20848b8605Smrg * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21848b8605Smrg * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22848b8605Smrg
23848b8605Smrg#ifndef R300_CHIPSET_H
24848b8605Smrg#define R300_CHIPSET_H
25848b8605Smrg
26848b8605Smrg#include "pipe/p_compiler.h"
27848b8605Smrg
28848b8605Smrg/* these are sizes in dwords */
29848b8605Smrg#define R300_HIZ_LIMIT 10240
30848b8605Smrg#define RV530_HIZ_LIMIT 15360
31848b8605Smrg
32848b8605Smrg/* rv3xx have only one pipe */
33848b8605Smrg#define PIPE_ZMASK_SIZE 4096
34848b8605Smrg#define RV3xx_ZMASK_SIZE 5120
35848b8605Smrg
36848b8605Smrg/* The size of a compressed tile. Each compressed tile takes 2 bits
37848b8605Smrg * in the ZMASK RAM, so there is always 16 tiles per one dword. */
38848b8605Smrgenum r300_zmask_compression {
39848b8605Smrg   R300_ZCOMP_4X4 = 4,
40848b8605Smrg   R300_ZCOMP_8X8 = 8
41848b8605Smrg};
42848b8605Smrg
43848b8605Smrg/* Structure containing all the possible information about a specific Radeon
44848b8605Smrg * in the R3xx, R4xx, and R5xx families. */
45848b8605Smrgstruct r300_capabilities {
46848b8605Smrg    /* Chipset family */
47848b8605Smrg    int family;
48848b8605Smrg    /* The number of vertex floating-point units */
49848b8605Smrg    unsigned num_vert_fpus;
50848b8605Smrg    /* The number of texture units. */
51848b8605Smrg    unsigned num_tex_units;
52848b8605Smrg    /* Whether or not TCL is physically present */
53848b8605Smrg    boolean has_tcl;
54848b8605Smrg    /* Some chipsets do not have HiZ RAM - other have varying amounts. */
55848b8605Smrg    int hiz_ram;
56848b8605Smrg    /* Some chipsets have zmask ram per pipe some don't. */
57848b8605Smrg    int zmask_ram;
58848b8605Smrg    /* CMASK is for MSAA colorbuffer compression and fast clear. */
59848b8605Smrg    boolean has_cmask;
60848b8605Smrg    /* Compression mode for ZMASK. */
61848b8605Smrg    enum r300_zmask_compression z_compress;
62848b8605Smrg    /* Whether or not this is RV350 or newer, including all r400 and r500
63848b8605Smrg     * chipsets. The differences compared to the oldest r300 chips are:
64848b8605Smrg     * - Blend LTE/GTE thresholds
65848b8605Smrg     * - Better MACRO_SWITCH in texture tiling
66848b8605Smrg     * - Half float vertex
67848b8605Smrg     * - More HyperZ optimizations */
68848b8605Smrg    boolean is_rv350;
69848b8605Smrg    /* Whether or not this is R400. The differences compared their rv350
70848b8605Smrg     * cousins are:
71848b8605Smrg     * - Extended fragment shader registers
72848b8605Smrg     * - 3DC texture compression (RGTC2) */
73848b8605Smrg    boolean is_r400;
74848b8605Smrg    /* Whether or not this is an RV515 or newer; R500s have many differences
75848b8605Smrg     * that require extra consideration, compared to their rv350 cousins:
76848b8605Smrg     * - Extra bit of width and height on texture sizes
77848b8605Smrg     * - Blend color is split across two registers
78848b8605Smrg     * - Universal Shader (US) block used for fragment shaders
79848b8605Smrg     * - FP16 blending and multisampling
80848b8605Smrg     * - Full RGTC texture compression
81848b8605Smrg     * - 24-bit depth textures
82848b8605Smrg     * - Stencil back-face reference value
83848b8605Smrg     * - Ability to render up to 2^24 - 1 vertices with signed index offset */
84848b8605Smrg    boolean is_r500;
85848b8605Smrg    /* Whether or not the second pixel pipe is accessed with the high bit */
86848b8605Smrg    boolean high_second_pipe;
87848b8605Smrg    /* DXTC texture swizzling. */
88848b8605Smrg    boolean dxtc_swizzle;
89848b8605Smrg    /* Whether R500_US_FORMAT0_0 exists (R520-only and depends on DRM). */
90848b8605Smrg    boolean has_us_format;
91848b8605Smrg};
92848b8605Smrg
93848b8605Smrgvoid r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps);
94848b8605Smrg
95848b8605Smrg#endif /* R300_CHIPSET_H */
96